* [PATCH] ARM: dts: k3-j721s2: Correct timer frequency
@ 2022-03-07 9:25 Vignesh Raghavendra
2022-04-09 16:16 ` Vignesh Raghavendra
2022-04-11 20:14 ` Tom Rini
0 siblings, 2 replies; 4+ messages in thread
From: Vignesh Raghavendra @ 2022-03-07 9:25 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Vignesh Raghavendra, Nishanth Menon, Aswath Govindraju
MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
incorrect.
Without this delays in R5 SPL are 10x off.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
---
arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
index 749bc717f3..a17e61eccf 100644
--- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
+++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
@@ -40,7 +40,7 @@
compatible = "ti,omap5430-timer";
reg = <0x0 0x40400000 0x0 0x80>;
ti,timer-alwon;
- clock-frequency = <25000000>;
+ clock-frequency = <250000000>;
u-boot,dm-spl;
};
--
2.35.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: dts: k3-j721s2: Correct timer frequency
2022-03-07 9:25 [PATCH] ARM: dts: k3-j721s2: Correct timer frequency Vignesh Raghavendra
@ 2022-04-09 16:16 ` Vignesh Raghavendra
2022-04-09 19:50 ` Tom Rini
2022-04-11 20:14 ` Tom Rini
1 sibling, 1 reply; 4+ messages in thread
From: Vignesh Raghavendra @ 2022-04-09 16:16 UTC (permalink / raw)
To: Tom Rini; +Cc: u-boot, Nishanth Menon, Aswath Govindraju
On 07/03/22 2:55 pm, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> ---
> arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> index 749bc717f3..a17e61eccf 100644
> --- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> +++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> @@ -40,7 +40,7 @@
> compatible = "ti,omap5430-timer";
> reg = <0x0 0x40400000 0x0 0x80>;
> ti,timer-alwon;
> - clock-frequency = <25000000>;
> + clock-frequency = <250000000>;
> u-boot,dm-spl;
> };
>
Gentle ping...
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: dts: k3-j721s2: Correct timer frequency
2022-04-09 16:16 ` Vignesh Raghavendra
@ 2022-04-09 19:50 ` Tom Rini
0 siblings, 0 replies; 4+ messages in thread
From: Tom Rini @ 2022-04-09 19:50 UTC (permalink / raw)
To: Vignesh Raghavendra; +Cc: u-boot, Nishanth Menon, Aswath Govindraju
[-- Attachment #1: Type: text/plain, Size: 1103 bytes --]
On Sat, Apr 09, 2022 at 09:46:58PM +0530, Vignesh Raghavendra wrote:
>
>
> On 07/03/22 2:55 pm, Vignesh Raghavendra wrote:
> > MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> > incorrect.
> >
> > Without this delays in R5 SPL are 10x off.
> >
> > Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
> > ---
> > arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> > index 749bc717f3..a17e61eccf 100644
> > --- a/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> > +++ b/arch/arm/dts/k3-j721s2-common-proc-board-u-boot.dtsi
> > @@ -40,7 +40,7 @@
> > compatible = "ti,omap5430-timer";
> > reg = <0x0 0x40400000 0x0 0x80>;
> > ti,timer-alwon;
> > - clock-frequency = <25000000>;
> > + clock-frequency = <250000000>;
> > u-boot,dm-spl;
> > };
>
>
> Gentle ping...
Thanks for the reminder, was mislabled in patchwork.
--
Tom
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^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] ARM: dts: k3-j721s2: Correct timer frequency
2022-03-07 9:25 [PATCH] ARM: dts: k3-j721s2: Correct timer frequency Vignesh Raghavendra
2022-04-09 16:16 ` Vignesh Raghavendra
@ 2022-04-11 20:14 ` Tom Rini
1 sibling, 0 replies; 4+ messages in thread
From: Tom Rini @ 2022-04-11 20:14 UTC (permalink / raw)
To: Vignesh Raghavendra; +Cc: u-boot, Nishanth Menon, Aswath Govindraju
[-- Attachment #1: Type: text/plain, Size: 321 bytes --]
On Mon, Mar 07, 2022 at 02:55:51PM +0530, Vignesh Raghavendra wrote:
> MCU Timer0 runs at 250MHz, and the clock-frequency defined in DT appears
> incorrect.
>
> Without this delays in R5 SPL are 10x off.
>
> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Applied to u-boot/master, thanks!
--
Tom
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^ permalink raw reply [flat|nested] 4+ messages in thread
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2022-03-07 9:25 [PATCH] ARM: dts: k3-j721s2: Correct timer frequency Vignesh Raghavendra
2022-04-09 16:16 ` Vignesh Raghavendra
2022-04-09 19:50 ` Tom Rini
2022-04-11 20:14 ` Tom Rini
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