* [PATCH v2] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
@ 2022-04-17 23:42 Tony Dinh
2022-04-21 14:17 ` Stefan Roese
0 siblings, 1 reply; 2+ messages in thread
From: Tony Dinh @ 2022-04-17 23:42 UTC (permalink / raw)
To: U-Boot Mailing List, Stefan Roese; +Cc: Tom Rini, Tony Dinh
The Globalscale Technologies Sheevaplug board has the network chip
Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
driver to bring up Ethernet.
- Remove CONFIG_RESET_PHY_R symbol from all board files
- Use uclass mvgbe to bring up the network. And remove ad-hoc code.
- Enable CONFIG_PHY_MARVELL to properly configure the network.
- Miscellaneous changes: Move constants to .c file and remove header file
board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
comments.
Signed-off-by: Tony Dinh <mibodhi@gmail.com>
---
Changes in v2:
- Remove CONFIG_RESET_PHY_R from configs file and it is no longer needed
to undefine it in include board file.
- Misceslanous changes: enable CONFIG_SYS_64BIT_LBA (for large HDD & USB),
CONFIG_CMD_FS_GENERIC (generic load cmd), CONFIG_CMD_SETEXPR (enhance
shell expression).
board/Marvell/sheevaplug/sheevaplug.c | 83 +++++----------------------
board/Marvell/sheevaplug/sheevaplug.h | 24 --------
configs/sheevaplug_defconfig | 4 +-
include/configs/sheevaplug.h | 19 ++----
4 files changed, 20 insertions(+), 110 deletions(-)
delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c
index 5952d158b2..26ee39ef77 100644
--- a/board/Marvell/sheevaplug/sheevaplug.c
+++ b/board/Marvell/sheevaplug/sheevaplug.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com>
+ * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
* (C) Copyright 2009
* Marvell Semiconductor <www.marvell.com>
* Written-by: Prafulla Wadaskar <prafulla@marvell.com>
@@ -8,17 +8,21 @@
#include <common.h>
#include <init.h>
-#include <miiphy.h>
-#include <net.h>
+#include <netdev.h>
#include <asm/global_data.h>
#include <asm/mach-types.h>
#include <asm/arch/cpu.h>
#include <asm/arch/soc.h>
#include <asm/arch/mpp.h>
-#include "sheevaplug.h"
+#include <linux/bitops.h>
DECLARE_GLOBAL_DATA_PTR;
+#define SHEEVAPLUG_OE_LOW (~(0))
+#define SHEEVAPLUG_OE_HIGH (~(0))
+#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */
+#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
+
int board_early_init_f(void)
{
/*
@@ -88,6 +92,11 @@ int board_early_init_f(void)
return 0;
}
+int board_eth_init(struct bd_info *bis)
+{
+ return cpu_eth_init(bis);
+}
+
int board_init(void)
{
/*
@@ -95,72 +104,8 @@ int board_init(void)
*/
gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
- /* adress of boot parameters */
+ /* address of boot parameters */
gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
return 0;
}
-
-static int fdt_get_phy_addr(const char *path)
-{
- const void *fdt = gd->fdt_blob;
- const u32 *reg;
- const u32 *val;
- int node, phandle, addr;
-
- /* Find the node by its full path */
- node = fdt_path_offset(fdt, path);
- if (node >= 0) {
- /* Look up phy-handle */
- val = fdt_getprop(fdt, node, "phy-handle", NULL);
- if (val) {
- phandle = fdt32_to_cpu(*val);
- if (!phandle)
- return -1;
- /* Follow it to its node */
- node = fdt_node_offset_by_phandle(fdt, phandle);
- if (node) {
- /* Look up reg */
- reg = fdt_getprop(fdt, node, "reg", NULL);
- if (reg) {
- addr = fdt32_to_cpu(*reg);
- return addr;
- }
- }
- }
- }
- return -1;
-}
-
-#ifdef CONFIG_RESET_PHY_R
-/* Configure and enable MV88E1116 PHY */
-void reset_phy(void)
-{
- u16 reg;
- int phyaddr;
- char *name = "ethernet-controller@72000";
- char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
-
- if (miiphy_set_current_dev(name))
- return;
-
- phyaddr = fdt_get_phy_addr(eth0_path);
- if (phyaddr < 0)
- return;
-
- /*
- * Enable RGMII delay on Tx and Rx for CPU port
- * Ref: sec 4.7.2 of chip datasheet
- */
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
- miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
- reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
- miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
- miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
-
- /* reset the phy */
- miiphy_reset(name, phyaddr);
-
- printf("88E1116 Initialized on %s\n", name);
-}
-#endif /* CONFIG_RESET_PHY_R */
diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h
deleted file mode 100644
index e026c1b53b..0000000000
--- a/board/Marvell/sheevaplug/sheevaplug.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009
- * Marvell Semiconductor <www.marvell.com>
- * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
- */
-
-#ifndef __SHEEVAPLUG_H
-#define __SHEEVAPLUG_H
-
-#define SHEEVAPLUG_OE_LOW (~(0))
-#define SHEEVAPLUG_OE_HIGH (~(0))
-#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
-#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
-
-/* PHY related */
-#define MV88E1116_LED_FCTRL_REG 10
-#define MV88E1116_CPRSP_CR3_REG 21
-#define MV88E1116_MAC_CTRL_REG 21
-#define MV88E1116_PGADR_REG 22
-#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
-#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
-
-#endif /* __SHEEVAPLUG_H */
diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
index 0525bb436e..0477cd79e3 100644
--- a/configs/sheevaplug_defconfig
+++ b/configs/sheevaplug_defconfig
@@ -21,7 +21,6 @@ CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;"
CONFIG_USE_PREBOOT=y
# CONFIG_DISPLAY_BOARDINFO is not set
-CONFIG_RESET_PHY_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_BOOTZ=y
# CONFIG_CMD_FLASH is not set
@@ -29,13 +28,13 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_NAND=y
CONFIG_CMD_SATA=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
CONFIG_CMD_JFFS2=y
CONFIG_CMD_MTDPARTS=y
CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
@@ -54,6 +53,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2
CONFIG_MVEBU_MMC=y
CONFIG_MTD=y
CONFIG_MTD_RAW_NAND=y
+CONFIG_PHY_MARVELL=y
CONFIG_DM_ETH=y
CONFIG_MVGBE=y
CONFIG_MII=y
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index 0cc58c3a7d..58345e4e1b 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -1,5 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
+ * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com>
* (C) Copyright 2009-2014
* Gerald Kerma <dreagle@doukki.net>
* Marvell Semiconductor <www.marvell.com>
@@ -14,17 +15,8 @@
/*
* Environment variables configurations
*/
-/*
- * max 4k env size is enough, but in case of nand
- * it has to be rounded to sector size
- */
-
-/*
- * Default environment variables
- */
-
#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
- "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
+ "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \
"x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \
"x_bootcmd_usb=usb start\0" \
"x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
@@ -32,16 +24,13 @@
/*
* Ethernet Driver configuration
*/
-#ifdef CONFIG_CMD_NET
#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
#define CONFIG_PHY_BASE_ADR 0
-#endif /* CONFIG_CMD_NET */
/*
- * SATA driver configuration
+ * Support large disk for SATA and USB
*/
-#ifdef CONFIG_SATA
+#define CONFIG_SYS_64BIT_LBA
#define CONFIG_LBA48
-#endif /* CONFIG_SATA */
#endif /* _CONFIG_SHEEVAPLUG_H */
--
2.30.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH v2] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet
2022-04-17 23:42 [PATCH v2] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet Tony Dinh
@ 2022-04-21 14:17 ` Stefan Roese
0 siblings, 0 replies; 2+ messages in thread
From: Stefan Roese @ 2022-04-21 14:17 UTC (permalink / raw)
To: Tony Dinh, U-Boot Mailing List; +Cc: Tom Rini
On 4/18/22 01:42, Tony Dinh wrote:
> The Globalscale Technologies Sheevaplug board has the network chip
> Marvell 88E1116R. Use uclass mvgbe and the compatible driver M88E1310
> driver to bring up Ethernet.
>
> - Remove CONFIG_RESET_PHY_R symbol from all board files
> - Use uclass mvgbe to bring up the network. And remove ad-hoc code.
> - Enable CONFIG_PHY_MARVELL to properly configure the network.
> - Miscellaneous changes: Move constants to .c file and remove header file
> board/Marvell/sheevaplug/sheevaplug.h, use BIT macro, and add/cleanup
> comments.
>
> Signed-off-by: Tony Dinh <mibodhi@gmail.com>
Applied to u-boot-marvell/master
Thanks,
Stefan
> ---
>
> Changes in v2:
> - Remove CONFIG_RESET_PHY_R from configs file and it is no longer needed
> to undefine it in include board file.
> - Misceslanous changes: enable CONFIG_SYS_64BIT_LBA (for large HDD & USB),
> CONFIG_CMD_FS_GENERIC (generic load cmd), CONFIG_CMD_SETEXPR (enhance
> shell expression).
>
> board/Marvell/sheevaplug/sheevaplug.c | 83 +++++----------------------
> board/Marvell/sheevaplug/sheevaplug.h | 24 --------
> configs/sheevaplug_defconfig | 4 +-
> include/configs/sheevaplug.h | 19 ++----
> 4 files changed, 20 insertions(+), 110 deletions(-)
> delete mode 100644 board/Marvell/sheevaplug/sheevaplug.h
>
> diff --git a/board/Marvell/sheevaplug/sheevaplug.c b/board/Marvell/sheevaplug/sheevaplug.c
> index 5952d158b2..26ee39ef77 100644
> --- a/board/Marvell/sheevaplug/sheevaplug.c
> +++ b/board/Marvell/sheevaplug/sheevaplug.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> /*
> - * Copyright (C) 2021 Tony Dinh <mibodhi@gmail.com>
> + * Copyright (C) 2021-2022 Tony Dinh <mibodhi@gmail.com>
> * (C) Copyright 2009
> * Marvell Semiconductor <www.marvell.com>
> * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> @@ -8,17 +8,21 @@
>
> #include <common.h>
> #include <init.h>
> -#include <miiphy.h>
> -#include <net.h>
> +#include <netdev.h>
> #include <asm/global_data.h>
> #include <asm/mach-types.h>
> #include <asm/arch/cpu.h>
> #include <asm/arch/soc.h>
> #include <asm/arch/mpp.h>
> -#include "sheevaplug.h"
> +#include <linux/bitops.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> +#define SHEEVAPLUG_OE_LOW (~(0))
> +#define SHEEVAPLUG_OE_HIGH (~(0))
> +#define SHEEVAPLUG_OE_VAL_LOW BIT(29) /* USB_PWEN low */
> +#define SHEEVAPLUG_OE_VAL_HIGH BIT(17) /* LED pin high */
> +
> int board_early_init_f(void)
> {
> /*
> @@ -88,6 +92,11 @@ int board_early_init_f(void)
> return 0;
> }
>
> +int board_eth_init(struct bd_info *bis)
> +{
> + return cpu_eth_init(bis);
> +}
> +
> int board_init(void)
> {
> /*
> @@ -95,72 +104,8 @@ int board_init(void)
> */
> gd->bd->bi_arch_number = MACH_TYPE_SHEEVAPLUG;
>
> - /* adress of boot parameters */
> + /* address of boot parameters */
> gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100;
>
> return 0;
> }
> -
> -static int fdt_get_phy_addr(const char *path)
> -{
> - const void *fdt = gd->fdt_blob;
> - const u32 *reg;
> - const u32 *val;
> - int node, phandle, addr;
> -
> - /* Find the node by its full path */
> - node = fdt_path_offset(fdt, path);
> - if (node >= 0) {
> - /* Look up phy-handle */
> - val = fdt_getprop(fdt, node, "phy-handle", NULL);
> - if (val) {
> - phandle = fdt32_to_cpu(*val);
> - if (!phandle)
> - return -1;
> - /* Follow it to its node */
> - node = fdt_node_offset_by_phandle(fdt, phandle);
> - if (node) {
> - /* Look up reg */
> - reg = fdt_getprop(fdt, node, "reg", NULL);
> - if (reg) {
> - addr = fdt32_to_cpu(*reg);
> - return addr;
> - }
> - }
> - }
> - }
> - return -1;
> -}
> -
> -#ifdef CONFIG_RESET_PHY_R
> -/* Configure and enable MV88E1116 PHY */
> -void reset_phy(void)
> -{
> - u16 reg;
> - int phyaddr;
> - char *name = "ethernet-controller@72000";
> - char *eth0_path = "/ocp@f1000000/ethernet-controller@72000/ethernet0-port@0";
> -
> - if (miiphy_set_current_dev(name))
> - return;
> -
> - phyaddr = fdt_get_phy_addr(eth0_path);
> - if (phyaddr < 0)
> - return;
> -
> - /*
> - * Enable RGMII delay on Tx and Rx for CPU port
> - * Ref: sec 4.7.2 of chip datasheet
> - */
> - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 2);
> - miiphy_read(name, phyaddr, MV88E1116_MAC_CTRL_REG, ®);
> - reg |= (MV88E1116_RGMII_RXTM_CTRL | MV88E1116_RGMII_TXTM_CTRL);
> - miiphy_write(name, phyaddr, MV88E1116_MAC_CTRL_REG, reg);
> - miiphy_write(name, phyaddr, MV88E1116_PGADR_REG, 0);
> -
> - /* reset the phy */
> - miiphy_reset(name, phyaddr);
> -
> - printf("88E1116 Initialized on %s\n", name);
> -}
> -#endif /* CONFIG_RESET_PHY_R */
> diff --git a/board/Marvell/sheevaplug/sheevaplug.h b/board/Marvell/sheevaplug/sheevaplug.h
> deleted file mode 100644
> index e026c1b53b..0000000000
> --- a/board/Marvell/sheevaplug/sheevaplug.h
> +++ /dev/null
> @@ -1,24 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * (C) Copyright 2009
> - * Marvell Semiconductor <www.marvell.com>
> - * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
> - */
> -
> -#ifndef __SHEEVAPLUG_H
> -#define __SHEEVAPLUG_H
> -
> -#define SHEEVAPLUG_OE_LOW (~(0))
> -#define SHEEVAPLUG_OE_HIGH (~(0))
> -#define SHEEVAPLUG_OE_VAL_LOW (1 << 29) /* USB_PWEN low */
> -#define SHEEVAPLUG_OE_VAL_HIGH (1 << 17) /* LED pin high */
> -
> -/* PHY related */
> -#define MV88E1116_LED_FCTRL_REG 10
> -#define MV88E1116_CPRSP_CR3_REG 21
> -#define MV88E1116_MAC_CTRL_REG 21
> -#define MV88E1116_PGADR_REG 22
> -#define MV88E1116_RGMII_TXTM_CTRL (1 << 4)
> -#define MV88E1116_RGMII_RXTM_CTRL (1 << 5)
> -
> -#endif /* __SHEEVAPLUG_H */
> diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig
> index 0525bb436e..0477cd79e3 100644
> --- a/configs/sheevaplug_defconfig
> +++ b/configs/sheevaplug_defconfig
> @@ -21,7 +21,6 @@ CONFIG_USE_BOOTCOMMAND=y
> CONFIG_BOOTCOMMAND="${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;"
> CONFIG_USE_PREBOOT=y
> # CONFIG_DISPLAY_BOARDINFO is not set
> -CONFIG_RESET_PHY_R=y
> CONFIG_HUSH_PARSER=y
> CONFIG_CMD_BOOTZ=y
> # CONFIG_CMD_FLASH is not set
> @@ -29,13 +28,13 @@ CONFIG_CMD_MMC=y
> CONFIG_CMD_NAND=y
> CONFIG_CMD_SATA=y
> CONFIG_CMD_USB=y
> -# CONFIG_CMD_SETEXPR is not set
> CONFIG_CMD_DHCP=y
> CONFIG_CMD_MII=y
> CONFIG_CMD_PING=y
> CONFIG_CMD_EXT2=y
> CONFIG_CMD_EXT4=y
> CONFIG_CMD_FAT=y
> +CONFIG_CMD_FS_GENERIC=y
> CONFIG_CMD_JFFS2=y
> CONFIG_CMD_MTDPARTS=y
> CONFIG_MTDIDS_DEFAULT="nand0=orion_nand"
> @@ -54,6 +53,7 @@ CONFIG_SYS_SATA_MAX_DEVICE=2
> CONFIG_MVEBU_MMC=y
> CONFIG_MTD=y
> CONFIG_MTD_RAW_NAND=y
> +CONFIG_PHY_MARVELL=y
> CONFIG_DM_ETH=y
> CONFIG_MVGBE=y
> CONFIG_MII=y
> diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
> index 0cc58c3a7d..58345e4e1b 100644
> --- a/include/configs/sheevaplug.h
> +++ b/include/configs/sheevaplug.h
> @@ -1,5 +1,6 @@
> /* SPDX-License-Identifier: GPL-2.0+ */
> /*
> + * (C) Copyright 2022 Tony Dinh <mibodhi@gmail.com>
> * (C) Copyright 2009-2014
> * Gerald Kerma <dreagle@doukki.net>
> * Marvell Semiconductor <www.marvell.com>
> @@ -14,17 +15,8 @@
> /*
> * Environment variables configurations
> */
> -/*
> - * max 4k env size is enough, but in case of nand
> - * it has to be rounded to sector size
> - */
> -
> -/*
> - * Default environment variables
> - */
> -
> #define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
> - "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
> + "=ttyS0,115200 mtdparts=" CONFIG_MTDPARTS_DEFAULT \
> "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \
> "x_bootcmd_usb=usb start\0" \
> "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
> @@ -32,16 +24,13 @@
> /*
> * Ethernet Driver configuration
> */
> -#ifdef CONFIG_CMD_NET
> #define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
> #define CONFIG_PHY_BASE_ADR 0
> -#endif /* CONFIG_CMD_NET */
>
> /*
> - * SATA driver configuration
> + * Support large disk for SATA and USB
> */
> -#ifdef CONFIG_SATA
> +#define CONFIG_SYS_64BIT_LBA
> #define CONFIG_LBA48
> -#endif /* CONFIG_SATA */
>
> #endif /* _CONFIG_SHEEVAPLUG_H */
Viele Grüße,
Stefan Roese
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-51 Fax: (+49)-8142-66989-80 Email: sr@denx.de
^ permalink raw reply [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-04-21 14:18 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-17 23:42 [PATCH v2] arm: kirkwood: Sheevaplug : Use Marvell uclass mvgbe and PHY driver for Ethernet Tony Dinh
2022-04-21 14:17 ` Stefan Roese
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.