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From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>
Cc: <airlied@linux.ie>, <matthias.bgg@gmail.com>,
	<angelogioacchino.delregno@collabora.com>,
	<jason-jh.lin@mediatek.com>, <nancy.lin@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
Date: Tue, 19 Apr 2022 11:32:33 +0800	[thread overview]
Message-ID: <20220419033237.23405-2-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220419033237.23405-1-rex-bc.chen@mediatek.com>

From: "jason-jh.lin" <jason-jh.lin@mediatek.com>

Power:
1. Add description for power-domains property.

GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
   reg:
     maxItems: 1
 
+  power-domains:
+    description:
+      A phandle and PM domain specifier as defined by bindings
+      of the power controller specified by phandle. See
+      Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+  mboxes:
+    description:
+      Using mailbox to communicate with GCE, it should have this
+      property and list of phandle, mailbox specifiers. See
+      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  mediatek,gce-client-reg:
+    description:
+      The register of client driver can be configured by gce with 4 arguments
+      defined in this property, such as phandle of gce, subsys id,
+      register offset and size.
+      Each subsys id is mapping to a base address of display function blocks
+      register which is defined in the gce header
+      include/dt-bindings/gce/<chip>-gce.h.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
   "#clock-cells":
     const: 1
 
@@ -56,9 +80,16 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/power/mt8173-power.h>
+    #include <dt-bindings/gce/mt8173-gce.h>
+
     mmsys: syscon@14000000 {
         compatible = "mediatek,mt8173-mmsys", "syscon";
         reg = <0x14000000 0x1000>;
+        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
     };
-- 
2.18.0


WARNING: multiple messages have this Message-ID
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>
Cc: devicetree@vger.kernel.org, airlied@linux.ie,
	jason-jh.lin@mediatek.com, linux-kernel@vger.kernel.org,
	dri-devel@lists.freedesktop.org,
	Project_Global_Chrome_Upstream_Group@mediatek.com,
	nancy.lin@mediatek.com, linux-mediatek@lists.infradead.org,
	matthias.bgg@gmail.com, linux-arm-kernel@lists.infradead.org,
	angelogioacchino.delregno@collabora.com
Subject: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
Date: Tue, 19 Apr 2022 11:32:33 +0800	[thread overview]
Message-ID: <20220419033237.23405-2-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220419033237.23405-1-rex-bc.chen@mediatek.com>

From: "jason-jh.lin" <jason-jh.lin@mediatek.com>

Power:
1. Add description for power-domains property.

GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
   reg:
     maxItems: 1
 
+  power-domains:
+    description:
+      A phandle and PM domain specifier as defined by bindings
+      of the power controller specified by phandle. See
+      Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+  mboxes:
+    description:
+      Using mailbox to communicate with GCE, it should have this
+      property and list of phandle, mailbox specifiers. See
+      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  mediatek,gce-client-reg:
+    description:
+      The register of client driver can be configured by gce with 4 arguments
+      defined in this property, such as phandle of gce, subsys id,
+      register offset and size.
+      Each subsys id is mapping to a base address of display function blocks
+      register which is defined in the gce header
+      include/dt-bindings/gce/<chip>-gce.h.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
   "#clock-cells":
     const: 1
 
@@ -56,9 +80,16 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/power/mt8173-power.h>
+    #include <dt-bindings/gce/mt8173-gce.h>
+
     mmsys: syscon@14000000 {
         compatible = "mediatek,mt8173-mmsys", "syscon";
         reg = <0x14000000 0x1000>;
+        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
     };
-- 
2.18.0


WARNING: multiple messages have this Message-ID
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>
Cc: <airlied@linux.ie>, <matthias.bgg@gmail.com>,
	<angelogioacchino.delregno@collabora.com>,
	<jason-jh.lin@mediatek.com>, <nancy.lin@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
Date: Tue, 19 Apr 2022 11:32:33 +0800	[thread overview]
Message-ID: <20220419033237.23405-2-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220419033237.23405-1-rex-bc.chen@mediatek.com>

From: "jason-jh.lin" <jason-jh.lin@mediatek.com>

Power:
1. Add description for power-domains property.

GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
   reg:
     maxItems: 1
 
+  power-domains:
+    description:
+      A phandle and PM domain specifier as defined by bindings
+      of the power controller specified by phandle. See
+      Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+  mboxes:
+    description:
+      Using mailbox to communicate with GCE, it should have this
+      property and list of phandle, mailbox specifiers. See
+      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  mediatek,gce-client-reg:
+    description:
+      The register of client driver can be configured by gce with 4 arguments
+      defined in this property, such as phandle of gce, subsys id,
+      register offset and size.
+      Each subsys id is mapping to a base address of display function blocks
+      register which is defined in the gce header
+      include/dt-bindings/gce/<chip>-gce.h.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
   "#clock-cells":
     const: 1
 
@@ -56,9 +80,16 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/power/mt8173-power.h>
+    #include <dt-bindings/gce/mt8173-gce.h>
+
     mmsys: syscon@14000000 {
         compatible = "mediatek,mt8173-mmsys", "syscon";
         reg = <0x14000000 0x1000>;
+        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
     };
-- 
2.18.0


_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek

WARNING: multiple messages have this Message-ID
From: Rex-BC Chen <rex-bc.chen@mediatek.com>
To: <robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<chunkuang.hu@kernel.org>, <p.zabel@pengutronix.de>
Cc: <airlied@linux.ie>, <matthias.bgg@gmail.com>,
	<angelogioacchino.delregno@collabora.com>,
	<jason-jh.lin@mediatek.com>, <nancy.lin@mediatek.com>,
	<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<dri-devel@lists.freedesktop.org>,
	<linux-mediatek@lists.infradead.org>,
	<linux-arm-kernel@lists.infradead.org>,
	 <Project_Global_Chrome_Upstream_Group@mediatek.com>
Subject: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
Date: Tue, 19 Apr 2022 11:32:33 +0800	[thread overview]
Message-ID: <20220419033237.23405-2-rex-bc.chen@mediatek.com> (raw)
In-Reply-To: <20220419033237.23405-1-rex-bc.chen@mediatek.com>

From: "jason-jh.lin" <jason-jh.lin@mediatek.com>

Power:
1. Add description for power-domains property.

GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.

Signed-off-by: jason-jh.lin <jason-jh.lin@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
---
 .../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
   reg:
     maxItems: 1
 
+  power-domains:
+    description:
+      A phandle and PM domain specifier as defined by bindings
+      of the power controller specified by phandle. See
+      Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+  mboxes:
+    description:
+      Using mailbox to communicate with GCE, it should have this
+      property and list of phandle, mailbox specifiers. See
+      Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+
+  mediatek,gce-client-reg:
+    description:
+      The register of client driver can be configured by gce with 4 arguments
+      defined in this property, such as phandle of gce, subsys id,
+      register offset and size.
+      Each subsys id is mapping to a base address of display function blocks
+      register which is defined in the gce header
+      include/dt-bindings/gce/<chip>-gce.h.
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    maxItems: 1
+
   "#clock-cells":
     const: 1
 
@@ -56,9 +80,16 @@ additionalProperties: false
 
 examples:
   - |
+    #include <dt-bindings/power/mt8173-power.h>
+    #include <dt-bindings/gce/mt8173-gce.h>
+
     mmsys: syscon@14000000 {
         compatible = "mediatek,mt8173-mmsys", "syscon";
         reg = <0x14000000 0x1000>;
+        power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
         #clock-cells = <1>;
         #reset-cells = <1>;
+        mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+                 <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+        mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
     };
-- 
2.18.0


_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-04-19  3:32 UTC|newest]

Thread overview: 82+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-19  3:32 [PATCH 0/5] MediaTek MT8195 display binding Rex-BC Chen
2022-04-19  3:32 ` Rex-BC Chen
2022-04-19  3:32 ` Rex-BC Chen
2022-04-19  3:32 ` Rex-BC Chen
2022-04-19  3:32 ` Rex-BC Chen [this message]
2022-04-19  3:32   ` [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19 14:54   ` Matthias Brugger
2022-04-19 14:54     ` Matthias Brugger
2022-04-19 14:54     ` Matthias Brugger
2022-04-19 14:54     ` Matthias Brugger
2022-04-26 18:31   ` Rob Herring
2022-04-26 18:31     ` Rob Herring
2022-04-26 18:31     ` Rob Herring
2022-04-26 18:31     ` Rob Herring
2022-04-27  2:47     ` Jason-JH Lin
2022-04-27  2:47       ` Jason-JH Lin
2022-04-27  2:47       ` Jason-JH Lin
2022-04-27  2:47       ` Jason-JH Lin
2022-04-19  3:32 ` [PATCH 2/5] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19 14:57   ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19  3:32 ` [PATCH 3/5] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19 12:12   ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:54     ` Rex-BC Chen
2022-04-19 12:54       ` Rex-BC Chen
2022-04-19 12:54       ` Rex-BC Chen
2022-04-19 12:54       ` Rex-BC Chen
2022-04-19 14:57   ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19 14:57     ` Matthias Brugger
2022-04-19 15:51     ` Chun-Kuang Hu
2022-04-19 15:51       ` Chun-Kuang Hu
2022-04-19 15:51       ` Chun-Kuang Hu
2022-04-19 15:51       ` Chun-Kuang Hu
2022-04-20  3:15       ` Rex-BC Chen
2022-04-20  3:15         ` Rex-BC Chen
2022-04-20  3:15         ` Rex-BC Chen
2022-04-20  3:15         ` Rex-BC Chen
2022-04-26 20:25   ` Rob Herring
2022-04-26 20:25     ` Rob Herring
2022-04-26 20:25     ` Rob Herring
2022-04-26 20:25     ` Rob Herring
2022-04-27  1:33     ` Nancy.Lin
2022-04-27  1:33       ` Nancy.Lin
2022-04-27  1:33       ` Nancy.Lin
2022-04-19  3:32 ` [PATCH 4/5] dt-bindings: reset: mt8195: add vdosys1 reset control bit Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32 ` [PATCH 5/5] dt-bindings: mediatek: add ethdr definition for mt8195 Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19  3:32   ` Rex-BC Chen
2022-04-19 12:12   ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:12     ` Rob Herring
2022-04-19 12:55     ` Rex-BC Chen
2022-04-19 12:55       ` Rex-BC Chen
2022-04-19 12:55       ` Rex-BC Chen
2022-04-19 12:55       ` Rex-BC Chen
2022-04-25 16:34   ` Rob Herring
2022-04-25 16:34     ` Rob Herring
2022-04-25 16:34     ` Rob Herring
2022-04-25 16:34     ` Rob Herring
2022-04-27  2:37     ` Nancy.Lin
2022-04-27  2:37       ` Nancy.Lin
2022-04-27  2:37       ` Nancy.Lin

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