* [PATCH v5 0/6] drm/msm: rework MDSS drivers
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
These patches coninue work started by AngeloGioacchino Del Regno in the
previous cycle by further decoupling and dissecting MDSS and MDP drivers
probe/binding paths.
This removes code duplication between MDP5 and DPU1 MDSS drivers, by
merging them and moving to the top level.
Changes since v5:
- Fixed the issue with HW_REV access on MDP5 platforms
- Moved "mdss"/"mdss_phys" distinction from second patch to the first
one
Changes since v4:
- Fixed the issue with MODULE_DEVICE_TABLE reported by robot
- Fixed the comments accoring to suggestions of Stephen
- Removed extra goto (Stephen's suggestion)
- Break long kms->dev->dev->parent chains into cleaner dpu_dev/mdp_dev
and mdss_dev to document device tree bindings. Add related comments.
(Stephen's suggestion)
Changes since v3:
- Rebased on top of current msm/msm-next
- Fixed issue with enabling/disabling MDP4/MDP5 vs DSI driver (per
Stephen's suggestion)
- Reworked mdss_probe to remove extra platform_set_drvdata calls (per
Stephen's suggestion)
- Fixed a typo in the Kconfig (noted by Rob)
- Added a patch to move component mastership from mdss to mdp5/dpu1
devices
Changes since v2:
- Rebased on top of current msm/msm-next(-staging)
- Allow disabling MDP4/MDP5/DPU/HDMI components (like we do for DP and
DSI)
- Made mdp5_mdss_parse_clock() static
- Changed mdp5 to is_mdp5 argument in several functions
- Dropped boolean device data from the mdss driver
- Reworked error handling in msm_pdev_probe()
- Removed unused header inclusion
- Dropped __init/__exit from function prototypes
Changes since v1:
- Rebased on top of [2] and [1]
[1] https://patchwork.freedesktop.org/series/99066/
[2] https://patchwork.freedesktop.org/series/98521/
Dmitry Baryshkov (6):
drm/msm: unify MDSS drivers
drm/msm: remove extra indirection for msm_mdss
drm/msm: split the main platform driver
drm/msm: stop using device's match data pointer
drm/msm: allow compile time selection of driver components
drm/msm: make mdp5/dpu devices master components
drivers/gpu/drm/msm/Kconfig | 50 ++-
drivers/gpu/drm/msm/Makefile | 25 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 86 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 260 ------------
.../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 +
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 54 ++-
.../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 +
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 57 ++-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------
drivers/gpu/drm/msm/msm_drv.c | 261 ++----------
drivers/gpu/drm/msm/msm_drv.h | 61 ++-
drivers/gpu/drm/msm/msm_kms.h | 21 -
drivers/gpu/drm/msm/msm_mdss.c | 384 ++++++++++++++++++
13 files changed, 661 insertions(+), 856 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
create mode 100644 drivers/gpu/drm/msm/msm_mdss.c
--
2.35.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 0/6] drm/msm: rework MDSS drivers
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
These patches coninue work started by AngeloGioacchino Del Regno in the
previous cycle by further decoupling and dissecting MDSS and MDP drivers
probe/binding paths.
This removes code duplication between MDP5 and DPU1 MDSS drivers, by
merging them and moving to the top level.
Changes since v5:
- Fixed the issue with HW_REV access on MDP5 platforms
- Moved "mdss"/"mdss_phys" distinction from second patch to the first
one
Changes since v4:
- Fixed the issue with MODULE_DEVICE_TABLE reported by robot
- Fixed the comments accoring to suggestions of Stephen
- Removed extra goto (Stephen's suggestion)
- Break long kms->dev->dev->parent chains into cleaner dpu_dev/mdp_dev
and mdss_dev to document device tree bindings. Add related comments.
(Stephen's suggestion)
Changes since v3:
- Rebased on top of current msm/msm-next
- Fixed issue with enabling/disabling MDP4/MDP5 vs DSI driver (per
Stephen's suggestion)
- Reworked mdss_probe to remove extra platform_set_drvdata calls (per
Stephen's suggestion)
- Fixed a typo in the Kconfig (noted by Rob)
- Added a patch to move component mastership from mdss to mdp5/dpu1
devices
Changes since v2:
- Rebased on top of current msm/msm-next(-staging)
- Allow disabling MDP4/MDP5/DPU/HDMI components (like we do for DP and
DSI)
- Made mdp5_mdss_parse_clock() static
- Changed mdp5 to is_mdp5 argument in several functions
- Dropped boolean device data from the mdss driver
- Reworked error handling in msm_pdev_probe()
- Removed unused header inclusion
- Dropped __init/__exit from function prototypes
Changes since v1:
- Rebased on top of [2] and [1]
[1] https://patchwork.freedesktop.org/series/99066/
[2] https://patchwork.freedesktop.org/series/98521/
Dmitry Baryshkov (6):
drm/msm: unify MDSS drivers
drm/msm: remove extra indirection for msm_mdss
drm/msm: split the main platform driver
drm/msm: stop using device's match data pointer
drm/msm: allow compile time selection of driver components
drm/msm: make mdp5/dpu devices master components
drivers/gpu/drm/msm/Kconfig | 50 ++-
drivers/gpu/drm/msm/Makefile | 25 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 86 ++--
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 260 ------------
.../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 +
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 54 ++-
.../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 +
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 57 ++-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------
drivers/gpu/drm/msm/msm_drv.c | 261 ++----------
drivers/gpu/drm/msm/msm_drv.h | 61 ++-
drivers/gpu/drm/msm/msm_kms.h | 21 -
drivers/gpu/drm/msm/msm_mdss.c | 384 ++++++++++++++++++
13 files changed, 661 insertions(+), 856 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
create mode 100644 drivers/gpu/drm/msm/msm_mdss.c
--
2.35.1
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH v5 1/6] drm/msm: unify MDSS drivers
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
MDP5 and DPU1 both provide the driver handling the MDSS region, which
handles the irq domain and (incase of DPU1) adds some init for the UBWC
controller. Unify those two pieces of code into a common driver.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/Makefile | 3 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------------
drivers/gpu/drm/msm/msm_drv.c | 4 +-
drivers/gpu/drm/msm/msm_kms.h | 3 +-
.../msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} | 156 ++++++-----
5 files changed, 93 insertions(+), 325 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
rename drivers/gpu/drm/msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} (60%)
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e9cc7d8ac301..e76927b42033 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -42,7 +42,6 @@ msm-y := \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
disp/mdp5/mdp5_irq.o \
- disp/mdp5/mdp5_mdss.o \
disp/mdp5/mdp5_kms.o \
disp/mdp5/mdp5_pipe.o \
disp/mdp5/mdp5_mixer.o \
@@ -67,7 +66,6 @@ msm-y := \
disp/dpu1/dpu_hw_util.o \
disp/dpu1/dpu_hw_vbif.o \
disp/dpu1/dpu_kms.o \
- disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
@@ -88,6 +86,7 @@ msm-y := \
msm_gpu_devfreq.o \
msm_io_utils.o \
msm_iommu.o \
+ msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
deleted file mode 100644
index 049c6784a531..000000000000
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ /dev/null
@@ -1,252 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- */
-
-#include <linux/irqdomain.h>
-#include <linux/irq.h>
-
-#include "msm_drv.h"
-#include "mdp5_kms.h"
-
-#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base)
-
-struct mdp5_mdss {
- struct msm_mdss base;
-
- void __iomem *mmio, *vbif;
-
- struct clk *ahb_clk;
- struct clk *axi_clk;
- struct clk *vsync_clk;
-
- struct {
- volatile unsigned long enabled_mask;
- struct irq_domain *domain;
- } irqcontroller;
-};
-
-static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data)
-{
- msm_writel(data, mdp5_mdss->mmio + reg);
-}
-
-static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg)
-{
- return msm_readl(mdp5_mdss->mmio + reg);
-}
-
-static irqreturn_t mdss_irq(int irq, void *arg)
-{
- struct mdp5_mdss *mdp5_mdss = arg;
- u32 intr;
-
- intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);
-
- VERB("intr=%08x", intr);
-
- while (intr) {
- irq_hw_number_t hwirq = fls(intr) - 1;
-
- generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
- intr &= ~(1 << hwirq);
- }
-
- return IRQ_HANDLED;
-}
-
-/*
- * interrupt-controller implementation, so sub-blocks (MDP/HDMI/eDP/DSI/etc)
- * can register to get their irq's delivered
- */
-
-#define VALID_IRQS (MDSS_HW_INTR_STATUS_INTR_MDP | \
- MDSS_HW_INTR_STATUS_INTR_DSI0 | \
- MDSS_HW_INTR_STATUS_INTR_DSI1 | \
- MDSS_HW_INTR_STATUS_INTR_HDMI | \
- MDSS_HW_INTR_STATUS_INTR_EDP)
-
-static void mdss_hw_mask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static void mdss_hw_unmask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static struct irq_chip mdss_hw_irq_chip = {
- .name = "mdss",
- .irq_mask = mdss_hw_mask_irq,
- .irq_unmask = mdss_hw_unmask_irq,
-};
-
-static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
- irq_hw_number_t hwirq)
-{
- struct mdp5_mdss *mdp5_mdss = d->host_data;
-
- if (!(VALID_IRQS & (1 << hwirq)))
- return -EPERM;
-
- irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, mdp5_mdss);
-
- return 0;
-}
-
-static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
- .map = mdss_hw_irqdomain_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-
-static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss)
-{
- struct device *dev = mdp5_mdss->base.dev;
- struct irq_domain *d;
-
- d = irq_domain_add_linear(dev->of_node, 32, &mdss_hw_irqdomain_ops,
- mdp5_mdss);
- if (!d) {
- DRM_DEV_ERROR(dev, "mdss irq domain add failed\n");
- return -ENXIO;
- }
-
- mdp5_mdss->irqcontroller.enabled_mask = 0;
- mdp5_mdss->irqcontroller.domain = d;
-
- return 0;
-}
-
-static int mdp5_mdss_enable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_prepare_enable(mdp5_mdss->ahb_clk);
- clk_prepare_enable(mdp5_mdss->axi_clk);
- clk_prepare_enable(mdp5_mdss->vsync_clk);
-
- return 0;
-}
-
-static int mdp5_mdss_disable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_disable_unprepare(mdp5_mdss->vsync_clk);
- clk_disable_unprepare(mdp5_mdss->axi_clk);
- clk_disable_unprepare(mdp5_mdss->ahb_clk);
-
- return 0;
-}
-
-static int msm_mdss_get_clocks(struct mdp5_mdss *mdp5_mdss)
-{
- struct platform_device *pdev =
- to_platform_device(mdp5_mdss->base.dev);
-
- mdp5_mdss->ahb_clk = msm_clk_get(pdev, "iface");
- if (IS_ERR(mdp5_mdss->ahb_clk))
- mdp5_mdss->ahb_clk = NULL;
-
- mdp5_mdss->axi_clk = msm_clk_get(pdev, "bus");
- if (IS_ERR(mdp5_mdss->axi_clk))
- mdp5_mdss->axi_clk = NULL;
-
- mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync");
- if (IS_ERR(mdp5_mdss->vsync_clk))
- mdp5_mdss->vsync_clk = NULL;
-
- return 0;
-}
-
-static void mdp5_mdss_destroy(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
-
- if (!mdp5_mdss)
- return;
-
- irq_domain_remove(mdp5_mdss->irqcontroller.domain);
- mdp5_mdss->irqcontroller.domain = NULL;
-
- pm_runtime_disable(mdss->dev);
-}
-
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = mdp5_mdss_enable,
- .disable = mdp5_mdss_disable,
- .destroy = mdp5_mdss_destroy,
-};
-
-int mdp5_mdss_init(struct platform_device *pdev)
-{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct mdp5_mdss *mdp5_mdss;
- int ret;
-
- DBG("");
-
- if (!of_device_is_compatible(pdev->dev.of_node, "qcom,mdss"))
- return 0;
-
- mdp5_mdss = devm_kzalloc(&pdev->dev, sizeof(*mdp5_mdss), GFP_KERNEL);
- if (!mdp5_mdss) {
- ret = -ENOMEM;
- goto fail;
- }
-
- mdp5_mdss->base.dev = &pdev->dev;
-
- mdp5_mdss->mmio = msm_ioremap(pdev, "mdss_phys");
- if (IS_ERR(mdp5_mdss->mmio)) {
- ret = PTR_ERR(mdp5_mdss->mmio);
- goto fail;
- }
-
- mdp5_mdss->vbif = msm_ioremap(pdev, "vbif_phys");
- if (IS_ERR(mdp5_mdss->vbif)) {
- ret = PTR_ERR(mdp5_mdss->vbif);
- goto fail;
- }
-
- ret = msm_mdss_get_clocks(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to get clocks: %d\n", ret);
- goto fail;
- }
-
- ret = devm_request_irq(&pdev->dev, platform_get_irq(pdev, 0),
- mdss_irq, 0, "mdss_isr", mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init irq: %d\n", ret);
- goto fail;
- }
-
- ret = mdss_irq_domain_init(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init sub-block irqs: %d\n", ret);
- goto fail;
- }
-
- mdp5_mdss->base.funcs = &mdss_funcs;
- priv->mdss = &mdp5_mdss->base;
-
- pm_runtime_enable(&pdev->dev);
-
- return 0;
-fail:
- return ret;
-}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index affa95eb05fc..82b662812d72 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1231,10 +1231,10 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = mdp5_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = dpu_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, false);
break;
default:
ret = 0;
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 2a4f0526cb98..10d5ae3e76df 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -212,8 +212,7 @@ struct msm_mdss {
const struct msm_mdss_funcs *funcs;
};
-int mdp5_mdss_init(struct platform_device *dev);
-int dpu_mdss_init(struct platform_device *dev);
+int msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
similarity index 60%
rename from drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
rename to drivers/gpu/drm/msm/msm_mdss.c
index b10ca505f9ac..f4f92c11bf14 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -7,7 +7,12 @@
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
-#include "dpu_kms.h"
+
+#include "msm_drv.h"
+#include "msm_kms.h"
+
+/* for DPU_HW_* defines */
+#include "disp/dpu1/dpu_hw_catalog.h"
#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
@@ -18,23 +23,19 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-/* Max BW defined in KBps */
-#define MAX_BW 6800000
-
-struct dpu_irq_controller {
- unsigned long enabled_mask;
- struct irq_domain *domain;
-};
-
struct dpu_mdss {
struct msm_mdss base;
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
- struct dpu_irq_controller irq_controller;
+ bool is_mdp5;
+ struct {
+ unsigned long enabled_mask;
+ struct irq_domain *domain;
+ } irq_controller;
};
-static void dpu_mdss_irq(struct irq_desc *desc)
+static void msm_mdss_irq(struct irq_desc *desc)
{
struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -62,7 +63,7 @@ static void dpu_mdss_irq(struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
-static void dpu_mdss_irq_mask(struct irq_data *irqd)
+static void msm_mdss_irq_mask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -73,7 +74,7 @@ static void dpu_mdss_irq_mask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static void dpu_mdss_irq_unmask(struct irq_data *irqd)
+static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -84,30 +85,31 @@ static void dpu_mdss_irq_unmask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static struct irq_chip dpu_mdss_irq_chip = {
+static struct irq_chip msm_mdss_irq_chip = {
.name = "dpu_mdss",
- .irq_mask = dpu_mdss_irq_mask,
- .irq_unmask = dpu_mdss_irq_unmask,
+ .irq_mask = msm_mdss_irq_mask,
+ .irq_unmask = msm_mdss_irq_unmask,
};
-static struct lock_class_key dpu_mdss_lock_key, dpu_mdss_request_key;
+static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
-static int dpu_mdss_irqdomain_map(struct irq_domain *domain,
+static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
struct dpu_mdss *dpu_mdss = domain->host_data;
- irq_set_lockdep_class(irq, &dpu_mdss_lock_key, &dpu_mdss_request_key);
- irq_set_chip_and_handler(irq, &dpu_mdss_irq_chip, handle_level_irq);
+ irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
+ irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
+
return irq_set_chip_data(irq, dpu_mdss);
}
-static const struct irq_domain_ops dpu_mdss_irqdomain_ops = {
- .map = dpu_mdss_irqdomain_map,
+static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
+ .map = msm_mdss_irqdomain_map,
.xlate = irq_domain_xlate_onecell,
};
-static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
{
struct device *dev;
struct irq_domain *domain;
@@ -115,9 +117,9 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
dev = dpu_mdss->base.dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &dpu_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, dpu_mdss);
if (!domain) {
- DPU_ERROR("failed to add irq_domain\n");
+ DRM_ERROR("failed to add irq_domain\n");
return -EINVAL;
}
@@ -127,24 +129,24 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
return 0;
}
-static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
-{
- if (dpu_mdss->irq_controller.domain) {
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
- }
-}
-static int dpu_mdss_enable(struct msm_mdss *mdss)
+static int msm_mdss_enable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
if (ret) {
- DPU_ERROR("clock enable failed, ret:%d\n", ret);
+ DRM_ERROR("clock enable failed, ret:%d\n", ret);
return ret;
}
+ /*
+ * HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on
+ * mdp5 hardware. Skip reading it for now.
+ */
+ if (dpu_mdss->is_mdp5)
+ return 0;
+
/*
* ubwc config is part of the "mdss" region which is not accessible
* from the rest of the driver. hardcode known configurations here
@@ -171,7 +173,7 @@ static int dpu_mdss_enable(struct msm_mdss *mdss)
return ret;
}
-static int dpu_mdss_disable(struct msm_mdss *mdss)
+static int msm_mdss_disable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -180,7 +182,7 @@ static int dpu_mdss_disable(struct msm_mdss *mdss)
return 0;
}
-static void dpu_mdss_destroy(struct msm_mdss *mdss)
+static void msm_mdss_destroy(struct msm_mdss *mdss)
{
struct platform_device *pdev = to_platform_device(mdss->dev);
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -188,22 +190,49 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss)
pm_runtime_suspend(mdss->dev);
pm_runtime_disable(mdss->dev);
- _dpu_mdss_irq_domain_fini(dpu_mdss);
+ irq_domain_remove(dpu_mdss->irq_controller.domain);
+ dpu_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
-
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
}
static const struct msm_mdss_funcs mdss_funcs = {
- .enable = dpu_mdss_enable,
- .disable = dpu_mdss_disable,
- .destroy = dpu_mdss_destroy,
+ .enable = msm_mdss_enable,
+ .disable = msm_mdss_disable,
+ .destroy = msm_mdss_destroy,
};
-int dpu_mdss_init(struct platform_device *pdev)
+/*
+ * MDP5 MDSS uses at most three specified clocks.
+ */
+#define MDP5_MDSS_NUM_CLOCKS 3
+static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
+{
+ struct clk_bulk_data *bulk;
+ int num_clocks = 0;
+ int ret;
+
+ if (!pdev)
+ return -EINVAL;
+
+ bulk = devm_kcalloc(&pdev->dev, MDP5_MDSS_NUM_CLOCKS, sizeof(struct clk_bulk_data), GFP_KERNEL);
+ if (!bulk)
+ return -ENOMEM;
+
+ bulk[num_clocks++].id = "iface";
+ bulk[num_clocks++].id = "bus";
+ bulk[num_clocks++].id = "vsync";
+
+ ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
+ if (ret)
+ return ret;
+
+ *clocks = bulk;
+
+ return num_clocks;
+}
+
+int msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct dpu_mdss *dpu_mdss;
@@ -214,33 +243,35 @@ int dpu_mdss_init(struct platform_device *pdev)
if (!dpu_mdss)
return -ENOMEM;
- dpu_mdss->mmio = msm_ioremap(pdev, "mdss");
+ dpu_mdss->mmio = msm_ioremap(pdev, is_mdp5 ? "mdss_phys" : "mdss");
if (IS_ERR(dpu_mdss->mmio))
return PTR_ERR(dpu_mdss->mmio);
DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
- ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
+ if (is_mdp5)
+ ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ else
+ ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
if (ret < 0) {
- DPU_ERROR("failed to parse clocks, ret=%d\n", ret);
- goto clk_parse_err;
+ DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
+ return ret;
}
dpu_mdss->num_clocks = ret;
+ dpu_mdss->is_mdp5 = is_mdp5;
dpu_mdss->base.dev = &pdev->dev;
dpu_mdss->base.funcs = &mdss_funcs;
- ret = _dpu_mdss_irq_domain_add(dpu_mdss);
- if (ret)
- goto irq_domain_error;
-
irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- ret = irq;
- goto irq_error;
- }
+ if (irq < 0)
+ return irq;
- irq_set_chained_handler_and_data(irq, dpu_mdss_irq,
+ ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ if (ret)
+ return ret;
+
+ irq_set_chained_handler_and_data(irq, msm_mdss_irq,
dpu_mdss);
priv->mdss = &dpu_mdss->base;
@@ -248,13 +279,4 @@ int dpu_mdss_init(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
return 0;
-
-irq_error:
- _dpu_mdss_irq_domain_fini(dpu_mdss);
-irq_domain_error:
-clk_parse_err:
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
- return ret;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 1/6] drm/msm: unify MDSS drivers
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
MDP5 and DPU1 both provide the driver handling the MDSS region, which
handles the irq domain and (incase of DPU1) adds some init for the UBWC
controller. Unify those two pieces of code into a common driver.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/Makefile | 3 +-
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c | 252 ------------------
drivers/gpu/drm/msm/msm_drv.c | 4 +-
drivers/gpu/drm/msm/msm_kms.h | 3 +-
.../msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} | 156 ++++++-----
5 files changed, 93 insertions(+), 325 deletions(-)
delete mode 100644 drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
rename drivers/gpu/drm/msm/{disp/dpu1/dpu_mdss.c => msm_mdss.c} (60%)
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e9cc7d8ac301..e76927b42033 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -42,7 +42,6 @@ msm-y := \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
disp/mdp5/mdp5_irq.o \
- disp/mdp5/mdp5_mdss.o \
disp/mdp5/mdp5_kms.o \
disp/mdp5/mdp5_pipe.o \
disp/mdp5/mdp5_mixer.o \
@@ -67,7 +66,6 @@ msm-y := \
disp/dpu1/dpu_hw_util.o \
disp/dpu1/dpu_hw_vbif.o \
disp/dpu1/dpu_kms.o \
- disp/dpu1/dpu_mdss.o \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
@@ -88,6 +86,7 @@ msm-y := \
msm_gpu_devfreq.o \
msm_io_utils.o \
msm_iommu.o \
+ msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
deleted file mode 100644
index 049c6784a531..000000000000
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
+++ /dev/null
@@ -1,252 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-only
-/*
- * Copyright (c) 2016, The Linux Foundation. All rights reserved.
- */
-
-#include <linux/irqdomain.h>
-#include <linux/irq.h>
-
-#include "msm_drv.h"
-#include "mdp5_kms.h"
-
-#define to_mdp5_mdss(x) container_of(x, struct mdp5_mdss, base)
-
-struct mdp5_mdss {
- struct msm_mdss base;
-
- void __iomem *mmio, *vbif;
-
- struct clk *ahb_clk;
- struct clk *axi_clk;
- struct clk *vsync_clk;
-
- struct {
- volatile unsigned long enabled_mask;
- struct irq_domain *domain;
- } irqcontroller;
-};
-
-static inline void mdss_write(struct mdp5_mdss *mdp5_mdss, u32 reg, u32 data)
-{
- msm_writel(data, mdp5_mdss->mmio + reg);
-}
-
-static inline u32 mdss_read(struct mdp5_mdss *mdp5_mdss, u32 reg)
-{
- return msm_readl(mdp5_mdss->mmio + reg);
-}
-
-static irqreturn_t mdss_irq(int irq, void *arg)
-{
- struct mdp5_mdss *mdp5_mdss = arg;
- u32 intr;
-
- intr = mdss_read(mdp5_mdss, REG_MDSS_HW_INTR_STATUS);
-
- VERB("intr=%08x", intr);
-
- while (intr) {
- irq_hw_number_t hwirq = fls(intr) - 1;
-
- generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
- intr &= ~(1 << hwirq);
- }
-
- return IRQ_HANDLED;
-}
-
-/*
- * interrupt-controller implementation, so sub-blocks (MDP/HDMI/eDP/DSI/etc)
- * can register to get their irq's delivered
- */
-
-#define VALID_IRQS (MDSS_HW_INTR_STATUS_INTR_MDP | \
- MDSS_HW_INTR_STATUS_INTR_DSI0 | \
- MDSS_HW_INTR_STATUS_INTR_DSI1 | \
- MDSS_HW_INTR_STATUS_INTR_HDMI | \
- MDSS_HW_INTR_STATUS_INTR_EDP)
-
-static void mdss_hw_mask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static void mdss_hw_unmask_irq(struct irq_data *irqd)
-{
- struct mdp5_mdss *mdp5_mdss = irq_data_get_irq_chip_data(irqd);
-
- smp_mb__before_atomic();
- set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask);
- smp_mb__after_atomic();
-}
-
-static struct irq_chip mdss_hw_irq_chip = {
- .name = "mdss",
- .irq_mask = mdss_hw_mask_irq,
- .irq_unmask = mdss_hw_unmask_irq,
-};
-
-static int mdss_hw_irqdomain_map(struct irq_domain *d, unsigned int irq,
- irq_hw_number_t hwirq)
-{
- struct mdp5_mdss *mdp5_mdss = d->host_data;
-
- if (!(VALID_IRQS & (1 << hwirq)))
- return -EPERM;
-
- irq_set_chip_and_handler(irq, &mdss_hw_irq_chip, handle_level_irq);
- irq_set_chip_data(irq, mdp5_mdss);
-
- return 0;
-}
-
-static const struct irq_domain_ops mdss_hw_irqdomain_ops = {
- .map = mdss_hw_irqdomain_map,
- .xlate = irq_domain_xlate_onecell,
-};
-
-
-static int mdss_irq_domain_init(struct mdp5_mdss *mdp5_mdss)
-{
- struct device *dev = mdp5_mdss->base.dev;
- struct irq_domain *d;
-
- d = irq_domain_add_linear(dev->of_node, 32, &mdss_hw_irqdomain_ops,
- mdp5_mdss);
- if (!d) {
- DRM_DEV_ERROR(dev, "mdss irq domain add failed\n");
- return -ENXIO;
- }
-
- mdp5_mdss->irqcontroller.enabled_mask = 0;
- mdp5_mdss->irqcontroller.domain = d;
-
- return 0;
-}
-
-static int mdp5_mdss_enable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_prepare_enable(mdp5_mdss->ahb_clk);
- clk_prepare_enable(mdp5_mdss->axi_clk);
- clk_prepare_enable(mdp5_mdss->vsync_clk);
-
- return 0;
-}
-
-static int mdp5_mdss_disable(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
- DBG("");
-
- clk_disable_unprepare(mdp5_mdss->vsync_clk);
- clk_disable_unprepare(mdp5_mdss->axi_clk);
- clk_disable_unprepare(mdp5_mdss->ahb_clk);
-
- return 0;
-}
-
-static int msm_mdss_get_clocks(struct mdp5_mdss *mdp5_mdss)
-{
- struct platform_device *pdev =
- to_platform_device(mdp5_mdss->base.dev);
-
- mdp5_mdss->ahb_clk = msm_clk_get(pdev, "iface");
- if (IS_ERR(mdp5_mdss->ahb_clk))
- mdp5_mdss->ahb_clk = NULL;
-
- mdp5_mdss->axi_clk = msm_clk_get(pdev, "bus");
- if (IS_ERR(mdp5_mdss->axi_clk))
- mdp5_mdss->axi_clk = NULL;
-
- mdp5_mdss->vsync_clk = msm_clk_get(pdev, "vsync");
- if (IS_ERR(mdp5_mdss->vsync_clk))
- mdp5_mdss->vsync_clk = NULL;
-
- return 0;
-}
-
-static void mdp5_mdss_destroy(struct msm_mdss *mdss)
-{
- struct mdp5_mdss *mdp5_mdss = to_mdp5_mdss(mdss);
-
- if (!mdp5_mdss)
- return;
-
- irq_domain_remove(mdp5_mdss->irqcontroller.domain);
- mdp5_mdss->irqcontroller.domain = NULL;
-
- pm_runtime_disable(mdss->dev);
-}
-
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = mdp5_mdss_enable,
- .disable = mdp5_mdss_disable,
- .destroy = mdp5_mdss_destroy,
-};
-
-int mdp5_mdss_init(struct platform_device *pdev)
-{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct mdp5_mdss *mdp5_mdss;
- int ret;
-
- DBG("");
-
- if (!of_device_is_compatible(pdev->dev.of_node, "qcom,mdss"))
- return 0;
-
- mdp5_mdss = devm_kzalloc(&pdev->dev, sizeof(*mdp5_mdss), GFP_KERNEL);
- if (!mdp5_mdss) {
- ret = -ENOMEM;
- goto fail;
- }
-
- mdp5_mdss->base.dev = &pdev->dev;
-
- mdp5_mdss->mmio = msm_ioremap(pdev, "mdss_phys");
- if (IS_ERR(mdp5_mdss->mmio)) {
- ret = PTR_ERR(mdp5_mdss->mmio);
- goto fail;
- }
-
- mdp5_mdss->vbif = msm_ioremap(pdev, "vbif_phys");
- if (IS_ERR(mdp5_mdss->vbif)) {
- ret = PTR_ERR(mdp5_mdss->vbif);
- goto fail;
- }
-
- ret = msm_mdss_get_clocks(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to get clocks: %d\n", ret);
- goto fail;
- }
-
- ret = devm_request_irq(&pdev->dev, platform_get_irq(pdev, 0),
- mdss_irq, 0, "mdss_isr", mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init irq: %d\n", ret);
- goto fail;
- }
-
- ret = mdss_irq_domain_init(mdp5_mdss);
- if (ret) {
- DRM_DEV_ERROR(&pdev->dev, "failed to init sub-block irqs: %d\n", ret);
- goto fail;
- }
-
- mdp5_mdss->base.funcs = &mdss_funcs;
- priv->mdss = &mdp5_mdss->base;
-
- pm_runtime_enable(&pdev->dev);
-
- return 0;
-fail:
- return ret;
-}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index affa95eb05fc..82b662812d72 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -1231,10 +1231,10 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = mdp5_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = dpu_mdss_init(pdev);
+ ret = msm_mdss_init(pdev, false);
break;
default:
ret = 0;
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 2a4f0526cb98..10d5ae3e76df 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -212,8 +212,7 @@ struct msm_mdss {
const struct msm_mdss_funcs *funcs;
};
-int mdp5_mdss_init(struct platform_device *dev);
-int dpu_mdss_init(struct platform_device *dev);
+int msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
similarity index 60%
rename from drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
rename to drivers/gpu/drm/msm/msm_mdss.c
index b10ca505f9ac..f4f92c11bf14 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -7,7 +7,12 @@
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
-#include "dpu_kms.h"
+
+#include "msm_drv.h"
+#include "msm_kms.h"
+
+/* for DPU_HW_* defines */
+#include "disp/dpu1/dpu_hw_catalog.h"
#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
@@ -18,23 +23,19 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-/* Max BW defined in KBps */
-#define MAX_BW 6800000
-
-struct dpu_irq_controller {
- unsigned long enabled_mask;
- struct irq_domain *domain;
-};
-
struct dpu_mdss {
struct msm_mdss base;
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
- struct dpu_irq_controller irq_controller;
+ bool is_mdp5;
+ struct {
+ unsigned long enabled_mask;
+ struct irq_domain *domain;
+ } irq_controller;
};
-static void dpu_mdss_irq(struct irq_desc *desc)
+static void msm_mdss_irq(struct irq_desc *desc)
{
struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -62,7 +63,7 @@ static void dpu_mdss_irq(struct irq_desc *desc)
chained_irq_exit(chip, desc);
}
-static void dpu_mdss_irq_mask(struct irq_data *irqd)
+static void msm_mdss_irq_mask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -73,7 +74,7 @@ static void dpu_mdss_irq_mask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static void dpu_mdss_irq_unmask(struct irq_data *irqd)
+static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
@@ -84,30 +85,31 @@ static void dpu_mdss_irq_unmask(struct irq_data *irqd)
smp_mb__after_atomic();
}
-static struct irq_chip dpu_mdss_irq_chip = {
+static struct irq_chip msm_mdss_irq_chip = {
.name = "dpu_mdss",
- .irq_mask = dpu_mdss_irq_mask,
- .irq_unmask = dpu_mdss_irq_unmask,
+ .irq_mask = msm_mdss_irq_mask,
+ .irq_unmask = msm_mdss_irq_unmask,
};
-static struct lock_class_key dpu_mdss_lock_key, dpu_mdss_request_key;
+static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
-static int dpu_mdss_irqdomain_map(struct irq_domain *domain,
+static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
struct dpu_mdss *dpu_mdss = domain->host_data;
- irq_set_lockdep_class(irq, &dpu_mdss_lock_key, &dpu_mdss_request_key);
- irq_set_chip_and_handler(irq, &dpu_mdss_irq_chip, handle_level_irq);
+ irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
+ irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
+
return irq_set_chip_data(irq, dpu_mdss);
}
-static const struct irq_domain_ops dpu_mdss_irqdomain_ops = {
- .map = dpu_mdss_irqdomain_map,
+static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
+ .map = msm_mdss_irqdomain_map,
.xlate = irq_domain_xlate_onecell,
};
-static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
{
struct device *dev;
struct irq_domain *domain;
@@ -115,9 +117,9 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
dev = dpu_mdss->base.dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &dpu_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, dpu_mdss);
if (!domain) {
- DPU_ERROR("failed to add irq_domain\n");
+ DRM_ERROR("failed to add irq_domain\n");
return -EINVAL;
}
@@ -127,24 +129,24 @@ static int _dpu_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
return 0;
}
-static void _dpu_mdss_irq_domain_fini(struct dpu_mdss *dpu_mdss)
-{
- if (dpu_mdss->irq_controller.domain) {
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
- }
-}
-static int dpu_mdss_enable(struct msm_mdss *mdss)
+static int msm_mdss_enable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
if (ret) {
- DPU_ERROR("clock enable failed, ret:%d\n", ret);
+ DRM_ERROR("clock enable failed, ret:%d\n", ret);
return ret;
}
+ /*
+ * HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on
+ * mdp5 hardware. Skip reading it for now.
+ */
+ if (dpu_mdss->is_mdp5)
+ return 0;
+
/*
* ubwc config is part of the "mdss" region which is not accessible
* from the rest of the driver. hardcode known configurations here
@@ -171,7 +173,7 @@ static int dpu_mdss_enable(struct msm_mdss *mdss)
return ret;
}
-static int dpu_mdss_disable(struct msm_mdss *mdss)
+static int msm_mdss_disable(struct msm_mdss *mdss)
{
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -180,7 +182,7 @@ static int dpu_mdss_disable(struct msm_mdss *mdss)
return 0;
}
-static void dpu_mdss_destroy(struct msm_mdss *mdss)
+static void msm_mdss_destroy(struct msm_mdss *mdss)
{
struct platform_device *pdev = to_platform_device(mdss->dev);
struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
@@ -188,22 +190,49 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss)
pm_runtime_suspend(mdss->dev);
pm_runtime_disable(mdss->dev);
- _dpu_mdss_irq_domain_fini(dpu_mdss);
+ irq_domain_remove(dpu_mdss->irq_controller.domain);
+ dpu_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
-
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
}
static const struct msm_mdss_funcs mdss_funcs = {
- .enable = dpu_mdss_enable,
- .disable = dpu_mdss_disable,
- .destroy = dpu_mdss_destroy,
+ .enable = msm_mdss_enable,
+ .disable = msm_mdss_disable,
+ .destroy = msm_mdss_destroy,
};
-int dpu_mdss_init(struct platform_device *pdev)
+/*
+ * MDP5 MDSS uses at most three specified clocks.
+ */
+#define MDP5_MDSS_NUM_CLOCKS 3
+static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
+{
+ struct clk_bulk_data *bulk;
+ int num_clocks = 0;
+ int ret;
+
+ if (!pdev)
+ return -EINVAL;
+
+ bulk = devm_kcalloc(&pdev->dev, MDP5_MDSS_NUM_CLOCKS, sizeof(struct clk_bulk_data), GFP_KERNEL);
+ if (!bulk)
+ return -ENOMEM;
+
+ bulk[num_clocks++].id = "iface";
+ bulk[num_clocks++].id = "bus";
+ bulk[num_clocks++].id = "vsync";
+
+ ret = devm_clk_bulk_get_optional(&pdev->dev, num_clocks, bulk);
+ if (ret)
+ return ret;
+
+ *clocks = bulk;
+
+ return num_clocks;
+}
+
+int msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct dpu_mdss *dpu_mdss;
@@ -214,33 +243,35 @@ int dpu_mdss_init(struct platform_device *pdev)
if (!dpu_mdss)
return -ENOMEM;
- dpu_mdss->mmio = msm_ioremap(pdev, "mdss");
+ dpu_mdss->mmio = msm_ioremap(pdev, is_mdp5 ? "mdss_phys" : "mdss");
if (IS_ERR(dpu_mdss->mmio))
return PTR_ERR(dpu_mdss->mmio);
DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
- ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
+ if (is_mdp5)
+ ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ else
+ ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
if (ret < 0) {
- DPU_ERROR("failed to parse clocks, ret=%d\n", ret);
- goto clk_parse_err;
+ DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
+ return ret;
}
dpu_mdss->num_clocks = ret;
+ dpu_mdss->is_mdp5 = is_mdp5;
dpu_mdss->base.dev = &pdev->dev;
dpu_mdss->base.funcs = &mdss_funcs;
- ret = _dpu_mdss_irq_domain_add(dpu_mdss);
- if (ret)
- goto irq_domain_error;
-
irq = platform_get_irq(pdev, 0);
- if (irq < 0) {
- ret = irq;
- goto irq_error;
- }
+ if (irq < 0)
+ return irq;
- irq_set_chained_handler_and_data(irq, dpu_mdss_irq,
+ ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ if (ret)
+ return ret;
+
+ irq_set_chained_handler_and_data(irq, msm_mdss_irq,
dpu_mdss);
priv->mdss = &dpu_mdss->base;
@@ -248,13 +279,4 @@ int dpu_mdss_init(struct platform_device *pdev)
pm_runtime_enable(&pdev->dev);
return 0;
-
-irq_error:
- _dpu_mdss_irq_domain_fini(dpu_mdss);
-irq_domain_error:
-clk_parse_err:
- if (dpu_mdss->mmio)
- devm_iounmap(&pdev->dev, dpu_mdss->mmio);
- dpu_mdss->mmio = NULL;
- return ret;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 2/6] drm/msm: remove extra indirection for msm_mdss
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
Since now there is just one mdss subdriver, drop all the indirection,
make msm_mdss struct completely opaque (and defined inside msm_mdss.c)
and call mdss functions directly.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/msm_drv.c | 29 ++++---
drivers/gpu/drm/msm/msm_kms.h | 16 ++--
drivers/gpu/drm/msm/msm_mdss.c | 140 +++++++++++++++------------------
3 files changed, 83 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 82b662812d72..4877d4c90465 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -980,8 +980,8 @@ static int __maybe_unused msm_runtime_suspend(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->disable(mdss);
+ if (mdss)
+ return msm_mdss_disable(mdss);
return 0;
}
@@ -993,8 +993,8 @@ static int __maybe_unused msm_runtime_resume(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->enable(mdss);
+ if (mdss)
+ return msm_mdss_enable(mdss);
return 0;
}
@@ -1220,6 +1220,7 @@ static const struct component_master_ops msm_drm_ops = {
static int msm_pdev_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
+ struct msm_mdss *mdss;
struct msm_drm_private *priv;
int ret;
@@ -1231,20 +1232,22 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = msm_mdss_init(pdev, true);
+ mdss = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = msm_mdss_init(pdev, false);
+ mdss = msm_mdss_init(pdev, false);
break;
default:
- ret = 0;
+ mdss = NULL;
break;
}
- if (ret) {
- platform_set_drvdata(pdev, NULL);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
return ret;
}
+ priv->mdss = mdss;
+
if (get_mdp_ver(pdev)) {
ret = add_display_components(pdev, &match);
if (ret)
@@ -1271,8 +1274,8 @@ static int msm_pdev_probe(struct platform_device *pdev)
fail:
of_platform_depopulate(&pdev->dev);
- if (priv->mdss && priv->mdss->funcs)
- priv->mdss->funcs->destroy(priv->mdss);
+ if (priv->mdss)
+ msm_mdss_destroy(priv->mdss);
return ret;
}
@@ -1285,8 +1288,8 @@ static int msm_pdev_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
- if (mdss && mdss->funcs)
- mdss->funcs->destroy(mdss);
+ if (mdss)
+ msm_mdss_destroy(mdss);
return 0;
}
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 10d5ae3e76df..09c219988884 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,18 +201,12 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss_funcs {
- int (*enable)(struct msm_mdss *mdss);
- int (*disable)(struct msm_mdss *mdss);
- void (*destroy)(struct msm_mdss *mdss);
-};
-
-struct msm_mdss {
- struct device *dev;
- const struct msm_mdss_funcs *funcs;
-};
+struct msm_mdss;
-int msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+int msm_mdss_enable(struct msm_mdss *mdss);
+int msm_mdss_disable(struct msm_mdss *mdss);
+void msm_mdss_destroy(struct msm_mdss *mdss);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index f4f92c11bf14..60c90a382b54 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -3,19 +3,16 @@
* Copyright (c) 2018, The Linux Foundation
*/
+#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
-
-#include "msm_drv.h"
-#include "msm_kms.h"
+#include <linux/pm_runtime.h>
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
-#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
-
#define HW_REV 0x0
#define HW_INTR_STATUS 0x0010
@@ -23,8 +20,9 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-struct dpu_mdss {
- struct msm_mdss base;
+struct msm_mdss {
+ struct device *dev;
+
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
@@ -37,22 +35,22 @@ struct dpu_mdss {
static void msm_mdss_irq(struct irq_desc *desc)
{
- struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
+ struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
u32 interrupts;
chained_irq_enter(chip, desc);
- interrupts = readl_relaxed(dpu_mdss->mmio + HW_INTR_STATUS);
+ interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);
while (interrupts) {
irq_hw_number_t hwirq = fls(interrupts) - 1;
int rc;
- rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
+ rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,
hwirq);
if (rc < 0) {
- DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
+ dev_err(msm_mdss->dev, "handle irq fail: irq=%lu rc=%d\n",
hwirq, rc);
break;
}
@@ -65,28 +63,28 @@ static void msm_mdss_irq(struct irq_desc *desc)
static void msm_mdss_irq_mask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static struct irq_chip msm_mdss_irq_chip = {
- .name = "dpu_mdss",
+ .name = "msm_mdss",
.irq_mask = msm_mdss_irq_mask,
.irq_unmask = msm_mdss_irq_unmask,
};
@@ -96,12 +94,12 @@ static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
- struct dpu_mdss *dpu_mdss = domain->host_data;
+ struct msm_mdss *msm_mdss = domain->host_data;
irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
- return irq_set_chip_data(irq, dpu_mdss);
+ return irq_set_chip_data(irq, msm_mdss);
}
static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
@@ -109,34 +107,33 @@ static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
.xlate = irq_domain_xlate_onecell,
};
-static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
{
struct device *dev;
struct irq_domain *domain;
- dev = dpu_mdss->base.dev;
+ dev = msm_mdss->dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &msm_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, msm_mdss);
if (!domain) {
- DRM_ERROR("failed to add irq_domain\n");
+ dev_err(dev, "failed to add irq_domain\n");
return -EINVAL;
}
- dpu_mdss->irq_controller.enabled_mask = 0;
- dpu_mdss->irq_controller.domain = domain;
+ msm_mdss->irq_controller.enabled_mask = 0;
+ msm_mdss->irq_controller.domain = domain;
return 0;
}
-static int msm_mdss_enable(struct msm_mdss *mdss)
+int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
- ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);
if (ret) {
- DRM_ERROR("clock enable failed, ret:%d\n", ret);
+ dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);
return ret;
}
@@ -144,64 +141,55 @@ static int msm_mdss_enable(struct msm_mdss *mdss)
* HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on
* mdp5 hardware. Skip reading it for now.
*/
- if (dpu_mdss->is_mdp5)
+ if (msm_mdss->is_mdp5)
return 0;
/*
* ubwc config is part of the "mdss" region which is not accessible
* from the rest of the driver. hardcode known configurations here
*/
- switch (readl_relaxed(dpu_mdss->mmio + HW_REV)) {
+ switch (readl_relaxed(msm_mdss->mmio + HW_REV)) {
case DPU_HW_VER_500:
case DPU_HW_VER_501:
- writel_relaxed(0x420, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x420, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_600:
/* TODO: 0x102e for LP_DDR4 */
- writel_relaxed(0x103e, dpu_mdss->mmio + UBWC_STATIC);
- writel_relaxed(2, dpu_mdss->mmio + UBWC_CTRL_2);
- writel_relaxed(1, dpu_mdss->mmio + UBWC_PREDICTION_MODE);
+ writel_relaxed(0x103e, msm_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);
+ writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);
break;
case DPU_HW_VER_620:
- writel_relaxed(0x1e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x1e, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_720:
- writel_relaxed(0x101e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x101e, msm_mdss->mmio + UBWC_STATIC);
break;
}
return ret;
}
-static int msm_mdss_disable(struct msm_mdss *mdss)
+int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
-
- clk_bulk_disable_unprepare(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-static void msm_mdss_destroy(struct msm_mdss *mdss)
+void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
- struct platform_device *pdev = to_platform_device(mdss->dev);
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
+ struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
- pm_runtime_suspend(mdss->dev);
- pm_runtime_disable(mdss->dev);
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
+ pm_runtime_suspend(msm_mdss->dev);
+ pm_runtime_disable(msm_mdss->dev);
+ irq_domain_remove(msm_mdss->irq_controller.domain);
+ msm_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
}
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = msm_mdss_enable,
- .disable = msm_mdss_disable,
- .destroy = msm_mdss_destroy,
-};
-
/*
* MDP5 MDSS uses at most three specified clocks.
*/
@@ -232,51 +220,47 @@ static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_d
return num_clocks;
}
-int msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct dpu_mdss *dpu_mdss;
+ struct msm_mdss *msm_mdss;
int ret;
int irq;
- dpu_mdss = devm_kzalloc(&pdev->dev, sizeof(*dpu_mdss), GFP_KERNEL);
- if (!dpu_mdss)
- return -ENOMEM;
+ msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);
+ if (!msm_mdss)
+ return ERR_PTR(-ENOMEM);
- dpu_mdss->mmio = msm_ioremap(pdev, is_mdp5 ? "mdss_phys" : "mdss");
- if (IS_ERR(dpu_mdss->mmio))
- return PTR_ERR(dpu_mdss->mmio);
+ msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss");
+ if (IS_ERR(msm_mdss->mmio))
+ return ERR_CAST(msm_mdss->mmio);
- DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
+ dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio);
if (is_mdp5)
- ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);
else
- ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
+ ret = devm_clk_bulk_get_all(&pdev->dev, &msm_mdss->clocks);
if (ret < 0) {
- DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
- return ret;
+ dev_err(&pdev->dev, "failed to parse clocks, ret=%d\n", ret);
+ return ERR_PTR(ret);
}
- dpu_mdss->num_clocks = ret;
- dpu_mdss->is_mdp5 = is_mdp5;
+ msm_mdss->num_clocks = ret;
+ msm_mdss->is_mdp5 = is_mdp5;
- dpu_mdss->base.dev = &pdev->dev;
- dpu_mdss->base.funcs = &mdss_funcs;
+ msm_mdss->dev = &pdev->dev;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
- return irq;
+ return ERR_PTR(irq);
- ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ ret = _msm_mdss_irq_domain_add(msm_mdss);
if (ret)
- return ret;
+ return ERR_PTR(ret);
irq_set_chained_handler_and_data(irq, msm_mdss_irq,
- dpu_mdss);
-
- priv->mdss = &dpu_mdss->base;
+ msm_mdss);
pm_runtime_enable(&pdev->dev);
- return 0;
+ return msm_mdss;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 2/6] drm/msm: remove extra indirection for msm_mdss
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
Since now there is just one mdss subdriver, drop all the indirection,
make msm_mdss struct completely opaque (and defined inside msm_mdss.c)
and call mdss functions directly.
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/msm_drv.c | 29 ++++---
drivers/gpu/drm/msm/msm_kms.h | 16 ++--
drivers/gpu/drm/msm/msm_mdss.c | 140 +++++++++++++++------------------
3 files changed, 83 insertions(+), 102 deletions(-)
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 82b662812d72..4877d4c90465 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -980,8 +980,8 @@ static int __maybe_unused msm_runtime_suspend(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->disable(mdss);
+ if (mdss)
+ return msm_mdss_disable(mdss);
return 0;
}
@@ -993,8 +993,8 @@ static int __maybe_unused msm_runtime_resume(struct device *dev)
DBG("");
- if (mdss && mdss->funcs)
- return mdss->funcs->enable(mdss);
+ if (mdss)
+ return msm_mdss_enable(mdss);
return 0;
}
@@ -1220,6 +1220,7 @@ static const struct component_master_ops msm_drm_ops = {
static int msm_pdev_probe(struct platform_device *pdev)
{
struct component_match *match = NULL;
+ struct msm_mdss *mdss;
struct msm_drm_private *priv;
int ret;
@@ -1231,20 +1232,22 @@ static int msm_pdev_probe(struct platform_device *pdev)
switch (get_mdp_ver(pdev)) {
case KMS_MDP5:
- ret = msm_mdss_init(pdev, true);
+ mdss = msm_mdss_init(pdev, true);
break;
case KMS_DPU:
- ret = msm_mdss_init(pdev, false);
+ mdss = msm_mdss_init(pdev, false);
break;
default:
- ret = 0;
+ mdss = NULL;
break;
}
- if (ret) {
- platform_set_drvdata(pdev, NULL);
+ if (IS_ERR(mdss)) {
+ ret = PTR_ERR(mdss);
return ret;
}
+ priv->mdss = mdss;
+
if (get_mdp_ver(pdev)) {
ret = add_display_components(pdev, &match);
if (ret)
@@ -1271,8 +1274,8 @@ static int msm_pdev_probe(struct platform_device *pdev)
fail:
of_platform_depopulate(&pdev->dev);
- if (priv->mdss && priv->mdss->funcs)
- priv->mdss->funcs->destroy(priv->mdss);
+ if (priv->mdss)
+ msm_mdss_destroy(priv->mdss);
return ret;
}
@@ -1285,8 +1288,8 @@ static int msm_pdev_remove(struct platform_device *pdev)
component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
- if (mdss && mdss->funcs)
- mdss->funcs->destroy(mdss);
+ if (mdss)
+ msm_mdss_destroy(mdss);
return 0;
}
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 10d5ae3e76df..09c219988884 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,18 +201,12 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss_funcs {
- int (*enable)(struct msm_mdss *mdss);
- int (*disable)(struct msm_mdss *mdss);
- void (*destroy)(struct msm_mdss *mdss);
-};
-
-struct msm_mdss {
- struct device *dev;
- const struct msm_mdss_funcs *funcs;
-};
+struct msm_mdss;
-int msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
+int msm_mdss_enable(struct msm_mdss *mdss);
+int msm_mdss_disable(struct msm_mdss *mdss);
+void msm_mdss_destroy(struct msm_mdss *mdss);
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index f4f92c11bf14..60c90a382b54 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -3,19 +3,16 @@
* Copyright (c) 2018, The Linux Foundation
*/
+#include <linux/clk.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
-
-#include "msm_drv.h"
-#include "msm_kms.h"
+#include <linux/pm_runtime.h>
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
-#define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base)
-
#define HW_REV 0x0
#define HW_INTR_STATUS 0x0010
@@ -23,8 +20,9 @@
#define UBWC_CTRL_2 0x150
#define UBWC_PREDICTION_MODE 0x154
-struct dpu_mdss {
- struct msm_mdss base;
+struct msm_mdss {
+ struct device *dev;
+
void __iomem *mmio;
struct clk_bulk_data *clocks;
size_t num_clocks;
@@ -37,22 +35,22 @@ struct dpu_mdss {
static void msm_mdss_irq(struct irq_desc *desc)
{
- struct dpu_mdss *dpu_mdss = irq_desc_get_handler_data(desc);
+ struct msm_mdss *msm_mdss = irq_desc_get_handler_data(desc);
struct irq_chip *chip = irq_desc_get_chip(desc);
u32 interrupts;
chained_irq_enter(chip, desc);
- interrupts = readl_relaxed(dpu_mdss->mmio + HW_INTR_STATUS);
+ interrupts = readl_relaxed(msm_mdss->mmio + HW_INTR_STATUS);
while (interrupts) {
irq_hw_number_t hwirq = fls(interrupts) - 1;
int rc;
- rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
+ rc = generic_handle_domain_irq(msm_mdss->irq_controller.domain,
hwirq);
if (rc < 0) {
- DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
+ dev_err(msm_mdss->dev, "handle irq fail: irq=%lu rc=%d\n",
hwirq, rc);
break;
}
@@ -65,28 +63,28 @@ static void msm_mdss_irq(struct irq_desc *desc)
static void msm_mdss_irq_mask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ clear_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static void msm_mdss_irq_unmask(struct irq_data *irqd)
{
- struct dpu_mdss *dpu_mdss = irq_data_get_irq_chip_data(irqd);
+ struct msm_mdss *msm_mdss = irq_data_get_irq_chip_data(irqd);
/* memory barrier */
smp_mb__before_atomic();
- set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask);
+ set_bit(irqd->hwirq, &msm_mdss->irq_controller.enabled_mask);
/* memory barrier */
smp_mb__after_atomic();
}
static struct irq_chip msm_mdss_irq_chip = {
- .name = "dpu_mdss",
+ .name = "msm_mdss",
.irq_mask = msm_mdss_irq_mask,
.irq_unmask = msm_mdss_irq_unmask,
};
@@ -96,12 +94,12 @@ static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;
static int msm_mdss_irqdomain_map(struct irq_domain *domain,
unsigned int irq, irq_hw_number_t hwirq)
{
- struct dpu_mdss *dpu_mdss = domain->host_data;
+ struct msm_mdss *msm_mdss = domain->host_data;
irq_set_lockdep_class(irq, &msm_mdss_lock_key, &msm_mdss_request_key);
irq_set_chip_and_handler(irq, &msm_mdss_irq_chip, handle_level_irq);
- return irq_set_chip_data(irq, dpu_mdss);
+ return irq_set_chip_data(irq, msm_mdss);
}
static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
@@ -109,34 +107,33 @@ static const struct irq_domain_ops msm_mdss_irqdomain_ops = {
.xlate = irq_domain_xlate_onecell,
};
-static int _msm_mdss_irq_domain_add(struct dpu_mdss *dpu_mdss)
+static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
{
struct device *dev;
struct irq_domain *domain;
- dev = dpu_mdss->base.dev;
+ dev = msm_mdss->dev;
domain = irq_domain_add_linear(dev->of_node, 32,
- &msm_mdss_irqdomain_ops, dpu_mdss);
+ &msm_mdss_irqdomain_ops, msm_mdss);
if (!domain) {
- DRM_ERROR("failed to add irq_domain\n");
+ dev_err(dev, "failed to add irq_domain\n");
return -EINVAL;
}
- dpu_mdss->irq_controller.enabled_mask = 0;
- dpu_mdss->irq_controller.domain = domain;
+ msm_mdss->irq_controller.enabled_mask = 0;
+ msm_mdss->irq_controller.domain = domain;
return 0;
}
-static int msm_mdss_enable(struct msm_mdss *mdss)
+int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
int ret;
- ret = clk_bulk_prepare_enable(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ ret = clk_bulk_prepare_enable(msm_mdss->num_clocks, msm_mdss->clocks);
if (ret) {
- DRM_ERROR("clock enable failed, ret:%d\n", ret);
+ dev_err(msm_mdss->dev, "clock enable failed, ret:%d\n", ret);
return ret;
}
@@ -144,64 +141,55 @@ static int msm_mdss_enable(struct msm_mdss *mdss)
* HW_REV requires MDSS_MDP_CLK, which is not enabled by the mdss on
* mdp5 hardware. Skip reading it for now.
*/
- if (dpu_mdss->is_mdp5)
+ if (msm_mdss->is_mdp5)
return 0;
/*
* ubwc config is part of the "mdss" region which is not accessible
* from the rest of the driver. hardcode known configurations here
*/
- switch (readl_relaxed(dpu_mdss->mmio + HW_REV)) {
+ switch (readl_relaxed(msm_mdss->mmio + HW_REV)) {
case DPU_HW_VER_500:
case DPU_HW_VER_501:
- writel_relaxed(0x420, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x420, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_600:
/* TODO: 0x102e for LP_DDR4 */
- writel_relaxed(0x103e, dpu_mdss->mmio + UBWC_STATIC);
- writel_relaxed(2, dpu_mdss->mmio + UBWC_CTRL_2);
- writel_relaxed(1, dpu_mdss->mmio + UBWC_PREDICTION_MODE);
+ writel_relaxed(0x103e, msm_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(2, msm_mdss->mmio + UBWC_CTRL_2);
+ writel_relaxed(1, msm_mdss->mmio + UBWC_PREDICTION_MODE);
break;
case DPU_HW_VER_620:
- writel_relaxed(0x1e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x1e, msm_mdss->mmio + UBWC_STATIC);
break;
case DPU_HW_VER_720:
- writel_relaxed(0x101e, dpu_mdss->mmio + UBWC_STATIC);
+ writel_relaxed(0x101e, msm_mdss->mmio + UBWC_STATIC);
break;
}
return ret;
}
-static int msm_mdss_disable(struct msm_mdss *mdss)
+int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
-
- clk_bulk_disable_unprepare(dpu_mdss->num_clocks, dpu_mdss->clocks);
+ clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-static void msm_mdss_destroy(struct msm_mdss *mdss)
+void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
- struct platform_device *pdev = to_platform_device(mdss->dev);
- struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss);
+ struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
- pm_runtime_suspend(mdss->dev);
- pm_runtime_disable(mdss->dev);
- irq_domain_remove(dpu_mdss->irq_controller.domain);
- dpu_mdss->irq_controller.domain = NULL;
+ pm_runtime_suspend(msm_mdss->dev);
+ pm_runtime_disable(msm_mdss->dev);
+ irq_domain_remove(msm_mdss->irq_controller.domain);
+ msm_mdss->irq_controller.domain = NULL;
irq = platform_get_irq(pdev, 0);
irq_set_chained_handler_and_data(irq, NULL, NULL);
}
-static const struct msm_mdss_funcs mdss_funcs = {
- .enable = msm_mdss_enable,
- .disable = msm_mdss_disable,
- .destroy = msm_mdss_destroy,
-};
-
/*
* MDP5 MDSS uses at most three specified clocks.
*/
@@ -232,51 +220,47 @@ static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_d
return num_clocks;
}
-int msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
+struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct dpu_mdss *dpu_mdss;
+ struct msm_mdss *msm_mdss;
int ret;
int irq;
- dpu_mdss = devm_kzalloc(&pdev->dev, sizeof(*dpu_mdss), GFP_KERNEL);
- if (!dpu_mdss)
- return -ENOMEM;
+ msm_mdss = devm_kzalloc(&pdev->dev, sizeof(*msm_mdss), GFP_KERNEL);
+ if (!msm_mdss)
+ return ERR_PTR(-ENOMEM);
- dpu_mdss->mmio = msm_ioremap(pdev, is_mdp5 ? "mdss_phys" : "mdss");
- if (IS_ERR(dpu_mdss->mmio))
- return PTR_ERR(dpu_mdss->mmio);
+ msm_mdss->mmio = devm_platform_ioremap_resource_byname(pdev, is_mdp5 ? "mdss_phys" : "mdss");
+ if (IS_ERR(msm_mdss->mmio))
+ return ERR_CAST(msm_mdss->mmio);
- DRM_DEBUG("mapped mdss address space @%pK\n", dpu_mdss->mmio);
+ dev_dbg(&pdev->dev, "mapped mdss address space @%pK\n", msm_mdss->mmio);
if (is_mdp5)
- ret = mdp5_mdss_parse_clock(pdev, &dpu_mdss->clocks);
+ ret = mdp5_mdss_parse_clock(pdev, &msm_mdss->clocks);
else
- ret = devm_clk_bulk_get_all(&pdev->dev, &dpu_mdss->clocks);
+ ret = devm_clk_bulk_get_all(&pdev->dev, &msm_mdss->clocks);
if (ret < 0) {
- DRM_ERROR("failed to parse clocks, ret=%d\n", ret);
- return ret;
+ dev_err(&pdev->dev, "failed to parse clocks, ret=%d\n", ret);
+ return ERR_PTR(ret);
}
- dpu_mdss->num_clocks = ret;
- dpu_mdss->is_mdp5 = is_mdp5;
+ msm_mdss->num_clocks = ret;
+ msm_mdss->is_mdp5 = is_mdp5;
- dpu_mdss->base.dev = &pdev->dev;
- dpu_mdss->base.funcs = &mdss_funcs;
+ msm_mdss->dev = &pdev->dev;
irq = platform_get_irq(pdev, 0);
if (irq < 0)
- return irq;
+ return ERR_PTR(irq);
- ret = _msm_mdss_irq_domain_add(dpu_mdss);
+ ret = _msm_mdss_irq_domain_add(msm_mdss);
if (ret)
- return ret;
+ return ERR_PTR(ret);
irq_set_chained_handler_and_data(irq, msm_mdss_irq,
- dpu_mdss);
-
- priv->mdss = &dpu_mdss->base;
+ msm_mdss);
pm_runtime_enable(&pdev->dev);
- return 0;
+ return msm_mdss;
}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 3/6] drm/msm: split the main platform driver
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno, kernel test robot
Currently the msm platform driver is a multiplex handling several cases:
- headless GPU-only driver,
- MDP4 with flat device nodes,
- MDP5/DPU MDSS with all the nodes being children of MDSS node.
This results in not-so-perfect code, checking the hardware version
(MDP4/MDP5/DPU) in several places, checking for mdss even when it can
not exist, etc. Split the code into three handling subdrivers (mdp4,
mdss and headless msm).
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 56 ++++++
drivers/gpu/drm/msm/msm_drv.c | 228 ++++-------------------
drivers/gpu/drm/msm/msm_drv.h | 27 ++-
drivers/gpu/drm/msm/msm_kms.h | 7 -
drivers/gpu/drm/msm/msm_mdss.c | 175 ++++++++++++++++-
5 files changed, 288 insertions(+), 205 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 3cf476c55158..5dc839184aef 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -569,3 +569,59 @@ static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
return &config;
}
+
+static const struct dev_pm_ops mdp4_pm_ops = {
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int mdp4_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ /*
+ * on MDP4 based platforms, the MDP platform device is the component
+ * that adds other display interface components to itself.
+ */
+ return msm_drv_probe(&pdev->dev, &pdev->dev);
+}
+
+static int mdp4_remove(struct platform_device *pdev)
+{
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
+ return 0;
+}
+
+static const struct of_device_id mdp4_dt_match[] = {
+ { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mdp4_dt_match);
+
+static struct platform_driver mdp4_platform_driver = {
+ .probe = mdp4_probe,
+ .remove = mdp4_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "mdp4",
+ .of_match_table = mdp4_dt_match,
+ .pm = &mdp4_pm_ops,
+ },
+};
+
+void __init msm_mdp4_register(void)
+{
+ platform_driver_register(&mdp4_platform_driver);
+}
+
+void __exit msm_mdp4_unregister(void)
+{
+ platform_driver_unregister(&mdp4_platform_driver);
+}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4877d4c90465..8bcc86685f2d 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -256,10 +256,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
static int get_mdp_ver(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -973,50 +969,7 @@ static const struct drm_driver msm_driver = {
.patchlevel = MSM_VERSION_PATCHLEVEL,
};
-static int __maybe_unused msm_runtime_suspend(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_disable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_runtime_resume(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_enable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_pm_suspend(struct device *dev)
-{
-
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_suspend(dev);
-}
-
-static int __maybe_unused msm_pm_resume(struct device *dev)
-{
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_resume(dev);
-}
-
-static int __maybe_unused msm_pm_prepare(struct device *dev)
+int msm_pm_prepare(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1027,7 +980,7 @@ static int __maybe_unused msm_pm_prepare(struct device *dev)
return drm_mode_config_helper_suspend(ddev);
}
-static void __maybe_unused msm_pm_complete(struct device *dev)
+void msm_pm_complete(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1039,8 +992,6 @@ static void __maybe_unused msm_pm_complete(struct device *dev)
}
static const struct dev_pm_ops msm_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
- SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
.prepare = msm_pm_prepare,
.complete = msm_pm_complete,
};
@@ -1055,25 +1006,11 @@ static const struct dev_pm_ops msm_pm_ops = {
* is no external component that we need to add since LVDS is within MDP4
* itself.
*/
-static int add_components_mdp(struct device *mdp_dev,
+static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
struct component_match **matchptr)
{
struct device_node *np = mdp_dev->of_node;
struct device_node *ep_node;
- struct device *master_dev;
-
- /*
- * on MDP4 based platforms, the MDP platform device is the component
- * master that adds other display interface components to itself.
- *
- * on MDP5 based platforms, the MDSS platform device is the component
- * master that adds MDP5 and other display interface components to
- * itself.
- */
- if (of_device_is_compatible(np, "qcom,mdp4"))
- master_dev = mdp_dev;
- else
- master_dev = mdp_dev->parent;
for_each_endpoint_of_node(np, ep_node) {
struct device_node *intf;
@@ -1114,60 +1051,6 @@ static int add_components_mdp(struct device *mdp_dev,
return 0;
}
-static int find_mdp_node(struct device *dev, void *data)
-{
- return of_match_node(dpu_dt_match, dev->of_node) ||
- of_match_node(mdp5_dt_match, dev->of_node);
-}
-
-static int add_display_components(struct platform_device *pdev,
- struct component_match **matchptr)
-{
- struct device *mdp_dev;
- struct device *dev = &pdev->dev;
- int ret;
-
- /*
- * MDP5/DPU based devices don't have a flat hierarchy. There is a top
- * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
- * Populate the children devices, find the MDP5/DPU node, and then add
- * the interfaces to our components list.
- */
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- case KMS_DPU:
- ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
- if (ret) {
- DRM_DEV_ERROR(dev, "failed to populate children devices\n");
- return ret;
- }
-
- mdp_dev = device_find_child(dev, NULL, find_mdp_node);
- if (!mdp_dev) {
- DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
- of_platform_depopulate(dev);
- return -ENODEV;
- }
-
- put_device(mdp_dev);
-
- /* add the MDP component itself */
- drm_of_component_match_add(dev, matchptr, component_compare_of,
- mdp_dev->of_node);
- break;
- case KMS_MDP4:
- /* MDP4 */
- mdp_dev = dev;
- break;
- }
-
- ret = add_components_mdp(mdp_dev, matchptr);
- if (ret)
- of_platform_depopulate(dev);
-
- return ret;
-}
-
/*
* We don't know what's the best binding to link the gpu with the drm device.
* Fow now, we just hunt for all the possible gpus that we support, and add them
@@ -1208,93 +1091,70 @@ static void msm_drm_unbind(struct device *dev)
msm_drm_uninit(dev);
}
-static const struct component_master_ops msm_drm_ops = {
+const struct component_master_ops msm_drm_ops = {
.bind = msm_drm_bind,
.unbind = msm_drm_unbind,
};
-/*
- * Platform driver:
- */
-
-static int msm_pdev_probe(struct platform_device *pdev)
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
{
struct component_match *match = NULL;
- struct msm_mdss *mdss;
- struct msm_drm_private *priv;
int ret;
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, priv);
-
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- mdss = msm_mdss_init(pdev, true);
- break;
- case KMS_DPU:
- mdss = msm_mdss_init(pdev, false);
- break;
- default:
- mdss = NULL;
- break;
- }
- if (IS_ERR(mdss)) {
- ret = PTR_ERR(mdss);
- return ret;
- }
-
- priv->mdss = mdss;
+ if (mdp_dev) {
+ /* add the MDP component itself */
+ drm_of_component_match_add(master_dev, &match, component_compare_of,
+ mdp_dev->of_node);
- if (get_mdp_ver(pdev)) {
- ret = add_display_components(pdev, &match);
+ ret = add_components_mdp(master_dev, mdp_dev, &match);
if (ret)
- goto fail;
+ return ret;
}
- ret = add_gpu_components(&pdev->dev, &match);
+ ret = add_gpu_components(master_dev, &match);
if (ret)
- goto fail;
+ return ret;
/* on all devices that I am aware of, iommu's which can map
* any address the cpu can see are used:
*/
- ret = dma_set_mask_and_coherent(&pdev->dev, ~0);
+ ret = dma_set_mask_and_coherent(master_dev, ~0);
if (ret)
- goto fail;
+ return ret;
- ret = component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
+ ret = component_master_add_with_match(master_dev, &msm_drm_ops, match);
if (ret)
- goto fail;
+ return ret;
return 0;
+}
-fail:
- of_platform_depopulate(&pdev->dev);
+/*
+ * Platform driver:
+ * Used only for headlesss GPU instances
+ */
- if (priv->mdss)
- msm_mdss_destroy(priv->mdss);
+static int msm_pdev_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
- return ret;
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ return msm_drv_probe(&pdev->dev, NULL);
}
static int msm_pdev_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct msm_mdss *mdss = priv->mdss;
-
component_master_del(&pdev->dev, &msm_drm_ops);
- of_platform_depopulate(&pdev->dev);
-
- if (mdss)
- msm_mdss_destroy(mdss);
return 0;
}
-static void msm_pdev_shutdown(struct platform_device *pdev)
+void msm_drv_shutdown(struct platform_device *pdev)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct drm_device *drm = priv ? priv->dev : NULL;
@@ -1305,28 +1165,12 @@ static void msm_pdev_shutdown(struct platform_device *pdev)
drm_atomic_helper_shutdown(drm);
}
-static const struct of_device_id dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
- {}
-};
-MODULE_DEVICE_TABLE(of, dt_match);
-
static struct platform_driver msm_platform_driver = {
.probe = msm_pdev_probe,
.remove = msm_pdev_remove,
- .shutdown = msm_pdev_shutdown,
+ .shutdown = msm_drv_shutdown,
.driver = {
.name = "msm",
- .of_match_table = dt_match,
.pm = &msm_pm_ops,
},
};
@@ -1343,6 +1187,8 @@ static int __init msm_drm_register(void)
msm_hdmi_register();
msm_dp_register();
adreno_register();
+ msm_mdp4_register();
+ msm_mdss_register();
return platform_driver_register(&msm_platform_driver);
}
@@ -1350,6 +1196,8 @@ static void __exit msm_drm_unregister(void)
{
DBG("fini");
platform_driver_unregister(&msm_platform_driver);
+ msm_mdss_unregister();
+ msm_mdp4_unregister();
msm_dp_unregister();
msm_hdmi_unregister();
adreno_unregister();
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index d661debb50f1..d6b827bbeaf5 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -431,10 +431,18 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
-void __init msm_mdp_register(void);
-void __exit msm_mdp_unregister(void);
-void __init msm_dpu_register(void);
-void __exit msm_dpu_unregister(void);
+#define KMS_MDP4 4
+#define KMS_MDP5 5
+#define KMS_DPU 3
+
+void msm_mdp4_register(void);
+void msm_mdp4_unregister(void);
+void msm_mdp_register(void);
+void msm_mdp_unregister(void);
+void msm_dpu_register(void);
+void msm_dpu_unregister(void);
+void msm_mdss_register(void);
+void msm_mdss_unregister(void);
#ifdef CONFIG_DEBUG_FS
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
@@ -534,4 +542,15 @@ static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
}
+/* Driver helpers */
+
+extern const struct component_master_ops msm_drm_ops;
+
+int msm_pm_prepare(struct device *dev);
+void msm_pm_complete(struct device *dev);
+
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev);
+void msm_drv_shutdown(struct platform_device *pdev);
+
+
#endif /* __MSM_DRV_H__ */
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 09c219988884..13c2eb0b2bcf 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,13 +201,6 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss;
-
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
-int msm_mdss_enable(struct msm_mdss *mdss);
-int msm_mdss_disable(struct msm_mdss *mdss);
-void msm_mdss_destroy(struct msm_mdss *mdss);
-
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
for_each_if (drm_crtc_mask(crtc) & (crtc_mask))
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 60c90a382b54..43a8e3376f17 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -10,6 +10,9 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/pm_runtime.h>
+#include "msm_drv.h"
+#include "msm_kms.h"
+
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
@@ -127,7 +130,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
return 0;
}
-int msm_mdss_enable(struct msm_mdss *msm_mdss)
+static int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
int ret;
@@ -170,14 +173,14 @@ int msm_mdss_enable(struct msm_mdss *msm_mdss)
return ret;
}
-int msm_mdss_disable(struct msm_mdss *msm_mdss)
+static int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-void msm_mdss_destroy(struct msm_mdss *msm_mdss)
+static void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
@@ -220,7 +223,7 @@ static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_d
return num_clocks;
}
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
+static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
struct msm_mdss *msm_mdss;
int ret;
@@ -264,3 +267,167 @@ struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
return msm_mdss;
}
+
+static int __maybe_unused mdss_runtime_suspend(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_disable(priv->mdss);
+}
+
+static int __maybe_unused mdss_runtime_resume(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_enable(priv->mdss);
+}
+
+static int __maybe_unused mdss_pm_suspend(struct device *dev)
+{
+
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_suspend(dev);
+}
+
+static int __maybe_unused mdss_pm_resume(struct device *dev)
+{
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_resume(dev);
+}
+
+static const struct dev_pm_ops mdss_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mdss_pm_suspend, mdss_pm_resume)
+ SET_RUNTIME_PM_OPS(mdss_runtime_suspend, mdss_runtime_resume, NULL)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int get_mdp_ver(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+
+ return (int) (unsigned long) of_device_get_match_data(dev);
+}
+
+static int find_mdp_node(struct device *dev, void *data)
+{
+ return of_match_node(dpu_dt_match, dev->of_node) ||
+ of_match_node(mdp5_dt_match, dev->of_node);
+}
+
+static int mdss_probe(struct platform_device *pdev)
+{
+ struct msm_mdss *mdss;
+ struct msm_drm_private *priv;
+ int mdp_ver = get_mdp_ver(pdev);
+ struct device *mdp_dev;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ if (IS_ERR(mdss))
+ return PTR_ERR(mdss);
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+ ret = -ENOMEM;
+ goto fail;
+ }
+
+ priv->mdss = mdss;
+ platform_set_drvdata(pdev, priv);
+
+ /*
+ * MDP5/DPU based devices don't have a flat hierarchy. There is a top
+ * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
+ * Populate the children devices, find the MDP5/DPU node, and then add
+ * the interfaces to our components list.
+ */
+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to populate children devices\n");
+ goto fail;
+ }
+
+ mdp_dev = device_find_child(dev, NULL, find_mdp_node);
+ if (!mdp_dev) {
+ DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
+ of_platform_depopulate(dev);
+ ret = -ENODEV;
+ goto fail;
+ }
+
+ /*
+ * on MDP5 based platforms, the MDSS platform device is the component
+ * that adds MDP5 and other display interface components to
+ * itself.
+ */
+ ret = msm_drv_probe(dev, mdp_dev);
+ put_device(mdp_dev);
+ if (ret)
+ goto fail;
+
+ return 0;
+
+fail:
+ of_platform_depopulate(dev);
+ msm_mdss_destroy(priv->mdss);
+
+ return ret;
+}
+
+static int mdss_remove(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct msm_mdss *mdss = priv->mdss;
+
+ component_master_del(&pdev->dev, &msm_drm_ops);
+ of_platform_depopulate(&pdev->dev);
+
+ msm_mdss_destroy(mdss);
+
+ return 0;
+}
+
+static const struct of_device_id mdss_dt_match[] = {
+ { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
+ { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mdss_dt_match);
+
+static struct platform_driver mdss_platform_driver = {
+ .probe = mdss_probe,
+ .remove = mdss_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "msm-mdss",
+ .of_match_table = mdss_dt_match,
+ .pm = &mdss_pm_ops,
+ },
+};
+
+void __init msm_mdss_register(void)
+{
+ platform_driver_register(&mdss_platform_driver);
+}
+
+void __exit msm_mdss_unregister(void)
+{
+ platform_driver_unregister(&mdss_platform_driver);
+}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 3/6] drm/msm: split the main platform driver
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: kernel test robot, David Airlie, linux-arm-msm, dri-devel,
Stephen Boyd, freedreno
Currently the msm platform driver is a multiplex handling several cases:
- headless GPU-only driver,
- MDP4 with flat device nodes,
- MDP5/DPU MDSS with all the nodes being children of MDSS node.
This results in not-so-perfect code, checking the hardware version
(MDP4/MDP5/DPU) in several places, checking for mdss even when it can
not exist, etc. Split the code into three handling subdrivers (mdp4,
mdss and headless msm).
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 56 ++++++
drivers/gpu/drm/msm/msm_drv.c | 228 ++++-------------------
drivers/gpu/drm/msm/msm_drv.h | 27 ++-
drivers/gpu/drm/msm/msm_kms.h | 7 -
drivers/gpu/drm/msm/msm_mdss.c | 175 ++++++++++++++++-
5 files changed, 288 insertions(+), 205 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 3cf476c55158..5dc839184aef 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -569,3 +569,59 @@ static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
return &config;
}
+
+static const struct dev_pm_ops mdp4_pm_ops = {
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int mdp4_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ /*
+ * on MDP4 based platforms, the MDP platform device is the component
+ * that adds other display interface components to itself.
+ */
+ return msm_drv_probe(&pdev->dev, &pdev->dev);
+}
+
+static int mdp4_remove(struct platform_device *pdev)
+{
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
+ return 0;
+}
+
+static const struct of_device_id mdp4_dt_match[] = {
+ { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, mdp4_dt_match);
+
+static struct platform_driver mdp4_platform_driver = {
+ .probe = mdp4_probe,
+ .remove = mdp4_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "mdp4",
+ .of_match_table = mdp4_dt_match,
+ .pm = &mdp4_pm_ops,
+ },
+};
+
+void __init msm_mdp4_register(void)
+{
+ platform_driver_register(&mdp4_platform_driver);
+}
+
+void __exit msm_mdp4_unregister(void)
+{
+ platform_driver_unregister(&mdp4_platform_driver);
+}
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 4877d4c90465..8bcc86685f2d 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -256,10 +256,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
static int get_mdp_ver(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -973,50 +969,7 @@ static const struct drm_driver msm_driver = {
.patchlevel = MSM_VERSION_PATCHLEVEL,
};
-static int __maybe_unused msm_runtime_suspend(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_disable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_runtime_resume(struct device *dev)
-{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
- struct msm_mdss *mdss = priv->mdss;
-
- DBG("");
-
- if (mdss)
- return msm_mdss_enable(mdss);
-
- return 0;
-}
-
-static int __maybe_unused msm_pm_suspend(struct device *dev)
-{
-
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_suspend(dev);
-}
-
-static int __maybe_unused msm_pm_resume(struct device *dev)
-{
- if (pm_runtime_suspended(dev))
- return 0;
-
- return msm_runtime_resume(dev);
-}
-
-static int __maybe_unused msm_pm_prepare(struct device *dev)
+int msm_pm_prepare(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1027,7 +980,7 @@ static int __maybe_unused msm_pm_prepare(struct device *dev)
return drm_mode_config_helper_suspend(ddev);
}
-static void __maybe_unused msm_pm_complete(struct device *dev)
+void msm_pm_complete(struct device *dev)
{
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev = priv ? priv->dev : NULL;
@@ -1039,8 +992,6 @@ static void __maybe_unused msm_pm_complete(struct device *dev)
}
static const struct dev_pm_ops msm_pm_ops = {
- SET_SYSTEM_SLEEP_PM_OPS(msm_pm_suspend, msm_pm_resume)
- SET_RUNTIME_PM_OPS(msm_runtime_suspend, msm_runtime_resume, NULL)
.prepare = msm_pm_prepare,
.complete = msm_pm_complete,
};
@@ -1055,25 +1006,11 @@ static const struct dev_pm_ops msm_pm_ops = {
* is no external component that we need to add since LVDS is within MDP4
* itself.
*/
-static int add_components_mdp(struct device *mdp_dev,
+static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
struct component_match **matchptr)
{
struct device_node *np = mdp_dev->of_node;
struct device_node *ep_node;
- struct device *master_dev;
-
- /*
- * on MDP4 based platforms, the MDP platform device is the component
- * master that adds other display interface components to itself.
- *
- * on MDP5 based platforms, the MDSS platform device is the component
- * master that adds MDP5 and other display interface components to
- * itself.
- */
- if (of_device_is_compatible(np, "qcom,mdp4"))
- master_dev = mdp_dev;
- else
- master_dev = mdp_dev->parent;
for_each_endpoint_of_node(np, ep_node) {
struct device_node *intf;
@@ -1114,60 +1051,6 @@ static int add_components_mdp(struct device *mdp_dev,
return 0;
}
-static int find_mdp_node(struct device *dev, void *data)
-{
- return of_match_node(dpu_dt_match, dev->of_node) ||
- of_match_node(mdp5_dt_match, dev->of_node);
-}
-
-static int add_display_components(struct platform_device *pdev,
- struct component_match **matchptr)
-{
- struct device *mdp_dev;
- struct device *dev = &pdev->dev;
- int ret;
-
- /*
- * MDP5/DPU based devices don't have a flat hierarchy. There is a top
- * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
- * Populate the children devices, find the MDP5/DPU node, and then add
- * the interfaces to our components list.
- */
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- case KMS_DPU:
- ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
- if (ret) {
- DRM_DEV_ERROR(dev, "failed to populate children devices\n");
- return ret;
- }
-
- mdp_dev = device_find_child(dev, NULL, find_mdp_node);
- if (!mdp_dev) {
- DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
- of_platform_depopulate(dev);
- return -ENODEV;
- }
-
- put_device(mdp_dev);
-
- /* add the MDP component itself */
- drm_of_component_match_add(dev, matchptr, component_compare_of,
- mdp_dev->of_node);
- break;
- case KMS_MDP4:
- /* MDP4 */
- mdp_dev = dev;
- break;
- }
-
- ret = add_components_mdp(mdp_dev, matchptr);
- if (ret)
- of_platform_depopulate(dev);
-
- return ret;
-}
-
/*
* We don't know what's the best binding to link the gpu with the drm device.
* Fow now, we just hunt for all the possible gpus that we support, and add them
@@ -1208,93 +1091,70 @@ static void msm_drm_unbind(struct device *dev)
msm_drm_uninit(dev);
}
-static const struct component_master_ops msm_drm_ops = {
+const struct component_master_ops msm_drm_ops = {
.bind = msm_drm_bind,
.unbind = msm_drm_unbind,
};
-/*
- * Platform driver:
- */
-
-static int msm_pdev_probe(struct platform_device *pdev)
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
{
struct component_match *match = NULL;
- struct msm_mdss *mdss;
- struct msm_drm_private *priv;
int ret;
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, priv);
-
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP5:
- mdss = msm_mdss_init(pdev, true);
- break;
- case KMS_DPU:
- mdss = msm_mdss_init(pdev, false);
- break;
- default:
- mdss = NULL;
- break;
- }
- if (IS_ERR(mdss)) {
- ret = PTR_ERR(mdss);
- return ret;
- }
-
- priv->mdss = mdss;
+ if (mdp_dev) {
+ /* add the MDP component itself */
+ drm_of_component_match_add(master_dev, &match, component_compare_of,
+ mdp_dev->of_node);
- if (get_mdp_ver(pdev)) {
- ret = add_display_components(pdev, &match);
+ ret = add_components_mdp(master_dev, mdp_dev, &match);
if (ret)
- goto fail;
+ return ret;
}
- ret = add_gpu_components(&pdev->dev, &match);
+ ret = add_gpu_components(master_dev, &match);
if (ret)
- goto fail;
+ return ret;
/* on all devices that I am aware of, iommu's which can map
* any address the cpu can see are used:
*/
- ret = dma_set_mask_and_coherent(&pdev->dev, ~0);
+ ret = dma_set_mask_and_coherent(master_dev, ~0);
if (ret)
- goto fail;
+ return ret;
- ret = component_master_add_with_match(&pdev->dev, &msm_drm_ops, match);
+ ret = component_master_add_with_match(master_dev, &msm_drm_ops, match);
if (ret)
- goto fail;
+ return ret;
return 0;
+}
-fail:
- of_platform_depopulate(&pdev->dev);
+/*
+ * Platform driver:
+ * Used only for headlesss GPU instances
+ */
- if (priv->mdss)
- msm_mdss_destroy(priv->mdss);
+static int msm_pdev_probe(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv;
- return ret;
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ platform_set_drvdata(pdev, priv);
+
+ return msm_drv_probe(&pdev->dev, NULL);
}
static int msm_pdev_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct msm_mdss *mdss = priv->mdss;
-
component_master_del(&pdev->dev, &msm_drm_ops);
- of_platform_depopulate(&pdev->dev);
-
- if (mdss)
- msm_mdss_destroy(mdss);
return 0;
}
-static void msm_pdev_shutdown(struct platform_device *pdev)
+void msm_drv_shutdown(struct platform_device *pdev)
{
struct msm_drm_private *priv = platform_get_drvdata(pdev);
struct drm_device *drm = priv ? priv->dev : NULL;
@@ -1305,28 +1165,12 @@ static void msm_pdev_shutdown(struct platform_device *pdev)
drm_atomic_helper_shutdown(drm);
}
-static const struct of_device_id dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
- {}
-};
-MODULE_DEVICE_TABLE(of, dt_match);
-
static struct platform_driver msm_platform_driver = {
.probe = msm_pdev_probe,
.remove = msm_pdev_remove,
- .shutdown = msm_pdev_shutdown,
+ .shutdown = msm_drv_shutdown,
.driver = {
.name = "msm",
- .of_match_table = dt_match,
.pm = &msm_pm_ops,
},
};
@@ -1343,6 +1187,8 @@ static int __init msm_drm_register(void)
msm_hdmi_register();
msm_dp_register();
adreno_register();
+ msm_mdp4_register();
+ msm_mdss_register();
return platform_driver_register(&msm_platform_driver);
}
@@ -1350,6 +1196,8 @@ static void __exit msm_drm_unregister(void)
{
DBG("fini");
platform_driver_unregister(&msm_platform_driver);
+ msm_mdss_unregister();
+ msm_mdp4_unregister();
msm_dp_unregister();
msm_hdmi_unregister();
adreno_unregister();
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index d661debb50f1..d6b827bbeaf5 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -431,10 +431,18 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
-void __init msm_mdp_register(void);
-void __exit msm_mdp_unregister(void);
-void __init msm_dpu_register(void);
-void __exit msm_dpu_unregister(void);
+#define KMS_MDP4 4
+#define KMS_MDP5 5
+#define KMS_DPU 3
+
+void msm_mdp4_register(void);
+void msm_mdp4_unregister(void);
+void msm_mdp_register(void);
+void msm_mdp_unregister(void);
+void msm_dpu_register(void);
+void msm_dpu_unregister(void);
+void msm_mdss_register(void);
+void msm_mdss_unregister(void);
#ifdef CONFIG_DEBUG_FS
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
@@ -534,4 +542,15 @@ static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
return clamp(remaining_jiffies, 0LL, (s64)INT_MAX);
}
+/* Driver helpers */
+
+extern const struct component_master_ops msm_drm_ops;
+
+int msm_pm_prepare(struct device *dev);
+void msm_pm_complete(struct device *dev);
+
+int msm_drv_probe(struct device *master_dev, struct device *mdp_dev);
+void msm_drv_shutdown(struct platform_device *pdev);
+
+
#endif /* __MSM_DRV_H__ */
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 09c219988884..13c2eb0b2bcf 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -201,13 +201,6 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev);
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
-struct msm_mdss;
-
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5);
-int msm_mdss_enable(struct msm_mdss *mdss);
-int msm_mdss_disable(struct msm_mdss *mdss);
-void msm_mdss_destroy(struct msm_mdss *mdss);
-
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
for_each_if (drm_crtc_mask(crtc) & (crtc_mask))
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 60c90a382b54..43a8e3376f17 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -10,6 +10,9 @@
#include <linux/irqchip/chained_irq.h>
#include <linux/pm_runtime.h>
+#include "msm_drv.h"
+#include "msm_kms.h"
+
/* for DPU_HW_* defines */
#include "disp/dpu1/dpu_hw_catalog.h"
@@ -127,7 +130,7 @@ static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
return 0;
}
-int msm_mdss_enable(struct msm_mdss *msm_mdss)
+static int msm_mdss_enable(struct msm_mdss *msm_mdss)
{
int ret;
@@ -170,14 +173,14 @@ int msm_mdss_enable(struct msm_mdss *msm_mdss)
return ret;
}
-int msm_mdss_disable(struct msm_mdss *msm_mdss)
+static int msm_mdss_disable(struct msm_mdss *msm_mdss)
{
clk_bulk_disable_unprepare(msm_mdss->num_clocks, msm_mdss->clocks);
return 0;
}
-void msm_mdss_destroy(struct msm_mdss *msm_mdss)
+static void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{
struct platform_device *pdev = to_platform_device(msm_mdss->dev);
int irq;
@@ -220,7 +223,7 @@ static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_d
return num_clocks;
}
-struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
+static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{
struct msm_mdss *msm_mdss;
int ret;
@@ -264,3 +267,167 @@ struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
return msm_mdss;
}
+
+static int __maybe_unused mdss_runtime_suspend(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_disable(priv->mdss);
+}
+
+static int __maybe_unused mdss_runtime_resume(struct device *dev)
+{
+ struct msm_drm_private *priv = dev_get_drvdata(dev);
+
+ DBG("");
+
+ return msm_mdss_enable(priv->mdss);
+}
+
+static int __maybe_unused mdss_pm_suspend(struct device *dev)
+{
+
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_suspend(dev);
+}
+
+static int __maybe_unused mdss_pm_resume(struct device *dev)
+{
+ if (pm_runtime_suspended(dev))
+ return 0;
+
+ return mdss_runtime_resume(dev);
+}
+
+static const struct dev_pm_ops mdss_pm_ops = {
+ SET_SYSTEM_SLEEP_PM_OPS(mdss_pm_suspend, mdss_pm_resume)
+ SET_RUNTIME_PM_OPS(mdss_runtime_suspend, mdss_runtime_resume, NULL)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
+};
+
+static int get_mdp_ver(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+
+ return (int) (unsigned long) of_device_get_match_data(dev);
+}
+
+static int find_mdp_node(struct device *dev, void *data)
+{
+ return of_match_node(dpu_dt_match, dev->of_node) ||
+ of_match_node(mdp5_dt_match, dev->of_node);
+}
+
+static int mdss_probe(struct platform_device *pdev)
+{
+ struct msm_mdss *mdss;
+ struct msm_drm_private *priv;
+ int mdp_ver = get_mdp_ver(pdev);
+ struct device *mdp_dev;
+ struct device *dev = &pdev->dev;
+ int ret;
+
+ mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ if (IS_ERR(mdss))
+ return PTR_ERR(mdss);
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv) {
+ ret = -ENOMEM;
+ goto fail;
+ }
+
+ priv->mdss = mdss;
+ platform_set_drvdata(pdev, priv);
+
+ /*
+ * MDP5/DPU based devices don't have a flat hierarchy. There is a top
+ * level parent: MDSS, and children: MDP5/DPU, DSI, HDMI, eDP etc.
+ * Populate the children devices, find the MDP5/DPU node, and then add
+ * the interfaces to our components list.
+ */
+ ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to populate children devices\n");
+ goto fail;
+ }
+
+ mdp_dev = device_find_child(dev, NULL, find_mdp_node);
+ if (!mdp_dev) {
+ DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
+ of_platform_depopulate(dev);
+ ret = -ENODEV;
+ goto fail;
+ }
+
+ /*
+ * on MDP5 based platforms, the MDSS platform device is the component
+ * that adds MDP5 and other display interface components to
+ * itself.
+ */
+ ret = msm_drv_probe(dev, mdp_dev);
+ put_device(mdp_dev);
+ if (ret)
+ goto fail;
+
+ return 0;
+
+fail:
+ of_platform_depopulate(dev);
+ msm_mdss_destroy(priv->mdss);
+
+ return ret;
+}
+
+static int mdss_remove(struct platform_device *pdev)
+{
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct msm_mdss *mdss = priv->mdss;
+
+ component_master_del(&pdev->dev, &msm_drm_ops);
+ of_platform_depopulate(&pdev->dev);
+
+ msm_mdss_destroy(mdss);
+
+ return 0;
+}
+
+static const struct of_device_id mdss_dt_match[] = {
+ { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
+ { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ {}
+};
+MODULE_DEVICE_TABLE(of, mdss_dt_match);
+
+static struct platform_driver mdss_platform_driver = {
+ .probe = mdss_probe,
+ .remove = mdss_remove,
+ .shutdown = msm_drv_shutdown,
+ .driver = {
+ .name = "msm-mdss",
+ .of_match_table = mdss_dt_match,
+ .pm = &mdss_pm_ops,
+ },
+};
+
+void __init msm_mdss_register(void)
+{
+ platform_driver_register(&mdss_platform_driver);
+}
+
+void __exit msm_mdss_unregister(void)
+{
+ platform_driver_unregister(&mdss_platform_driver);
+}
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 4/6] drm/msm: stop using device's match data pointer
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
Let's make the match's data pointer a (sub-)driver's private data. The
only user currently is the msm_drm_init() function, using this data to
select kms_init callback. Pass this callback through the driver's
private data instead.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 ++++---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 14 +++++----
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ++++---
drivers/gpu/drm/msm/msm_drv.c | 38 ++++++------------------
drivers/gpu/drm/msm/msm_drv.h | 5 +---
drivers/gpu/drm/msm/msm_kms.h | 4 ---
drivers/gpu/drm/msm/msm_mdss.c | 29 +++++++-----------
7 files changed, 42 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..38627ccf3068 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1172,7 +1172,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-struct msm_kms *dpu_kms_init(struct drm_device *dev)
+static int dpu_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
@@ -1180,7 +1180,7 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
if (!dev) {
DPU_ERROR("drm device node invalid\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
priv = dev->dev_private;
@@ -1189,11 +1189,11 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
if (irq < 0) {
DPU_ERROR("failed to get irq: %d\n", irq);
- return ERR_PTR(irq);
+ return irq;
}
dpu_kms->base.irq = irq;
- return &dpu_kms->base;
+ return 0;
}
static int dpu_bind(struct device *dev, struct device *master, void *data)
@@ -1204,6 +1204,8 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
struct dpu_kms *dpu_kms;
int ret = 0;
+ priv->kms_init = dpu_kms_init;
+
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 5dc839184aef..1a14f1d3cdf7 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -389,7 +389,7 @@ static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev)
+static int mdp4_kms_init(struct drm_device *dev)
{
struct platform_device *pdev = to_platform_device(dev->dev);
struct mdp4_platform_config *config = mdp4_get_config(pdev);
@@ -403,8 +403,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
if (!mdp4_kms) {
DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
- ret = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
@@ -551,12 +550,13 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
dev->mode_config.max_width = 2048;
dev->mode_config.max_height = 2048;
- return kms;
+ return 0;
fail:
if (kms)
mdp4_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
@@ -583,6 +583,8 @@ static int mdp4_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ priv->kms_init = mdp4_kms_init;
+
platform_set_drvdata(pdev, priv);
/*
@@ -600,7 +602,7 @@ static int mdp4_remove(struct platform_device *pdev)
}
static const struct of_device_id mdp4_dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { .compatible = "qcom,mdp4" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mdp4_dt_match);
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 3b92372e7bdf..0c78608832c3 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -544,7 +544,7 @@ static int get_clk(struct platform_device *pdev, struct clk **clkp,
return 0;
}
-struct msm_kms *mdp5_kms_init(struct drm_device *dev)
+static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
struct platform_device *pdev;
@@ -558,7 +558,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
/* priv->kms would have been populated by the MDP5 driver */
kms = priv->kms;
if (!kms)
- return NULL;
+ return -ENOMEM;
mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
pdev = mdp5_kms->pdev;
@@ -637,11 +637,12 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
dev->max_vblank_count = 0; /* max_vblank_count is set on each CRTC */
dev->vblank_disable_immediate = true;
- return kms;
+ return 0;
fail:
if (kms)
mdp5_kms_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static void mdp5_destroy(struct platform_device *pdev)
@@ -803,6 +804,8 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
u32 major, minor;
int ret;
+ priv->kms_init = mdp5_kms_init;
+
mdp5_kms = devm_kzalloc(&pdev->dev, sizeof(*mdp5_kms), GFP_KERNEL);
if (!mdp5_kms) {
ret = -ENOMEM;
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 8bcc86685f2d..c037b46da7f4 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -256,13 +256,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-static int get_mdp_ver(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
-
- return (int) (unsigned long) of_device_get_match_data(dev);
-}
-
#include <linux/of_address.h>
bool msm_use_mmu(struct drm_device *dev)
@@ -349,7 +342,6 @@ static int msm_init_vram(struct drm_device *dev)
static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
{
- struct platform_device *pdev = to_platform_device(dev);
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev;
struct msm_kms *kms;
@@ -397,30 +389,18 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
msm_gem_shrinker_init(ddev);
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP4:
- kms = mdp4_kms_init(ddev);
- priv->kms = kms;
- break;
- case KMS_MDP5:
- kms = mdp5_kms_init(ddev);
- break;
- case KMS_DPU:
- kms = dpu_kms_init(ddev);
- priv->kms = kms;
- break;
- default:
+ if (priv->kms_init) {
+ ret = priv->kms_init(ddev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to load kms\n");
+ priv->kms = NULL;
+ goto err_msm_uninit;
+ }
+ kms = priv->kms;
+ } else {
/* valid only for the dummy headless case, where of_node=NULL */
WARN_ON(dev->of_node);
kms = NULL;
- break;
- }
-
- if (IS_ERR(kms)) {
- DRM_DEV_ERROR(dev, "failed to load kms\n");
- ret = PTR_ERR(kms);
- priv->kms = NULL;
- goto err_msm_uninit;
}
/* Enable normalization of plane zpos */
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index d6b827bbeaf5..19d2767c5363 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -121,6 +121,7 @@ struct msm_drm_private {
struct drm_device *dev;
struct msm_kms *kms;
+ int (*kms_init)(struct drm_device *dev);
/* subordinate devices, if present: */
struct platform_device *gpu_pdev;
@@ -431,10 +432,6 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
void msm_mdp4_register(void);
void msm_mdp4_unregister(void);
void msm_mdp_register(void);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 13c2eb0b2bcf..1f571372e928 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -194,10 +194,6 @@ static inline void msm_kms_destroy(struct msm_kms *kms)
msm_atomic_destroy_pending_timer(&kms->pending_timers[i]);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev);
-struct msm_kms *mdp5_kms_init(struct drm_device *dev);
-struct msm_kms *dpu_kms_init(struct drm_device *dev);
-
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 43a8e3376f17..c94b78431687 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -310,13 +310,6 @@ static const struct dev_pm_ops mdss_pm_ops = {
.complete = msm_pm_complete,
};
-static int get_mdp_ver(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
-
- return (int) (unsigned long) of_device_get_match_data(dev);
-}
-
static int find_mdp_node(struct device *dev, void *data)
{
return of_match_node(dpu_dt_match, dev->of_node) ||
@@ -327,12 +320,12 @@ static int mdss_probe(struct platform_device *pdev)
{
struct msm_mdss *mdss;
struct msm_drm_private *priv;
- int mdp_ver = get_mdp_ver(pdev);
+ bool is_mdp5 = of_device_is_compatible(pdev->dev.of_node, "qcom,mdss");
struct device *mdp_dev;
struct device *dev = &pdev->dev;
int ret;
- mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ mdss = msm_mdss_init(pdev, is_mdp5);
if (IS_ERR(mdss))
return PTR_ERR(mdss);
@@ -398,15 +391,15 @@ static int mdss_remove(struct platform_device *pdev)
}
static const struct of_device_id mdss_dt_match[] = {
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,mdss" },
+ { .compatible = "qcom,msm8998-mdss" },
+ { .compatible = "qcom,qcm2290-mdss" },
+ { .compatible = "qcom,sdm845-mdss" },
+ { .compatible = "qcom,sc7180-mdss" },
+ { .compatible = "qcom,sc7280-mdss" },
+ { .compatible = "qcom,sc8180x-mdss" },
+ { .compatible = "qcom,sm8150-mdss" },
+ { .compatible = "qcom,sm8250-mdss" },
{}
};
MODULE_DEVICE_TABLE(of, mdss_dt_match);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 4/6] drm/msm: stop using device's match data pointer
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
Let's make the match's data pointer a (sub-)driver's private data. The
only user currently is the msm_drm_init() function, using this data to
select kms_init callback. Pass this callback through the driver's
private data instead.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 10 ++++---
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 14 +++++----
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 11 ++++---
drivers/gpu/drm/msm/msm_drv.c | 38 ++++++------------------
drivers/gpu/drm/msm/msm_drv.h | 5 +---
drivers/gpu/drm/msm/msm_kms.h | 4 ---
drivers/gpu/drm/msm/msm_mdss.c | 29 +++++++-----------
7 files changed, 42 insertions(+), 69 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index e29796c4f27b..38627ccf3068 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1172,7 +1172,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-struct msm_kms *dpu_kms_init(struct drm_device *dev)
+static int dpu_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv;
struct dpu_kms *dpu_kms;
@@ -1180,7 +1180,7 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
if (!dev) {
DPU_ERROR("drm device node invalid\n");
- return ERR_PTR(-EINVAL);
+ return -EINVAL;
}
priv = dev->dev_private;
@@ -1189,11 +1189,11 @@ struct msm_kms *dpu_kms_init(struct drm_device *dev)
irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
if (irq < 0) {
DPU_ERROR("failed to get irq: %d\n", irq);
- return ERR_PTR(irq);
+ return irq;
}
dpu_kms->base.irq = irq;
- return &dpu_kms->base;
+ return 0;
}
static int dpu_bind(struct device *dev, struct device *master, void *data)
@@ -1204,6 +1204,8 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
struct dpu_kms *dpu_kms;
int ret = 0;
+ priv->kms_init = dpu_kms_init;
+
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 5dc839184aef..1a14f1d3cdf7 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -389,7 +389,7 @@ static void read_mdp_hw_revision(struct mdp4_kms *mdp4_kms,
DRM_DEV_INFO(dev->dev, "MDP4 version v%d.%d", *major, *minor);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev)
+static int mdp4_kms_init(struct drm_device *dev)
{
struct platform_device *pdev = to_platform_device(dev->dev);
struct mdp4_platform_config *config = mdp4_get_config(pdev);
@@ -403,8 +403,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
mdp4_kms = kzalloc(sizeof(*mdp4_kms), GFP_KERNEL);
if (!mdp4_kms) {
DRM_DEV_ERROR(dev->dev, "failed to allocate kms\n");
- ret = -ENOMEM;
- goto fail;
+ return -ENOMEM;
}
ret = mdp_kms_init(&mdp4_kms->base, &kms_funcs);
@@ -551,12 +550,13 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
dev->mode_config.max_width = 2048;
dev->mode_config.max_height = 2048;
- return kms;
+ return 0;
fail:
if (kms)
mdp4_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static struct mdp4_platform_config *mdp4_get_config(struct platform_device *dev)
@@ -583,6 +583,8 @@ static int mdp4_probe(struct platform_device *pdev)
if (!priv)
return -ENOMEM;
+ priv->kms_init = mdp4_kms_init;
+
platform_set_drvdata(pdev, priv);
/*
@@ -600,7 +602,7 @@ static int mdp4_remove(struct platform_device *pdev)
}
static const struct of_device_id mdp4_dt_match[] = {
- { .compatible = "qcom,mdp4", .data = (void *)KMS_MDP4 },
+ { .compatible = "qcom,mdp4" },
{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, mdp4_dt_match);
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 3b92372e7bdf..0c78608832c3 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -544,7 +544,7 @@ static int get_clk(struct platform_device *pdev, struct clk **clkp,
return 0;
}
-struct msm_kms *mdp5_kms_init(struct drm_device *dev)
+static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
struct platform_device *pdev;
@@ -558,7 +558,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
/* priv->kms would have been populated by the MDP5 driver */
kms = priv->kms;
if (!kms)
- return NULL;
+ return -ENOMEM;
mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
pdev = mdp5_kms->pdev;
@@ -637,11 +637,12 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
dev->max_vblank_count = 0; /* max_vblank_count is set on each CRTC */
dev->vblank_disable_immediate = true;
- return kms;
+ return 0;
fail:
if (kms)
mdp5_kms_destroy(kms);
- return ERR_PTR(ret);
+
+ return ret;
}
static void mdp5_destroy(struct platform_device *pdev)
@@ -803,6 +804,8 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
u32 major, minor;
int ret;
+ priv->kms_init = mdp5_kms_init;
+
mdp5_kms = devm_kzalloc(&pdev->dev, sizeof(*mdp5_kms), GFP_KERNEL);
if (!mdp5_kms) {
ret = -ENOMEM;
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index 8bcc86685f2d..c037b46da7f4 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -256,13 +256,6 @@ static int msm_drm_uninit(struct device *dev)
return 0;
}
-static int get_mdp_ver(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
-
- return (int) (unsigned long) of_device_get_match_data(dev);
-}
-
#include <linux/of_address.h>
bool msm_use_mmu(struct drm_device *dev)
@@ -349,7 +342,6 @@ static int msm_init_vram(struct drm_device *dev)
static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
{
- struct platform_device *pdev = to_platform_device(dev);
struct msm_drm_private *priv = dev_get_drvdata(dev);
struct drm_device *ddev;
struct msm_kms *kms;
@@ -397,30 +389,18 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv)
msm_gem_shrinker_init(ddev);
- switch (get_mdp_ver(pdev)) {
- case KMS_MDP4:
- kms = mdp4_kms_init(ddev);
- priv->kms = kms;
- break;
- case KMS_MDP5:
- kms = mdp5_kms_init(ddev);
- break;
- case KMS_DPU:
- kms = dpu_kms_init(ddev);
- priv->kms = kms;
- break;
- default:
+ if (priv->kms_init) {
+ ret = priv->kms_init(ddev);
+ if (ret) {
+ DRM_DEV_ERROR(dev, "failed to load kms\n");
+ priv->kms = NULL;
+ goto err_msm_uninit;
+ }
+ kms = priv->kms;
+ } else {
/* valid only for the dummy headless case, where of_node=NULL */
WARN_ON(dev->of_node);
kms = NULL;
- break;
- }
-
- if (IS_ERR(kms)) {
- DRM_DEV_ERROR(dev, "failed to load kms\n");
- ret = PTR_ERR(kms);
- priv->kms = NULL;
- goto err_msm_uninit;
}
/* Enable normalization of plane zpos */
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index d6b827bbeaf5..19d2767c5363 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -121,6 +121,7 @@ struct msm_drm_private {
struct drm_device *dev;
struct msm_kms *kms;
+ int (*kms_init)(struct drm_device *dev);
/* subordinate devices, if present: */
struct platform_device *gpu_pdev;
@@ -431,10 +432,6 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
-#define KMS_MDP4 4
-#define KMS_MDP5 5
-#define KMS_DPU 3
-
void msm_mdp4_register(void);
void msm_mdp4_unregister(void);
void msm_mdp_register(void);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 13c2eb0b2bcf..1f571372e928 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -194,10 +194,6 @@ static inline void msm_kms_destroy(struct msm_kms *kms)
msm_atomic_destroy_pending_timer(&kms->pending_timers[i]);
}
-struct msm_kms *mdp4_kms_init(struct drm_device *dev);
-struct msm_kms *mdp5_kms_init(struct drm_device *dev);
-struct msm_kms *dpu_kms_init(struct drm_device *dev);
-
extern const struct of_device_id dpu_dt_match[];
extern const struct of_device_id mdp5_dt_match[];
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 43a8e3376f17..c94b78431687 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -310,13 +310,6 @@ static const struct dev_pm_ops mdss_pm_ops = {
.complete = msm_pm_complete,
};
-static int get_mdp_ver(struct platform_device *pdev)
-{
- struct device *dev = &pdev->dev;
-
- return (int) (unsigned long) of_device_get_match_data(dev);
-}
-
static int find_mdp_node(struct device *dev, void *data)
{
return of_match_node(dpu_dt_match, dev->of_node) ||
@@ -327,12 +320,12 @@ static int mdss_probe(struct platform_device *pdev)
{
struct msm_mdss *mdss;
struct msm_drm_private *priv;
- int mdp_ver = get_mdp_ver(pdev);
+ bool is_mdp5 = of_device_is_compatible(pdev->dev.of_node, "qcom,mdss");
struct device *mdp_dev;
struct device *dev = &pdev->dev;
int ret;
- mdss = msm_mdss_init(pdev, mdp_ver == KMS_MDP5);
+ mdss = msm_mdss_init(pdev, is_mdp5);
if (IS_ERR(mdss))
return PTR_ERR(mdss);
@@ -398,15 +391,15 @@ static int mdss_remove(struct platform_device *pdev)
}
static const struct of_device_id mdss_dt_match[] = {
- { .compatible = "qcom,mdss", .data = (void *)KMS_MDP5 },
- { .compatible = "qcom,msm8998-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,qcm2290-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sdm845-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7180-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc7280-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sc8180x-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8150-mdss", .data = (void *)KMS_DPU },
- { .compatible = "qcom,sm8250-mdss", .data = (void *)KMS_DPU },
+ { .compatible = "qcom,mdss" },
+ { .compatible = "qcom,msm8998-mdss" },
+ { .compatible = "qcom,qcm2290-mdss" },
+ { .compatible = "qcom,sdm845-mdss" },
+ { .compatible = "qcom,sc7180-mdss" },
+ { .compatible = "qcom,sc7280-mdss" },
+ { .compatible = "qcom,sc8180x-mdss" },
+ { .compatible = "qcom,sm8150-mdss" },
+ { .compatible = "qcom,sm8250-mdss" },
{}
};
MODULE_DEVICE_TABLE(of, mdss_dt_match);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 5/6] drm/msm: allow compile time selection of driver components
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
MSM DRM driver already allows one to compile out the DP or DSI support.
Add support for disabling other features like MDP4/MDP5/DPU drivers or
direct HDMI output support.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/Kconfig | 50 +++++++++++++++++--
drivers/gpu/drm/msm/Makefile | 24 ++++++---
.../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 ++
.../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 ++
drivers/gpu/drm/msm/msm_drv.h | 33 ++++++++++++
drivers/gpu/drm/msm/msm_mdss.c | 13 ++++-
6 files changed, 115 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
index c79502525963..e99719067cd0 100644
--- a/drivers/gpu/drm/msm/Kconfig
+++ b/drivers/gpu/drm/msm/Kconfig
@@ -47,12 +47,39 @@ config DRM_MSM_GPU_SUDO
Only use this if you are a driver developer. This should *not*
be enabled for production kernels. If unsure, say N.
-config DRM_MSM_HDMI_HDCP
- bool "Enable HDMI HDCP support in MSM DRM driver"
+config DRM_MSM_MDSS
+ bool
+ depends on DRM_MSM
+ default n
+
+config DRM_MSM_MDP4
+ bool "Enable MDP4 support in MSM DRM driver"
depends on DRM_MSM
default y
help
- Choose this option to enable HDCP state machine
+ Compile in support for the Mobile Display Processor v4 (MDP4) in
+ the MSM DRM driver. It is the older display controller found in
+ devices using APQ8064/MSM8960/MSM8x60 platforms.
+
+config DRM_MSM_MDP5
+ bool "Enable MDP5 support in MSM DRM driver"
+ depends on DRM_MSM
+ select DRM_MSM_MDSS
+ default y
+ help
+ Compile in support for the Mobile Display Processor v5 (MDP5) in
+ the MSM DRM driver. It is the display controller found in devices
+ using e.g. APQ8016/MSM8916/APQ8096/MSM8996/MSM8974/SDM6x0 platforms.
+
+config DRM_MSM_DPU
+ bool "Enable DPU support in MSM DRM driver"
+ depends on DRM_MSM
+ select DRM_MSM_MDSS
+ default y
+ help
+ Compile in support for the Display Processing Unit in
+ the MSM DRM driver. It is the display controller found in devices
+ using e.g. SDM845 and newer platforms.
config DRM_MSM_DP
bool "Enable DisplayPort support in MSM DRM driver"
@@ -117,3 +144,20 @@ config DRM_MSM_DSI_7NM_PHY
help
Choose this option if DSI PHY on SM8150/SM8250/SC7280 is used on
the platform.
+
+config DRM_MSM_HDMI
+ bool "Enable HDMI support in MSM DRM driver"
+ depends on DRM_MSM
+ default y
+ help
+ Compile in support for the HDMI output MSM DRM driver. It can
+ be a primary or a secondary display on device. Note that this is used
+ only for the direct HDMI output. If the device outputs HDMI data
+ throught some kind of DSI-to-HDMI bridge, this option can be disabled.
+
+config DRM_MSM_HDMI_HDCP
+ bool "Enable HDMI HDCP support in MSM DRM driver"
+ depends on DRM_MSM && DRM_MSM_HDMI
+ default y
+ help
+ Choose this option to enable HDCP state machine
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e76927b42033..3dc576309255 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -16,6 +16,8 @@ msm-y := \
adreno/a6xx_gpu.o \
adreno/a6xx_gmu.o \
adreno/a6xx_hfi.o \
+
+msm-$(CONFIG_DRM_MSM_HDMI) += \
hdmi/hdmi.o \
hdmi/hdmi_audio.o \
hdmi/hdmi_bridge.o \
@@ -27,9 +29,10 @@ msm-y := \
hdmi/hdmi_phy_8x60.o \
hdmi/hdmi_phy_8x74.o \
hdmi/hdmi_pll_8960.o \
- disp/mdp_format.o \
- disp/mdp_kms.o \
+
+msm-$(CONFIG_DRM_MSM_MDP4) += \
disp/mdp4/mdp4_crtc.o \
+ disp/mdp4/mdp4_dsi_encoder.o \
disp/mdp4/mdp4_dtv_encoder.o \
disp/mdp4/mdp4_lcdc_encoder.o \
disp/mdp4/mdp4_lvds_connector.o \
@@ -37,7 +40,10 @@ msm-y := \
disp/mdp4/mdp4_irq.o \
disp/mdp4/mdp4_kms.o \
disp/mdp4/mdp4_plane.o \
+
+msm-$(CONFIG_DRM_MSM_MDP5) += \
disp/mdp5/mdp5_cfg.o \
+ disp/mdp5/mdp5_cmd_encoder.o \
disp/mdp5/mdp5_ctl.o \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
@@ -47,6 +53,8 @@ msm-y := \
disp/mdp5/mdp5_mixer.o \
disp/mdp5/mdp5_plane.o \
disp/mdp5/mdp5_smp.o \
+
+msm-$(CONFIG_DRM_MSM_DPU) += \
disp/dpu1/dpu_core_perf.o \
disp/dpu1/dpu_crtc.o \
disp/dpu1/dpu_encoder.o \
@@ -69,6 +77,13 @@ msm-y := \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
+
+msm-$(CONFIG_DRM_MSM_MDSS) += \
+ msm_mdss.o \
+
+msm-y += \
+ disp/mdp_format.o \
+ disp/mdp_kms.o \
disp/msm_disp_snapshot.o \
disp/msm_disp_snapshot_util.o \
msm_atomic.o \
@@ -86,7 +101,6 @@ msm-y := \
msm_gpu_devfreq.o \
msm_io_utils.o \
msm_iommu.o \
- msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
@@ -117,12 +131,10 @@ msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
- disp/mdp4/mdp4_dsi_encoder.o \
dsi/dsi_cfg.o \
dsi/dsi_host.o \
dsi/dsi_manager.o \
- dsi/phy/dsi_phy.o \
- disp/mdp5/mdp5_cmd_encoder.o
+ dsi/phy/dsi_phy.o
msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
index aaf2f26f8505..39b8fe53c29d 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
@@ -11,6 +11,8 @@
#include "mdp4_kms.h"
+#ifdef CONFIG_DRM_MSM_DSI
+
struct mdp4_dsi_encoder {
struct drm_encoder base;
struct drm_panel *panel;
@@ -170,3 +172,4 @@ struct drm_encoder *mdp4_dsi_encoder_init(struct drm_device *dev)
return ERR_PTR(ret);
}
+#endif /* CONFIG_DRM_MSM_DSI */
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
index ec6c7b09865e..a640af22eafc 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
@@ -8,6 +8,8 @@
#include "mdp5_kms.h"
+#ifdef CONFIG_DRM_MSM_DSI
+
static struct mdp5_kms *get_kms(struct drm_encoder *encoder)
{
struct msm_drm_private *priv = encoder->dev->dev_private;
@@ -198,3 +200,4 @@ int mdp5_cmd_encoder_set_split_display(struct drm_encoder *encoder,
return 0;
}
+#endif /* CONFIG_DRM_MSM_DSI */
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 19d2767c5363..bb821705399a 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -314,10 +314,20 @@ struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
void msm_fbdev_free(struct drm_device *dev);
struct hdmi;
+#ifdef CONFIG_DRM_MSM_HDMI
int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
struct drm_encoder *encoder);
void __init msm_hdmi_register(void);
void __exit msm_hdmi_unregister(void);
+#else
+static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
+ struct drm_encoder *encoder)
+{
+ return -EINVAL;
+}
+static inline void __init msm_hdmi_register(void) {}
+static inline void __exit msm_hdmi_unregister(void) {}
+#endif
struct msm_dsi;
#ifdef CONFIG_DRM_MSM_DSI
@@ -432,14 +442,37 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
+#ifdef CONFIG_DRM_MSM_MDP4
void msm_mdp4_register(void);
void msm_mdp4_unregister(void);
+#else
+static inline void msm_mdp4_register(void) {}
+static inline void msm_mdp4_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDP5
void msm_mdp_register(void);
void msm_mdp_unregister(void);
+#else
+static inline void msm_mdp_register(void) {}
+static inline void msm_mdp_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_DPU
void msm_dpu_register(void);
void msm_dpu_unregister(void);
+#else
+static inline void msm_dpu_register(void) {}
+static inline void msm_dpu_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDSS
void msm_mdss_register(void);
void msm_mdss_unregister(void);
+#else
+static inline void msm_mdss_register(void) {}
+static inline void msm_mdss_unregister(void) {}
+#endif
#ifdef CONFIG_DEBUG_FS
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index c94b78431687..0af86fc1a130 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -312,8 +312,17 @@ static const struct dev_pm_ops mdss_pm_ops = {
static int find_mdp_node(struct device *dev, void *data)
{
- return of_match_node(dpu_dt_match, dev->of_node) ||
- of_match_node(mdp5_dt_match, dev->of_node);
+#ifdef CONFIG_DRM_MSM_DPU
+ if (of_match_node(dpu_dt_match, dev->of_node))
+ return true;
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDP5
+ if (of_match_node(mdp5_dt_match, dev->of_node))
+ return true;
+#endif
+
+ return false;
}
static int mdss_probe(struct platform_device *pdev)
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 5/6] drm/msm: allow compile time selection of driver components
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
MSM DRM driver already allows one to compile out the DP or DSI support.
Add support for disabling other features like MDP4/MDP5/DPU drivers or
direct HDMI output support.
Suggested-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/Kconfig | 50 +++++++++++++++++--
drivers/gpu/drm/msm/Makefile | 24 ++++++---
.../gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c | 3 ++
.../gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c | 3 ++
drivers/gpu/drm/msm/msm_drv.h | 33 ++++++++++++
drivers/gpu/drm/msm/msm_mdss.c | 13 ++++-
6 files changed, 115 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/msm/Kconfig b/drivers/gpu/drm/msm/Kconfig
index c79502525963..e99719067cd0 100644
--- a/drivers/gpu/drm/msm/Kconfig
+++ b/drivers/gpu/drm/msm/Kconfig
@@ -47,12 +47,39 @@ config DRM_MSM_GPU_SUDO
Only use this if you are a driver developer. This should *not*
be enabled for production kernels. If unsure, say N.
-config DRM_MSM_HDMI_HDCP
- bool "Enable HDMI HDCP support in MSM DRM driver"
+config DRM_MSM_MDSS
+ bool
+ depends on DRM_MSM
+ default n
+
+config DRM_MSM_MDP4
+ bool "Enable MDP4 support in MSM DRM driver"
depends on DRM_MSM
default y
help
- Choose this option to enable HDCP state machine
+ Compile in support for the Mobile Display Processor v4 (MDP4) in
+ the MSM DRM driver. It is the older display controller found in
+ devices using APQ8064/MSM8960/MSM8x60 platforms.
+
+config DRM_MSM_MDP5
+ bool "Enable MDP5 support in MSM DRM driver"
+ depends on DRM_MSM
+ select DRM_MSM_MDSS
+ default y
+ help
+ Compile in support for the Mobile Display Processor v5 (MDP5) in
+ the MSM DRM driver. It is the display controller found in devices
+ using e.g. APQ8016/MSM8916/APQ8096/MSM8996/MSM8974/SDM6x0 platforms.
+
+config DRM_MSM_DPU
+ bool "Enable DPU support in MSM DRM driver"
+ depends on DRM_MSM
+ select DRM_MSM_MDSS
+ default y
+ help
+ Compile in support for the Display Processing Unit in
+ the MSM DRM driver. It is the display controller found in devices
+ using e.g. SDM845 and newer platforms.
config DRM_MSM_DP
bool "Enable DisplayPort support in MSM DRM driver"
@@ -117,3 +144,20 @@ config DRM_MSM_DSI_7NM_PHY
help
Choose this option if DSI PHY on SM8150/SM8250/SC7280 is used on
the platform.
+
+config DRM_MSM_HDMI
+ bool "Enable HDMI support in MSM DRM driver"
+ depends on DRM_MSM
+ default y
+ help
+ Compile in support for the HDMI output MSM DRM driver. It can
+ be a primary or a secondary display on device. Note that this is used
+ only for the direct HDMI output. If the device outputs HDMI data
+ throught some kind of DSI-to-HDMI bridge, this option can be disabled.
+
+config DRM_MSM_HDMI_HDCP
+ bool "Enable HDMI HDCP support in MSM DRM driver"
+ depends on DRM_MSM && DRM_MSM_HDMI
+ default y
+ help
+ Choose this option to enable HDCP state machine
diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile
index e76927b42033..3dc576309255 100644
--- a/drivers/gpu/drm/msm/Makefile
+++ b/drivers/gpu/drm/msm/Makefile
@@ -16,6 +16,8 @@ msm-y := \
adreno/a6xx_gpu.o \
adreno/a6xx_gmu.o \
adreno/a6xx_hfi.o \
+
+msm-$(CONFIG_DRM_MSM_HDMI) += \
hdmi/hdmi.o \
hdmi/hdmi_audio.o \
hdmi/hdmi_bridge.o \
@@ -27,9 +29,10 @@ msm-y := \
hdmi/hdmi_phy_8x60.o \
hdmi/hdmi_phy_8x74.o \
hdmi/hdmi_pll_8960.o \
- disp/mdp_format.o \
- disp/mdp_kms.o \
+
+msm-$(CONFIG_DRM_MSM_MDP4) += \
disp/mdp4/mdp4_crtc.o \
+ disp/mdp4/mdp4_dsi_encoder.o \
disp/mdp4/mdp4_dtv_encoder.o \
disp/mdp4/mdp4_lcdc_encoder.o \
disp/mdp4/mdp4_lvds_connector.o \
@@ -37,7 +40,10 @@ msm-y := \
disp/mdp4/mdp4_irq.o \
disp/mdp4/mdp4_kms.o \
disp/mdp4/mdp4_plane.o \
+
+msm-$(CONFIG_DRM_MSM_MDP5) += \
disp/mdp5/mdp5_cfg.o \
+ disp/mdp5/mdp5_cmd_encoder.o \
disp/mdp5/mdp5_ctl.o \
disp/mdp5/mdp5_crtc.o \
disp/mdp5/mdp5_encoder.o \
@@ -47,6 +53,8 @@ msm-y := \
disp/mdp5/mdp5_mixer.o \
disp/mdp5/mdp5_plane.o \
disp/mdp5/mdp5_smp.o \
+
+msm-$(CONFIG_DRM_MSM_DPU) += \
disp/dpu1/dpu_core_perf.o \
disp/dpu1/dpu_crtc.o \
disp/dpu1/dpu_encoder.o \
@@ -69,6 +77,13 @@ msm-y := \
disp/dpu1/dpu_plane.o \
disp/dpu1/dpu_rm.o \
disp/dpu1/dpu_vbif.o \
+
+msm-$(CONFIG_DRM_MSM_MDSS) += \
+ msm_mdss.o \
+
+msm-y += \
+ disp/mdp_format.o \
+ disp/mdp_kms.o \
disp/msm_disp_snapshot.o \
disp/msm_disp_snapshot_util.o \
msm_atomic.o \
@@ -86,7 +101,6 @@ msm-y := \
msm_gpu_devfreq.o \
msm_io_utils.o \
msm_iommu.o \
- msm_mdss.o \
msm_perf.o \
msm_rd.o \
msm_ringbuffer.o \
@@ -117,12 +131,10 @@ msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o
msm-$(CONFIG_DRM_MSM_HDMI_HDCP) += hdmi/hdmi_hdcp.o
msm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi.o \
- disp/mdp4/mdp4_dsi_encoder.o \
dsi/dsi_cfg.o \
dsi/dsi_host.o \
dsi/dsi_manager.o \
- dsi/phy/dsi_phy.o \
- disp/mdp5/mdp5_cmd_encoder.o
+ dsi/phy/dsi_phy.o
msm-$(CONFIG_DRM_MSM_DSI_28NM_PHY) += dsi/phy/dsi_phy_28nm.o
msm-$(CONFIG_DRM_MSM_DSI_20NM_PHY) += dsi/phy/dsi_phy_20nm.o
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
index aaf2f26f8505..39b8fe53c29d 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_dsi_encoder.c
@@ -11,6 +11,8 @@
#include "mdp4_kms.h"
+#ifdef CONFIG_DRM_MSM_DSI
+
struct mdp4_dsi_encoder {
struct drm_encoder base;
struct drm_panel *panel;
@@ -170,3 +172,4 @@ struct drm_encoder *mdp4_dsi_encoder_init(struct drm_device *dev)
return ERR_PTR(ret);
}
+#endif /* CONFIG_DRM_MSM_DSI */
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
index ec6c7b09865e..a640af22eafc 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_cmd_encoder.c
@@ -8,6 +8,8 @@
#include "mdp5_kms.h"
+#ifdef CONFIG_DRM_MSM_DSI
+
static struct mdp5_kms *get_kms(struct drm_encoder *encoder)
{
struct msm_drm_private *priv = encoder->dev->dev_private;
@@ -198,3 +200,4 @@ int mdp5_cmd_encoder_set_split_display(struct drm_encoder *encoder,
return 0;
}
+#endif /* CONFIG_DRM_MSM_DSI */
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index 19d2767c5363..bb821705399a 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -314,10 +314,20 @@ struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
void msm_fbdev_free(struct drm_device *dev);
struct hdmi;
+#ifdef CONFIG_DRM_MSM_HDMI
int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
struct drm_encoder *encoder);
void __init msm_hdmi_register(void);
void __exit msm_hdmi_unregister(void);
+#else
+static inline int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
+ struct drm_encoder *encoder)
+{
+ return -EINVAL;
+}
+static inline void __init msm_hdmi_register(void) {}
+static inline void __exit msm_hdmi_unregister(void) {}
+#endif
struct msm_dsi;
#ifdef CONFIG_DRM_MSM_DSI
@@ -432,14 +442,37 @@ static inline void msm_dp_debugfs_init(struct msm_dp *dp_display,
#endif
+#ifdef CONFIG_DRM_MSM_MDP4
void msm_mdp4_register(void);
void msm_mdp4_unregister(void);
+#else
+static inline void msm_mdp4_register(void) {}
+static inline void msm_mdp4_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDP5
void msm_mdp_register(void);
void msm_mdp_unregister(void);
+#else
+static inline void msm_mdp_register(void) {}
+static inline void msm_mdp_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_DPU
void msm_dpu_register(void);
void msm_dpu_unregister(void);
+#else
+static inline void msm_dpu_register(void) {}
+static inline void msm_dpu_unregister(void) {}
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDSS
void msm_mdss_register(void);
void msm_mdss_unregister(void);
+#else
+static inline void msm_mdss_register(void) {}
+static inline void msm_mdss_unregister(void) {}
+#endif
#ifdef CONFIG_DEBUG_FS
void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index c94b78431687..0af86fc1a130 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -312,8 +312,17 @@ static const struct dev_pm_ops mdss_pm_ops = {
static int find_mdp_node(struct device *dev, void *data)
{
- return of_match_node(dpu_dt_match, dev->of_node) ||
- of_match_node(mdp5_dt_match, dev->of_node);
+#ifdef CONFIG_DRM_MSM_DPU
+ if (of_match_node(dpu_dt_match, dev->of_node))
+ return true;
+#endif
+
+#ifdef CONFIG_DRM_MSM_MDP5
+ if (of_match_node(mdp5_dt_match, dev->of_node))
+ return true;
+#endif
+
+ return false;
}
static int mdss_probe(struct platform_device *pdev)
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 6/6] drm/msm: make mdp5/dpu devices master components
2022-04-19 15:53 ` Dmitry Baryshkov
@ 2022-04-19 15:53 ` Dmitry Baryshkov
-1 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
dri-devel, freedreno
The msm_mdss serves several roles at this moment. It provides IRQ domain
used by MDP5 and DPU drivers but it also serves as a component master
for both those usecases. MDP4 (which does not have separate MDSS device)
is the component master on it's own.
Remove this assymmetry and make both MDP5 and DPU component masters too.
This removes a need to care about drm/components from msm_mdss driver,
removes an mdss pointer from struct msm_drm_private and simplifies the
interface between mdp5/dpu and msm_drv.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 88 ++++++++++--------------
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 16 +----
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 50 +++++---------
drivers/gpu/drm/msm/msm_drv.c | 32 ++++-----
drivers/gpu/drm/msm/msm_drv.h | 6 +-
drivers/gpu/drm/msm/msm_kms.h | 3 -
drivers/gpu/drm/msm/msm_mdss.c | 67 +++---------------
7 files changed, 79 insertions(+), 183 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 38627ccf3068..7672e1d28665 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -380,9 +380,13 @@ static int dpu_kms_parse_data_bus_icc_path(struct dpu_kms *dpu_kms)
struct icc_path *path0;
struct icc_path *path1;
struct drm_device *dev = dpu_kms->dev;
+ struct device *dpu_dev = dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
- path0 = of_icc_get(dev->dev, "mdp0-mem");
- path1 = of_icc_get(dev->dev, "mdp1-mem");
+ /* Interconnects are a part of MDSS device tree binding, not the
+ * MDP/DPU device. */
+ path0 = of_icc_get(mdss_dev, "mdp0-mem");
+ path1 = of_icc_get(mdss_dev, "mdp1-mem");
if (IS_ERR_OR_NULL(path0))
return PTR_ERR_OR_ZERO(path0);
@@ -837,6 +841,9 @@ static void dpu_kms_destroy(struct msm_kms *kms)
_dpu_kms_hw_destroy(dpu_kms);
msm_kms_destroy(&dpu_kms->base);
+
+ if (dpu_kms->rpm_enabled)
+ pm_runtime_disable(&dpu_kms->pdev->dev);
}
static irqreturn_t dpu_irq(struct msm_kms *kms)
@@ -973,12 +980,16 @@ static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms)
struct iommu_domain *domain;
struct msm_gem_address_space *aspace;
struct msm_mmu *mmu;
+ struct device *dpu_dev = dpu_kms->dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
domain = iommu_domain_alloc(&platform_bus_type);
if (!domain)
return 0;
- mmu = msm_iommu_new(dpu_kms->dev->dev, domain);
+ /* IOMMUs are a part of MDSS device tree binding, not the
+ * MDP/DPU device. */
+ mmu = msm_iommu_new(mdss_dev, domain);
if (IS_ERR(mmu)) {
iommu_domain_free(domain);
return PTR_ERR(mmu);
@@ -1172,40 +1183,15 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-static int dpu_kms_init(struct drm_device *dev)
-{
- struct msm_drm_private *priv;
- struct dpu_kms *dpu_kms;
- int irq;
-
- if (!dev) {
- DPU_ERROR("drm device node invalid\n");
- return -EINVAL;
- }
-
- priv = dev->dev_private;
- dpu_kms = to_dpu_kms(priv->kms);
-
- irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
- if (irq < 0) {
- DPU_ERROR("failed to get irq: %d\n", irq);
- return irq;
- }
- dpu_kms->base.irq = irq;
-
- return 0;
-}
-
-static int dpu_bind(struct device *dev, struct device *master, void *data)
+static int dpu_kms_init(struct drm_device *ddev)
{
- struct msm_drm_private *priv = dev_get_drvdata(master);
+ struct msm_drm_private *priv = ddev->dev_private;
+ struct device *dev = ddev->dev;
struct platform_device *pdev = to_platform_device(dev);
- struct drm_device *ddev = priv->dev;
struct dpu_kms *dpu_kms;
+ int irq;
int ret = 0;
- priv->kms_init = dpu_kms_init;
-
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
@@ -1227,8 +1213,6 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
}
dpu_kms->num_clocks = ret;
- platform_set_drvdata(pdev, dpu_kms);
-
ret = msm_kms_init(&dpu_kms->base, &kms_funcs);
if (ret) {
DPU_ERROR("failed to init kms, ret=%d\n", ret);
@@ -1242,31 +1226,25 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
priv->kms = &dpu_kms->base;
- return ret;
-}
-
-static void dpu_unbind(struct device *dev, struct device *master, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
+ if (irq < 0) {
+ DPU_ERROR("failed to get irq: %d\n", irq);
+ return irq;
+ }
+ dpu_kms->base.irq = irq;
- if (dpu_kms->rpm_enabled)
- pm_runtime_disable(&pdev->dev);
+ return 0;
}
-static const struct component_ops dpu_ops = {
- .bind = dpu_bind,
- .unbind = dpu_unbind,
-};
-
static int dpu_dev_probe(struct platform_device *pdev)
{
- return component_add(&pdev->dev, &dpu_ops);
+ return msm_drv_probe(&pdev->dev, dpu_kms_init);
}
static int dpu_dev_remove(struct platform_device *pdev)
{
- component_del(&pdev->dev, &dpu_ops);
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
return 0;
}
@@ -1274,7 +1252,8 @@ static int __maybe_unused dpu_runtime_suspend(struct device *dev)
{
int i;
struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
/* Drop the performance state vote */
dev_pm_opp_set_rate(dev, 0);
@@ -1290,7 +1269,8 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev)
{
int rc = -1;
struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
struct drm_encoder *encoder;
struct drm_device *ddev;
int i;
@@ -1320,9 +1300,11 @@ static const struct dev_pm_ops dpu_pm_ops = {
SET_RUNTIME_PM_OPS(dpu_runtime_suspend, dpu_runtime_resume, NULL)
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
};
-const struct of_device_id dpu_dt_match[] = {
+static const struct of_device_id dpu_dt_match[] = {
{ .compatible = "qcom,msm8998-dpu", },
{ .compatible = "qcom,qcm2290-dpu", },
{ .compatible = "qcom,sdm845-dpu", },
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 1a14f1d3cdf7..834d16bced9d 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -577,21 +577,7 @@ static const struct dev_pm_ops mdp4_pm_ops = {
static int mdp4_probe(struct platform_device *pdev)
{
- struct msm_drm_private *priv;
-
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->kms_init = mdp4_kms_init;
-
- platform_set_drvdata(pdev, priv);
-
- /*
- * on MDP4 based platforms, the MDP platform device is the component
- * that adds other display interface components to itself.
- */
- return msm_drv_probe(&pdev->dev, &pdev->dev);
+ return msm_drv_probe(&pdev->dev, mdp4_kms_init);
}
static int mdp4_remove(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 0c78608832c3..7676b4d3620e 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -203,6 +203,8 @@ static int mdp5_set_split_display(struct msm_kms *kms,
slave_encoder);
}
+static void mdp5_destroy(struct platform_device *pdev);
+
static void mdp5_kms_destroy(struct msm_kms *kms)
{
struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
@@ -221,6 +223,7 @@ static void mdp5_kms_destroy(struct msm_kms *kms)
}
mdp_kms_destroy(&mdp5_kms->base);
+ mdp5_destroy(mdp5_kms->pdev);
}
#ifdef CONFIG_DEBUG_FS
@@ -544,6 +547,8 @@ static int get_clk(struct platform_device *pdev, struct clk **clkp,
return 0;
}
+static int mdp5_init(struct platform_device *pdev, struct drm_device *dev);
+
static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
@@ -555,6 +560,8 @@ static int mdp5_kms_init(struct drm_device *dev)
int irq, i, ret;
struct device *iommu_dev;
+ ret = mdp5_init(to_platform_device(dev->dev), dev);
+
/* priv->kms would have been populated by the MDP5 driver */
kms = priv->kms;
if (!kms)
@@ -804,8 +811,6 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
u32 major, minor;
int ret;
- priv->kms_init = mdp5_kms_init;
-
mdp5_kms = devm_kzalloc(&pdev->dev, sizeof(*mdp5_kms), GFP_KERNEL);
if (!mdp5_kms) {
ret = -ENOMEM;
@@ -915,35 +920,14 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
return ret;
}
-static int mdp5_bind(struct device *dev, struct device *master, void *data)
-{
- struct msm_drm_private *priv = dev_get_drvdata(master);
- struct drm_device *ddev = priv->dev;
- struct platform_device *pdev = to_platform_device(dev);
-
- DBG("");
-
- return mdp5_init(pdev, ddev);
-}
-
-static void mdp5_unbind(struct device *dev, struct device *master,
- void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
-
- mdp5_destroy(pdev);
-}
-
-static const struct component_ops mdp5_ops = {
- .bind = mdp5_bind,
- .unbind = mdp5_unbind,
-};
-
static int mdp5_setup_interconnect(struct platform_device *pdev)
{
- struct icc_path *path0 = of_icc_get(&pdev->dev, "mdp0-mem");
- struct icc_path *path1 = of_icc_get(&pdev->dev, "mdp1-mem");
- struct icc_path *path_rot = of_icc_get(&pdev->dev, "rotator-mem");
+ /* Interconnects are a part of MDSS device tree binding, not the
+ * MDP5 device. */
+ struct device *mdss_dev = pdev->dev.parent;
+ struct icc_path *path0 = of_icc_get(mdss_dev, "mdp0-mem");
+ struct icc_path *path1 = of_icc_get(mdss_dev, "mdp1-mem");
+ struct icc_path *path_rot = of_icc_get(mdss_dev, "rotator-mem");
if (IS_ERR(path0))
return PTR_ERR(path0);
@@ -979,13 +963,13 @@ static int mdp5_dev_probe(struct platform_device *pdev)
if (ret)
return ret;
- return component_add(&pdev->dev, &mdp5_ops);
+ return msm_drv_probe(&pdev->dev, mdp5_kms_init);
}
static int mdp5_dev_remove(struct platform_device *pdev)
{
DBG("");
- component_del(&pdev->dev, &mdp5_ops);
+ component_master_del(&pdev->dev, &msm_drm_ops);
return 0;
}
@@ -1011,9 +995,11 @@ static __maybe_unused int mdp5_runtime_resume(struct device *dev)
static const struct dev_pm_ops mdp5_pm_ops = {
SET_RUNTIME_PM_OPS(mdp5_runtime_suspend, mdp5_runtime_resume, NULL)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
};
-const struct of_device_id mdp5_dt_match[] = {
+static const struct of_device_id mdp5_dt_match[] = {
{ .compatible = "qcom,mdp5", },
/* to support downstream DT files */
{ .compatible = "qcom,mdss_mdp", },
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index c037b46da7f4..e2b5307b2360 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -986,10 +986,10 @@ static const struct dev_pm_ops msm_pm_ops = {
* is no external component that we need to add since LVDS is within MDP4
* itself.
*/
-static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
+static int add_components_mdp(struct device *master_dev,
struct component_match **matchptr)
{
- struct device_node *np = mdp_dev->of_node;
+ struct device_node *np = master_dev->of_node;
struct device_node *ep_node;
for_each_endpoint_of_node(np, ep_node) {
@@ -999,7 +999,7 @@ static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
ret = of_graph_parse_endpoint(ep_node, &ep);
if (ret) {
- DRM_DEV_ERROR(mdp_dev, "unable to parse port endpoint\n");
+ DRM_DEV_ERROR(master_dev, "unable to parse port endpoint\n");
of_node_put(ep_node);
return ret;
}
@@ -1076,17 +1076,23 @@ const struct component_master_ops msm_drm_ops = {
.unbind = msm_drm_unbind,
};
-int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
+int msm_drv_probe(struct device *master_dev,
+ int (*kms_init)(struct drm_device *dev))
{
+ struct msm_drm_private *priv;
struct component_match *match = NULL;
int ret;
- if (mdp_dev) {
- /* add the MDP component itself */
- drm_of_component_match_add(master_dev, &match, component_compare_of,
- mdp_dev->of_node);
+ priv = devm_kzalloc(master_dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
- ret = add_components_mdp(master_dev, mdp_dev, &match);
+ priv->kms_init = kms_init;
+ dev_set_drvdata(master_dev, priv);
+
+ /* Add mdp components if we have KMS. */
+ if (kms_init) {
+ ret = add_components_mdp(master_dev, &match);
if (ret)
return ret;
}
@@ -1116,14 +1122,6 @@ int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
static int msm_pdev_probe(struct platform_device *pdev)
{
- struct msm_drm_private *priv;
-
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, priv);
-
return msm_drv_probe(&pdev->dev, NULL);
}
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index bb821705399a..272fe4e6c04b 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -126,9 +126,6 @@ struct msm_drm_private {
/* subordinate devices, if present: */
struct platform_device *gpu_pdev;
- /* top level MDSS wrapper device (for MDP5/DPU only) */
- struct msm_mdss *mdss;
-
/* possibly this should be in the kms component, but it is
* shared by both mdp4 and mdp5..
*/
@@ -579,7 +576,8 @@ extern const struct component_master_ops msm_drm_ops;
int msm_pm_prepare(struct device *dev);
void msm_pm_complete(struct device *dev);
-int msm_drv_probe(struct device *master_dev, struct device *mdp_dev);
+int msm_drv_probe(struct device *dev,
+ int (*kms_init)(struct drm_device *dev));
void msm_drv_shutdown(struct platform_device *pdev);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 1f571372e928..ab25fff271f9 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -194,9 +194,6 @@ static inline void msm_kms_destroy(struct msm_kms *kms)
msm_atomic_destroy_pending_timer(&kms->pending_timers[i]);
}
-extern const struct of_device_id dpu_dt_match[];
-extern const struct of_device_id mdp5_dt_match[];
-
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
for_each_if (drm_crtc_mask(crtc) & (crtc_mask))
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 0af86fc1a130..f6f0d0fa5ab2 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -270,20 +270,20 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5
static int __maybe_unused mdss_runtime_suspend(struct device *dev)
{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
+ struct msm_mdss *mdss = dev_get_drvdata(dev);
DBG("");
- return msm_mdss_disable(priv->mdss);
+ return msm_mdss_disable(mdss);
}
static int __maybe_unused mdss_runtime_resume(struct device *dev)
{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
+ struct msm_mdss *mdss = dev_get_drvdata(dev);
DBG("");
- return msm_mdss_enable(priv->mdss);
+ return msm_mdss_enable(mdss);
}
static int __maybe_unused mdss_pm_suspend(struct device *dev)
@@ -306,31 +306,12 @@ static int __maybe_unused mdss_pm_resume(struct device *dev)
static const struct dev_pm_ops mdss_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(mdss_pm_suspend, mdss_pm_resume)
SET_RUNTIME_PM_OPS(mdss_runtime_suspend, mdss_runtime_resume, NULL)
- .prepare = msm_pm_prepare,
- .complete = msm_pm_complete,
};
-static int find_mdp_node(struct device *dev, void *data)
-{
-#ifdef CONFIG_DRM_MSM_DPU
- if (of_match_node(dpu_dt_match, dev->of_node))
- return true;
-#endif
-
-#ifdef CONFIG_DRM_MSM_MDP5
- if (of_match_node(mdp5_dt_match, dev->of_node))
- return true;
-#endif
-
- return false;
-}
-
static int mdss_probe(struct platform_device *pdev)
{
struct msm_mdss *mdss;
- struct msm_drm_private *priv;
bool is_mdp5 = of_device_is_compatible(pdev->dev.of_node, "qcom,mdss");
- struct device *mdp_dev;
struct device *dev = &pdev->dev;
int ret;
@@ -338,14 +319,7 @@ static int mdss_probe(struct platform_device *pdev)
if (IS_ERR(mdss))
return PTR_ERR(mdss);
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv) {
- ret = -ENOMEM;
- goto fail;
- }
-
- priv->mdss = mdss;
- platform_set_drvdata(pdev, priv);
+ platform_set_drvdata(pdev, mdss);
/*
* MDP5/DPU based devices don't have a flat hierarchy. There is a top
@@ -356,42 +330,17 @@ static int mdss_probe(struct platform_device *pdev)
ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
if (ret) {
DRM_DEV_ERROR(dev, "failed to populate children devices\n");
- goto fail;
- }
-
- mdp_dev = device_find_child(dev, NULL, find_mdp_node);
- if (!mdp_dev) {
- DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
- of_platform_depopulate(dev);
- ret = -ENODEV;
- goto fail;
+ msm_mdss_destroy(mdss);
+ return ret;
}
- /*
- * on MDP5 based platforms, the MDSS platform device is the component
- * that adds MDP5 and other display interface components to
- * itself.
- */
- ret = msm_drv_probe(dev, mdp_dev);
- put_device(mdp_dev);
- if (ret)
- goto fail;
-
return 0;
-
-fail:
- of_platform_depopulate(dev);
- msm_mdss_destroy(priv->mdss);
-
- return ret;
}
static int mdss_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct msm_mdss *mdss = priv->mdss;
+ struct msm_mdss *mdss = platform_get_drvdata(pdev);
- component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
msm_mdss_destroy(mdss);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH v5 6/6] drm/msm: make mdp5/dpu devices master components
@ 2022-04-19 15:53 ` Dmitry Baryshkov
0 siblings, 0 replies; 14+ messages in thread
From: Dmitry Baryshkov @ 2022-04-19 15:53 UTC (permalink / raw)
To: Bjorn Andersson, Rob Clark, Sean Paul, Abhinav Kumar
Cc: David Airlie, linux-arm-msm, dri-devel, Stephen Boyd, freedreno
The msm_mdss serves several roles at this moment. It provides IRQ domain
used by MDP5 and DPU drivers but it also serves as a component master
for both those usecases. MDP4 (which does not have separate MDSS device)
is the component master on it's own.
Remove this assymmetry and make both MDP5 and DPU component masters too.
This removes a need to care about drm/components from msm_mdss driver,
removes an mdss pointer from struct msm_drm_private and simplifies the
interface between mdp5/dpu and msm_drv.
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 88 ++++++++++--------------
drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c | 16 +----
drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c | 50 +++++---------
drivers/gpu/drm/msm/msm_drv.c | 32 ++++-----
drivers/gpu/drm/msm/msm_drv.h | 6 +-
drivers/gpu/drm/msm/msm_kms.h | 3 -
drivers/gpu/drm/msm/msm_mdss.c | 67 +++---------------
7 files changed, 79 insertions(+), 183 deletions(-)
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index 38627ccf3068..7672e1d28665 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -380,9 +380,13 @@ static int dpu_kms_parse_data_bus_icc_path(struct dpu_kms *dpu_kms)
struct icc_path *path0;
struct icc_path *path1;
struct drm_device *dev = dpu_kms->dev;
+ struct device *dpu_dev = dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
- path0 = of_icc_get(dev->dev, "mdp0-mem");
- path1 = of_icc_get(dev->dev, "mdp1-mem");
+ /* Interconnects are a part of MDSS device tree binding, not the
+ * MDP/DPU device. */
+ path0 = of_icc_get(mdss_dev, "mdp0-mem");
+ path1 = of_icc_get(mdss_dev, "mdp1-mem");
if (IS_ERR_OR_NULL(path0))
return PTR_ERR_OR_ZERO(path0);
@@ -837,6 +841,9 @@ static void dpu_kms_destroy(struct msm_kms *kms)
_dpu_kms_hw_destroy(dpu_kms);
msm_kms_destroy(&dpu_kms->base);
+
+ if (dpu_kms->rpm_enabled)
+ pm_runtime_disable(&dpu_kms->pdev->dev);
}
static irqreturn_t dpu_irq(struct msm_kms *kms)
@@ -973,12 +980,16 @@ static int _dpu_kms_mmu_init(struct dpu_kms *dpu_kms)
struct iommu_domain *domain;
struct msm_gem_address_space *aspace;
struct msm_mmu *mmu;
+ struct device *dpu_dev = dpu_kms->dev->dev;
+ struct device *mdss_dev = dpu_dev->parent;
domain = iommu_domain_alloc(&platform_bus_type);
if (!domain)
return 0;
- mmu = msm_iommu_new(dpu_kms->dev->dev, domain);
+ /* IOMMUs are a part of MDSS device tree binding, not the
+ * MDP/DPU device. */
+ mmu = msm_iommu_new(mdss_dev, domain);
if (IS_ERR(mmu)) {
iommu_domain_free(domain);
return PTR_ERR(mmu);
@@ -1172,40 +1183,15 @@ static int dpu_kms_hw_init(struct msm_kms *kms)
return rc;
}
-static int dpu_kms_init(struct drm_device *dev)
-{
- struct msm_drm_private *priv;
- struct dpu_kms *dpu_kms;
- int irq;
-
- if (!dev) {
- DPU_ERROR("drm device node invalid\n");
- return -EINVAL;
- }
-
- priv = dev->dev_private;
- dpu_kms = to_dpu_kms(priv->kms);
-
- irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
- if (irq < 0) {
- DPU_ERROR("failed to get irq: %d\n", irq);
- return irq;
- }
- dpu_kms->base.irq = irq;
-
- return 0;
-}
-
-static int dpu_bind(struct device *dev, struct device *master, void *data)
+static int dpu_kms_init(struct drm_device *ddev)
{
- struct msm_drm_private *priv = dev_get_drvdata(master);
+ struct msm_drm_private *priv = ddev->dev_private;
+ struct device *dev = ddev->dev;
struct platform_device *pdev = to_platform_device(dev);
- struct drm_device *ddev = priv->dev;
struct dpu_kms *dpu_kms;
+ int irq;
int ret = 0;
- priv->kms_init = dpu_kms_init;
-
dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
if (!dpu_kms)
return -ENOMEM;
@@ -1227,8 +1213,6 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
}
dpu_kms->num_clocks = ret;
- platform_set_drvdata(pdev, dpu_kms);
-
ret = msm_kms_init(&dpu_kms->base, &kms_funcs);
if (ret) {
DPU_ERROR("failed to init kms, ret=%d\n", ret);
@@ -1242,31 +1226,25 @@ static int dpu_bind(struct device *dev, struct device *master, void *data)
priv->kms = &dpu_kms->base;
- return ret;
-}
-
-static void dpu_unbind(struct device *dev, struct device *master, void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ irq = irq_of_parse_and_map(dpu_kms->pdev->dev.of_node, 0);
+ if (irq < 0) {
+ DPU_ERROR("failed to get irq: %d\n", irq);
+ return irq;
+ }
+ dpu_kms->base.irq = irq;
- if (dpu_kms->rpm_enabled)
- pm_runtime_disable(&pdev->dev);
+ return 0;
}
-static const struct component_ops dpu_ops = {
- .bind = dpu_bind,
- .unbind = dpu_unbind,
-};
-
static int dpu_dev_probe(struct platform_device *pdev)
{
- return component_add(&pdev->dev, &dpu_ops);
+ return msm_drv_probe(&pdev->dev, dpu_kms_init);
}
static int dpu_dev_remove(struct platform_device *pdev)
{
- component_del(&pdev->dev, &dpu_ops);
+ component_master_del(&pdev->dev, &msm_drm_ops);
+
return 0;
}
@@ -1274,7 +1252,8 @@ static int __maybe_unused dpu_runtime_suspend(struct device *dev)
{
int i;
struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
/* Drop the performance state vote */
dev_pm_opp_set_rate(dev, 0);
@@ -1290,7 +1269,8 @@ static int __maybe_unused dpu_runtime_resume(struct device *dev)
{
int rc = -1;
struct platform_device *pdev = to_platform_device(dev);
- struct dpu_kms *dpu_kms = platform_get_drvdata(pdev);
+ struct msm_drm_private *priv = platform_get_drvdata(pdev);
+ struct dpu_kms *dpu_kms = to_dpu_kms(priv->kms);
struct drm_encoder *encoder;
struct drm_device *ddev;
int i;
@@ -1320,9 +1300,11 @@ static const struct dev_pm_ops dpu_pm_ops = {
SET_RUNTIME_PM_OPS(dpu_runtime_suspend, dpu_runtime_resume, NULL)
SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
pm_runtime_force_resume)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
};
-const struct of_device_id dpu_dt_match[] = {
+static const struct of_device_id dpu_dt_match[] = {
{ .compatible = "qcom,msm8998-dpu", },
{ .compatible = "qcom,qcm2290-dpu", },
{ .compatible = "qcom,sdm845-dpu", },
diff --git a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
index 1a14f1d3cdf7..834d16bced9d 100644
--- a/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp4/mdp4_kms.c
@@ -577,21 +577,7 @@ static const struct dev_pm_ops mdp4_pm_ops = {
static int mdp4_probe(struct platform_device *pdev)
{
- struct msm_drm_private *priv;
-
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- priv->kms_init = mdp4_kms_init;
-
- platform_set_drvdata(pdev, priv);
-
- /*
- * on MDP4 based platforms, the MDP platform device is the component
- * that adds other display interface components to itself.
- */
- return msm_drv_probe(&pdev->dev, &pdev->dev);
+ return msm_drv_probe(&pdev->dev, mdp4_kms_init);
}
static int mdp4_remove(struct platform_device *pdev)
diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
index 0c78608832c3..7676b4d3620e 100644
--- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
+++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_kms.c
@@ -203,6 +203,8 @@ static int mdp5_set_split_display(struct msm_kms *kms,
slave_encoder);
}
+static void mdp5_destroy(struct platform_device *pdev);
+
static void mdp5_kms_destroy(struct msm_kms *kms)
{
struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
@@ -221,6 +223,7 @@ static void mdp5_kms_destroy(struct msm_kms *kms)
}
mdp_kms_destroy(&mdp5_kms->base);
+ mdp5_destroy(mdp5_kms->pdev);
}
#ifdef CONFIG_DEBUG_FS
@@ -544,6 +547,8 @@ static int get_clk(struct platform_device *pdev, struct clk **clkp,
return 0;
}
+static int mdp5_init(struct platform_device *pdev, struct drm_device *dev);
+
static int mdp5_kms_init(struct drm_device *dev)
{
struct msm_drm_private *priv = dev->dev_private;
@@ -555,6 +560,8 @@ static int mdp5_kms_init(struct drm_device *dev)
int irq, i, ret;
struct device *iommu_dev;
+ ret = mdp5_init(to_platform_device(dev->dev), dev);
+
/* priv->kms would have been populated by the MDP5 driver */
kms = priv->kms;
if (!kms)
@@ -804,8 +811,6 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
u32 major, minor;
int ret;
- priv->kms_init = mdp5_kms_init;
-
mdp5_kms = devm_kzalloc(&pdev->dev, sizeof(*mdp5_kms), GFP_KERNEL);
if (!mdp5_kms) {
ret = -ENOMEM;
@@ -915,35 +920,14 @@ static int mdp5_init(struct platform_device *pdev, struct drm_device *dev)
return ret;
}
-static int mdp5_bind(struct device *dev, struct device *master, void *data)
-{
- struct msm_drm_private *priv = dev_get_drvdata(master);
- struct drm_device *ddev = priv->dev;
- struct platform_device *pdev = to_platform_device(dev);
-
- DBG("");
-
- return mdp5_init(pdev, ddev);
-}
-
-static void mdp5_unbind(struct device *dev, struct device *master,
- void *data)
-{
- struct platform_device *pdev = to_platform_device(dev);
-
- mdp5_destroy(pdev);
-}
-
-static const struct component_ops mdp5_ops = {
- .bind = mdp5_bind,
- .unbind = mdp5_unbind,
-};
-
static int mdp5_setup_interconnect(struct platform_device *pdev)
{
- struct icc_path *path0 = of_icc_get(&pdev->dev, "mdp0-mem");
- struct icc_path *path1 = of_icc_get(&pdev->dev, "mdp1-mem");
- struct icc_path *path_rot = of_icc_get(&pdev->dev, "rotator-mem");
+ /* Interconnects are a part of MDSS device tree binding, not the
+ * MDP5 device. */
+ struct device *mdss_dev = pdev->dev.parent;
+ struct icc_path *path0 = of_icc_get(mdss_dev, "mdp0-mem");
+ struct icc_path *path1 = of_icc_get(mdss_dev, "mdp1-mem");
+ struct icc_path *path_rot = of_icc_get(mdss_dev, "rotator-mem");
if (IS_ERR(path0))
return PTR_ERR(path0);
@@ -979,13 +963,13 @@ static int mdp5_dev_probe(struct platform_device *pdev)
if (ret)
return ret;
- return component_add(&pdev->dev, &mdp5_ops);
+ return msm_drv_probe(&pdev->dev, mdp5_kms_init);
}
static int mdp5_dev_remove(struct platform_device *pdev)
{
DBG("");
- component_del(&pdev->dev, &mdp5_ops);
+ component_master_del(&pdev->dev, &msm_drm_ops);
return 0;
}
@@ -1011,9 +995,11 @@ static __maybe_unused int mdp5_runtime_resume(struct device *dev)
static const struct dev_pm_ops mdp5_pm_ops = {
SET_RUNTIME_PM_OPS(mdp5_runtime_suspend, mdp5_runtime_resume, NULL)
+ .prepare = msm_pm_prepare,
+ .complete = msm_pm_complete,
};
-const struct of_device_id mdp5_dt_match[] = {
+static const struct of_device_id mdp5_dt_match[] = {
{ .compatible = "qcom,mdp5", },
/* to support downstream DT files */
{ .compatible = "qcom,mdss_mdp", },
diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c
index c037b46da7f4..e2b5307b2360 100644
--- a/drivers/gpu/drm/msm/msm_drv.c
+++ b/drivers/gpu/drm/msm/msm_drv.c
@@ -986,10 +986,10 @@ static const struct dev_pm_ops msm_pm_ops = {
* is no external component that we need to add since LVDS is within MDP4
* itself.
*/
-static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
+static int add_components_mdp(struct device *master_dev,
struct component_match **matchptr)
{
- struct device_node *np = mdp_dev->of_node;
+ struct device_node *np = master_dev->of_node;
struct device_node *ep_node;
for_each_endpoint_of_node(np, ep_node) {
@@ -999,7 +999,7 @@ static int add_components_mdp(struct device *master_dev, struct device *mdp_dev,
ret = of_graph_parse_endpoint(ep_node, &ep);
if (ret) {
- DRM_DEV_ERROR(mdp_dev, "unable to parse port endpoint\n");
+ DRM_DEV_ERROR(master_dev, "unable to parse port endpoint\n");
of_node_put(ep_node);
return ret;
}
@@ -1076,17 +1076,23 @@ const struct component_master_ops msm_drm_ops = {
.unbind = msm_drm_unbind,
};
-int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
+int msm_drv_probe(struct device *master_dev,
+ int (*kms_init)(struct drm_device *dev))
{
+ struct msm_drm_private *priv;
struct component_match *match = NULL;
int ret;
- if (mdp_dev) {
- /* add the MDP component itself */
- drm_of_component_match_add(master_dev, &match, component_compare_of,
- mdp_dev->of_node);
+ priv = devm_kzalloc(master_dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
- ret = add_components_mdp(master_dev, mdp_dev, &match);
+ priv->kms_init = kms_init;
+ dev_set_drvdata(master_dev, priv);
+
+ /* Add mdp components if we have KMS. */
+ if (kms_init) {
+ ret = add_components_mdp(master_dev, &match);
if (ret)
return ret;
}
@@ -1116,14 +1122,6 @@ int msm_drv_probe(struct device *master_dev, struct device *mdp_dev)
static int msm_pdev_probe(struct platform_device *pdev)
{
- struct msm_drm_private *priv;
-
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv)
- return -ENOMEM;
-
- platform_set_drvdata(pdev, priv);
-
return msm_drv_probe(&pdev->dev, NULL);
}
diff --git a/drivers/gpu/drm/msm/msm_drv.h b/drivers/gpu/drm/msm/msm_drv.h
index bb821705399a..272fe4e6c04b 100644
--- a/drivers/gpu/drm/msm/msm_drv.h
+++ b/drivers/gpu/drm/msm/msm_drv.h
@@ -126,9 +126,6 @@ struct msm_drm_private {
/* subordinate devices, if present: */
struct platform_device *gpu_pdev;
- /* top level MDSS wrapper device (for MDP5/DPU only) */
- struct msm_mdss *mdss;
-
/* possibly this should be in the kms component, but it is
* shared by both mdp4 and mdp5..
*/
@@ -579,7 +576,8 @@ extern const struct component_master_ops msm_drm_ops;
int msm_pm_prepare(struct device *dev);
void msm_pm_complete(struct device *dev);
-int msm_drv_probe(struct device *master_dev, struct device *mdp_dev);
+int msm_drv_probe(struct device *dev,
+ int (*kms_init)(struct drm_device *dev));
void msm_drv_shutdown(struct platform_device *pdev);
diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h
index 1f571372e928..ab25fff271f9 100644
--- a/drivers/gpu/drm/msm/msm_kms.h
+++ b/drivers/gpu/drm/msm/msm_kms.h
@@ -194,9 +194,6 @@ static inline void msm_kms_destroy(struct msm_kms *kms)
msm_atomic_destroy_pending_timer(&kms->pending_timers[i]);
}
-extern const struct of_device_id dpu_dt_match[];
-extern const struct of_device_id mdp5_dt_match[];
-
#define for_each_crtc_mask(dev, crtc, crtc_mask) \
drm_for_each_crtc(crtc, dev) \
for_each_if (drm_crtc_mask(crtc) & (crtc_mask))
diff --git a/drivers/gpu/drm/msm/msm_mdss.c b/drivers/gpu/drm/msm/msm_mdss.c
index 0af86fc1a130..f6f0d0fa5ab2 100644
--- a/drivers/gpu/drm/msm/msm_mdss.c
+++ b/drivers/gpu/drm/msm/msm_mdss.c
@@ -270,20 +270,20 @@ static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5
static int __maybe_unused mdss_runtime_suspend(struct device *dev)
{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
+ struct msm_mdss *mdss = dev_get_drvdata(dev);
DBG("");
- return msm_mdss_disable(priv->mdss);
+ return msm_mdss_disable(mdss);
}
static int __maybe_unused mdss_runtime_resume(struct device *dev)
{
- struct msm_drm_private *priv = dev_get_drvdata(dev);
+ struct msm_mdss *mdss = dev_get_drvdata(dev);
DBG("");
- return msm_mdss_enable(priv->mdss);
+ return msm_mdss_enable(mdss);
}
static int __maybe_unused mdss_pm_suspend(struct device *dev)
@@ -306,31 +306,12 @@ static int __maybe_unused mdss_pm_resume(struct device *dev)
static const struct dev_pm_ops mdss_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(mdss_pm_suspend, mdss_pm_resume)
SET_RUNTIME_PM_OPS(mdss_runtime_suspend, mdss_runtime_resume, NULL)
- .prepare = msm_pm_prepare,
- .complete = msm_pm_complete,
};
-static int find_mdp_node(struct device *dev, void *data)
-{
-#ifdef CONFIG_DRM_MSM_DPU
- if (of_match_node(dpu_dt_match, dev->of_node))
- return true;
-#endif
-
-#ifdef CONFIG_DRM_MSM_MDP5
- if (of_match_node(mdp5_dt_match, dev->of_node))
- return true;
-#endif
-
- return false;
-}
-
static int mdss_probe(struct platform_device *pdev)
{
struct msm_mdss *mdss;
- struct msm_drm_private *priv;
bool is_mdp5 = of_device_is_compatible(pdev->dev.of_node, "qcom,mdss");
- struct device *mdp_dev;
struct device *dev = &pdev->dev;
int ret;
@@ -338,14 +319,7 @@ static int mdss_probe(struct platform_device *pdev)
if (IS_ERR(mdss))
return PTR_ERR(mdss);
- priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
- if (!priv) {
- ret = -ENOMEM;
- goto fail;
- }
-
- priv->mdss = mdss;
- platform_set_drvdata(pdev, priv);
+ platform_set_drvdata(pdev, mdss);
/*
* MDP5/DPU based devices don't have a flat hierarchy. There is a top
@@ -356,42 +330,17 @@ static int mdss_probe(struct platform_device *pdev)
ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
if (ret) {
DRM_DEV_ERROR(dev, "failed to populate children devices\n");
- goto fail;
- }
-
- mdp_dev = device_find_child(dev, NULL, find_mdp_node);
- if (!mdp_dev) {
- DRM_DEV_ERROR(dev, "failed to find MDSS MDP node\n");
- of_platform_depopulate(dev);
- ret = -ENODEV;
- goto fail;
+ msm_mdss_destroy(mdss);
+ return ret;
}
- /*
- * on MDP5 based platforms, the MDSS platform device is the component
- * that adds MDP5 and other display interface components to
- * itself.
- */
- ret = msm_drv_probe(dev, mdp_dev);
- put_device(mdp_dev);
- if (ret)
- goto fail;
-
return 0;
-
-fail:
- of_platform_depopulate(dev);
- msm_mdss_destroy(priv->mdss);
-
- return ret;
}
static int mdss_remove(struct platform_device *pdev)
{
- struct msm_drm_private *priv = platform_get_drvdata(pdev);
- struct msm_mdss *mdss = priv->mdss;
+ struct msm_mdss *mdss = platform_get_drvdata(pdev);
- component_master_del(&pdev->dev, &msm_drm_ops);
of_platform_depopulate(&pdev->dev);
msm_mdss_destroy(mdss);
--
2.35.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-04-19 15:54 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-19 15:53 [PATCH v5 0/6] drm/msm: rework MDSS drivers Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 1/6] drm/msm: unify " Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 2/6] drm/msm: remove extra indirection for msm_mdss Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 3/6] drm/msm: split the main platform driver Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 4/6] drm/msm: stop using device's match data pointer Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 5/6] drm/msm: allow compile time selection of driver components Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
2022-04-19 15:53 ` [PATCH v5 6/6] drm/msm: make mdp5/dpu devices master components Dmitry Baryshkov
2022-04-19 15:53 ` Dmitry Baryshkov
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