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* [PATCH 0/2] Miscellenous ISA string fixup
@ 2022-04-20  1:32 ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

This series fixes few issues around ISA string generations for guests.
Earlier these patches were part of the sstc series[1] but I created
a separate series for these fixes as they can be applied separately
as a part of rc fixes.

[1] https://lore.kernel.org/lkml/20220304201020.810380-1-atishp@rivosinc.com/

Atish Patra (2):
RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
RISC-V: KVM: Restrict the extensions that can be disabled

arch/riscv/kvm/vcpu.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)

--
2.25.1


^ permalink raw reply	[flat|nested] 14+ messages in thread
* [PATCH 0/2] Miscellenous ISA string fixup
@ 2022-04-20  1:32 ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

This series fixes few issues around ISA string generations for guests.
Earlier these patches were part of the sstc series[1] but I created
a separate series for these fixes as they can be applied separately
as a part of rc fixes.

[1] https://lore.kernel.org/lkml/20220304201020.810380-1-atishp@rivosinc.com/

Atish Patra (2):
RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
RISC-V: KVM: Restrict the extensions that can be disabled

arch/riscv/kvm/vcpu.c | 23 +++++++++++++----------
1 file changed, 13 insertions(+), 10 deletions(-)

--
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
  2022-04-20  1:32 ` Atish Patra
@ 2022-04-20  1:32   ` Atish Patra
  -1 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
enabled. But it should not appear in the ISA extension in the device tree.

Remove those from the allowed ISA extension for kvm.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kvm/vcpu.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 6785aef4cbd4..2e25a7b83a1b 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
 				 riscv_isa_extension_mask(d) | \
 				 riscv_isa_extension_mask(f) | \
 				 riscv_isa_extension_mask(i) | \
-				 riscv_isa_extension_mask(m) | \
-				 riscv_isa_extension_mask(s) | \
-				 riscv_isa_extension_mask(u))
+				 riscv_isa_extension_mask(m))
 
 static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 {
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
@ 2022-04-20  1:32   ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
enabled. But it should not appear in the ISA extension in the device tree.

Remove those from the allowed ISA extension for kvm.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kvm/vcpu.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 6785aef4cbd4..2e25a7b83a1b 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
 				 riscv_isa_extension_mask(d) | \
 				 riscv_isa_extension_mask(f) | \
 				 riscv_isa_extension_mask(i) | \
-				 riscv_isa_extension_mask(m) | \
-				 riscv_isa_extension_mask(s) | \
-				 riscv_isa_extension_mask(u))
+				 riscv_isa_extension_mask(m))
 
 static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 {
-- 
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
  2022-04-20  1:32 ` Atish Patra
@ 2022-04-20  1:32   ` Atish Patra
  -1 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

Currently, the config reg register allows to disable all allowed
single letter ISA extensions. It shouldn't be the case as vmm
shouldn't be able disable base extensions (imac).
These extensions should always be enabled as long as they are enabled
in the host ISA.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 2e25a7b83a1b..14dd801651e5 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
 		       sizeof(kvm_vcpu_stats_desc),
 };
 
-#define KVM_RISCV_ISA_ALLOWED	(riscv_isa_extension_mask(a) | \
-				 riscv_isa_extension_mask(c) | \
-				 riscv_isa_extension_mask(d) | \
-				 riscv_isa_extension_mask(f) | \
-				 riscv_isa_extension_mask(i) | \
-				 riscv_isa_extension_mask(m))
+#define KVM_RISCV_ISA_DISABLE_ALLOWED	(riscv_isa_extension_mask(d) | \
+					riscv_isa_extension_mask(f))
+
+#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED	(riscv_isa_extension_mask(a) | \
+						riscv_isa_extension_mask(c) | \
+						riscv_isa_extension_mask(i) | \
+						riscv_isa_extension_mask(m))
+
+#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
+			       KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
 
 static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 {
@@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
 	switch (reg_num) {
 	case KVM_REG_RISCV_CONFIG_REG(isa):
 		if (!vcpu->arch.ran_atleast_once) {
-			vcpu->arch.isa = reg_val;
+			/* Ignore the disable request for these extensions */
+			vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
 			vcpu->arch.isa &= riscv_isa_extension_base(NULL);
-			vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
+			vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
 			kvm_riscv_vcpu_fp_reset(vcpu);
 		} else {
 			return -EOPNOTSUPP;
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 14+ messages in thread
* [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
@ 2022-04-20  1:32   ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  1:32 UTC (permalink / raw)
  To: kvm
  Cc: Atish Patra, Atish Patra, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski, linux-kernel, linux-riscv,
	Palmer Dabbelt, Paul Walmsley, Rob Herring, kvm-riscv

Currently, the config reg register allows to disable all allowed
single letter ISA extensions. It shouldn't be the case as vmm
shouldn't be able disable base extensions (imac).
These extensions should always be enabled as long as they are enabled
in the host ISA.

Signed-off-by: Atish Patra <atishp@rivosinc.com>
---
 arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
 1 file changed, 13 insertions(+), 8 deletions(-)

diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
index 2e25a7b83a1b..14dd801651e5 100644
--- a/arch/riscv/kvm/vcpu.c
+++ b/arch/riscv/kvm/vcpu.c
@@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
 		       sizeof(kvm_vcpu_stats_desc),
 };
 
-#define KVM_RISCV_ISA_ALLOWED	(riscv_isa_extension_mask(a) | \
-				 riscv_isa_extension_mask(c) | \
-				 riscv_isa_extension_mask(d) | \
-				 riscv_isa_extension_mask(f) | \
-				 riscv_isa_extension_mask(i) | \
-				 riscv_isa_extension_mask(m))
+#define KVM_RISCV_ISA_DISABLE_ALLOWED	(riscv_isa_extension_mask(d) | \
+					riscv_isa_extension_mask(f))
+
+#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED	(riscv_isa_extension_mask(a) | \
+						riscv_isa_extension_mask(c) | \
+						riscv_isa_extension_mask(i) | \
+						riscv_isa_extension_mask(m))
+
+#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
+			       KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
 
 static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
 {
@@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
 	switch (reg_num) {
 	case KVM_REG_RISCV_CONFIG_REG(isa):
 		if (!vcpu->arch.ran_atleast_once) {
-			vcpu->arch.isa = reg_val;
+			/* Ignore the disable request for these extensions */
+			vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
 			vcpu->arch.isa &= riscv_isa_extension_base(NULL);
-			vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
+			vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
 			kvm_riscv_vcpu_fp_reset(vcpu);
 		} else {
 			return -EOPNOTSUPP;
-- 
2.25.1


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply related	[flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
  2022-04-20  1:32   ` Atish Patra
@ 2022-04-20  7:42     ` Atish Patra
  -1 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  7:42 UTC (permalink / raw)
  To: Atish Patra
  Cc: KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> Currently, the config reg register allows to disable all allowed
> single letter ISA extensions. It shouldn't be the case as vmm
> shouldn't be able disable base extensions (imac).

/s/able/able to/

> These extensions should always be enabled as long as they are enabled
> in the host ISA.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
>  arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
>  1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 2e25a7b83a1b..14dd801651e5 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
>                        sizeof(kvm_vcpu_stats_desc),
>  };
>
> -#define KVM_RISCV_ISA_ALLOWED  (riscv_isa_extension_mask(a) | \
> -                                riscv_isa_extension_mask(c) | \
> -                                riscv_isa_extension_mask(d) | \
> -                                riscv_isa_extension_mask(f) | \
> -                                riscv_isa_extension_mask(i) | \
> -                                riscv_isa_extension_mask(m))
> +#define KVM_RISCV_ISA_DISABLE_ALLOWED  (riscv_isa_extension_mask(d) | \
> +                                       riscv_isa_extension_mask(f))
> +
> +#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED      (riscv_isa_extension_mask(a) | \
> +                                               riscv_isa_extension_mask(c) | \
> +                                               riscv_isa_extension_mask(i) | \
> +                                               riscv_isa_extension_mask(m))
> +
> +#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
> +                              KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
>
>  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
>  {
> @@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
>         switch (reg_num) {
>         case KVM_REG_RISCV_CONFIG_REG(isa):
>                 if (!vcpu->arch.ran_atleast_once) {
> -                       vcpu->arch.isa = reg_val;
> +                       /* Ignore the disable request for these extensions */
> +                       vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
>                         vcpu->arch.isa &= riscv_isa_extension_base(NULL);
> -                       vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
> +                       vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
>                         kvm_riscv_vcpu_fp_reset(vcpu);
>                 } else {
>                         return -EOPNOTSUPP;
> --
> 2.25.1
>

Sorry. I forgot to add the fixes tag.

Fixes: 92ad82002c39 (RISC-V: KVM: Implement
KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls)

-- 
Regards,
Atish

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
@ 2022-04-20  7:42     ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  7:42 UTC (permalink / raw)
  To: Atish Patra
  Cc: KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> Currently, the config reg register allows to disable all allowed
> single letter ISA extensions. It shouldn't be the case as vmm
> shouldn't be able disable base extensions (imac).

/s/able/able to/

> These extensions should always be enabled as long as they are enabled
> in the host ISA.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
>  arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
>  1 file changed, 13 insertions(+), 8 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 2e25a7b83a1b..14dd801651e5 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
>                        sizeof(kvm_vcpu_stats_desc),
>  };
>
> -#define KVM_RISCV_ISA_ALLOWED  (riscv_isa_extension_mask(a) | \
> -                                riscv_isa_extension_mask(c) | \
> -                                riscv_isa_extension_mask(d) | \
> -                                riscv_isa_extension_mask(f) | \
> -                                riscv_isa_extension_mask(i) | \
> -                                riscv_isa_extension_mask(m))
> +#define KVM_RISCV_ISA_DISABLE_ALLOWED  (riscv_isa_extension_mask(d) | \
> +                                       riscv_isa_extension_mask(f))
> +
> +#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED      (riscv_isa_extension_mask(a) | \
> +                                               riscv_isa_extension_mask(c) | \
> +                                               riscv_isa_extension_mask(i) | \
> +                                               riscv_isa_extension_mask(m))
> +
> +#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
> +                              KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
>
>  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
>  {
> @@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
>         switch (reg_num) {
>         case KVM_REG_RISCV_CONFIG_REG(isa):
>                 if (!vcpu->arch.ran_atleast_once) {
> -                       vcpu->arch.isa = reg_val;
> +                       /* Ignore the disable request for these extensions */
> +                       vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
>                         vcpu->arch.isa &= riscv_isa_extension_base(NULL);
> -                       vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
> +                       vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
>                         kvm_riscv_vcpu_fp_reset(vcpu);
>                 } else {
>                         return -EOPNOTSUPP;
> --
> 2.25.1
>

Sorry. I forgot to add the fixes tag.

Fixes: 92ad82002c39 (RISC-V: KVM: Implement
KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls)

-- 
Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
  2022-04-20  1:32   ` Atish Patra
@ 2022-04-20  7:43     ` Atish Patra
  -1 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  7:43 UTC (permalink / raw)
  To: Atish Patra
  Cc: KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
> The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
> enabled. But it should not appear in the ISA extension in the device tree.
>
> Remove those from the allowed ISA extension for kvm.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
>  arch/riscv/kvm/vcpu.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 6785aef4cbd4..2e25a7b83a1b 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
>                                  riscv_isa_extension_mask(d) | \
>                                  riscv_isa_extension_mask(f) | \
>                                  riscv_isa_extension_mask(i) | \
> -                                riscv_isa_extension_mask(m) | \
> -                                riscv_isa_extension_mask(s) | \
> -                                riscv_isa_extension_mask(u))
> +                                riscv_isa_extension_mask(m))
>
>  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
>  {
> --
> 2.25.1
>

Sorry. Forgot to add the fixes tag.

Fixes: a33c72faf2d7 (RISC-V: KVM: Implement VCPU create, init and
destroy functions)

-- 
Regards,
Atish

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
@ 2022-04-20  7:43     ` Atish Patra
  0 siblings, 0 replies; 14+ messages in thread
From: Atish Patra @ 2022-04-20  7:43 UTC (permalink / raw)
  To: Atish Patra
  Cc: KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
>
> There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
> The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
> enabled. But it should not appear in the ISA extension in the device tree.
>
> Remove those from the allowed ISA extension for kvm.
>
> Signed-off-by: Atish Patra <atishp@rivosinc.com>
> ---
>  arch/riscv/kvm/vcpu.c | 4 +---
>  1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> index 6785aef4cbd4..2e25a7b83a1b 100644
> --- a/arch/riscv/kvm/vcpu.c
> +++ b/arch/riscv/kvm/vcpu.c
> @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
>                                  riscv_isa_extension_mask(d) | \
>                                  riscv_isa_extension_mask(f) | \
>                                  riscv_isa_extension_mask(i) | \
> -                                riscv_isa_extension_mask(m) | \
> -                                riscv_isa_extension_mask(s) | \
> -                                riscv_isa_extension_mask(u))
> +                                riscv_isa_extension_mask(m))
>
>  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
>  {
> --
> 2.25.1
>

Sorry. Forgot to add the fixes tag.

Fixes: a33c72faf2d7 (RISC-V: KVM: Implement VCPU create, init and
destroy functions)

-- 
Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
  2022-04-20  7:43     ` Atish Patra
@ 2022-04-20  8:46       ` Anup Patel
  -1 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2022-04-20  8:46 UTC (permalink / raw)
  To: Atish Patra
  Cc: Atish Patra, KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Wed, Apr 20, 2022 at 1:14 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
> >
> > There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
> > The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
> > enabled. But it should not appear in the ISA extension in the device tree.
> >
> > Remove those from the allowed ISA extension for kvm.
> >
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > ---
> >  arch/riscv/kvm/vcpu.c | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index 6785aef4cbd4..2e25a7b83a1b 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
> >                                  riscv_isa_extension_mask(d) | \
> >                                  riscv_isa_extension_mask(f) | \
> >                                  riscv_isa_extension_mask(i) | \
> > -                                riscv_isa_extension_mask(m) | \
> > -                                riscv_isa_extension_mask(s) | \
> > -                                riscv_isa_extension_mask(u))
> > +                                riscv_isa_extension_mask(m))
> >
> >  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
> >  {
> > --
> > 2.25.1
> >
>
> Sorry. Forgot to add the fixes tag.
>
> Fixes: a33c72faf2d7 (RISC-V: KVM: Implement VCPU create, init and
> destroy functions)

I have queued this for fixes.

Thanks,
Anup

>
> --
> Regards,
> Atish
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension
@ 2022-04-20  8:46       ` Anup Patel
  0 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2022-04-20  8:46 UTC (permalink / raw)
  To: Atish Patra
  Cc: Atish Patra, KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Wed, Apr 20, 2022 at 1:14 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
> >
> > There are no ISA extension defined as 's' & 'u' in RISC-V specifications.
> > The misa register defines 's' & 'u' bit as Supervisor/User privilege mode
> > enabled. But it should not appear in the ISA extension in the device tree.
> >
> > Remove those from the allowed ISA extension for kvm.
> >
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > ---
> >  arch/riscv/kvm/vcpu.c | 4 +---
> >  1 file changed, 1 insertion(+), 3 deletions(-)
> >
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index 6785aef4cbd4..2e25a7b83a1b 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -43,9 +43,7 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
> >                                  riscv_isa_extension_mask(d) | \
> >                                  riscv_isa_extension_mask(f) | \
> >                                  riscv_isa_extension_mask(i) | \
> > -                                riscv_isa_extension_mask(m) | \
> > -                                riscv_isa_extension_mask(s) | \
> > -                                riscv_isa_extension_mask(u))
> > +                                riscv_isa_extension_mask(m))
> >
> >  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
> >  {
> > --
> > 2.25.1
> >
>
> Sorry. Forgot to add the fixes tag.
>
> Fixes: a33c72faf2d7 (RISC-V: KVM: Implement VCPU create, init and
> destroy functions)

I have queued this for fixes.

Thanks,
Anup

>
> --
> Regards,
> Atish
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
  2022-04-20  7:42     ` Atish Patra
@ 2022-04-20  8:47       ` Anup Patel
  -1 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2022-04-20  8:47 UTC (permalink / raw)
  To: Atish Patra
  Cc: Atish Patra, KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Wed, Apr 20, 2022 at 1:13 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
> >
> > Currently, the config reg register allows to disable all allowed
> > single letter ISA extensions. It shouldn't be the case as vmm
> > shouldn't be able disable base extensions (imac).
>
> /s/able/able to/
>
> > These extensions should always be enabled as long as they are enabled
> > in the host ISA.
> >
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > ---
> >  arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
> >  1 file changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index 2e25a7b83a1b..14dd801651e5 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
> >                        sizeof(kvm_vcpu_stats_desc),
> >  };
> >
> > -#define KVM_RISCV_ISA_ALLOWED  (riscv_isa_extension_mask(a) | \
> > -                                riscv_isa_extension_mask(c) | \
> > -                                riscv_isa_extension_mask(d) | \
> > -                                riscv_isa_extension_mask(f) | \
> > -                                riscv_isa_extension_mask(i) | \
> > -                                riscv_isa_extension_mask(m))
> > +#define KVM_RISCV_ISA_DISABLE_ALLOWED  (riscv_isa_extension_mask(d) | \
> > +                                       riscv_isa_extension_mask(f))
> > +
> > +#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED      (riscv_isa_extension_mask(a) | \
> > +                                               riscv_isa_extension_mask(c) | \
> > +                                               riscv_isa_extension_mask(i) | \
> > +                                               riscv_isa_extension_mask(m))
> > +
> > +#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
> > +                              KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
> >
> >  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
> >  {
> > @@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
> >         switch (reg_num) {
> >         case KVM_REG_RISCV_CONFIG_REG(isa):
> >                 if (!vcpu->arch.ran_atleast_once) {
> > -                       vcpu->arch.isa = reg_val;
> > +                       /* Ignore the disable request for these extensions */
> > +                       vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
> >                         vcpu->arch.isa &= riscv_isa_extension_base(NULL);
> > -                       vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
> > +                       vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
> >                         kvm_riscv_vcpu_fp_reset(vcpu);
> >                 } else {
> >                         return -EOPNOTSUPP;
> > --
> > 2.25.1
> >
>
> Sorry. I forgot to add the fixes tag.
>
> Fixes: 92ad82002c39 (RISC-V: KVM: Implement
> KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls)

I have queued this for fixes.

Thanks,
Anup

>
> --
> Regards,
> Atish
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
* Re: [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled
@ 2022-04-20  8:47       ` Anup Patel
  0 siblings, 0 replies; 14+ messages in thread
From: Anup Patel @ 2022-04-20  8:47 UTC (permalink / raw)
  To: Atish Patra
  Cc: Atish Patra, KVM General, Anup Patel, Damien Le Moal, devicetree,
	Jisheng Zhang, Krzysztof Kozlowski,
	linux-kernel@vger.kernel.org List, linux-riscv, Palmer Dabbelt,
	Paul Walmsley, Rob Herring, kvm-riscv

On Wed, Apr 20, 2022 at 1:13 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Tue, Apr 19, 2022 at 6:33 PM Atish Patra <atishp@rivosinc.com> wrote:
> >
> > Currently, the config reg register allows to disable all allowed
> > single letter ISA extensions. It shouldn't be the case as vmm
> > shouldn't be able disable base extensions (imac).
>
> /s/able/able to/
>
> > These extensions should always be enabled as long as they are enabled
> > in the host ISA.
> >
> > Signed-off-by: Atish Patra <atishp@rivosinc.com>
> > ---
> >  arch/riscv/kvm/vcpu.c | 21 +++++++++++++--------
> >  1 file changed, 13 insertions(+), 8 deletions(-)
> >
> > diff --git a/arch/riscv/kvm/vcpu.c b/arch/riscv/kvm/vcpu.c
> > index 2e25a7b83a1b..14dd801651e5 100644
> > --- a/arch/riscv/kvm/vcpu.c
> > +++ b/arch/riscv/kvm/vcpu.c
> > @@ -38,12 +38,16 @@ const struct kvm_stats_header kvm_vcpu_stats_header = {
> >                        sizeof(kvm_vcpu_stats_desc),
> >  };
> >
> > -#define KVM_RISCV_ISA_ALLOWED  (riscv_isa_extension_mask(a) | \
> > -                                riscv_isa_extension_mask(c) | \
> > -                                riscv_isa_extension_mask(d) | \
> > -                                riscv_isa_extension_mask(f) | \
> > -                                riscv_isa_extension_mask(i) | \
> > -                                riscv_isa_extension_mask(m))
> > +#define KVM_RISCV_ISA_DISABLE_ALLOWED  (riscv_isa_extension_mask(d) | \
> > +                                       riscv_isa_extension_mask(f))
> > +
> > +#define KVM_RISCV_ISA_DISABLE_NOT_ALLOWED      (riscv_isa_extension_mask(a) | \
> > +                                               riscv_isa_extension_mask(c) | \
> > +                                               riscv_isa_extension_mask(i) | \
> > +                                               riscv_isa_extension_mask(m))
> > +
> > +#define KVM_RISCV_ISA_ALLOWED (KVM_RISCV_ISA_DISABLE_ALLOWED | \
> > +                              KVM_RISCV_ISA_DISABLE_NOT_ALLOWED)
> >
> >  static void kvm_riscv_reset_vcpu(struct kvm_vcpu *vcpu)
> >  {
> > @@ -217,9 +221,10 @@ static int kvm_riscv_vcpu_set_reg_config(struct kvm_vcpu *vcpu,
> >         switch (reg_num) {
> >         case KVM_REG_RISCV_CONFIG_REG(isa):
> >                 if (!vcpu->arch.ran_atleast_once) {
> > -                       vcpu->arch.isa = reg_val;
> > +                       /* Ignore the disable request for these extensions */
> > +                       vcpu->arch.isa = reg_val | KVM_RISCV_ISA_DISABLE_NOT_ALLOWED;
> >                         vcpu->arch.isa &= riscv_isa_extension_base(NULL);
> > -                       vcpu->arch.isa &= KVM_RISCV_ISA_ALLOWED;
> > +                       vcpu->arch.isa &= KVM_RISCV_ISA_DISABLE_ALLOWED;
> >                         kvm_riscv_vcpu_fp_reset(vcpu);
> >                 } else {
> >                         return -EOPNOTSUPP;
> > --
> > 2.25.1
> >
>
> Sorry. I forgot to add the fixes tag.
>
> Fixes: 92ad82002c39 (RISC-V: KVM: Implement
> KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls)

I have queued this for fixes.

Thanks,
Anup

>
> --
> Regards,
> Atish
>
> --
> kvm-riscv mailing list
> kvm-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/kvm-riscv

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

^ permalink raw reply	[flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-04-20  8:47 UTC | newest]

Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-20  1:32 [PATCH 0/2] Miscellenous ISA string fixup Atish Patra
2022-04-20  1:32 ` Atish Patra
2022-04-20  1:32 ` [PATCH 1/2] RISC-V: KVM: Remove 's' & 'u' as valid ISA extension Atish Patra
2022-04-20  1:32   ` Atish Patra
2022-04-20  7:43   ` Atish Patra
2022-04-20  7:43     ` Atish Patra
2022-04-20  8:46     ` Anup Patel
2022-04-20  8:46       ` Anup Patel
2022-04-20  1:32 ` [PATCH 2/2] RISC-V: KVM: Restrict the extensions that can be disabled Atish Patra
2022-04-20  1:32   ` Atish Patra
2022-04-20  7:42   ` Atish Patra
2022-04-20  7:42     ` Atish Patra
2022-04-20  8:47     ` Anup Patel
2022-04-20  8:47       ` Anup Patel

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