[PATCH 0/4] ASoC: SOF: pci: add quirks and PCI IDS

[PATCH 0/4] ASoC: SOF: pci: add quirks and PCI IDS

[Pierre-Louis Bossart]

Add two PCI IDs and quirks for APL Chromebooks and Intel IPC4
selection for developers.

Gongjun Song (1):
  ASoC: SOF: Intel: pci-tgl: add RPL-P support

Muralidhar Reddy (1):
  ASoC: SOF: Intel: pci-tgl: add ADL-PS support

Pierre-Louis Bossart (1):
  ASoC: SOF: sof-pci-dev: don't use the community key on APL Chromebooks

Rander Wang (1):
  ASOC: SOF: pci: add ipc_type override for Intel IPC4 tests

 sound/soc/sof/core.c          |  7 ++++++
 sound/soc/sof/intel/pci-tgl.c |  6 +++++
 sound/soc/sof/sof-pci-dev.c   | 45 ++++++++++++++++++++++++++++++++++-
 3 files changed, 57 insertions(+), 1 deletion(-)

-- 
2.30.2

[PATCH 1/4] ASoC: SOF: sof-pci-dev: don't use the community key on APL Chromebooks

[Pierre-Louis Bossart]

As suggested by MrChromebox, the SOF driver can be used with the SOF
firmware binary signed with the production key. This patch adds an
additional check for the ApolloLake SoC before modifying the default
firmware path.

Note that ApolloLake Chromebooks officially ship with the Skylake
driver, so to use SOF the users have to explicitly opt-in with
'options intel-dspcfg dsp_driver=3'. There is no plan to change the
default selection.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
---
 sound/soc/sof/sof-pci-dev.c | 24 +++++++++++++++++++++++-
 1 file changed, 23 insertions(+), 1 deletion(-)

diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c
index 4d1b7e4ccd3d8..003120721779f 100644
--- a/sound/soc/sof/sof-pci-dev.c
+++ b/sound/soc/sof/sof-pci-dev.c
@@ -12,6 +12,7 @@
 #include <linux/dmi.h>
 #include <linux/module.h>
 #include <linux/pci.h>
+#include <linux/platform_data/x86/soc.h>
 #include <linux/pm_runtime.h>
 #include <sound/soc-acpi.h>
 #include <sound/soc-acpi-intel-match.h>
@@ -40,6 +41,7 @@ module_param_named(sof_pci_debug, sof_pci_debug, int, 0444);
 MODULE_PARM_DESC(sof_pci_debug, "SOF PCI debug options (0x0 all off)");
 
 static const char *sof_dmi_override_tplg_name;
+static bool sof_dmi_use_community_key;
 
 #define SOF_PCI_DISABLE_PM_RUNTIME BIT(0)
 
@@ -102,15 +104,35 @@ static const struct dmi_system_id sof_tplg_table[] = {
 	{}
 };
 
+/* all Up boards use the community key */
+static int up_use_community_key(const struct dmi_system_id *id)
+{
+	sof_dmi_use_community_key = true;
+	return 1;
+}
+
+/*
+ * For ApolloLake Chromebooks we want to force the use of the Intel production key.
+ * All newer platforms use the community key
+ */
+static int chromebook_use_community_key(const struct dmi_system_id *id)
+{
+	if (!soc_intel_is_apl())
+		sof_dmi_use_community_key = true;
+	return 1;
+}
+
 static const struct dmi_system_id community_key_platforms[] = {
 	{
 		.ident = "Up boards",
+		.callback = up_use_community_key,
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "AAEON"),
 		}
 	},
 	{
 		.ident = "Google Chromebooks",
+		.callback = chromebook_use_community_key,
 		.matches = {
 			DMI_MATCH(DMI_SYS_VENDOR, "Google"),
 		}
@@ -208,7 +230,7 @@ int sof_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
 			"Module parameter used, changed fw path to %s\n",
 			sof_pdata->fw_filename_prefix);
 
-	} else if (dmi_check_system(community_key_platforms)) {
+	} else if (dmi_check_system(community_key_platforms) && sof_dmi_use_community_key) {
 		sof_pdata->fw_filename_prefix =
 			devm_kasprintf(dev, GFP_KERNEL, "%s/%s",
 				       sof_pdata->desc->default_fw_path[sof_pdata->ipc_type],
-- 
2.30.2

[PATCH 2/4] ASOC: SOF: pci: add ipc_type override for Intel IPC4 tests

[Pierre-Louis Bossart]

From: Rander Wang <rander.wang@intel.com>

Add a kernel module parameter for select the non-default IPC type.

This should only be used by developers with access to firmware and
topology files, typically Intel and partners.

Signed-off-by: Rander Wang <rander.wang@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Reviewed-by: Péter Ujfalusi <peter.ujfalusi@linux.intel.com>
Reviewed-by: Bard Liao <yung-chuan.liao@linux.intel.com>
---
 sound/soc/sof/core.c        |  7 +++++++
 sound/soc/sof/sof-pci-dev.c | 21 +++++++++++++++++++++
 2 files changed, 28 insertions(+)

diff --git a/sound/soc/sof/core.c b/sound/soc/sof/core.c
index d981a1c3fb057..04b0cf3c822f9 100644
--- a/sound/soc/sof/core.c
+++ b/sound/soc/sof/core.c
@@ -358,6 +358,13 @@ int snd_sof_device_probe(struct device *dev, struct snd_sof_pdata *plat_data)
 	sdev->first_boot = true;
 	dev_set_drvdata(dev, sdev);
 
+	/* check IPC support */
+	if (!(BIT(plat_data->ipc_type) & plat_data->desc->ipc_supported_mask)) {
+		dev_err(dev, "ipc_type %d is not supported on this platform, mask is %#x\n",
+			plat_data->ipc_type, plat_data->desc->ipc_supported_mask);
+		return -EINVAL;
+	}
+
 	/* init ops, if necessary */
 	ret = sof_ops_init(sdev);
 	if (ret < 0)
diff --git a/sound/soc/sof/sof-pci-dev.c b/sound/soc/sof/sof-pci-dev.c
index 003120721779f..cd90da7c92c24 100644
--- a/sound/soc/sof/sof-pci-dev.c
+++ b/sound/soc/sof/sof-pci-dev.c
@@ -40,6 +40,10 @@ static int sof_pci_debug;
 module_param_named(sof_pci_debug, sof_pci_debug, int, 0444);
 MODULE_PARM_DESC(sof_pci_debug, "SOF PCI debug options (0x0 all off)");
 
+static int sof_pci_ipc_type = -1;
+module_param_named(ipc_type, sof_pci_ipc_type, int, 0444);
+MODULE_PARM_DESC(ipc_type, "SOF IPC type (0): SOF, (1) Intel CAVS");
+
 static const char *sof_dmi_override_tplg_name;
 static bool sof_dmi_use_community_key;
 
@@ -206,6 +210,23 @@ int sof_pci_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
 
 	sof_pdata->ipc_type = desc->ipc_default;
 
+	if (sof_pci_ipc_type < 0) {
+		sof_pdata->ipc_type = desc->ipc_default;
+	} else {
+		dev_info(dev, "overriding default IPC %d to requested %d\n",
+			 desc->ipc_default, sof_pci_ipc_type);
+		if (sof_pci_ipc_type >= SOF_IPC_TYPE_COUNT) {
+			dev_err(dev, "invalid request value %d\n", sof_pci_ipc_type);
+			return -EINVAL;
+		}
+		if (!(BIT(sof_pci_ipc_type) & desc->ipc_supported_mask)) {
+			dev_err(dev, "invalid request value %d, supported mask is %#x\n",
+				sof_pci_ipc_type, desc->ipc_supported_mask);
+			return -EINVAL;
+		}
+		sof_pdata->ipc_type = sof_pci_ipc_type;
+	}
+
 	if (fw_filename) {
 		sof_pdata->fw_filename = fw_filename;
 
-- 
2.30.2

[PATCH 3/4] ASoC: SOF: Intel: pci-tgl: add ADL-PS support

[Pierre-Louis Bossart]

From: Muralidhar Reddy <muralidhar.reddy@intel.com>

Add PCI DID for Intel Alder Lake PS.

Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Signed-off-by: Muralidhar Reddy <muralidhar.reddy@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
 sound/soc/sof/intel/pci-tgl.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/sound/soc/sof/intel/pci-tgl.c b/sound/soc/sof/intel/pci-tgl.c
index 478f9d051c4c5..f6a76dcf28fd6 100644
--- a/sound/soc/sof/intel/pci-tgl.c
+++ b/sound/soc/sof/intel/pci-tgl.c
@@ -176,6 +176,8 @@ static const struct pci_device_id sof_pci_ids[] = {
 		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x51cd), /* ADL-P */
 		.driver_data = (unsigned long)&adl_desc},
+	{ PCI_DEVICE(0x8086, 0x51c9), /* ADL-PS */
+		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x51cc), /* ADL-M */
 		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */
-- 
2.30.2

[PATCH 4/4] ASoC: SOF: Intel: pci-tgl: add RPL-P support

[Pierre-Louis Bossart]

From: Gongjun Song <gongjun.song@intel.com>

Add PCI DID for Intel Raptor Lake P.

Reviewed-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Signed-off-by: Gongjun Song <gongjun.song@intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
---
 sound/soc/sof/intel/pci-tgl.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/sound/soc/sof/intel/pci-tgl.c b/sound/soc/sof/intel/pci-tgl.c
index f6a76dcf28fd6..58a9bd92a2376 100644
--- a/sound/soc/sof/intel/pci-tgl.c
+++ b/sound/soc/sof/intel/pci-tgl.c
@@ -178,6 +178,10 @@ static const struct pci_device_id sof_pci_ids[] = {
 		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x51c9), /* ADL-PS */
 		.driver_data = (unsigned long)&adl_desc},
+	{ PCI_DEVICE(0x8086, 0x51ca), /* RPL-P */
+		.driver_data = (unsigned long)&adl_desc},
+	{ PCI_DEVICE(0x8086, 0x51cb), /* RPL-P */
+		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x51cc), /* ADL-M */
 		.driver_data = (unsigned long)&adl_desc},
 	{ PCI_DEVICE(0x8086, 0x54c8), /* ADL-N */
-- 
2.30.2

Re: [PATCH 0/4] ASoC: SOF: pci: add quirks and PCI IDS

[Mark Brown]

On Thu, 21 Apr 2022 11:33:54 -0500, Pierre-Louis Bossart wrote:
> Add two PCI IDs and quirks for APL Chromebooks and Intel IPC4
> selection for developers.
> 
> Gongjun Song (1):
>   ASoC: SOF: Intel: pci-tgl: add RPL-P support
> 
> Muralidhar Reddy (1):
>   ASoC: SOF: Intel: pci-tgl: add ADL-PS support
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next

Thanks!

[1/4] ASoC: SOF: sof-pci-dev: don't use the community key on APL Chromebooks
      commit: d81e4ba5ef1c1033b6c720b22fc99feeb71e71a0
[2/4] ASOC: SOF: pci: add ipc_type override for Intel IPC4 tests
      commit: 4bfbbb76e82e5f1e0e114e0831356656b4169c80
[3/4] ASoC: SOF: Intel: pci-tgl: add ADL-PS support
      commit: 6c84dae212747d0c82057c48785f2b1b6c53f553
[4/4] ASoC: SOF: Intel: pci-tgl: add RPL-P support
      commit: c275872107fe1b7f9d39ce642e2d8eccfe8afbb0

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark