* [PATCH v4 0/2] DSS: Add support for DisplayPort
@ 2022-04-26 15:35 Rahul T R
2022-04-26 15:35 ` [PATCH v4 1/2] arm64: dts: ti: k3-j721e-*: add DP & DP PHY Rahul T R
2022-04-26 15:35 ` [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm Rahul T R
0 siblings, 2 replies; 6+ messages in thread
From: Rahul T R @ 2022-04-26 15:35 UTC (permalink / raw)
To: nm
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski, linux-arm-kernel,
devicetree, linux-kernel, tomi.valkeinen, laurent.pinchart,
kishon, r-ravikumar
The following series of patches enables DisplayPort on
j721e-evm
v2:
- use phandle with a parameter to refer clocks insted of
sub nodes in serdes_wiz node
- move phy link node to board DTS file
v3:
- Fix the regulator node name as per the DT spec
- Use Macro for GPIO type
v4:
- Move adding of phy link nodes from 2/2 to 1/2, to fix dtbs checks warnings
- Add leading zeros to align reg property addresses and sizes
- Add empty ports for mhdp node in dtsi file to fix dtbs checks warnings
boot logs:
https://gist.githubusercontent.com/ravi-rahul/1bdbc3f77ab381e486c8394650c2e85d/raw/2327c9894c3236950a00f4511ae668ac4399b71e/j7_DP_upstream.log
kernel patch verify report:
https://gist.githubusercontent.com/ravi-rahul/a982fef3fae03ec0dbdd5cb475a4cb25/raw/9ef482f96fa351cff7980e4340e9bcb8471ec3ab/report-kernel-patch-verify.txt
Tomi Valkeinen (2):
arm64: dts: ti: k3-j721e-*: add DP & DP PHY
arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
.../dts/ti/k3-j721e-common-proc-board.dts | 77 ++++++++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 75 +++++++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 16 ++++
3 files changed, 162 insertions(+), 6 deletions(-)
--
2.17.1
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH v4 1/2] arm64: dts: ti: k3-j721e-*: add DP & DP PHY
2022-04-26 15:35 [PATCH v4 0/2] DSS: Add support for DisplayPort Rahul T R
@ 2022-04-26 15:35 ` Rahul T R
2022-04-26 15:35 ` [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm Rahul T R
1 sibling, 0 replies; 6+ messages in thread
From: Rahul T R @ 2022-04-26 15:35 UTC (permalink / raw)
To: nm
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski, linux-arm-kernel,
devicetree, linux-kernel, tomi.valkeinen, laurent.pinchart,
kishon, r-ravikumar
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Add DT nodes for DisplayPort and DisplayPort PHY. The DP is Cadence MHDP
8546 and the PHY is a Cadence Torrent PHY with TI WIZ wrapper.
Also add the required phy link nodes in the board dts files.
A slight irregularity in the bindings is the DPTX PHY register block,
which is in the MHDP IP, but is needed and mapped by the PHY.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
---
.../dts/ti/k3-j721e-common-proc-board.dts | 16 ++++
arch/arm64/boot/dts/ti/k3-j721e-main.dtsi | 75 ++++++++++++++++++-
arch/arm64/boot/dts/ti/k3-j721e-sk.dts | 16 ++++
3 files changed, 105 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index f5ca8e26ed99..2f119e94e783 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -793,6 +793,22 @@
};
};
+&serdes4 {
+ torrent_phy_dp: phy@0 {
+ reg = <0>;
+ resets = <&serdes_wiz4 1>;
+ cdns,phy-type = <PHY_TYPE_DP>;
+ cdns,num-lanes = <4>;
+ cdns,max-bit-rate = <5400>;
+ #phy-cells = <0>;
+ };
+};
+
+&mhdp {
+ phys = <&torrent_phy_dp>;
+ phy-names = "dpphy";
+};
+
&pcie0_rc {
reset-gpios = <&exp1 6 GPIO_ACTIVE_HIGH>;
phys = <&serdes0_pcie_link>;
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
index db0669985e42..43b6cf5791ee 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j721e-main.dtsi
@@ -5,6 +5,7 @@
* Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/
*/
#include <dt-bindings/phy/phy.h>
+#include <dt-bindings/phy/phy-ti.h>
#include <dt-bindings/mux/mux.h>
#include <dt-bindings/mux/ti-serdes.h>
@@ -789,6 +790,47 @@
#size-cells = <2>;
};
+ serdes_wiz4: wiz@5050000 {
+ compatible = "ti,am64-wiz-10g";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ power-domains = <&k3_pds 297 TI_SCI_PD_EXCLUSIVE>;
+ clocks = <&k3_clks 297 1>, <&k3_clks 297 9>, <&cmn_refclk>;
+ clock-names = "fck", "core_ref_clk", "ext_ref_clk";
+ assigned-clocks = <&k3_clks 297 9>;
+ assigned-clock-parents = <&k3_clks 297 10>;
+ assigned-clock-rates = <19200000>;
+ num-lanes = <4>;
+ #reset-cells = <1>;
+ #clock-cells = <1>;
+ ranges = <0x05050000 0x00 0x05050000 0x010000>,
+ <0x0a030a00 0x00 0x0a030a00 0x40>;
+
+ serdes4: serdes@5050000 {
+ /*
+ * Note: we also map DPTX PHY registers as the Torrent
+ * needs to manage those.
+ */
+ compatible = "ti,j721e-serdes-10g";
+ reg = <0x05050000 0x010000>,
+ <0x0a030a00 0x40>; /* DPTX PHY */
+ reg-names = "torrent_phy", "dptx_phy";
+
+ resets = <&serdes_wiz4 0>;
+ reset-names = "torrent_reset";
+ clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>;
+ clock-names = "refclk";
+ assigned-clocks = <&serdes_wiz4 TI_WIZ_PLL0_REFCLK>,
+ <&serdes_wiz4 TI_WIZ_PLL1_REFCLK>,
+ <&serdes_wiz4 TI_WIZ_REFCLK_DIG>;
+ assigned-clock-parents = <&k3_clks 297 9>,
+ <&k3_clks 297 9>,
+ <&k3_clks 297 9>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
main_uart0: serial@2800000 {
compatible = "ti,j721e-uart", "ti,am654-uart";
reg = <0x00 0x02800000 0x00 0x100>;
@@ -1267,6 +1309,37 @@
};
};
+ mhdp: dp-bridge@a000000 {
+ compatible = "ti,j721e-mhdp8546";
+ /*
+ * Note: we do not map DPTX PHY area, as that is handled by
+ * the PHY driver.
+ */
+ reg = <0x00 0x0a000000 0x00 0x030a00>, /* DSS_EDP0_V2A_CORE_VP_REGS_APB */
+ <0x00 0x04f40000 0x00 0x20>; /* DSS_EDP0_INTG_CFG_VP */
+ reg-names = "mhdptx", "j721e-intg";
+
+ clocks = <&k3_clks 151 36>;
+
+ interrupt-parent = <&gic500>;
+ interrupts = <GIC_SPI 614 IRQ_TYPE_LEVEL_HIGH>;
+
+ power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
+
+ dp0_ports: ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ };
+
+ port@4 {
+ reg = <4>;
+ };
+ };
+ };
+
dss: dss@4a00000 {
compatible = "ti,j721e-dss";
reg =
@@ -1317,8 +1390,6 @@
"common_s2";
dss_ports: ports {
- #address-cells = <1>;
- #size-cells = <0>;
};
};
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
index f25d85169e0d..98177a20b45f 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts
@@ -624,6 +624,22 @@
};
};
+&serdes4 {
+ torrent_phy_dp: phy@0 {
+ reg = <0>;
+ resets = <&serdes_wiz4 1>;
+ cdns,phy-type = <PHY_TYPE_DP>;
+ cdns,num-lanes = <4>;
+ cdns,max-bit-rate = <5400>;
+ #phy-cells = <0>;
+ };
+};
+
+&mhdp {
+ phys = <&torrent_phy_dp>;
+ phy-names = "dpphy";
+};
+
&usbss0 {
pinctrl-names = "default";
pinctrl-0 = <&main_usbss0_pins_default>;
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
2022-04-26 15:35 [PATCH v4 0/2] DSS: Add support for DisplayPort Rahul T R
2022-04-26 15:35 ` [PATCH v4 1/2] arm64: dts: ti: k3-j721e-*: add DP & DP PHY Rahul T R
@ 2022-04-26 15:35 ` Rahul T R
2022-04-26 18:13 ` Nishanth Menon
1 sibling, 1 reply; 6+ messages in thread
From: Rahul T R @ 2022-04-26 15:35 UTC (permalink / raw)
To: nm
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski, linux-arm-kernel,
devicetree, linux-kernel, tomi.valkeinen, laurent.pinchart,
kishon, r-ravikumar
From: Tomi Valkeinen <tomi.valkeinen@ti.com>
Add the endpoint nodes to describe connection from
DSS => MHDP => DisplayPort connector.
Also add the required pinmux nodes for hotplug.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Rahul T R <r-ravikumar@ti.com>
---
.../dts/ti/k3-j721e-common-proc-board.dts | 61 +++++++++++++++++--
1 file changed, 57 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
index 2f119e94e783..4b9e3f671781 100644
--- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
+++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
@@ -148,6 +148,28 @@
pinctrl-0 = <&main_mcan2_gpio_pins_default>;
standby-gpios = <&main_gpio0 127 GPIO_ACTIVE_HIGH>;
};
+
+ dp_pwr_3v3: regulator-dp-prw {
+ compatible = "regulator-fixed";
+ regulator-name = "dp-pwr";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&exp4 0 GPIO_ACTIVE_HIGH>; /* P0 - DP0_PWR_SW_EN */
+ enable-active-high;
+ };
+
+ dp0: connector {
+ compatible = "dp-connector";
+ label = "DP0";
+ type = "full-size";
+ dp-pwr-supply = <&dp_pwr_3v3>;
+
+ port {
+ dp_connector_in: endpoint {
+ remote-endpoint = <&dp0_out>;
+ };
+ };
+ };
};
&main_pmx0 {
@@ -190,6 +212,12 @@
>;
};
+ dp0_pins_default: dp0-pins-default {
+ pinctrl-single,pins = <
+ J721E_IOPAD(0x1c4, PIN_INPUT, 5) /* SPI0_CS1.DP0_HPD */
+ >;
+ };
+
main_i2c1_exp4_pins_default: main-i2c1-exp4-pins-default {
pinctrl-single,pins = <
J721E_IOPAD(0x230, PIN_INPUT, 7) /* (U2) ECAP0_IN_APWM_OUT.GPIO1_11 */
@@ -658,6 +686,33 @@
<&k3_clks 152 18>; /* PLL23_HSDIV0 */
};
+&dss_ports {
+ port {
+ dpi0_out: endpoint {
+ remote-endpoint = <&dp0_in>;
+ };
+ };
+};
+
+&dp0_ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ dp0_in: endpoint {
+ remote-endpoint = <&dpi0_out>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ dp0_out: endpoint {
+ remote-endpoint = <&dp_connector_in>;
+ };
+ };
+};
+
&mcasp0 {
status = "disabled";
};
@@ -807,6 +862,8 @@
&mhdp {
phys = <&torrent_phy_dp>;
phy-names = "dpphy";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dp0_pins_default>;
};
&pcie0_rc {
@@ -859,10 +916,6 @@
status = "disabled";
};
-&dss {
- status = "disabled";
-};
-
&icssg0_mdio {
status = "disabled";
};
--
2.17.1
^ permalink raw reply related [flat|nested] 6+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
2022-04-26 15:35 ` [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm Rahul T R
@ 2022-04-26 18:13 ` Nishanth Menon
0 siblings, 0 replies; 6+ messages in thread
From: Nishanth Menon @ 2022-04-26 18:13 UTC (permalink / raw)
To: Rahul T R
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski, linux-arm-kernel,
devicetree, linux-kernel, tomi.valkeinen, laurent.pinchart,
kishon
On 21:05-20220426, Rahul T R wrote:
> From: Tomi Valkeinen <tomi.valkeinen@ti.com>
>
[...]
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> index 2f119e94e783..4b9e3f671781 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> @@ -148,6 +148,28 @@
> pinctrl-0 = <&main_mcan2_gpio_pins_default>;
> standby-gpios = <&main_gpio0 127 GPIO_ACTIVE_HIGH>;
> };
> +
> + dp_pwr_3v3: regulator-dp-prw {
See feedback in https://lore.kernel.org/all/c50819cb-8234-670f-c7c0-0507af2f96df@linaro.org/
> + compatible = "regulator-fixed";
> + regulator-name = "dp-pwr";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&exp4 0 GPIO_ACTIVE_HIGH>; /* P0 - DP0_PWR_SW_EN */
> + enable-active-high;
> + };
> +
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
@ 2022-04-26 18:13 ` Nishanth Menon
0 siblings, 0 replies; 6+ messages in thread
From: Nishanth Menon @ 2022-04-26 18:13 UTC (permalink / raw)
To: Rahul T R
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski, linux-arm-kernel,
devicetree, linux-kernel, tomi.valkeinen, laurent.pinchart,
kishon
On 21:05-20220426, Rahul T R wrote:
> From: Tomi Valkeinen <tomi.valkeinen@ti.com>
>
[...]
>
> diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> index 2f119e94e783..4b9e3f671781 100644
> --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> @@ -148,6 +148,28 @@
> pinctrl-0 = <&main_mcan2_gpio_pins_default>;
> standby-gpios = <&main_gpio0 127 GPIO_ACTIVE_HIGH>;
> };
> +
> + dp_pwr_3v3: regulator-dp-prw {
See feedback in https://lore.kernel.org/all/c50819cb-8234-670f-c7c0-0507af2f96df@linaro.org/
> + compatible = "regulator-fixed";
> + regulator-name = "dp-pwr";
> + regulator-min-microvolt = <3300000>;
> + regulator-max-microvolt = <3300000>;
> + gpio = <&exp4 0 GPIO_ACTIVE_HIGH>; /* P0 - DP0_PWR_SW_EN */
> + enable-active-high;
> + };
> +
--
Regards,
Nishanth Menon
Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm
2022-04-26 18:13 ` Nishanth Menon
(?)
@ 2022-04-27 14:28 ` Rahul T R
-1 siblings, 0 replies; 6+ messages in thread
From: Rahul T R @ 2022-04-27 14:28 UTC (permalink / raw)
To: Nishanth Menon
Cc: vigneshr, kristo, robh+dt, krzysztof.kozlowski+dt,
linux-arm-kernel, devicetree, linux-kernel, tomi.valkeinen,
laurent.pinchart, kishon
On 13:13-20220426, Nishanth Menon wrote:
> On 21:05-20220426, Rahul T R wrote:
> > From: Tomi Valkeinen <tomi.valkeinen@ti.com>
> >
>
> [...]
>
> >
> > diff --git a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> > index 2f119e94e783..4b9e3f671781 100644
> > --- a/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> > +++ b/arch/arm64/boot/dts/ti/k3-j721e-common-proc-board.dts
> > @@ -148,6 +148,28 @@
> > pinctrl-0 = <&main_mcan2_gpio_pins_default>;
> > standby-gpios = <&main_gpio0 127 GPIO_ACTIVE_HIGH>;
> > };
> > +
> > + dp_pwr_3v3: regulator-dp-prw {
>
> See feedback in https://lore.kernel.org/all/c50819cb-8234-670f-c7c0-0507af2f96df@linaro.org/
Hi Nishanth,
As per the feedback in the above thread
the name matches with below convention
"regulator-foo-bar" or "foo-bar-regulator"
Are you referring to the typo here?
regulator-dp-prw => regulator-dp-pwr
will fix this in the respin
Can you please clarify if you there is
any issue other than the typo
Regards
Rahul T R
>
> > + compatible = "regulator-fixed";
> > + regulator-name = "dp-pwr";
> > + regulator-min-microvolt = <3300000>;
> > + regulator-max-microvolt = <3300000>;
> > + gpio = <&exp4 0 GPIO_ACTIVE_HIGH>; /* P0 - DP0_PWR_SW_EN */
> > + enable-active-high;
> > + };
> > +
> --
> Regards,
> Nishanth Menon
> Key (0xDDB5849D1736249D) / Fingerprint: F8A2 8693 54EB 8232 17A3 1A34 DDB5 849D 1736 249D
^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2022-04-27 14:28 UTC | newest]
Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-04-26 15:35 [PATCH v4 0/2] DSS: Add support for DisplayPort Rahul T R
2022-04-26 15:35 ` [PATCH v4 1/2] arm64: dts: ti: k3-j721e-*: add DP & DP PHY Rahul T R
2022-04-26 15:35 ` [PATCH v4 2/2] arm64: dts: ti: k3-j721e-common-proc-board: add DP to j7 evm Rahul T R
2022-04-26 18:13 ` Nishanth Menon
2022-04-26 18:13 ` Nishanth Menon
2022-04-27 14:28 ` Rahul T R
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