[Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[José Roberto de Souza]

This feature is supported from display 9 to display 12 and was
incorrectly being applied to DG2 and Alderlake-P.

While at is also taking the oportunity to drop it from
intel_device_info struct as a display check is more simple
and less prone to be left enabled in future platforms.

BSpec: 50039
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2dddc27a1b0ed..695b35cd6b5e4 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
 
-#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
+#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
+					  DISPLAY_VER(dev_priv) <= 12)
 
 #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
 #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 498708b33924f..c4f9c805cffd1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
 	.display.has_dmc = 1, \
 	.has_gt_uc = 1, \
 	.display.has_hdcp = 1, \
-	.display.has_ipc = 1, \
 	.display.has_psr = 1, \
 	.display.has_psr_hw_tracking = 1, \
 	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
@@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.has_reset_engine = 1, \
 	.has_snoop = true, \
 	.has_coherent_ggtt = false, \
-	.display.has_ipc = 1, \
 	HSW_PIPE_OFFSETS, \
 	IVB_CURSOR_OFFSETS, \
 	IVB_COLORS, \
@@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
 	.display.has_fpga_dbg = 1,						\
 	.display.has_hdcp = 1,							\
 	.display.has_hotplug = 1,						\
-	.display.has_ipc = 1,							\
 	.display.has_psr = 1,							\
 	.display.ver = 13,							\
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index e7d2cf7d65c85..c9660b4282d9e 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -180,7 +180,6 @@ enum intel_ppgtt_type {
 	func(has_hdcp); \
 	func(has_hotplug); \
 	func(has_hti); \
-	func(has_ipc); \
 	func(has_modular_fia); \
 	func(has_overlay); \
 	func(has_psr); \
-- 
2.36.0

[Intel-gfx] [PATCH 02/12] drm/i915/display: Disable DSB for DG2 and Alderlake-P

[José Roberto de Souza]

Commit 99510e1afb48 ("drm/i915: Disable DSB usage for now") disabled
DSB for all display 12 platforms because it is not properly
programming gamma LUT but left display 13 platforms with it enabled
what I believe is not intentional.

kms_color@pipe-a-gamma test is still passing on TGL with DSB enabled
like reported in https://gitlab.freedesktop.org/drm/intel/-/issues/3916
and got the same behavior on Alderlake-P.

So here disabling DSB for all platforms and to avoid this mistake in
future platforms dropping the it from intel_device_info struct.

Fixes: 99510e1afb48 ("drm/i915: Disable DSB usage for now")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 +---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 695b35cd6b5e4..d23180d1b10cb 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -937,7 +937,8 @@ static inline struct intel_gt *to_gt(struct drm_i915_private *i915)
 
 #define INTEL_REVID(dev_priv)	(to_pci_dev((dev_priv)->drm.dev)->revision)
 
-#define HAS_DSB(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dsb)
+/* FIXME: LUT load is broken with DSB */
+#define HAS_DSB(dev_priv)	(DISPLAY_VER(i915) >= 12 && 0)
 
 #define INTEL_DISPLAY_STEP(__i915) (RUNTIME_INFO(__i915)->step.display_step)
 #define INTEL_GRAPHICS_STEP(__i915) (RUNTIME_INFO(__i915)->step.graphics_step)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c4f9c805cffd1..fc3e7c8bc69d1 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -870,8 +870,7 @@ static const struct intel_device_info jsl_info = {
 	}, \
 	TGL_CURSOR_OFFSETS, \
 	.has_global_mocs = 1, \
-	.has_pxp = 1, \
-	.display.has_dsb = 0 /* FIXME: LUT load is broken with DSB */
+	.has_pxp = 1
 
 static const struct intel_device_info tgl_info = {
 	GEN12_FEATURES,
@@ -947,7 +946,6 @@ static const struct intel_device_info adl_s_info = {
 	.display.has_ddi = 1,							\
 	.display.has_dmc = 1,							\
 	.display.has_dp_mst = 1,						\
-	.display.has_dsb = 1,							\
 	.display.has_dsc = 1,							\
 	.display.fbc_mask = BIT(INTEL_FBC_A),					\
 	.display.has_fpga_dbg = 1,						\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index c9660b4282d9e..d16515cea22fd 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -173,7 +173,6 @@ enum intel_ppgtt_type {
 	func(has_dmc); \
 	func(has_ddi); \
 	func(has_dp_mst); \
-	func(has_dsb); \
 	func(has_dsc); \
 	func(has_fpga_dbg); \
 	func(has_gmch); \
-- 
2.36.0

[Intel-gfx] [PATCH 03/12] drm/i915: Drop has_gt_uc from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 9 or newer has graphics
microcontroller.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_gpu_error.c    | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 4 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d23180d1b10cb..3a3d57485b09c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1357,7 +1357,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define HAS_FLAT_CCS(dev_priv)   (INTEL_INFO(dev_priv)->has_flat_ccs)
 
-#define HAS_GT_UC(dev_priv)	(INTEL_INFO(dev_priv)->has_gt_uc)
+#define HAS_GT_UC(dev_priv)	(GRAPHICS_VER(dev_priv) >= 9)
 
 #define HAS_POOLED_EU(dev_priv)	(INTEL_INFO(dev_priv)->has_pooled_eu)
 
diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
index 0512c66fa4f3f..5bd9cb8998527 100644
--- a/drivers/gpu/drm/i915/i915_gpu_error.c
+++ b/drivers/gpu/drm/i915/i915_gpu_error.c
@@ -2008,7 +2008,7 @@ __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 du
 			return ERR_PTR(-ENOMEM);
 		}
 
-		if (INTEL_INFO(i915)->has_gt_uc) {
+		if (HAS_GT_UC(i915)) {
 			error->gt->uc = gt_record_uc(error->gt, compress);
 			if (error->gt->uc) {
 				if (dump_flags & CORE_DUMP_FLAG_IS_GUC_CAPTURE)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index fc3e7c8bc69d1..df20818ce8eae 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -644,7 +644,6 @@ static const struct intel_device_info chv_info = {
 	GEN(9), \
 	GEN9_DEFAULT_PAGE_SIZES, \
 	.display.has_dmc = 1, \
-	.has_gt_uc = 1, \
 	.display.has_hdcp = 1, \
 	.display.has_psr = 1, \
 	.display.has_psr_hw_tracking = 1, \
@@ -704,7 +703,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.has_rps = true, \
 	.display.has_dp_mst = 1, \
 	.has_logical_ring_contexts = 1, \
-	.has_gt_uc = 1, \
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
 	.ppgtt_size = 48, \
@@ -1003,7 +1001,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_64bit_reloc = 1, \
 	.has_flat_ccs = 1, \
 	.has_global_mocs = 1, \
-	.has_gt_uc = 1, \
 	.has_llc = 1, \
 	.has_logical_ring_contexts = 1, \
 	.has_logical_ring_elsq = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d16515cea22fd..6d2eafaab4ef0 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -146,7 +146,6 @@ enum intel_ppgtt_type {
 	func(has_4tile); \
 	func(has_flat_ccs); \
 	func(has_global_mocs); \
-	func(has_gt_uc); \
 	func(has_heci_pxp); \
 	func(has_heci_gscfi); \
 	func(has_guc_deprivilege); \
-- 
2.36.0

[Intel-gfx] [PATCH 04/12] drm/i915: Drop has_rc6 from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 6 or newer have software
support for this feature.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 8 --------
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3a3d57485b09c..d29dca83185ac 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1308,7 +1308,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
 #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
 
-#define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6)
+/* ilk does support rc6, but we do not implement [power] contexts */
+#define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
 #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
 #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index df20818ce8eae..90584c462f225 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -376,8 +376,6 @@ static const struct intel_device_info gm45_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
 	.has_snoop = true, \
 	.has_coherent_ggtt = true, \
-	/* ilk does support rc6, but we do not implement [power] contexts */ \
-	.has_rc6 = 0, \
 	.dma_mask_size = 36, \
 	I9XX_PIPE_OFFSETS, \
 	I9XX_CURSOR_OFFSETS, \
@@ -407,7 +405,6 @@ static const struct intel_device_info ilk_m_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
 	.has_llc = 1, \
-	.has_rc6 = 1, \
 	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
@@ -458,7 +455,6 @@ static const struct intel_device_info snb_m_gt2_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
 	.has_llc = 1, \
-	.has_rc6 = 1, \
 	.has_rc6p = 1, \
 	.has_reset_engine = true, \
 	.has_rps = true, \
@@ -518,7 +514,6 @@ static const struct intel_device_info vlv_info = {
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
 	.has_runtime_pm = 1,
-	.has_rc6 = 1,
 	.has_reset_engine = true,
 	.has_rps = true,
 	.display.has_gmch = 1,
@@ -617,7 +612,6 @@ static const struct intel_device_info chv_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
 	.has_64bit_reloc = 1,
 	.has_runtime_pm = 1,
-	.has_rc6 = 1,
 	.has_rps = true,
 	.has_logical_ring_contexts = 1,
 	.display.has_gmch = 1,
@@ -699,7 +693,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_psr_hw_tracking = 1, \
 	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
-	.has_rc6 = 1, \
 	.has_rps = true, \
 	.display.has_dp_mst = 1, \
 	.has_logical_ring_contexts = 1, \
@@ -1005,7 +998,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_logical_ring_contexts = 1, \
 	.has_logical_ring_elsq = 1, \
 	.has_mslices = 1, \
-	.has_rc6 = 1, \
 	.has_reset_engine = 1, \
 	.has_rps = 1, \
 	.has_runtime_pm = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 6d2eafaab4ef0..b3244170c4638 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -156,7 +156,6 @@ enum intel_ppgtt_type {
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_pxp); \
-	func(has_rc6); \
 	func(has_rc6p); \
 	func(has_rps); \
 	func(has_runtime_pm); \
-- 
2.36.0

[Intel-gfx] [PATCH 05/12] drm/i915: Drop has_rc6p from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as it was only supported in graphics version 6 and 7 not including
haswell.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d29dca83185ac..602e056edd314 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1310,7 +1310,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 /* ilk does support rc6, but we do not implement [power] contexts */
 #define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
-#define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
+#define HAS_RC6p(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6 && \
+					  GRAPHICS_VER(dev_priv) <= 7 && \
+					  !IS_HASWELL(dev_priv))
 #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
 
 #define HAS_RPS(dev_priv)	(INTEL_INFO(dev_priv)->has_rps)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 90584c462f225..516f28d4db611 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -405,7 +405,6 @@ static const struct intel_device_info ilk_m_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
 	.has_llc = 1, \
-	.has_rc6p = 1, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
 	.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -455,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
 	.has_llc = 1, \
-	.has_rc6p = 1, \
 	.has_reset_engine = true, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
@@ -540,7 +538,6 @@ static const struct intel_device_info vlv_info = {
 	.display.has_ddi = 1, \
 	.display.has_fpga_dbg = 1, \
 	.display.has_dp_mst = 1, \
-	.has_rc6p = 0 /* RC6p removed-by HSW */, \
 	HSW_PIPE_OFFSETS, \
 	.has_runtime_pm = 1
 
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b3244170c4638..599cb265946b8 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -156,7 +156,6 @@ enum intel_ppgtt_type {
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_pxp); \
-	func(has_rc6p); \
 	func(has_rps); \
 	func(has_runtime_pm); \
 	func(has_snoop); \
-- 
2.36.0

[Intel-gfx] [PATCH 06/12] drm/i915: Drop has_reset_engine from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 7 or newer can reset engines.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/gt/intel_reset.c    | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 5 -----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
index 5422a3b84bd44..894f17f8b4cea 100644
--- a/drivers/gpu/drm/i915/gt/intel_reset.c
+++ b/drivers/gpu/drm/i915/gt/intel_reset.c
@@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
 	if (gt->i915->params.reset < 2)
 		return false;
 
-	return INTEL_INFO(gt->i915)->has_reset_engine;
+	return GRAPHICS_VER(gt->i915) >= 7;
 }
 
 int intel_reset_guc(struct intel_gt *gt)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 516f28d4db611..b47f8b1ab9c6c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -454,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
 	.has_coherent_ggtt = true, \
 	.has_llc = 1, \
-	.has_reset_engine = true, \
 	.has_rps = true, \
 	.dma_mask_size = 40, \
 	.ppgtt_type = INTEL_PPGTT_ALIASING, \
@@ -512,7 +511,6 @@ static const struct intel_device_info vlv_info = {
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
 	.has_runtime_pm = 1,
-	.has_reset_engine = true,
 	.has_rps = true,
 	.display.has_gmch = 1,
 	.display.has_hotplug = 1,
@@ -615,7 +613,6 @@ static const struct intel_device_info chv_info = {
 	.dma_mask_size = 39,
 	.ppgtt_type = INTEL_PPGTT_FULL,
 	.ppgtt_size = 32,
-	.has_reset_engine = 1,
 	.has_snoop = true,
 	.has_coherent_ggtt = false,
 	.display_mmio_offset = VLV_DISPLAY_BASE,
@@ -696,7 +693,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
 	.ppgtt_size = 48, \
-	.has_reset_engine = 1, \
 	.has_snoop = true, \
 	.has_coherent_ggtt = false, \
 	HSW_PIPE_OFFSETS, \
@@ -995,7 +991,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_logical_ring_contexts = 1, \
 	.has_logical_ring_elsq = 1, \
 	.has_mslices = 1, \
-	.has_reset_engine = 1, \
 	.has_rps = 1, \
 	.has_runtime_pm = 1, \
 	.ppgtt_size = 48, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 599cb265946b8..62c9616ea6a9c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -142,7 +142,6 @@ enum intel_ppgtt_type {
 	func(has_64k_pages); \
 	func(needs_compact_pt); \
 	func(gpu_reset_clobbers_display); \
-	func(has_reset_engine); \
 	func(has_4tile); \
 	func(has_flat_ccs); \
 	func(has_global_mocs); \
-- 
2.36.0

[Intel-gfx] [PATCH 07/12] drm/i915: Drop has_logical_ring_elsq from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with graphics version 11 or newer has this feature.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 +--
 drivers/gpu/drm/i915/i915_pci.c          | 4 +---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 602e056edd314..f23e5c5cbf82b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1247,8 +1247,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \
 		(INTEL_INFO(dev_priv)->has_logical_ring_contexts)
-#define HAS_LOGICAL_RING_ELSQ(dev_priv) \
-		(INTEL_INFO(dev_priv)->has_logical_ring_elsq)
+#define HAS_LOGICAL_RING_ELSQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11)
 
 #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index b47f8b1ab9c6c..25aa8f5957f1e 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -804,8 +804,7 @@ static const struct intel_device_info cml_gt2_info = {
 	.dbuf.size = 2048, \
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
 	.display.has_dsc = 1, \
-	.has_coherent_ggtt = false, \
-	.has_logical_ring_elsq = 1
+	.has_coherent_ggtt = false
 
 static const struct intel_device_info icl_info = {
 	GEN11_FEATURES,
@@ -989,7 +988,6 @@ static const struct intel_device_info adl_p_info = {
 	.has_global_mocs = 1, \
 	.has_llc = 1, \
 	.has_logical_ring_contexts = 1, \
-	.has_logical_ring_elsq = 1, \
 	.has_mslices = 1, \
 	.has_rps = 1, \
 	.has_runtime_pm = 1, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 62c9616ea6a9c..7cf16b0315b54 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -151,7 +151,6 @@ enum intel_ppgtt_type {
 	func(has_l3_dpf); \
 	func(has_llc); \
 	func(has_logical_ring_contexts); \
-	func(has_logical_ring_elsq); \
 	func(has_mslices); \
 	func(has_pooled_eu); \
 	func(has_pxp); \
-- 
2.36.0

[Intel-gfx] [PATCH 08/12] drm/i915: Drop has_ddi from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer, haswell or broadwell
supports it.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 3 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f23e5c5cbf82b..a354815445238 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1299,7 +1299,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_DP20(dev_priv)	(IS_DG2(dev_priv))
 
 #define HAS_CDCLK_CRAWL(dev_priv)	 (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
-#define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ddi)
+#define HAS_DDI(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 || \
+					  IS_HASWELL(dev_priv) || \
+					  IS_BROADWELL(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 25aa8f5957f1e..96270c0ddf06c 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -533,7 +533,6 @@ static const struct intel_device_info vlv_info = {
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
-	.display.has_ddi = 1, \
 	.display.has_fpga_dbg = 1, \
 	.display.has_dp_mst = 1, \
 	HSW_PIPE_OFFSETS, \
@@ -679,7 +678,6 @@ static const struct intel_device_info skl_gt4_info = {
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
 		BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
 	.has_64bit_reloc = 1, \
-	.display.has_ddi = 1, \
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
@@ -926,7 +924,6 @@ static const struct intel_device_info adl_s_info = {
 	.dbuf.size = 4096,							\
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
 		BIT(DBUF_S4),							\
-	.display.has_ddi = 1,							\
 	.display.has_dmc = 1,							\
 	.display.has_dp_mst = 1,						\
 	.display.has_dsc = 1,							\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 7cf16b0315b54..d809d44098c63 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -166,7 +166,6 @@ enum intel_ppgtt_type {
 	func(cursor_needs_physical); \
 	func(has_cdclk_crawl); \
 	func(has_dmc); \
-	func(has_ddi); \
 	func(has_dp_mst); \
 	func(has_dsc); \
 	func(has_fpga_dbg); \
-- 
2.36.0

[Intel-gfx] [PATCH 09/12] drm/i915: Drop has_dp_mst from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as the requirement to support it is the DDI support.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index a354815445238..6b8a4e6649d9b 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1295,13 +1295,13 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 
 #define HAS_IPS(dev_priv)	(IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
 
-#define HAS_DP_MST(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dp_mst)
 #define HAS_DP20(dev_priv)	(IS_DG2(dev_priv))
 
 #define HAS_CDCLK_CRAWL(dev_priv)	 (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
 #define HAS_DDI(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 || \
 					  IS_HASWELL(dev_priv) || \
 					  IS_BROADWELL(dev_priv))
+#define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 96270c0ddf06c..d8b5e972109f9 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -534,7 +534,6 @@ static const struct intel_device_info vlv_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
 		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
 	.display.has_fpga_dbg = 1, \
-	.display.has_dp_mst = 1, \
 	HSW_PIPE_OFFSETS, \
 	.has_runtime_pm = 1
 
@@ -686,7 +685,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
 	.has_rps = true, \
-	.display.has_dp_mst = 1, \
 	.has_logical_ring_contexts = 1, \
 	.dma_mask_size = 39, \
 	.ppgtt_type = INTEL_PPGTT_FULL, \
@@ -925,7 +923,6 @@ static const struct intel_device_info adl_s_info = {
 	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
 		BIT(DBUF_S4),							\
 	.display.has_dmc = 1,							\
-	.display.has_dp_mst = 1,						\
 	.display.has_dsc = 1,							\
 	.display.fbc_mask = BIT(INTEL_FBC_A),					\
 	.display.has_fpga_dbg = 1,						\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index d809d44098c63..c4e85976d8948 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -166,7 +166,6 @@ enum intel_ppgtt_type {
 	func(cursor_needs_physical); \
 	func(has_cdclk_crawl); \
 	func(has_dmc); \
-	func(has_dp_mst); \
 	func(has_dsc); \
 	func(has_fpga_dbg); \
 	func(has_gmch); \
-- 
2.36.0

[Intel-gfx] [PATCH 10/12] drm/i915: Drop has_psr from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as all platforms with display version 9 or newer has this feature.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 2 +-
 drivers/gpu/drm/i915/i915_pci.c          | 3 ---
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6b8a4e6649d9b..d8fa1d09cc828 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1303,7 +1303,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 					  IS_BROADWELL(dev_priv))
 #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
-#define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
+#define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
 #define HAS_PSR_HW_TRACKING(dev_priv) \
 	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index d8b5e972109f9..098d47cc47b44 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -631,7 +631,6 @@ static const struct intel_device_info chv_info = {
 	GEN9_DEFAULT_PAGE_SIZES, \
 	.display.has_dmc = 1, \
 	.display.has_hdcp = 1, \
-	.display.has_psr = 1, \
 	.display.has_psr_hw_tracking = 1, \
 	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
 	.dbuf.slice_mask = BIT(DBUF_S1)
@@ -680,7 +679,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
-	.display.has_psr = 1, \
 	.display.has_psr_hw_tracking = 1, \
 	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
@@ -928,7 +926,6 @@ static const struct intel_device_info adl_s_info = {
 	.display.has_fpga_dbg = 1,						\
 	.display.has_hdcp = 1,							\
 	.display.has_hotplug = 1,						\
-	.display.has_psr = 1,							\
 	.display.ver = 13,							\
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
 	.pipe_offsets = {							\
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index c4e85976d8948..5c17257f3f44b 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -174,7 +174,6 @@ enum intel_ppgtt_type {
 	func(has_hti); \
 	func(has_modular_fia); \
 	func(has_overlay); \
-	func(has_psr); \
 	func(has_psr_hw_tracking); \
 	func(overlay_needs_physical); \
 	func(supports_tv);
-- 
2.36.0

[Intel-gfx] [PATCH 11/12] drm/i915: Drop has_psr_hw_tracking from device info

[José Roberto de Souza]

No need to have this parameter in intel_device_info struct
as this feature was only supported by display 9, display 11, tigerlake
and DG1, no newer platform will have this feature.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 6 ++++--
 drivers/gpu/drm/i915/i915_pci.c          | 5 -----
 drivers/gpu/drm/i915/intel_device_info.h | 1 -
 3 files changed, 4 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d8fa1d09cc828..d866287c663a2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1304,8 +1304,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
 #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
 #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
 #define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
-#define HAS_PSR_HW_TRACKING(dev_priv) \
-	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
+#define HAS_PSR_HW_TRACKING(dev_priv)	 ((DISPLAY_VER(dev_priv) >= 9 && \
+					   DISPLAY_VER(dev_priv) <= 11) || \
+					  IS_TIGERLAKE(dev_priv) || \
+					  IS_DG1(dev_priv))
 #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
 #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
 
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 098d47cc47b44..c6e99305e24d0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -631,7 +631,6 @@ static const struct intel_device_info chv_info = {
 	GEN9_DEFAULT_PAGE_SIZES, \
 	.display.has_dmc = 1, \
 	.display.has_hdcp = 1, \
-	.display.has_psr_hw_tracking = 1, \
 	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
 	.dbuf.slice_mask = BIT(DBUF_S1)
 
@@ -679,7 +678,6 @@ static const struct intel_device_info skl_gt4_info = {
 	.display.has_fpga_dbg = 1, \
 	.display.fbc_mask = BIT(INTEL_FBC_A), \
 	.display.has_hdcp = 1, \
-	.display.has_psr_hw_tracking = 1, \
 	.has_runtime_pm = 1, \
 	.display.has_dmc = 1, \
 	.has_rps = true, \
@@ -865,7 +863,6 @@ static const struct intel_device_info rkl_info = {
 	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
 		BIT(TRANSCODER_C),
 	.display.has_hti = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
 };
@@ -897,7 +894,6 @@ static const struct intel_device_info adl_s_info = {
 	PLATFORM(INTEL_ALDERLAKE_S),
 	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
 	.display.has_hti = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.dma_mask_size = 39,
@@ -955,7 +951,6 @@ static const struct intel_device_info adl_p_info = {
 			       BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
 	.display.has_cdclk_crawl = 1,
 	.display.has_modular_fia = 1,
-	.display.has_psr_hw_tracking = 0,
 	.platform_engine_mask =
 		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
 	.ppgtt_size = 48,
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 5c17257f3f44b..bea9f92e2264c 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -174,7 +174,6 @@ enum intel_ppgtt_type {
 	func(has_hti); \
 	func(has_modular_fia); \
 	func(has_overlay); \
-	func(has_psr_hw_tracking); \
 	func(overlay_needs_physical); \
 	func(supports_tv);
 
-- 
2.36.0

[Intel-gfx] [PATCH 12/12] drm/i915: Drop supports_tv from device info

[José Roberto de Souza]

Only four platforms ever support this feature so we can elimitate
this from device info and use platform checks instead.

Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
 drivers/gpu/drm/i915/i915_pci.c          | 4 ----
 drivers/gpu/drm/i915/intel_device_info.h | 3 +--
 3 files changed, 3 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d866287c663a2..3c5980d174f81 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1286,7 +1286,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
  */
 #define HAS_128_BYTE_Y_TILING(dev_priv) (GRAPHICS_VER(dev_priv) != 2 && \
 					 !(IS_I915G(dev_priv) || IS_I915GM(dev_priv)))
-#define SUPPORTS_TV(dev_priv)		(INTEL_INFO(dev_priv)->display.supports_tv)
+#define SUPPORTS_TV(dev_priv)		(IS_I915GM(dev_priv) || IS_I945GM(dev_priv) || \
+					 IS_I965GM(dev_priv) || IS_GM45(dev_priv))
 #define I915_HAS_HOTPLUG(dev_priv)	(INTEL_INFO(dev_priv)->display.has_hotplug)
 
 #define HAS_FW_BLC(dev_priv)	(DISPLAY_VER(dev_priv) > 2)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index c6e99305e24d0..184a1eb6e2fce 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -259,7 +259,6 @@ static const struct intel_device_info i915gm_info = {
 	.display.cursor_needs_physical = 1,
 	.display.has_overlay = 1,
 	.display.overlay_needs_physical = 1,
-	.display.supports_tv = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.hws_needs_physical = 1,
 	.unfenced_needs_alignment = 1,
@@ -284,7 +283,6 @@ static const struct intel_device_info i945gm_info = {
 	.display.cursor_needs_physical = 1,
 	.display.has_overlay = 1,
 	.display.overlay_needs_physical = 1,
-	.display.supports_tv = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.hws_needs_physical = 1,
 	.unfenced_needs_alignment = 1,
@@ -346,7 +344,6 @@ static const struct intel_device_info i965gm_info = {
 	.is_mobile = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
 	.display.has_overlay = 1,
-	.display.supports_tv = 1,
 	.hws_needs_physical = 1,
 	.has_snoop = false,
 };
@@ -363,7 +360,6 @@ static const struct intel_device_info gm45_info = {
 	PLATFORM(INTEL_GM45),
 	.is_mobile = 1,
 	.display.fbc_mask = BIT(INTEL_FBC_A),
-	.display.supports_tv = 1,
 	.platform_engine_mask = BIT(RCS0) | BIT(VCS0),
 	.gpu_reset_clobbers_display = false,
 };
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index bea9f92e2264c..a1d111fc83346 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -174,8 +174,7 @@ enum intel_ppgtt_type {
 	func(has_hti); \
 	func(has_modular_fia); \
 	func(has_overlay); \
-	func(overlay_needs_physical); \
-	func(supports_tv);
+	func(overlay_needs_physical);
 
 struct ip_version {
 	u8 ver;
-- 
2.36.0

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Matt Roper]

On Wed, May 04, 2022 at 12:07:45PM -0700, José Roberto de Souza wrote:
> This feature is supported from display 9 to display 12 and was
> incorrectly being applied to DG2 and Alderlake-P.
> 
> While at is also taking the oportunity to drop it from
> intel_device_info struct as a display check is more simple
> and less prone to be left enabled in future platforms.
> 
> BSpec: 50039
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2dddc27a1b0ed..695b35cd6b5e4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   */
>  #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
>  
> -#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
> +#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
> +					  DISPLAY_VER(dev_priv) <= 12)
>  
>  #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
>  #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 498708b33924f..c4f9c805cffd1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
>  	.display.has_dmc = 1, \
>  	.has_gt_uc = 1, \
>  	.display.has_hdcp = 1, \
> -	.display.has_ipc = 1, \
>  	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
>  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
> @@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.has_reset_engine = 1, \
>  	.has_snoop = true, \
>  	.has_coherent_ggtt = false, \
> -	.display.has_ipc = 1, \
>  	HSW_PIPE_OFFSETS, \
>  	IVB_CURSOR_OFFSETS, \
>  	IVB_COLORS, \
> @@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
>  	.display.has_fpga_dbg = 1,						\
>  	.display.has_hdcp = 1,							\
>  	.display.has_hotplug = 1,						\
> -	.display.has_ipc = 1,							\
>  	.display.has_psr = 1,							\
>  	.display.ver = 13,							\
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index e7d2cf7d65c85..c9660b4282d9e 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -180,7 +180,6 @@ enum intel_ppgtt_type {
>  	func(has_hdcp); \
>  	func(has_hotplug); \
>  	func(has_hti); \
> -	func(has_ipc); \
>  	func(has_modular_fia); \
>  	func(has_overlay); \
>  	func(has_psr); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Drop has_gt_uc from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:47PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with graphics version 9 or newer has graphics
> microcontroller.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 2 +-
>  drivers/gpu/drm/i915/i915_gpu_error.c    | 2 +-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  4 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d23180d1b10cb..3a3d57485b09c 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1357,7 +1357,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   */
>  #define HAS_FLAT_CCS(dev_priv)   (INTEL_INFO(dev_priv)->has_flat_ccs)
>  
> -#define HAS_GT_UC(dev_priv)	(INTEL_INFO(dev_priv)->has_gt_uc)
> +#define HAS_GT_UC(dev_priv)	(GRAPHICS_VER(dev_priv) >= 9)
>  
>  #define HAS_POOLED_EU(dev_priv)	(INTEL_INFO(dev_priv)->has_pooled_eu)
>  
> diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c
> index 0512c66fa4f3f..5bd9cb8998527 100644
> --- a/drivers/gpu/drm/i915/i915_gpu_error.c
> +++ b/drivers/gpu/drm/i915/i915_gpu_error.c
> @@ -2008,7 +2008,7 @@ __i915_gpu_coredump(struct intel_gt *gt, intel_engine_mask_t engine_mask, u32 du
>  			return ERR_PTR(-ENOMEM);
>  		}
>  
> -		if (INTEL_INFO(i915)->has_gt_uc) {
> +		if (HAS_GT_UC(i915)) {
>  			error->gt->uc = gt_record_uc(error->gt, compress);
>  			if (error->gt->uc) {
>  				if (dump_flags & CORE_DUMP_FLAG_IS_GUC_CAPTURE)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index fc3e7c8bc69d1..df20818ce8eae 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -644,7 +644,6 @@ static const struct intel_device_info chv_info = {
>  	GEN(9), \
>  	GEN9_DEFAULT_PAGE_SIZES, \
>  	.display.has_dmc = 1, \
> -	.has_gt_uc = 1, \
>  	.display.has_hdcp = 1, \
>  	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
> @@ -704,7 +703,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.has_rps = true, \
>  	.display.has_dp_mst = 1, \
>  	.has_logical_ring_contexts = 1, \
> -	.has_gt_uc = 1, \
>  	.dma_mask_size = 39, \
>  	.ppgtt_type = INTEL_PPGTT_FULL, \
>  	.ppgtt_size = 48, \
> @@ -1003,7 +1001,6 @@ static const struct intel_device_info adl_p_info = {
>  	.has_64bit_reloc = 1, \
>  	.has_flat_ccs = 1, \
>  	.has_global_mocs = 1, \
> -	.has_gt_uc = 1, \
>  	.has_llc = 1, \
>  	.has_logical_ring_contexts = 1, \
>  	.has_logical_ring_elsq = 1, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index d16515cea22fd..6d2eafaab4ef0 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -146,7 +146,6 @@ enum intel_ppgtt_type {
>  	func(has_4tile); \
>  	func(has_flat_ccs); \
>  	func(has_global_mocs); \
> -	func(has_gt_uc); \
>  	func(has_heci_pxp); \
>  	func(has_heci_gscfi); \
>  	func(has_guc_deprivilege); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 04/12] drm/i915: Drop has_rc6 from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:48PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with graphics version 6 or newer have software
> support for this feature.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c          | 8 --------
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 2 insertions(+), 10 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 3a3d57485b09c..d29dca83185ac 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1308,7 +1308,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
>  #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
>  
> -#define HAS_RC6(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6)
> +/* ilk does support rc6, but we do not implement [power] contexts */
> +#define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
>  #define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
>  #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index df20818ce8eae..90584c462f225 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -376,8 +376,6 @@ static const struct intel_device_info gm45_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0), \
>  	.has_snoop = true, \
>  	.has_coherent_ggtt = true, \
> -	/* ilk does support rc6, but we do not implement [power] contexts */ \
> -	.has_rc6 = 0, \
>  	.dma_mask_size = 36, \
>  	I9XX_PIPE_OFFSETS, \
>  	I9XX_CURSOR_OFFSETS, \
> @@ -407,7 +405,6 @@ static const struct intel_device_info ilk_m_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6 = 1, \
>  	.has_rc6p = 1, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
> @@ -458,7 +455,6 @@ static const struct intel_device_info snb_m_gt2_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6 = 1, \
>  	.has_rc6p = 1, \
>  	.has_reset_engine = true, \
>  	.has_rps = true, \
> @@ -518,7 +514,6 @@ static const struct intel_device_info vlv_info = {
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
>  	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
>  	.has_runtime_pm = 1,
> -	.has_rc6 = 1,
>  	.has_reset_engine = true,
>  	.has_rps = true,
>  	.display.has_gmch = 1,
> @@ -617,7 +612,6 @@ static const struct intel_device_info chv_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0),
>  	.has_64bit_reloc = 1,
>  	.has_runtime_pm = 1,
> -	.has_rc6 = 1,
>  	.has_rps = true,
>  	.has_logical_ring_contexts = 1,
>  	.display.has_gmch = 1,
> @@ -699,7 +693,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.display.has_psr_hw_tracking = 1, \
>  	.has_runtime_pm = 1, \
>  	.display.has_dmc = 1, \
> -	.has_rc6 = 1, \
>  	.has_rps = true, \
>  	.display.has_dp_mst = 1, \
>  	.has_logical_ring_contexts = 1, \
> @@ -1005,7 +998,6 @@ static const struct intel_device_info adl_p_info = {
>  	.has_logical_ring_contexts = 1, \
>  	.has_logical_ring_elsq = 1, \
>  	.has_mslices = 1, \
> -	.has_rc6 = 1, \
>  	.has_reset_engine = 1, \
>  	.has_rps = 1, \
>  	.has_runtime_pm = 1, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 6d2eafaab4ef0..b3244170c4638 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -156,7 +156,6 @@ enum intel_ppgtt_type {
>  	func(has_mslices); \
>  	func(has_pooled_eu); \
>  	func(has_pxp); \
> -	func(has_rc6); \
>  	func(has_rc6p); \
>  	func(has_rps); \
>  	func(has_runtime_pm); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Drop has_rc6p from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:49PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as it was only supported in graphics version 6 and 7 not including
> haswell.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d29dca83185ac..602e056edd314 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1310,7 +1310,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  /* ilk does support rc6, but we do not implement [power] contexts */
>  #define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
> -#define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
> +#define HAS_RC6p(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6 && \
> +					  GRAPHICS_VER(dev_priv) <= 7 && \

BTW, I just remembered that we can write simple ranges like this (where
the release number doesn't matter) as:

        IS_GRAPHICS_VER(i915, 6, 7)

so you might want to use that to simplify here and in some of the other
patches.

Otherwise,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


> +					  !IS_HASWELL(dev_priv))
>  #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
>  
>  #define HAS_RPS(dev_priv)	(INTEL_INFO(dev_priv)->has_rps)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 90584c462f225..516f28d4db611 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -405,7 +405,6 @@ static const struct intel_device_info ilk_m_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6p = 1, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
>  	.ppgtt_type = INTEL_PPGTT_ALIASING, \
> @@ -455,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6p = 1, \
>  	.has_reset_engine = true, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
> @@ -540,7 +538,6 @@ static const struct intel_device_info vlv_info = {
>  	.display.has_ddi = 1, \
>  	.display.has_fpga_dbg = 1, \
>  	.display.has_dp_mst = 1, \
> -	.has_rc6p = 0 /* RC6p removed-by HSW */, \
>  	HSW_PIPE_OFFSETS, \
>  	.has_runtime_pm = 1
>  
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index b3244170c4638..599cb265946b8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -156,7 +156,6 @@ enum intel_ppgtt_type {
>  	func(has_mslices); \
>  	func(has_pooled_eu); \
>  	func(has_pxp); \
> -	func(has_rc6p); \
>  	func(has_rps); \
>  	func(has_runtime_pm); \
>  	func(has_snoop); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 06/12] drm/i915: Drop has_reset_engine from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:50PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with graphics version 7 or newer can reset engines.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/gt/intel_reset.c    | 2 +-
>  drivers/gpu/drm/i915/i915_pci.c          | 5 -----
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 1 insertion(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_reset.c b/drivers/gpu/drm/i915/gt/intel_reset.c
> index 5422a3b84bd44..894f17f8b4cea 100644
> --- a/drivers/gpu/drm/i915/gt/intel_reset.c
> +++ b/drivers/gpu/drm/i915/gt/intel_reset.c
> @@ -699,7 +699,7 @@ bool intel_has_reset_engine(const struct intel_gt *gt)
>  	if (gt->i915->params.reset < 2)
>  		return false;
>  
> -	return INTEL_INFO(gt->i915)->has_reset_engine;
> +	return GRAPHICS_VER(gt->i915) >= 7;
>  }
>  
>  int intel_reset_guc(struct intel_gt *gt)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 516f28d4db611..b47f8b1ab9c6c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -454,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_reset_engine = true, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
>  	.ppgtt_type = INTEL_PPGTT_ALIASING, \
> @@ -512,7 +511,6 @@ static const struct intel_device_info vlv_info = {
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B),
>  	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B),
>  	.has_runtime_pm = 1,
> -	.has_reset_engine = true,
>  	.has_rps = true,
>  	.display.has_gmch = 1,
>  	.display.has_hotplug = 1,
> @@ -615,7 +613,6 @@ static const struct intel_device_info chv_info = {
>  	.dma_mask_size = 39,
>  	.ppgtt_type = INTEL_PPGTT_FULL,
>  	.ppgtt_size = 32,
> -	.has_reset_engine = 1,
>  	.has_snoop = true,
>  	.has_coherent_ggtt = false,
>  	.display_mmio_offset = VLV_DISPLAY_BASE,
> @@ -696,7 +693,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.dma_mask_size = 39, \
>  	.ppgtt_type = INTEL_PPGTT_FULL, \
>  	.ppgtt_size = 48, \
> -	.has_reset_engine = 1, \
>  	.has_snoop = true, \
>  	.has_coherent_ggtt = false, \
>  	HSW_PIPE_OFFSETS, \
> @@ -995,7 +991,6 @@ static const struct intel_device_info adl_p_info = {
>  	.has_logical_ring_contexts = 1, \
>  	.has_logical_ring_elsq = 1, \
>  	.has_mslices = 1, \
> -	.has_reset_engine = 1, \
>  	.has_rps = 1, \
>  	.has_runtime_pm = 1, \
>  	.ppgtt_size = 48, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 599cb265946b8..62c9616ea6a9c 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -142,7 +142,6 @@ enum intel_ppgtt_type {
>  	func(has_64k_pages); \
>  	func(needs_compact_pt); \
>  	func(gpu_reset_clobbers_display); \
> -	func(has_reset_engine); \
>  	func(has_4tile); \
>  	func(has_flat_ccs); \
>  	func(has_global_mocs); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 07/12] drm/i915: Drop has_logical_ring_elsq from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:51PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with graphics version 11 or newer has this feature.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 3 +--
>  drivers/gpu/drm/i915/i915_pci.c          | 4 +---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 2 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 602e056edd314..f23e5c5cbf82b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1247,8 +1247,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_LOGICAL_RING_CONTEXTS(dev_priv) \
>  		(INTEL_INFO(dev_priv)->has_logical_ring_contexts)
> -#define HAS_LOGICAL_RING_ELSQ(dev_priv) \
> -		(INTEL_INFO(dev_priv)->has_logical_ring_elsq)
> +#define HAS_LOGICAL_RING_ELSQ(dev_priv) (GRAPHICS_VER(dev_priv) >= 11)
>  
>  #define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index b47f8b1ab9c6c..25aa8f5957f1e 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -804,8 +804,7 @@ static const struct intel_device_info cml_gt2_info = {
>  	.dbuf.size = 2048, \
>  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
>  	.display.has_dsc = 1, \
> -	.has_coherent_ggtt = false, \
> -	.has_logical_ring_elsq = 1
> +	.has_coherent_ggtt = false
>  
>  static const struct intel_device_info icl_info = {
>  	GEN11_FEATURES,
> @@ -989,7 +988,6 @@ static const struct intel_device_info adl_p_info = {
>  	.has_global_mocs = 1, \
>  	.has_llc = 1, \
>  	.has_logical_ring_contexts = 1, \
> -	.has_logical_ring_elsq = 1, \
>  	.has_mslices = 1, \
>  	.has_rps = 1, \
>  	.has_runtime_pm = 1, \
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 62c9616ea6a9c..7cf16b0315b54 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -151,7 +151,6 @@ enum intel_ppgtt_type {
>  	func(has_l3_dpf); \
>  	func(has_llc); \
>  	func(has_logical_ring_contexts); \
> -	func(has_logical_ring_elsq); \
>  	func(has_mslices); \
>  	func(has_pooled_eu); \
>  	func(has_pxp); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 08/12] drm/i915: Drop has_ddi from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:52PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with display version 9 or newer, haswell or broadwell
> supports it.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index f23e5c5cbf82b..a354815445238 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1299,7 +1299,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_DP20(dev_priv)	(IS_DG2(dev_priv))
>  
>  #define HAS_CDCLK_CRAWL(dev_priv)	 (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
> -#define HAS_DDI(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ddi)
> +#define HAS_DDI(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 || \
> +					  IS_HASWELL(dev_priv) || \
> +					  IS_BROADWELL(dev_priv))

Technically the order of broadwell and haswell should be reversed here
(if we're going from newest to oldest).  Aside from that,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
>  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
>  #define HAS_PSR_HW_TRACKING(dev_priv) \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 25aa8f5957f1e..96270c0ddf06c 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -533,7 +533,6 @@ static const struct intel_device_info vlv_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0) | BIT(VECS0), \
>  	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>  		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
> -	.display.has_ddi = 1, \
>  	.display.has_fpga_dbg = 1, \
>  	.display.has_dp_mst = 1, \
>  	HSW_PIPE_OFFSETS, \
> @@ -679,7 +678,6 @@ static const struct intel_device_info skl_gt4_info = {
>  		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP) | \
>  		BIT(TRANSCODER_DSI_A) | BIT(TRANSCODER_DSI_C), \
>  	.has_64bit_reloc = 1, \
> -	.display.has_ddi = 1, \
>  	.display.has_fpga_dbg = 1, \
>  	.display.fbc_mask = BIT(INTEL_FBC_A), \
>  	.display.has_hdcp = 1, \
> @@ -926,7 +924,6 @@ static const struct intel_device_info adl_s_info = {
>  	.dbuf.size = 4096,							\
>  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
>  		BIT(DBUF_S4),							\
> -	.display.has_ddi = 1,							\
>  	.display.has_dmc = 1,							\
>  	.display.has_dp_mst = 1,						\
>  	.display.has_dsc = 1,							\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 7cf16b0315b54..d809d44098c63 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -166,7 +166,6 @@ enum intel_ppgtt_type {
>  	func(cursor_needs_physical); \
>  	func(has_cdclk_crawl); \
>  	func(has_dmc); \
> -	func(has_ddi); \
>  	func(has_dp_mst); \
>  	func(has_dsc); \
>  	func(has_fpga_dbg); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 09/12] drm/i915: Drop has_dp_mst from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:53PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as the requirement to support it is the DDI support.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 2 +-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index a354815445238..6b8a4e6649d9b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1295,13 +1295,13 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  #define HAS_IPS(dev_priv)	(IS_HSW_ULT(dev_priv) || IS_BROADWELL(dev_priv))
>  
> -#define HAS_DP_MST(dev_priv)	(INTEL_INFO(dev_priv)->display.has_dp_mst)
>  #define HAS_DP20(dev_priv)	(IS_DG2(dev_priv))
>  
>  #define HAS_CDCLK_CRAWL(dev_priv)	 (INTEL_INFO(dev_priv)->display.has_cdclk_crawl)
>  #define HAS_DDI(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 || \
>  					  IS_HASWELL(dev_priv) || \
>  					  IS_BROADWELL(dev_priv))
> +#define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
>  #define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
>  #define HAS_PSR_HW_TRACKING(dev_priv) \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 96270c0ddf06c..d8b5e972109f9 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -534,7 +534,6 @@ static const struct intel_device_info vlv_info = {
>  	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) | \
>  		BIT(TRANSCODER_C) | BIT(TRANSCODER_EDP), \
>  	.display.has_fpga_dbg = 1, \
> -	.display.has_dp_mst = 1, \
>  	HSW_PIPE_OFFSETS, \
>  	.has_runtime_pm = 1
>  
> @@ -686,7 +685,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.has_runtime_pm = 1, \
>  	.display.has_dmc = 1, \
>  	.has_rps = true, \
> -	.display.has_dp_mst = 1, \
>  	.has_logical_ring_contexts = 1, \
>  	.dma_mask_size = 39, \
>  	.ppgtt_type = INTEL_PPGTT_FULL, \
> @@ -925,7 +923,6 @@ static const struct intel_device_info adl_s_info = {
>  	.dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2) | BIT(DBUF_S3) |		\
>  		BIT(DBUF_S4),							\
>  	.display.has_dmc = 1,							\
> -	.display.has_dp_mst = 1,						\
>  	.display.has_dsc = 1,							\
>  	.display.fbc_mask = BIT(INTEL_FBC_A),					\
>  	.display.has_fpga_dbg = 1,						\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index d809d44098c63..c4e85976d8948 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -166,7 +166,6 @@ enum intel_ppgtt_type {
>  	func(cursor_needs_physical); \
>  	func(has_cdclk_crawl); \
>  	func(has_dmc); \
> -	func(has_dp_mst); \
>  	func(has_dsc); \
>  	func(has_fpga_dbg); \
>  	func(has_gmch); \
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 10/12] drm/i915: Drop has_psr from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:54PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as all platforms with display version 9 or newer has this feature.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 2 +-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 1 insertion(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 6b8a4e6649d9b..d8fa1d09cc828 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1303,7 +1303,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  					  IS_BROADWELL(dev_priv))
>  #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
> -#define HAS_PSR(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_psr)
> +#define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
>  #define HAS_PSR_HW_TRACKING(dev_priv) \
>  	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
>  #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index d8b5e972109f9..098d47cc47b44 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -631,7 +631,6 @@ static const struct intel_device_info chv_info = {
>  	GEN9_DEFAULT_PAGE_SIZES, \
>  	.display.has_dmc = 1, \
>  	.display.has_hdcp = 1, \
> -	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
>  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
>  	.dbuf.slice_mask = BIT(DBUF_S1)
> @@ -680,7 +679,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.display.has_fpga_dbg = 1, \
>  	.display.fbc_mask = BIT(INTEL_FBC_A), \
>  	.display.has_hdcp = 1, \
> -	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
>  	.has_runtime_pm = 1, \
>  	.display.has_dmc = 1, \
> @@ -928,7 +926,6 @@ static const struct intel_device_info adl_s_info = {
>  	.display.has_fpga_dbg = 1,						\
>  	.display.has_hdcp = 1,							\
>  	.display.has_hotplug = 1,						\
> -	.display.has_psr = 1,							\
>  	.display.ver = 13,							\
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
>  	.pipe_offsets = {							\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index c4e85976d8948..5c17257f3f44b 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -174,7 +174,6 @@ enum intel_ppgtt_type {
>  	func(has_hti); \
>  	func(has_modular_fia); \
>  	func(has_overlay); \
> -	func(has_psr); \
>  	func(has_psr_hw_tracking); \
>  	func(overlay_needs_physical); \
>  	func(supports_tv);
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 11/12] drm/i915: Drop has_psr_hw_tracking from device info

[Matt Roper]

On Wed, May 04, 2022 at 12:07:55PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as this feature was only supported by display 9, display 11, tigerlake

The code below is correct, but the description here misses display
version 10 (i.e., GLK).

> and DG1, no newer platform will have this feature.
> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 6 ++++--
>  drivers/gpu/drm/i915/i915_pci.c          | 5 -----
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 4 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d8fa1d09cc828..d866287c663a2 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1304,8 +1304,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  #define HAS_DP_MST(dev_priv)		 (HAS_DDI(dev_priv))
>  #define HAS_FPGA_DBG_UNCLAIMED(dev_priv) (INTEL_INFO(dev_priv)->display.has_fpga_dbg)
>  #define HAS_PSR(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9)
> -#define HAS_PSR_HW_TRACKING(dev_priv) \
> -	(INTEL_INFO(dev_priv)->display.has_psr_hw_tracking)
> +#define HAS_PSR_HW_TRACKING(dev_priv)	 ((DISPLAY_VER(dev_priv) >= 9 && \
> +					   DISPLAY_VER(dev_priv) <= 11) || \

As noted before, we can simplify the range with IS_DISPLAY_VER.

Aside from the commit message tweak and the simplification here,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> +					  IS_TIGERLAKE(dev_priv) || \
> +					  IS_DG1(dev_priv))
>  #define HAS_PSR2_SEL_FETCH(dev_priv)	 (DISPLAY_VER(dev_priv) >= 12)
>  #define HAS_TRANSCODER(dev_priv, trans)	 ((INTEL_INFO(dev_priv)->display.cpu_transcoder_mask & BIT(trans)) != 0)
>  
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 098d47cc47b44..c6e99305e24d0 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -631,7 +631,6 @@ static const struct intel_device_info chv_info = {
>  	GEN9_DEFAULT_PAGE_SIZES, \
>  	.display.has_dmc = 1, \
>  	.display.has_hdcp = 1, \
> -	.display.has_psr_hw_tracking = 1, \
>  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
>  	.dbuf.slice_mask = BIT(DBUF_S1)
>  
> @@ -679,7 +678,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.display.has_fpga_dbg = 1, \
>  	.display.fbc_mask = BIT(INTEL_FBC_A), \
>  	.display.has_hdcp = 1, \
> -	.display.has_psr_hw_tracking = 1, \
>  	.has_runtime_pm = 1, \
>  	.display.has_dmc = 1, \
>  	.has_rps = true, \
> @@ -865,7 +863,6 @@ static const struct intel_device_info rkl_info = {
>  	.display.cpu_transcoder_mask = BIT(TRANSCODER_A) | BIT(TRANSCODER_B) |
>  		BIT(TRANSCODER_C),
>  	.display.has_hti = 1,
> -	.display.has_psr_hw_tracking = 0,
>  	.platform_engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0),
>  };
> @@ -897,7 +894,6 @@ static const struct intel_device_info adl_s_info = {
>  	PLATFORM(INTEL_ALDERLAKE_S),
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),
>  	.display.has_hti = 1,
> -	.display.has_psr_hw_tracking = 0,
>  	.platform_engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
>  	.dma_mask_size = 39,
> @@ -955,7 +951,6 @@ static const struct intel_device_info adl_p_info = {
>  			       BIT(TRANSCODER_DSI_0) | BIT(TRANSCODER_DSI_1),
>  	.display.has_cdclk_crawl = 1,
>  	.display.has_modular_fia = 1,
> -	.display.has_psr_hw_tracking = 0,
>  	.platform_engine_mask =
>  		BIT(RCS0) | BIT(BCS0) | BIT(VECS0) | BIT(VCS0) | BIT(VCS2),
>  	.ppgtt_size = 48,
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 5c17257f3f44b..bea9f92e2264c 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -174,7 +174,6 @@ enum intel_ppgtt_type {
>  	func(has_hti); \
>  	func(has_modular_fia); \
>  	func(has_overlay); \
> -	func(has_psr_hw_tracking); \
>  	func(overlay_needs_physical); \
>  	func(supports_tv);
>  
> -- 
> 2.36.0
> 

-- 
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Drop has_rc6p from device info

[Ville Syrjälä]

On Wed, May 04, 2022 at 12:07:49PM -0700, José Roberto de Souza wrote:
> No need to have this parameter in intel_device_info struct
> as it was only supported in graphics version 6 and 7 not including
> haswell.

nor vlv

> 
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 4 +++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 3 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index d29dca83185ac..602e056edd314 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1310,7 +1310,9 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>  
>  /* ilk does support rc6, but we do not implement [power] contexts */
>  #define HAS_RC6(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6)
> -#define HAS_RC6p(dev_priv)		 (INTEL_INFO(dev_priv)->has_rc6p)
> +#define HAS_RC6p(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6 && \
> +					  GRAPHICS_VER(dev_priv) <= 7 && \
> +					  !IS_HASWELL(dev_priv))
>  #define HAS_RC6pp(dev_priv)		 (false) /* HW was never validated */
>  
>  #define HAS_RPS(dev_priv)	(INTEL_INFO(dev_priv)->has_rps)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 90584c462f225..516f28d4db611 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -405,7 +405,6 @@ static const struct intel_device_info ilk_m_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6p = 1, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
>  	.ppgtt_type = INTEL_PPGTT_ALIASING, \
> @@ -455,7 +454,6 @@ static const struct intel_device_info snb_m_gt2_info = {
>  	.platform_engine_mask = BIT(RCS0) | BIT(VCS0) | BIT(BCS0), \
>  	.has_coherent_ggtt = true, \
>  	.has_llc = 1, \
> -	.has_rc6p = 1, \
>  	.has_reset_engine = true, \
>  	.has_rps = true, \
>  	.dma_mask_size = 40, \
> @@ -540,7 +538,6 @@ static const struct intel_device_info vlv_info = {
>  	.display.has_ddi = 1, \
>  	.display.has_fpga_dbg = 1, \
>  	.display.has_dp_mst = 1, \
> -	.has_rc6p = 0 /* RC6p removed-by HSW */, \
>  	HSW_PIPE_OFFSETS, \
>  	.has_runtime_pm = 1
>  
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index b3244170c4638..599cb265946b8 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -156,7 +156,6 @@ enum intel_ppgtt_type {
>  	func(has_mslices); \
>  	func(has_pooled_eu); \
>  	func(has_pxp); \
> -	func(has_rc6p); \
>  	func(has_rps); \
>  	func(has_runtime_pm); \
>  	func(has_snoop); \
> -- 
> 2.36.0

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Ville Syrjälä]

On Wed, May 04, 2022 at 12:07:45PM -0700, José Roberto de Souza wrote:
> This feature is supported from display 9 to display 12 and was
> incorrectly being applied to DG2 and Alderlake-P.

They just renamed the register to ARB_HP_CTL.

> 
> While at is also taking the oportunity to drop it from
> intel_device_info struct as a display check is more simple
> and less prone to be left enabled in future platforms.
> 
> BSpec: 50039
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 2 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2dddc27a1b0ed..695b35cd6b5e4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   */
>  #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
>  
> -#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
> +#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
> +					  DISPLAY_VER(dev_priv) <= 12)
>  
>  #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
>  #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 498708b33924f..c4f9c805cffd1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
>  	.display.has_dmc = 1, \
>  	.has_gt_uc = 1, \
>  	.display.has_hdcp = 1, \
> -	.display.has_ipc = 1, \
>  	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
>  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
> @@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.has_reset_engine = 1, \
>  	.has_snoop = true, \
>  	.has_coherent_ggtt = false, \
> -	.display.has_ipc = 1, \
>  	HSW_PIPE_OFFSETS, \
>  	IVB_CURSOR_OFFSETS, \
>  	IVB_COLORS, \
> @@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
>  	.display.has_fpga_dbg = 1,						\
>  	.display.has_hdcp = 1,							\
>  	.display.has_hotplug = 1,						\
> -	.display.has_ipc = 1,							\
>  	.display.has_psr = 1,							\
>  	.display.ver = 13,							\
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index e7d2cf7d65c85..c9660b4282d9e 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -180,7 +180,6 @@ enum intel_ppgtt_type {
>  	func(has_hdcp); \
>  	func(has_hotplug); \
>  	func(has_hti); \
> -	func(has_ipc); \
>  	func(has_modular_fia); \
>  	func(has_overlay); \
>  	func(has_psr); \
> -- 
> 2.36.0

-- 
Ville Syrjälä
Intel

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [01/12] drm/i915: Drop IPC from display 13 and newer

[Patchwork]

== Series Details ==

Series: series starting with [01/12] drm/i915: Drop IPC from display 13 and newer
URL   : https://patchwork.freedesktop.org/series/103562/
State : warning

== Summary ==

Error: dim checkpatch failed
fe464ec005a5 drm/i915: Drop IPC from display 13 and newer
-:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#29: FILE: drivers/gpu/drm/i915/i915_drv.h:1347:
+#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
+					  DISPLAY_VER(dev_priv) <= 12)

total: 0 errors, 0 warnings, 1 checks, 37 lines checked
bf709b66d5eb drm/i915/display: Disable DSB for DG2 and Alderlake-P
d6397bf6d28a drm/i915: Drop has_gt_uc from device info
41e40333f07a drm/i915: Drop has_rc6 from device info
6648e12a8320 drm/i915: Drop has_rc6p from device info
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:1313:
+#define HAS_RC6p(dev_priv)		 (GRAPHICS_VER(dev_priv) >= 6 && \
+					  GRAPHICS_VER(dev_priv) <= 7 && \
+					  !IS_HASWELL(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 38 lines checked
a491192e6234 drm/i915: Drop has_reset_engine from device info
7a051e739286 drm/i915: Drop has_logical_ring_elsq from device info
707c49a2bf72 drm/i915: Drop has_ddi from device info
-:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#25: FILE: drivers/gpu/drm/i915/i915_drv.h:1302:
+#define HAS_DDI(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 || \
+					  IS_HASWELL(dev_priv) || \
+					  IS_BROADWELL(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 38 lines checked
0ada70a2b0be drm/i915: Drop has_dp_mst from device info
0f2bb0d4f67d drm/i915: Drop has_psr from device info
85050c08ff9a drm/i915: Drop has_psr_hw_tracking from device info
-:26: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#26: FILE: drivers/gpu/drm/i915/i915_drv.h:1307:
+#define HAS_PSR_HW_TRACKING(dev_priv)	 ((DISPLAY_VER(dev_priv) >= 9 && \
+					   DISPLAY_VER(dev_priv) <= 11) || \
+					  IS_TIGERLAKE(dev_priv) || \
+					  IS_DG1(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 54 lines checked
37af30910ec8 drm/i915: Drop supports_tv from device info
-:23: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dev_priv' - possible side-effects?
#23: FILE: drivers/gpu/drm/i915/i915_drv.h:1289:
+#define SUPPORTS_TV(dev_priv)		(IS_I915GM(dev_priv) || IS_I945GM(dev_priv) || \
+					 IS_I965GM(dev_priv) || IS_GM45(dev_priv))

total: 0 errors, 0 warnings, 1 checks, 46 lines checked

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [01/12] drm/i915: Drop IPC from display 13 and newer

[Patchwork]

== Series Details ==

Series: series starting with [01/12] drm/i915: Drop IPC from display 13 and newer
URL   : https://patchwork.freedesktop.org/series/103562/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [01/12] drm/i915: Drop IPC from display 13 and newer

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 6639 bytes --]

== Series Details ==

Series: series starting with [01/12] drm/i915: Drop IPC from display 13 and newer
URL   : https://patchwork.freedesktop.org/series/103562/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_11606 -> Patchwork_103562v1
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/index.html

Participating hosts (42 -> 40)
------------------------------

  Additional (1): bat-adlm-1 
  Missing    (3): fi-bsw-cyan bat-dg2-9 bat-dg1-5 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_103562v1:

### IGT changes ###

#### Suppressed ####

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@module-reload:
    - {bat-adlm-1}:       NOTRUN -> [FAIL][1]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/bat-adlm-1/igt@i915_pm_rpm@module-reload.html

  
Known issues
------------

  Here are the changes found in Patchwork_103562v1 that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-4770:        [PASS][2] -> [INCOMPLETE][3] ([i915#4785])
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-hsw-4770/igt@i915_selftest@live@hangcheck.html

  * igt@kms_chamelium@common-hpd-after-suspend:
    - fi-pnv-d510:        NOTRUN -> [SKIP][4] ([fdo#109271])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-pnv-d510/igt@kms_chamelium@common-hpd-after-suspend.html
    - fi-hsw-g3258:       NOTRUN -> [SKIP][5] ([fdo#109271] / [fdo#111827])
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-hsw-g3258/igt@kms_chamelium@common-hpd-after-suspend.html

  * igt@runner@aborted:
    - fi-hsw-4770:        NOTRUN -> [FAIL][6] ([fdo#109271] / [i915#4312] / [i915#5594])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-hsw-4770/igt@runner@aborted.html

  
#### Possible fixes ####

  * igt@core_hotunplug@unbind-rebind:
    - {bat-rpls-2}:       [DMESG-WARN][7] ([i915#4391]) -> [PASS][8]
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/bat-rpls-2/igt@core_hotunplug@unbind-rebind.html
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/bat-rpls-2/igt@core_hotunplug@unbind-rebind.html

  * igt@i915_selftest@live@client:
    - {bat-dg2-8}:        [DMESG-FAIL][9] ([i915#5879]) -> [PASS][10]
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/bat-dg2-8/igt@i915_selftest@live@client.html
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/bat-dg2-8/igt@i915_selftest@live@client.html

  * igt@i915_selftest@live@gtt:
    - fi-bdw-5557u:       [DMESG-FAIL][11] ([i915#3674]) -> [PASS][12]
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/fi-bdw-5557u/igt@i915_selftest@live@gtt.html
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-bdw-5557u/igt@i915_selftest@live@gtt.html

  * igt@i915_selftest@live@hangcheck:
    - fi-hsw-g3258:       [INCOMPLETE][13] ([i915#3303] / [i915#4785]) -> [PASS][14]
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-hsw-g3258/igt@i915_selftest@live@hangcheck.html

  * igt@i915_selftest@live@requests:
    - fi-pnv-d510:        [DMESG-FAIL][15] ([i915#4528]) -> [PASS][16]
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/fi-pnv-d510/igt@i915_selftest@live@requests.html
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/fi-pnv-d510/igt@i915_selftest@live@requests.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3303]: https://gitlab.freedesktop.org/drm/intel/issues/3303
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3576]: https://gitlab.freedesktop.org/drm/intel/issues/3576
  [i915#3674]: https://gitlab.freedesktop.org/drm/intel/issues/3674
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4391]: https://gitlab.freedesktop.org/drm/intel/issues/4391
  [i915#4528]: https://gitlab.freedesktop.org/drm/intel/issues/4528
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4785]: https://gitlab.freedesktop.org/drm/intel/issues/4785
  [i915#5594]: https://gitlab.freedesktop.org/drm/intel/issues/5594
  [i915#5879]: https://gitlab.freedesktop.org/drm/intel/issues/5879


Build changes
-------------

  * Linux: CI_DRM_11606 -> Patchwork_103562v1

  CI-20190529: 20190529
  CI_DRM_11606: 8c54eb62d24a1240ce9ebb2adf65dc80ff746c4f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6465: f6bb4399881a806fbff75ce3df89b60286d55917 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_103562v1: 8c54eb62d24a1240ce9ebb2adf65dc80ff746c4f @ git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

460f97383b52 drm/i915: Drop supports_tv from device info
cdec2fa1d8d5 drm/i915: Drop has_psr_hw_tracking from device info
855fac2f1b70 drm/i915: Drop has_psr from device info
c9364f98b188 drm/i915: Drop has_dp_mst from device info
dbcecf3872f6 drm/i915: Drop has_ddi from device info
7e515da26ec5 drm/i915: Drop has_logical_ring_elsq from device info
d57ed9f939fb drm/i915: Drop has_reset_engine from device info
7eb6e3dd2065 drm/i915: Drop has_rc6p from device info
7380cabbf73a drm/i915: Drop has_rc6 from device info
b3e61884cbb4 drm/i915: Drop has_gt_uc from device info
c2739dbe0f62 drm/i915/display: Disable DSB for DG2 and Alderlake-P
82feb0caa304 drm/i915: Drop IPC from display 13 and newer

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/index.html

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[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [01/12] drm/i915: Drop IPC from display 13 and newer

[Patchwork]

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== Series Details ==

Series: series starting with [01/12] drm/i915: Drop IPC from display 13 and newer
URL   : https://patchwork.freedesktop.org/series/103562/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_11606_full -> Patchwork_103562v1_full
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with Patchwork_103562v1_full absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_103562v1_full, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (13 -> 12)
------------------------------

  Missing    (1): shard-dg1 

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in Patchwork_103562v1_full:

### IGT changes ###

#### Possible regressions ####

  * igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt:
    - shard-tglb:         [PASS][1] -> [INCOMPLETE][2]
   [1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-tglb6/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html
   [2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-tglb8/igt@kms_frontbuffer_tracking@psr-farfromfence-mmap-gtt.html

  
Known issues
------------

  Here are the changes found in Patchwork_103562v1_full that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@gem_ctx_persistence@hang:
    - shard-skl:          NOTRUN -> [SKIP][3] ([fdo#109271]) +6 similar issues
   [3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl1/igt@gem_ctx_persistence@hang.html

  * igt@gem_exec_fair@basic-none-vip@rcs0:
    - shard-kbl:          [PASS][4] -> [FAIL][5] ([i915#2842])
   [4]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl1/igt@gem_exec_fair@basic-none-vip@rcs0.html
   [5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@gem_exec_fair@basic-none-vip@rcs0.html

  * igt@gem_exec_fair@basic-pace-share@rcs0:
    - shard-tglb:         [PASS][6] -> [FAIL][7] ([i915#2842])
   [6]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-tglb3/igt@gem_exec_fair@basic-pace-share@rcs0.html
   [7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-tglb7/igt@gem_exec_fair@basic-pace-share@rcs0.html

  * igt@gem_exec_flush@basic-uc-prw-default:
    - shard-snb:          [PASS][8] -> [SKIP][9] ([fdo#109271]) +1 similar issue
   [8]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-snb5/igt@gem_exec_flush@basic-uc-prw-default.html
   [9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-snb6/igt@gem_exec_flush@basic-uc-prw-default.html

  * igt@gem_lmem_swapping@heavy-verify-multi:
    - shard-kbl:          NOTRUN -> [SKIP][10] ([fdo#109271] / [i915#4613])
   [10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@gem_lmem_swapping@heavy-verify-multi.html

  * igt@gem_lmem_swapping@verify-random:
    - shard-apl:          NOTRUN -> [SKIP][11] ([fdo#109271] / [i915#4613])
   [11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl3/igt@gem_lmem_swapping@verify-random.html

  * igt@gen9_exec_parse@allowed-single:
    - shard-glk:          [PASS][12] -> [DMESG-WARN][13] ([i915#5566] / [i915#716])
   [12]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk2/igt@gen9_exec_parse@allowed-single.html
   [13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk1/igt@gen9_exec_parse@allowed-single.html
    - shard-apl:          [PASS][14] -> [DMESG-WARN][15] ([i915#5566] / [i915#716])
   [14]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-apl2/igt@gen9_exec_parse@allowed-single.html
   [15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl7/igt@gen9_exec_parse@allowed-single.html

  * igt@i915_selftest@live@hangcheck:
    - shard-snb:          [PASS][16] -> [INCOMPLETE][17] ([i915#3921])
   [16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-snb4/igt@i915_selftest@live@hangcheck.html
   [17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-snb4/igt@i915_selftest@live@hangcheck.html

  * igt@kms_big_fb@linear-16bpp-rotate-90:
    - shard-apl:          NOTRUN -> [SKIP][18] ([fdo#109271]) +49 similar issues
   [18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl3/igt@kms_big_fb@linear-16bpp-rotate-90.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
    - shard-iclb:         NOTRUN -> [SKIP][19] ([fdo#110723])
   [19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html

  * igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs:
    - shard-skl:          NOTRUN -> [SKIP][20] ([fdo#109271] / [i915#3886])
   [20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl7/igt@kms_ccs@pipe-a-ccs-on-another-bo-y_tiled_gen12_mc_ccs.html

  * igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc:
    - shard-apl:          NOTRUN -> [SKIP][21] ([fdo#109271] / [i915#3886]) +1 similar issue
   [21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl3/igt@kms_ccs@pipe-c-ccs-on-another-bo-y_tiled_gen12_rc_ccs_cc.html

  * igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs:
    - shard-kbl:          NOTRUN -> [SKIP][22] ([fdo#109271] / [i915#3886]) +2 similar issues
   [22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@kms_ccs@pipe-c-crc-primary-basic-y_tiled_gen12_mc_ccs.html

  * igt@kms_chamelium@dp-hpd-fast:
    - shard-skl:          NOTRUN -> [SKIP][23] ([fdo#109271] / [fdo#111827])
   [23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl1/igt@kms_chamelium@dp-hpd-fast.html

  * igt@kms_chamelium@hdmi-edid-change-during-suspend:
    - shard-apl:          NOTRUN -> [SKIP][24] ([fdo#109271] / [fdo#111827]) +5 similar issues
   [24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl4/igt@kms_chamelium@hdmi-edid-change-during-suspend.html

  * igt@kms_color_chamelium@pipe-a-ctm-max:
    - shard-iclb:         NOTRUN -> [SKIP][25] ([fdo#109284] / [fdo#111827])
   [25]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_color_chamelium@pipe-a-ctm-max.html

  * igt@kms_color_chamelium@pipe-c-ctm-limited-range:
    - shard-kbl:          NOTRUN -> [SKIP][26] ([fdo#109271] / [fdo#111827]) +3 similar issues
   [26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@kms_color_chamelium@pipe-c-ctm-limited-range.html

  * igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen:
    - shard-iclb:         NOTRUN -> [SKIP][27] ([fdo#109278]) +1 similar issue
   [27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_cursor_crc@pipe-a-cursor-32x32-onscreen.html

  * igt@kms_cursor_crc@pipe-a-cursor-suspend:
    - shard-kbl:          [PASS][28] -> [DMESG-WARN][29] ([i915#180]) +1 similar issue
   [28]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl3/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
   [29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@kms_cursor_crc@pipe-a-cursor-suspend.html

  * igt@kms_cursor_crc@pipe-d-cursor-suspend:
    - shard-kbl:          NOTRUN -> [SKIP][30] ([fdo#109271]) +66 similar issues
   [30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl3/igt@kms_cursor_crc@pipe-d-cursor-suspend.html

  * igt@kms_cursor_edge_walk@pipe-b-128x128-left-edge:
    - shard-skl:          [PASS][31] -> [DMESG-WARN][32] ([i915#1982])
   [31]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl10/igt@kms_cursor_edge_walk@pipe-b-128x128-left-edge.html
   [32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl6/igt@kms_cursor_edge_walk@pipe-b-128x128-left-edge.html

  * igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size:
    - shard-iclb:         [PASS][33] -> [FAIL][34] ([i915#5072])
   [33]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb4/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html
   [34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb7/igt@kms_cursor_legacy@cursor-vs-flip-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@flip-vs-cursor-varying-size:
    - shard-iclb:         [PASS][35] -> [FAIL][36] ([i915#2346])
   [35]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb3/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html
   [36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb7/igt@kms_cursor_legacy@flip-vs-cursor-varying-size.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1:
    - shard-glk:          [PASS][37] -> [FAIL][38] ([i915#2122])
   [37]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html
   [38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk5/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-hdmi-a1.html

  * igt@kms_flip@flip-vs-suspend-interruptible@c-dp1:
    - shard-apl:          [PASS][39] -> [DMESG-WARN][40] ([i915#180]) +2 similar issues
   [39]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-apl7/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html
   [40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@c-dp1.html

  * igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
    - shard-skl:          [PASS][41] -> [FAIL][42] ([i915#2122])
   [41]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl1/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
   [42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl2/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling:
    - shard-glk:          [PASS][43] -> [FAIL][44] ([i915#4911])
   [43]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk4/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html
   [44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk8/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-32bpp-ytileccs-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling:
    - shard-iclb:         [PASS][45] -> [SKIP][46] ([i915#3701])
   [45]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb1/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html
   [46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb2/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-rte:
    - shard-iclb:         NOTRUN -> [SKIP][47] ([fdo#109280])
   [47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_frontbuffer_tracking@fbcpsr-2p-rte.html

  * igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min:
    - shard-skl:          [PASS][48] -> [FAIL][49] ([fdo#108145] / [i915#265])
   [48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html
   [49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl4/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-min.html

  * igt@kms_plane_lowres@pipe-a-tiling-y:
    - shard-iclb:         NOTRUN -> [SKIP][50] ([i915#3536])
   [50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_plane_lowres@pipe-a-tiling-y.html

  * igt@kms_plane_scaling@upscale-with-rotation-factor-0-25@pipe-b-edp-1-upscale-with-rotation:
    - shard-iclb:         NOTRUN -> [SKIP][51] ([i915#5176]) +2 similar issues
   [51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_plane_scaling@upscale-with-rotation-factor-0-25@pipe-b-edp-1-upscale-with-rotation.html

  * igt@kms_psr@psr2_no_drrs:
    - shard-iclb:         [PASS][52] -> [SKIP][53] ([fdo#109441]) +2 similar issues
   [52]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
   [53]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@kms_psr@psr2_no_drrs.html

  * igt@prime_nv_test@nv_i915_sharing:
    - shard-iclb:         NOTRUN -> [SKIP][54] ([fdo#109291])
   [54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@prime_nv_test@nv_i915_sharing.html

  * igt@syncobj_timeline@transfer-timeline-point:
    - shard-skl:          NOTRUN -> [DMESG-FAIL][55] ([i915#5098])
   [55]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl1/igt@syncobj_timeline@transfer-timeline-point.html

  * igt@sysfs_clients@pidname:
    - shard-apl:          NOTRUN -> [SKIP][56] ([fdo#109271] / [i915#2994]) +1 similar issue
   [56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl3/igt@sysfs_clients@pidname.html

  * igt@sysfs_clients@recycle-many:
    - shard-kbl:          NOTRUN -> [SKIP][57] ([fdo#109271] / [i915#2994])
   [57]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@sysfs_clients@recycle-many.html

  
#### Possible fixes ####

  * igt@gem_ctx_persistence@many-contexts:
    - {shard-rkl}:        [FAIL][58] ([i915#2410]) -> [PASS][59]
   [58]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-rkl-5/igt@gem_ctx_persistence@many-contexts.html
   [59]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-rkl-5/igt@gem_ctx_persistence@many-contexts.html

  * igt@gem_exec_fair@basic-flow@rcs0:
    - shard-tglb:         [FAIL][60] ([i915#2842]) -> [PASS][61]
   [60]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-tglb3/igt@gem_exec_fair@basic-flow@rcs0.html
   [61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-tglb6/igt@gem_exec_fair@basic-flow@rcs0.html

  * igt@gem_exec_fair@basic-none@vcs0:
    - shard-glk:          [FAIL][62] ([i915#2842]) -> [PASS][63]
   [62]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk2/igt@gem_exec_fair@basic-none@vcs0.html
   [63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk7/igt@gem_exec_fair@basic-none@vcs0.html

  * igt@gem_exec_fence@submit3@vecs0:
    - shard-skl:          [DMESG-WARN][64] ([i915#1982]) -> [PASS][65] +1 similar issue
   [64]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl10/igt@gem_exec_fence@submit3@vecs0.html
   [65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl6/igt@gem_exec_fence@submit3@vecs0.html

  * igt@gem_exec_flush@basic-uc-rw-default:
    - shard-snb:          [SKIP][66] ([fdo#109271]) -> [PASS][67] +1 similar issue
   [66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-snb6/igt@gem_exec_flush@basic-uc-rw-default.html
   [67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-snb2/igt@gem_exec_flush@basic-uc-rw-default.html

  * igt@gem_exec_suspend@basic-s3@smem:
    - shard-kbl:          [DMESG-WARN][68] ([i915#180]) -> [PASS][69] +1 similar issue
   [68]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl7/igt@gem_exec_suspend@basic-s3@smem.html
   [69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@gem_exec_suspend@basic-s3@smem.html

  * igt@i915_pm_dc@dc6-dpms:
    - shard-iclb:         [FAIL][70] ([i915#454]) -> [PASS][71]
   [70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb3/igt@i915_pm_dc@dc6-dpms.html
   [71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb6/igt@i915_pm_dc@dc6-dpms.html

  * igt@i915_pm_rps@waitboost:
    - {shard-rkl}:        [FAIL][72] ([i915#4016]) -> [PASS][73]
   [72]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-rkl-2/igt@i915_pm_rps@waitboost.html
   [73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-rkl-4/igt@i915_pm_rps@waitboost.html

  * igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1:
    - shard-skl:          [FAIL][74] ([i915#2122]) -> [PASS][75] +2 similar issues
   [74]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl3/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html
   [75]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl10/igt@kms_flip@wf_vblank-ts-check-interruptible@c-edp1.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff:
    - shard-glk:          [DMESG-FAIL][76] ([i915#118]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk5/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html
   [77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk4/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbc-suspend:
    - shard-apl:          [DMESG-WARN][78] ([i915#180]) -> [PASS][79] +2 similar issues
   [78]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html
   [79]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-apl3/igt@kms_frontbuffer_tracking@fbc-suspend.html

  * igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a:
    - shard-skl:          [FAIL][80] ([i915#1188]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl9/igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a.html
   [81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl1/igt@kms_hdr@bpc-switch-suspend@bpc-switch-suspend-edp-1-pipe-a.html

  * igt@kms_plane_alpha_blend@pipe-c-coverage-7efc:
    - shard-skl:          [FAIL][82] ([fdo#108145] / [i915#265]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-skl10/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html
   [83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-skl6/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html

  * igt@kms_psr@psr2_cursor_mmap_cpu:
    - shard-iclb:         [SKIP][84] ([fdo#109441]) -> [PASS][85] +1 similar issue
   [84]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb1/igt@kms_psr@psr2_cursor_mmap_cpu.html
   [85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb2/igt@kms_psr@psr2_cursor_mmap_cpu.html

  
#### Warnings ####

  * igt@gem_exec_balancer@parallel-bb-first:
    - shard-iclb:         [DMESG-WARN][86] ([i915#5614]) -> [SKIP][87] ([i915#4525])
   [86]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb2/igt@gem_exec_balancer@parallel-bb-first.html
   [87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb5/igt@gem_exec_balancer@parallel-bb-first.html

  * igt@gem_exec_balancer@parallel-contexts:
    - shard-iclb:         [SKIP][88] ([i915#4525]) -> [DMESG-WARN][89] ([i915#5614])
   [88]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-iclb5/igt@gem_exec_balancer@parallel-contexts.html
   [89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-iclb2/igt@gem_exec_balancer@parallel-contexts.html

  * igt@kms_draw_crc@draw-method-rgb565-render-xtiled:
    - shard-glk:          [FAIL][90] ([i915#5160]) -> [DMESG-FAIL][91] ([i915#118])
   [90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-glk5/igt@kms_draw_crc@draw-method-rgb565-render-xtiled.html
   [91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-glk4/igt@kms_draw_crc@draw-method-rgb565-render-xtiled.html

  * igt@runner@aborted:
    - shard-kbl:          ([FAIL][92], [FAIL][93], [FAIL][94], [FAIL][95], [FAIL][96], [FAIL][97], [FAIL][98], [FAIL][99], [FAIL][100], [FAIL][101], [FAIL][102], [FAIL][103], [FAIL][104]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][105], [FAIL][106], [FAIL][107], [FAIL][108], [FAIL][109], [FAIL][110], [FAIL][111], [FAIL][112], [FAIL][113], [FAIL][114], [FAIL][115], [FAIL][116], [FAIL][117]) ([i915#3002] / [i915#4312] / [i915#5257])
   [92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl6/igt@runner@aborted.html
   [93]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl6/igt@runner@aborted.html
   [94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl7/igt@runner@aborted.html
   [95]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl7/igt@runner@aborted.html
   [96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl4/igt@runner@aborted.html
   [97]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl1/igt@runner@aborted.html
   [98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl6/igt@runner@aborted.html
   [99]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl1/igt@runner@aborted.html
   [100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl1/igt@runner@aborted.html
   [101]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl3/igt@runner@aborted.html
   [102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl3/igt@runner@aborted.html
   [103]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl1/igt@runner@aborted.html
   [104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11606/shard-kbl4/igt@runner@aborted.html
   [105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl3/igt@runner@aborted.html
   [106]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl1/igt@runner@aborted.html
   [107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@runner@aborted.html
   [108]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl6/igt@runner@aborted.html
   [109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl6/igt@runner@aborted.html
   [110]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl4/igt@runner@aborted.html
   [111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl6/igt@runner@aborted.html
   [112]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@runner@aborted.html
   [113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@runner@aborted.html
   [114]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@runner@aborted.html
   [115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl6/igt@runner@aborted.html
   [116]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl4/igt@runner@aborted.html
   [117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/shard-kbl7/igt@runner@aborted.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
  [fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
  [fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
  [fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
  [fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
  [fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
  [fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
  [fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
  [fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
  [fdo#109307]: https://bugs.freedesktop.org/show_bug.cgi?id=109307
  [fdo#109312]: https://bugs.freedesktop.org/show_bug.cgi?id=109312
  [fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
  [fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
  [fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
  [fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
  [fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
  [fdo#111314]: https://bugs.freedesktop.org/show_bug.cgi?id=111314
  [fdo#111614]: https://bugs.freedesktop.org/show_bug.cgi?id=111614
  [fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
  [fdo#111644]: https://bugs.freedesktop.org/show_bug.cgi?id=111644
  [fdo#111656]: https://bugs.freedesktop.org/show_bug.cgi?id=111656
  [fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
  [fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
  [fdo#112022]: https://bugs.freedesktop.org/show_bug.cgi?id=112022
  [i915#1063]: https://gitlab.freedesktop.org/drm/intel/issues/1063
  [i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
  [i915#1149]: https://gitlab.freedesktop.org/drm/intel/issues/1149
  [i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
  [i915#118]: https://gitlab.freedesktop.org/drm/intel/issues/118
  [i915#1188]: https://gitlab.freedesktop.org/drm/intel/issues/1188
  [i915#1397]: https://gitlab.freedesktop.org/drm/intel/issues/1397
  [i915#1722]: https://gitlab.freedesktop.org/drm/intel/issues/1722
  [i915#1755]: https://gitlab.freedesktop.org/drm/intel/issues/1755
  [i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
  [i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
  [i915#1825]: https://gitlab.freedesktop.org/drm/intel/issues/1825
  [i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
  [i915#1845]: https://gitlab.freedesktop.org/drm/intel/issues/1845
  [i915#1849]: https://gitlab.freedesktop.org/drm/intel/issues/1849
  [i915#1902]: https://gitlab.freedesktop.org/drm/intel/issues/1902
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
  [i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
  [i915#2410]: https://gitlab.freedesktop.org/drm/intel/issues/2410
  [i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
  [i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
  [i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
  [i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
  [i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
  [i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
  [i915#2681]: https://gitlab.freedesktop.org/drm/intel/issues/2681
  [i915#2705]: https://gitlab.freedesktop.org/drm/intel/issues/2705
  [i915#280]: https://gitlab.freedesktop.org/drm/intel/issues/280
  [i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
  [i915#2849]: https://gitlab.freedesktop.org/drm/intel/issues/2849
  [i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
  [i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
  [i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
  [i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
  [i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
  [i915#3116]: https://gitlab.freedesktop.org/drm/intel/issues/3116
  [i915#3282]: https://gitlab.freedesktop.org/drm/intel/issues/3282
  [i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
  [i915#3299]: https://gitlab.freedesktop.org/drm/intel/issues/3299
  [i915#3319]: https://gitlab.freedesktop.org/drm/intel/issues/3319
  [i915#3323]: https://gitlab.freedesktop.org/drm/intel/issues/3323
  [i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
  [i915#3528]: https://gitlab.freedesktop.org/drm/intel/issues/3528
  [i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#3558]: https://gitlab.freedesktop.org/drm/intel/issues/3558
  [i915#3591]: https://gitlab.freedesktop.org/drm/intel/issues/3591
  [i915#3637]: https://gitlab.freedesktop.org/drm/intel/issues/3637
  [i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
  [i915#3701]: https://gitlab.freedesktop.org/drm/intel/issues/3701
  [i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
  [i915#3742]: https://gitlab.freedesktop.org/drm/intel/issues/3742
  [i915#3804]: https://gitlab.freedesktop.org/drm/intel/issues/3804
  [i915#3828]: https://gitlab.freedesktop.org/drm/intel/issues/3828
  [i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
  [i915#3921]: https://gitlab.freedesktop.org/drm/intel/issues/3921
  [i915#4016]: https://gitlab.freedesktop.org/drm/intel/issues/4016
  [i915#4070]: https://gitlab.freedesktop.org/drm/intel/issues/4070
  [i915#4098]: https://gitlab.freedesktop.org/drm/intel/issues/4098
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
  [i915#4278]: https://gitlab.freedesktop.org/drm/intel/issues/4278
  [i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
  [i915#4369]: https://gitlab.freedesktop.org/drm/intel/issues/4369
  [i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
  [i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
  [i915#454]: https://gitlab.freedesktop.org/drm/intel/issues/454
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#4911]: https://gitlab.freedesktop.org/drm/intel/issues/4911
  [i915#4941]: https://gitlab.freedesktop.org/drm/intel/issues/4941
  [i915#4991]: https://gitlab.freedesktop.org/drm/intel/issues/4991
  [i915#5072]: https://gitlab.freedesktop.org/drm/intel/issues/5072
  [i915#5076]: https://gitlab.freedesktop.org/drm/intel/issues/5076
  [i915#5098]: https://gitlab.freedesktop.org/drm/intel/issues/5098
  [i915#5160]: https://gitlab.freedesktop.org/drm/intel/issues/5160
  [i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
  [i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
  [i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
  [i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
  [i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
  [i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
  [i915#5289]: https://gitlab.freedesktop.org/drm/intel/issues/5289
  [i915#5325]: https://gitlab.freedesktop.org/drm/intel/issues/5325
  [i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
  [i915#5439]: https://gitlab.freedesktop.org/drm/intel/issues/5439
  [i915#5461]: https://gitlab.freedesktop.org/drm/intel/issues/5461
  [i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
  [i915#5614]: https://gitlab.freedesktop.org/drm/intel/issues/5614
  [i915#5691]: https://gitlab.freedesktop.org/drm/intel/issues/5691
  [i915#5723]: https://gitlab.freedesktop.org/drm/intel/issues/5723
  [i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
  [i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716


Build changes
-------------

  * Linux: CI_DRM_11606 -> Patchwork_103562v1

  CI-20190529: 20190529
  CI_DRM_11606: 8c54eb62d24a1240ce9ebb2adf65dc80ff746c4f @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_6465: f6bb4399881a806fbff75ce3df89b60286d55917 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  Patchwork_103562v1: 8c54eb62d24a1240ce9ebb2adf65dc80ff746c4f @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103562v1/index.html

[-- Attachment #2: Type: text/html, Size: 31467 bytes --]

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Jani Nikula]

On Wed, 04 May 2022, José Roberto de Souza <jose.souza@intel.com> wrote:
> This feature is supported from display 9 to display 12 and was
> incorrectly being applied to DG2 and Alderlake-P.
>
> While at is also taking the oportunity to drop it from
> intel_device_info struct as a display check is more simple
> and less prone to be left enabled in future platforms.

Lacking a cover letter, I'll just reply here for the entire series.

We don't really have any rules for when to add a flag and when not. It's
basically been up to whoever has added each HAS_* macro to decide how to
implement it.

Indicators for when to add a flag would be:

- The are no clear cut boundaries for platform versions that have or
  don't have a feature.

- There may be a need to disable a feature for single platforms during
  development or enabling or debugging.

- It would be useful to have the flag show up in dmesg, debugfs or gpu
  error (see intel_device_info_print_static() calls).

- The platform comparison would be complicated.

Indicators for when to add a platform check:

- It's a clear cut platform version check, not a complex boolean
  condition.

- It's obvious for anyone debugging the platform whether the feature is
  there or not based on dmesg, without a dedicated logged flag.

- The feature only exists on legacy platforms and is not coming back,
  i.e. the platform check is pretty much fixed.

With that in mind, I think perhaps the following should remain a flag:

- has_dsb - expected to be adjusted for future platforms
- has_rc6p - complicated
- has_psr_hw_tracking - complicated

Another angle is, do we want to keep all the HAS_* macros in i915_drv.h?
For example, HAS_PSR_HW_TRACKING() could be a platform check localized
at the top of intel_psr.c. I think it's more acceptable to have
complicated platform checks if their use is not wide. This could promote
mode widespread use of HAS_* macros for things where we actually have
(possibly duplicated) inline platform checks, and it would be
self-documenting.

Finally, the main functional change in the series is dropping the
feature from the debug prints, and that's not mentioned anywhere.


BR,
Jani.


>
> BSpec: 50039
> Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
>  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
>  drivers/gpu/drm/i915/intel_device_info.h | 1 -
>  3 files changed, 2 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 2dddc27a1b0ed..695b35cd6b5e4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
>   */
>  #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
>  
> -#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
> +#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
> +					  DISPLAY_VER(dev_priv) <= 12)
>  
>  #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
>  #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 498708b33924f..c4f9c805cffd1 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
>  	.display.has_dmc = 1, \
>  	.has_gt_uc = 1, \
>  	.display.has_hdcp = 1, \
> -	.display.has_ipc = 1, \
>  	.display.has_psr = 1, \
>  	.display.has_psr_hw_tracking = 1, \
>  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
> @@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
>  	.has_reset_engine = 1, \
>  	.has_snoop = true, \
>  	.has_coherent_ggtt = false, \
> -	.display.has_ipc = 1, \
>  	HSW_PIPE_OFFSETS, \
>  	IVB_CURSOR_OFFSETS, \
>  	IVB_COLORS, \
> @@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
>  	.display.has_fpga_dbg = 1,						\
>  	.display.has_hdcp = 1,							\
>  	.display.has_hotplug = 1,						\
> -	.display.has_ipc = 1,							\
>  	.display.has_psr = 1,							\
>  	.display.ver = 13,							\
>  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index e7d2cf7d65c85..c9660b4282d9e 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -180,7 +180,6 @@ enum intel_ppgtt_type {
>  	func(has_hdcp); \
>  	func(has_hotplug); \
>  	func(has_hti); \
> -	func(has_ipc); \
>  	func(has_modular_fia); \
>  	func(has_overlay); \
>  	func(has_psr); \

-- 
Jani Nikula, Intel Open Source Graphics Center

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Souza, Jose]

On Thu, 2022-05-05 at 13:45 +0300, Jani Nikula wrote:
> On Wed, 04 May 2022, José Roberto de Souza <jose.souza@intel.com> wrote:
> > This feature is supported from display 9 to display 12 and was
> > incorrectly being applied to DG2 and Alderlake-P.
> > 
> > While at is also taking the oportunity to drop it from
> > intel_device_info struct as a display check is more simple
> > and less prone to be left enabled in future platforms.
> 
> Lacking a cover letter, I'll just reply here for the entire series.

Sorry about that, was planning to write one but forgot.

> 
> We don't really have any rules for when to add a flag and when not. It's
> basically been up to whoever has added each HAS_* macro to decide how to
> implement it.
> 
> Indicators for when to add a flag would be:
> 
> - The are no clear cut boundaries for platform versions that have or
>   don't have a feature.
> 
> - There may be a need to disable a feature for single platforms during
>   development or enabling or debugging.

Thought about this but for this cases we can edit the HAS_X() macros.

> 
> - It would be useful to have the flag show up in dmesg, debugfs or gpu
>   error (see intel_device_info_print_static() calls).

In my opinion developers can easily check that by reading the HAS_X() and comparing to the platform name and graphics IPs.
There is several other features that we don't have flags in device info already.

> 
> - The platform comparison would be complicated.
> 
> Indicators for when to add a platform check:
> 
> - It's a clear cut platform version check, not a complex boolean
>   condition.
> 
> - It's obvious for anyone debugging the platform whether the feature is
>   there or not based on dmesg, without a dedicated logged flag.
> 
> - The feature only exists on legacy platforms and is not coming back,
>   i.e. the platform check is pretty much fixed.
> 
> With that in mind, I think perhaps the following should remain a flag:
> 
> - has_dsb - expected to be adjusted for future platforms

From what I see it is supported for all future display versions but if you are talking about current issues that we have it with, the flag has shown
that it is worst as some platforms was left with it enabled.

> - has_rc6p - complicated

Matt Ropper suggested to use IS_GRAPHICS_VER(i915, 6, 7) so it will become even less complicated.

> - has_psr_hw_tracking - complicated
> 
> Another angle is, do we want to keep all the HAS_* macros in i915_drv.h?
> For example, HAS_PSR_HW_TRACKING() could be a platform check localized
> at the top of intel_psr.c. I think it's more acceptable to have
> complicated platform checks if their use is not wide. This could promote
> mode widespread use of HAS_* macros for things where we actually have
> (possibly duplicated) inline platform checks, and it would be
> self-documenting.

Good point, yes HAS_PSR_HW_TRACKING() is only used in intel_psr.c it could be moved to the top of it.

> 
> Finally, the main functional change in the series is dropping the
> feature from the debug prints, and that's not mentioned anywhere.

Like I said in the top, developers can read the macros and compare to IPs version like we do for other features.
For users this has no impact as it is not even printed.
But I will mention in the next version.

Thanks for the feedback

> 
> 
> BR,
> Jani.
> 
> 
> > 
> > BSpec: 50039
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
> >  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
> >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> >  3 files changed, 2 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 2dddc27a1b0ed..695b35cd6b5e4 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >   */
> >  #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
> >  
> > -#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
> > +#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
> > +					  DISPLAY_VER(dev_priv) <= 12)
> >  
> >  #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
> >  #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 498708b33924f..c4f9c805cffd1 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
> >  	.display.has_dmc = 1, \
> >  	.has_gt_uc = 1, \
> >  	.display.has_hdcp = 1, \
> > -	.display.has_ipc = 1, \
> >  	.display.has_psr = 1, \
> >  	.display.has_psr_hw_tracking = 1, \
> >  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
> > @@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
> >  	.has_reset_engine = 1, \
> >  	.has_snoop = true, \
> >  	.has_coherent_ggtt = false, \
> > -	.display.has_ipc = 1, \
> >  	HSW_PIPE_OFFSETS, \
> >  	IVB_CURSOR_OFFSETS, \
> >  	IVB_COLORS, \
> > @@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
> >  	.display.has_fpga_dbg = 1,						\
> >  	.display.has_hdcp = 1,							\
> >  	.display.has_hotplug = 1,						\
> > -	.display.has_ipc = 1,							\
> >  	.display.has_psr = 1,							\
> >  	.display.ver = 13,							\
> >  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index e7d2cf7d65c85..c9660b4282d9e 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -180,7 +180,6 @@ enum intel_ppgtt_type {
> >  	func(has_hdcp); \
> >  	func(has_hotplug); \
> >  	func(has_hti); \
> > -	func(has_ipc); \
> >  	func(has_modular_fia); \
> >  	func(has_overlay); \
> >  	func(has_psr); \
> 

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Ville Syrjälä]

On Thu, May 05, 2022 at 02:00:50PM +0000, Souza, Jose wrote:
> On Thu, 2022-05-05 at 13:45 +0300, Jani Nikula wrote:
> > - has_rc6p - complicated
> 
> Matt Ropper suggested to use IS_GRAPHICS_VER(i915, 6, 7) so it will become even less complicated.

That won't really simplify it. The simplest form would be
IS_SNB||IS_IVB.

-- 
Ville Syrjälä
Intel

Re: [Intel-gfx] [PATCH 01/12] drm/i915: Drop IPC from display 13 and newer

[Souza, Jose]

On Thu, 2022-05-05 at 00:33 +0300, Ville Syrjälä wrote:
> On Wed, May 04, 2022 at 12:07:45PM -0700, José Roberto de Souza wrote:
> > This feature is supported from display 9 to display 12 and was
> > incorrectly being applied to DG2 and Alderlake-P.
> 
> They just renamed the register to ARB_HP_CTL.

Missed that, will fix it.

Thanks

> 
> > 
> > While at is also taking the oportunity to drop it from
> > intel_device_info struct as a display check is more simple
> > and less prone to be left enabled in future platforms.
> > 
> > BSpec: 50039
> > Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
> > ---
> >  drivers/gpu/drm/i915/i915_drv.h          | 3 ++-
> >  drivers/gpu/drm/i915/i915_pci.c          | 3 ---
> >  drivers/gpu/drm/i915/intel_device_info.h | 1 -
> >  3 files changed, 2 insertions(+), 5 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> > index 2dddc27a1b0ed..695b35cd6b5e4 100644
> > --- a/drivers/gpu/drm/i915/i915_drv.h
> > +++ b/drivers/gpu/drm/i915/i915_drv.h
> > @@ -1344,7 +1344,8 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> >   */
> >  #define NEEDS_COMPACT_PT(dev_priv) (INTEL_INFO(dev_priv)->needs_compact_pt)
> >  
> > -#define HAS_IPC(dev_priv)		 (INTEL_INFO(dev_priv)->display.has_ipc)
> > +#define HAS_IPC(dev_priv)		 (DISPLAY_VER(dev_priv) >= 9 && \
> > +					  DISPLAY_VER(dev_priv) <= 12)
> >  
> >  #define HAS_REGION(i915, i) (INTEL_INFO(i915)->memory_regions & (i))
> >  #define HAS_LMEM(i915) HAS_REGION(i915, REGION_LMEM)
> > diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> > index 498708b33924f..c4f9c805cffd1 100644
> > --- a/drivers/gpu/drm/i915/i915_pci.c
> > +++ b/drivers/gpu/drm/i915/i915_pci.c
> > @@ -646,7 +646,6 @@ static const struct intel_device_info chv_info = {
> >  	.display.has_dmc = 1, \
> >  	.has_gt_uc = 1, \
> >  	.display.has_hdcp = 1, \
> > -	.display.has_ipc = 1, \
> >  	.display.has_psr = 1, \
> >  	.display.has_psr_hw_tracking = 1, \
> >  	.dbuf.size = 896 - 4, /* 4 blocks for bypass path allocation */ \
> > @@ -712,7 +711,6 @@ static const struct intel_device_info skl_gt4_info = {
> >  	.has_reset_engine = 1, \
> >  	.has_snoop = true, \
> >  	.has_coherent_ggtt = false, \
> > -	.display.has_ipc = 1, \
> >  	HSW_PIPE_OFFSETS, \
> >  	IVB_CURSOR_OFFSETS, \
> >  	IVB_COLORS, \
> > @@ -955,7 +953,6 @@ static const struct intel_device_info adl_s_info = {
> >  	.display.has_fpga_dbg = 1,						\
> >  	.display.has_hdcp = 1,							\
> >  	.display.has_hotplug = 1,						\
> > -	.display.has_ipc = 1,							\
> >  	.display.has_psr = 1,							\
> >  	.display.ver = 13,							\
> >  	.display.pipe_mask = BIT(PIPE_A) | BIT(PIPE_B) | BIT(PIPE_C) | BIT(PIPE_D),	\
> > diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> > index e7d2cf7d65c85..c9660b4282d9e 100644
> > --- a/drivers/gpu/drm/i915/intel_device_info.h
> > +++ b/drivers/gpu/drm/i915/intel_device_info.h
> > @@ -180,7 +180,6 @@ enum intel_ppgtt_type {
> >  	func(has_hdcp); \
> >  	func(has_hotplug); \
> >  	func(has_hti); \
> > -	func(has_ipc); \
> >  	func(has_modular_fia); \
> >  	func(has_overlay); \
> >  	func(has_psr); \
> > -- 
> > 2.36.0
>