* [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
Hi,
this drop fixes the review comments from Krzysztof and Rob (many
thanks for that!). Changelog below.
=================
In an effort to get the FVP DTs to pass the automated DT bindings checks,
this series collects some DT schema binding conversions for various
Arm Ltd. IP devices.
This is mostly for old IP, but it's still used by the FVPs, for which we
have DTs in the tree.
Please have a look!
Cheers,
Andre
Changelog:
v1 .. v2:
- all: fix indentation in examples (4 spaces)
- all: drop line break preservation in descriptions
- smmu-v3: tighten IRQ ordering to only allow certain combinations
- spe-pmu: move new .yaml file into perf/ directory
- sp810: don't require fixed clock output names
- sp810: explain optional assigned-clock properties
- pl041/pl051: rename binding file name
- pl041/pl051: use generic node name in example nodes
- vexpress-sysreg: specify additionalProperties
- vexpress-sysreg: disallow uppercase hex letters in node name address
- vexpress-config: specify additionalProperties
- hdlcd/mali-dp: use properties/port instead of $defs/port-base
Andre Przywara (11):
dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional
dt-bindings: arm: spe-pmu: convert to DT schema
dt-bindings: arm: sp810: convert to DT schema
dt-bindings: sound: add Arm PL041 AACI DT schema
dt-bindings: serio: add Arm PL050 DT schema
dt-bindings: arm: convert vexpress-sysregs to DT schema
dt-bindings: arm: convert vexpress-config to DT schema
dt-bindings: display: convert PL110/PL111 to DT schema
dt-bindings: display: convert Arm HDLCD to DT schema
dt-bindings: display: convert Arm Mali-DP to DT schema
dt-bindings: display: convert Arm Komeda to DT schema
.../devicetree/bindings/arm/sp810.txt | 46 ---
.../devicetree/bindings/arm/sp810.yaml | 80 +++++
.../devicetree/bindings/arm/spe-pmu.txt | 20 --
.../bindings/arm/vexpress-config.yaml | 285 ++++++++++++++++++
.../bindings/arm/vexpress-sysreg.txt | 103 -------
.../bindings/arm/vexpress-sysreg.yaml | 90 ++++++
.../devicetree/bindings/display/arm,hdlcd.txt | 79 -----
.../bindings/display/arm,hdlcd.yaml | 89 ++++++
.../bindings/display/arm,komeda.txt | 78 -----
.../bindings/display/arm,komeda.yaml | 130 ++++++++
.../bindings/display/arm,malidp.txt | 68 -----
.../bindings/display/arm,malidp.yaml | 116 +++++++
.../devicetree/bindings/display/arm,pl11x.txt | 110 -------
.../bindings/display/arm,pl11x.yaml | 174 +++++++++++
.../bindings/iommu/arm,smmu-v3.yaml | 16 +-
.../devicetree/bindings/perf/spe-pmu.yaml | 40 +++
.../devicetree/bindings/serio/arm,pl050.yaml | 67 ++++
.../devicetree/bindings/sound/arm,pl041.yaml | 62 ++++
18 files changed, 1144 insertions(+), 509 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sp810.txt
create mode 100644 Documentation/devicetree/bindings/arm/sp810.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-config.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
create mode 100644 Documentation/devicetree/bindings/perf/spe-pmu.yaml
create mode 100644 Documentation/devicetree/bindings/serio/arm,pl050.yaml
create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml
--
2.25.1
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
Hi,
this drop fixes the review comments from Krzysztof and Rob (many
thanks for that!). Changelog below.
=================
In an effort to get the FVP DTs to pass the automated DT bindings checks,
this series collects some DT schema binding conversions for various
Arm Ltd. IP devices.
This is mostly for old IP, but it's still used by the FVPs, for which we
have DTs in the tree.
Please have a look!
Cheers,
Andre
Changelog:
v1 .. v2:
- all: fix indentation in examples (4 spaces)
- all: drop line break preservation in descriptions
- smmu-v3: tighten IRQ ordering to only allow certain combinations
- spe-pmu: move new .yaml file into perf/ directory
- sp810: don't require fixed clock output names
- sp810: explain optional assigned-clock properties
- pl041/pl051: rename binding file name
- pl041/pl051: use generic node name in example nodes
- vexpress-sysreg: specify additionalProperties
- vexpress-sysreg: disallow uppercase hex letters in node name address
- vexpress-config: specify additionalProperties
- hdlcd/mali-dp: use properties/port instead of $defs/port-base
Andre Przywara (11):
dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional
dt-bindings: arm: spe-pmu: convert to DT schema
dt-bindings: arm: sp810: convert to DT schema
dt-bindings: sound: add Arm PL041 AACI DT schema
dt-bindings: serio: add Arm PL050 DT schema
dt-bindings: arm: convert vexpress-sysregs to DT schema
dt-bindings: arm: convert vexpress-config to DT schema
dt-bindings: display: convert PL110/PL111 to DT schema
dt-bindings: display: convert Arm HDLCD to DT schema
dt-bindings: display: convert Arm Mali-DP to DT schema
dt-bindings: display: convert Arm Komeda to DT schema
.../devicetree/bindings/arm/sp810.txt | 46 ---
.../devicetree/bindings/arm/sp810.yaml | 80 +++++
.../devicetree/bindings/arm/spe-pmu.txt | 20 --
.../bindings/arm/vexpress-config.yaml | 285 ++++++++++++++++++
.../bindings/arm/vexpress-sysreg.txt | 103 -------
.../bindings/arm/vexpress-sysreg.yaml | 90 ++++++
.../devicetree/bindings/display/arm,hdlcd.txt | 79 -----
.../bindings/display/arm,hdlcd.yaml | 89 ++++++
.../bindings/display/arm,komeda.txt | 78 -----
.../bindings/display/arm,komeda.yaml | 130 ++++++++
.../bindings/display/arm,malidp.txt | 68 -----
.../bindings/display/arm,malidp.yaml | 116 +++++++
.../devicetree/bindings/display/arm,pl11x.txt | 110 -------
.../bindings/display/arm,pl11x.yaml | 174 +++++++++++
.../bindings/iommu/arm,smmu-v3.yaml | 16 +-
.../devicetree/bindings/perf/spe-pmu.yaml | 40 +++
.../devicetree/bindings/serio/arm,pl050.yaml | 67 ++++
.../devicetree/bindings/sound/arm,pl041.yaml | 62 ++++
18 files changed, 1144 insertions(+), 509 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sp810.txt
create mode 100644 Documentation/devicetree/bindings/arm/sp810.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-config.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
create mode 100644 Documentation/devicetree/bindings/perf/spe-pmu.yaml
create mode 100644 Documentation/devicetree/bindings/serio/arm,pl050.yaml
create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* [PATCH v2 01/11] dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, iommu
The Page Request Interface (PRI) is an optional PCIe feature. As such, a
SMMU would not need to handle it if the PCIe host bridge or the SMMU
itself do not implement it. Also an SMMU could be connected to a platform
device, without any PRI functionality whatsoever.
In all cases there would be no SMMU PRI queue interrupt to be wired up
to an interrupt controller.
At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we
would need to sacrifice the command queue sync interrupt as well, which
might not be desired.
Relax the binding to allow specifying certain useful combinations of
wired interrupts, for instance just the "gerror" interrupt, or omitting
both "pri" and "cmdq-sync".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/iommu/arm,smmu-v3.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
index e87bfbcc69135..c57a53d87e4e6 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
@@ -37,12 +37,18 @@ properties:
hardware supports just a single, combined interrupt line.
If provided, then the combined interrupt will be used in preference to
any others.
- - minItems: 2
+ - minItems: 1
items:
- - const: eventq # Event Queue not empty
- - const: gerror # Global Error activated
- - const: priq # PRI Queue not empty
- - const: cmdq-sync # CMD_SYNC complete
+ - enum:
+ - eventq # Event Queue not empty
+ - gerror # Global Error activated
+ - const: gerror
+ - enum:
+ - cmdq-sync # CMD_SYNC complete
+ - priq # PRI Queue not empty
+ - enum:
+ - cmdq-sync
+ - priq
'#iommu-cells':
const: 1
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 01/11] dt-bindings: iommu: arm, smmu-v3: make PRI IRQ optional
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, Will Deacon, Liviu Dudau, iommu, Robin Murphy,
linux-arm-kernel
The Page Request Interface (PRI) is an optional PCIe feature. As such, a
SMMU would not need to handle it if the PCIe host bridge or the SMMU
itself do not implement it. Also an SMMU could be connected to a platform
device, without any PRI functionality whatsoever.
In all cases there would be no SMMU PRI queue interrupt to be wired up
to an interrupt controller.
At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we
would need to sacrifice the command queue sync interrupt as well, which
might not be desired.
Relax the binding to allow specifying certain useful combinations of
wired interrupts, for instance just the "gerror" interrupt, or omitting
both "pri" and "cmdq-sync".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/iommu/arm,smmu-v3.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
index e87bfbcc69135..c57a53d87e4e6 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
@@ -37,12 +37,18 @@ properties:
hardware supports just a single, combined interrupt line.
If provided, then the combined interrupt will be used in preference to
any others.
- - minItems: 2
+ - minItems: 1
items:
- - const: eventq # Event Queue not empty
- - const: gerror # Global Error activated
- - const: priq # PRI Queue not empty
- - const: cmdq-sync # CMD_SYNC complete
+ - enum:
+ - eventq # Event Queue not empty
+ - gerror # Global Error activated
+ - const: gerror
+ - enum:
+ - cmdq-sync # CMD_SYNC complete
+ - priq # PRI Queue not empty
+ - enum:
+ - cmdq-sync
+ - priq
'#iommu-cells':
const: 1
--
2.25.1
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 01/11] dt-bindings: iommu: arm, smmu-v3: make PRI IRQ optional
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, iommu
The Page Request Interface (PRI) is an optional PCIe feature. As such, a
SMMU would not need to handle it if the PCIe host bridge or the SMMU
itself do not implement it. Also an SMMU could be connected to a platform
device, without any PRI functionality whatsoever.
In all cases there would be no SMMU PRI queue interrupt to be wired up
to an interrupt controller.
At the moment, with the "eventq,gerror,priq,cmdq-sync" order, we
would need to sacrifice the command queue sync interrupt as well, which
might not be desired.
Relax the binding to allow specifying certain useful combinations of
wired interrupts, for instance just the "gerror" interrupt, or omitting
both "pri" and "cmdq-sync".
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/iommu/arm,smmu-v3.yaml | 16 +++++++++++-----
1 file changed, 11 insertions(+), 5 deletions(-)
diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
index e87bfbcc69135..c57a53d87e4e6 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu-v3.yaml
@@ -37,12 +37,18 @@ properties:
hardware supports just a single, combined interrupt line.
If provided, then the combined interrupt will be used in preference to
any others.
- - minItems: 2
+ - minItems: 1
items:
- - const: eventq # Event Queue not empty
- - const: gerror # Global Error activated
- - const: priq # PRI Queue not empty
- - const: cmdq-sync # CMD_SYNC complete
+ - enum:
+ - eventq # Event Queue not empty
+ - gerror # Global Error activated
+ - const: gerror
+ - enum:
+ - cmdq-sync # CMD_SYNC complete
+ - priq # PRI Queue not empty
+ - enum:
+ - cmdq-sync
+ - priq
'#iommu-cells':
const: 1
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 02/11] dt-bindings: arm: spe-pmu: convert to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Krzysztof Kozlowski
Convert the Arm Statisical Profiling Extension (SPE) binding to DT
schema.
Not much to see here, basically just the announcement that SPE is
integrated on the system level and where the IRQ is routed to.
Move it into the more suitable perf/ directory on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/arm/spe-pmu.txt | 20 ----------
.../devicetree/bindings/perf/spe-pmu.yaml | 40 +++++++++++++++++++
2 files changed, 40 insertions(+), 20 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
create mode 100644 Documentation/devicetree/bindings/perf/spe-pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
deleted file mode 100644
index 93372f2a7df92..0000000000000
--- a/Documentation/devicetree/bindings/arm/spe-pmu.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
-
-ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
-performance sample data using an in-memory trace buffer.
-
-** SPE Required properties:
-
-- compatible : should be one of:
- "arm,statistical-profiling-extension-v1"
-
-- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
- SPE is only supported on a subset of the CPUs, please consult
- the arm,gic-v3 binding for details on describing a PPI partition.
-
-** Example:
-
-spe-pmu {
- compatible = "arm,statistical-profiling-extension-v1";
- interrupts = <GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &part1>;
-};
diff --git a/Documentation/devicetree/bindings/perf/spe-pmu.yaml b/Documentation/devicetree/bindings/perf/spe-pmu.yaml
new file mode 100644
index 0000000000000..7d74152f437e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/spe-pmu.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/spe-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+maintainers:
+ - Will Deacon <will@kernel.org>
+
+description:
+ ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+ performance sample data using an in-memory trace buffer.
+
+properties:
+ compatible:
+ const: arm,statistical-profiling-extension-v1
+
+ interrupts:
+ maxItems: 1
+ description: |
+ The PPI to signal SPE events. For heterogeneous systems where SPE is only
+ supported on a subset of the CPUs, please consult the arm,gic-v3 binding
+ for details on describing a PPI partition.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - interrupts
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ spe-pmu {
+ compatible = "arm,statistical-profiling-extension-v1";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 02/11] dt-bindings: arm: spe-pmu: convert to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Krzysztof Kozlowski
Convert the Arm Statisical Profiling Extension (SPE) binding to DT
schema.
Not much to see here, basically just the announcement that SPE is
integrated on the system level and where the IRQ is routed to.
Move it into the more suitable perf/ directory on the way.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
.../devicetree/bindings/arm/spe-pmu.txt | 20 ----------
.../devicetree/bindings/perf/spe-pmu.yaml | 40 +++++++++++++++++++
2 files changed, 40 insertions(+), 20 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt
create mode 100644 Documentation/devicetree/bindings/perf/spe-pmu.yaml
diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt
deleted file mode 100644
index 93372f2a7df92..0000000000000
--- a/Documentation/devicetree/bindings/arm/spe-pmu.txt
+++ /dev/null
@@ -1,20 +0,0 @@
-* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
-
-ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
-performance sample data using an in-memory trace buffer.
-
-** SPE Required properties:
-
-- compatible : should be one of:
- "arm,statistical-profiling-extension-v1"
-
-- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where
- SPE is only supported on a subset of the CPUs, please consult
- the arm,gic-v3 binding for details on describing a PPI partition.
-
-** Example:
-
-spe-pmu {
- compatible = "arm,statistical-profiling-extension-v1";
- interrupts = <GIC_PPI 05 IRQ_TYPE_LEVEL_HIGH &part1>;
-};
diff --git a/Documentation/devicetree/bindings/perf/spe-pmu.yaml b/Documentation/devicetree/bindings/perf/spe-pmu.yaml
new file mode 100644
index 0000000000000..7d74152f437e0
--- /dev/null
+++ b/Documentation/devicetree/bindings/perf/spe-pmu.yaml
@@ -0,0 +1,40 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/perf/spe-pmu.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU)
+
+maintainers:
+ - Will Deacon <will@kernel.org>
+
+description:
+ ARMv8.2 introduces the optional Statistical Profiling Extension for collecting
+ performance sample data using an in-memory trace buffer.
+
+properties:
+ compatible:
+ const: arm,statistical-profiling-extension-v1
+
+ interrupts:
+ maxItems: 1
+ description: |
+ The PPI to signal SPE events. For heterogeneous systems where SPE is only
+ supported on a subset of the CPUs, please consult the arm,gic-v3 binding
+ for details on describing a PPI partition.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - interrupts
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+ spe-pmu {
+ compatible = "arm,statistical-profiling-extension-v1";
+ interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
+ };
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 03/11] dt-bindings: arm: sp810: convert to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm SP810 IP is a "system controller", providing clocks, timer and a
watchdog.
Convert the DT binding to DT schema, to allow automatic validation.
The existing .txt binding described all properties as required, but the
assigned-clock* and clock-output-names are actually not (from a hardware
perspective). The only existing driver I could find (in Linux) doesn't
require them either, so drop those properties from the "required" list.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/arm/sp810.txt | 46 -----------
.../devicetree/bindings/arm/sp810.yaml | 80 +++++++++++++++++++
2 files changed, 80 insertions(+), 46 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sp810.txt
create mode 100644 Documentation/devicetree/bindings/arm/sp810.yaml
diff --git a/Documentation/devicetree/bindings/arm/sp810.txt b/Documentation/devicetree/bindings/arm/sp810.txt
deleted file mode 100644
index 46652bf651478..0000000000000
--- a/Documentation/devicetree/bindings/arm/sp810.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-SP810 System Controller
------------------------
-
-Required properties:
-
-- compatible: standard compatible string for a Primecell peripheral,
- see Documentation/devicetree/bindings/arm/primecell.yaml
- for more details
- should be: "arm,sp810", "arm,primecell"
-
-- reg: standard registers property, physical address and size
- of the control registers
-
-- clock-names: from the common clock bindings, for more details see
- Documentation/devicetree/bindings/clock/clock-bindings.txt;
- should be: "refclk", "timclk", "apb_pclk"
-
-- clocks: from the common clock bindings, phandle and clock
- specifier pairs for the entries of clock-names property
-
-- #clock-cells: from the common clock bindings;
- should be: <1>
-
-- clock-output-names: from the common clock bindings;
- should be: "timerclken0", "timerclken1", "timerclken2", "timerclken3"
-
-- assigned-clocks: from the common clock binding;
- should be: clock specifier for each output clock of this
- provider node
-
-- assigned-clock-parents: from the common clock binding;
- should be: phandle of input clock listed in clocks
- property with the highest frequency
-
-Example:
- v2m_sysctl: sysctl@20000 {
- compatible = "arm,sp810", "arm,primecell";
- reg = <0x020000 0x1000>;
- clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
- clock-names = "refclk", "timclk", "apb_pclk";
- #clock-cells = <1>;
- clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
- assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
- assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
-
- };
diff --git a/Documentation/devicetree/bindings/arm/sp810.yaml b/Documentation/devicetree/bindings/arm/sp810.yaml
new file mode 100644
index 0000000000000..bc8e524aa90ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sp810.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/sp810.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express SP810 System Controller bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm SP810 system controller provides clocks, timers and a watchdog.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,sp810
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,sp810
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: refclk
+ - const: timclk
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: reference clock
+ - description: timer clock
+ - description: APB register access clock
+
+ "#clock-cells":
+ const: 1
+
+ clock-output-names:
+ maxItems: 4
+
+ assigned-clocks:
+ maxItems: 4
+
+ assigned-clock-parents:
+ maxItems: 4
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#clock-cells"
+
+examples:
+ - |
+ sysctl@20000 {
+ compatible = "arm,sp810", "arm,primecell";
+ reg = <0x020000 0x1000>;
+ clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
+ clock-names = "refclk", "timclk", "apb_pclk";
+ #clock-cells = <1>;
+ clock-output-names = "timerclken0", "timerclken1",
+ "timerclken2", "timerclken3";
+ assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>,
+ <&v2m_sysctl 3>, <&v2m_sysctl 3>;
+ assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>,
+ <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
+ };
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 03/11] dt-bindings: arm: sp810: convert to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm SP810 IP is a "system controller", providing clocks, timer and a
watchdog.
Convert the DT binding to DT schema, to allow automatic validation.
The existing .txt binding described all properties as required, but the
assigned-clock* and clock-output-names are actually not (from a hardware
perspective). The only existing driver I could find (in Linux) doesn't
require them either, so drop those properties from the "required" list.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/arm/sp810.txt | 46 -----------
.../devicetree/bindings/arm/sp810.yaml | 80 +++++++++++++++++++
2 files changed, 80 insertions(+), 46 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/arm/sp810.txt
create mode 100644 Documentation/devicetree/bindings/arm/sp810.yaml
diff --git a/Documentation/devicetree/bindings/arm/sp810.txt b/Documentation/devicetree/bindings/arm/sp810.txt
deleted file mode 100644
index 46652bf651478..0000000000000
--- a/Documentation/devicetree/bindings/arm/sp810.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-SP810 System Controller
------------------------
-
-Required properties:
-
-- compatible: standard compatible string for a Primecell peripheral,
- see Documentation/devicetree/bindings/arm/primecell.yaml
- for more details
- should be: "arm,sp810", "arm,primecell"
-
-- reg: standard registers property, physical address and size
- of the control registers
-
-- clock-names: from the common clock bindings, for more details see
- Documentation/devicetree/bindings/clock/clock-bindings.txt;
- should be: "refclk", "timclk", "apb_pclk"
-
-- clocks: from the common clock bindings, phandle and clock
- specifier pairs for the entries of clock-names property
-
-- #clock-cells: from the common clock bindings;
- should be: <1>
-
-- clock-output-names: from the common clock bindings;
- should be: "timerclken0", "timerclken1", "timerclken2", "timerclken3"
-
-- assigned-clocks: from the common clock binding;
- should be: clock specifier for each output clock of this
- provider node
-
-- assigned-clock-parents: from the common clock binding;
- should be: phandle of input clock listed in clocks
- property with the highest frequency
-
-Example:
- v2m_sysctl: sysctl@20000 {
- compatible = "arm,sp810", "arm,primecell";
- reg = <0x020000 0x1000>;
- clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
- clock-names = "refclk", "timclk", "apb_pclk";
- #clock-cells = <1>;
- clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
- assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
- assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
-
- };
diff --git a/Documentation/devicetree/bindings/arm/sp810.yaml b/Documentation/devicetree/bindings/arm/sp810.yaml
new file mode 100644
index 0000000000000..bc8e524aa90ad
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/sp810.yaml
@@ -0,0 +1,80 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/sp810.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express SP810 System Controller bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm SP810 system controller provides clocks, timers and a watchdog.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,sp810
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,sp810
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: refclk
+ - const: timclk
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: reference clock
+ - description: timer clock
+ - description: APB register access clock
+
+ "#clock-cells":
+ const: 1
+
+ clock-output-names:
+ maxItems: 4
+
+ assigned-clocks:
+ maxItems: 4
+
+ assigned-clock-parents:
+ maxItems: 4
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+ - "#clock-cells"
+
+examples:
+ - |
+ sysctl@20000 {
+ compatible = "arm,sp810", "arm,primecell";
+ reg = <0x020000 0x1000>;
+ clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
+ clock-names = "refclk", "timclk", "apb_pclk";
+ #clock-cells = <1>;
+ clock-output-names = "timerclken0", "timerclken1",
+ "timerclken2", "timerclken3";
+ assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>,
+ <&v2m_sysctl 3>, <&v2m_sysctl 3>;
+ assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>,
+ <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;
+ };
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Jaroslav Kysela, Takashi Iwai, alsa-devel
The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
a peripheral that provides communication with an audio CODEC.
Add a simple DT schema binding for it, so that DTs can be validated
automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/sound/arm,pl041.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml
diff --git a/Documentation/devicetree/bindings/sound/arm,pl041.yaml b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
new file mode 100644
index 0000000000000..7896b8150cf0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/arm,pl041.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Ltd. PrimeCell PL041 AACI sound interface
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA compliant
+ peripheral that provides communication with an audio CODEC using the AC-link
+ protocol.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,pl041
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,pl041
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ description: APB register access clock
+
+ clock-names:
+ const: apb_pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ audio-controller@40000 {
+ compatible = "arm,pl041", "arm,primecell";
+ reg = <0x040000 0x1000>;
+ interrupts = <11>;
+ clocks = <&v2m_clk24mhz>;
+ clock-names = "apb_pclk";
+ };
+
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, alsa-devel, Will Deacon, Liviu Dudau, Takashi Iwai,
Robin Murphy, linux-arm-kernel
The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
a peripheral that provides communication with an audio CODEC.
Add a simple DT schema binding for it, so that DTs can be validated
automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/sound/arm,pl041.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml
diff --git a/Documentation/devicetree/bindings/sound/arm,pl041.yaml b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
new file mode 100644
index 0000000000000..7896b8150cf0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/arm,pl041.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Ltd. PrimeCell PL041 AACI sound interface
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA compliant
+ peripheral that provides communication with an audio CODEC using the AC-link
+ protocol.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,pl041
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,pl041
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ description: APB register access clock
+
+ clock-names:
+ const: apb_pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ audio-controller@40000 {
+ compatible = "arm,pl041", "arm,primecell";
+ reg = <0x040000 0x1000>;
+ interrupts = <11>;
+ clocks = <&v2m_clk24mhz>;
+ clock-names = "apb_pclk";
+ };
+
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Jaroslav Kysela, Takashi Iwai, alsa-devel
The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
a peripheral that provides communication with an audio CODEC.
Add a simple DT schema binding for it, so that DTs can be validated
automatically.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/sound/arm,pl041.yaml | 62 +++++++++++++++++++
1 file changed, 62 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/arm,pl041.yaml
diff --git a/Documentation/devicetree/bindings/sound/arm,pl041.yaml b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
new file mode 100644
index 0000000000000..7896b8150cf0f
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/arm,pl041.yaml
@@ -0,0 +1,62 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/arm,pl041.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Ltd. PrimeCell PL041 AACI sound interface
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm PrimeCell Advanced Audio CODEC Interface (AACI) is an AMBA compliant
+ peripheral that provides communication with an audio CODEC using the AC-link
+ protocol.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,pl041
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,pl041
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ description: APB register access clock
+
+ clock-names:
+ const: apb_pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ audio-controller@40000 {
+ compatible = "arm,pl041", "arm,primecell";
+ reg = <0x040000 0x1000>;
+ interrupts = <11>;
+ clocks = <&v2m_clk24mhz>;
+ clock-names = "apb_pclk";
+ };
+
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 05/11] dt-bindings: serio: add Arm PL050 DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Dmitry Torokhov, linux-input
The Arm PL050 "Keyboard/Mouse Interface" is an Arm system IP providing a
PS/2 compatible serial interface.
Add a simple DT schema binding, based on the TRM[1], the existing DTs and
the Linux driver.
[1] https://developer.arm.com/documentation/ddi0143/latest
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/serio/arm,pl050.yaml | 67 +++++++++++++++++++
1 file changed, 67 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serio/arm,pl050.yaml
diff --git a/Documentation/devicetree/bindings/serio/arm,pl050.yaml b/Documentation/devicetree/bindings/serio/arm,pl050.yaml
new file mode 100644
index 0000000000000..d80f58d15497f
--- /dev/null
+++ b/Documentation/devicetree/bindings/serio/arm,pl050.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serio/arm,pl050.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Ltd. PrimeCell PL050 PS/2 Keyboard/Mouse Interface
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm PrimeCell PS2 Keyboard/Mouse Interface (KMI) is an AMBA compliant
+ peripheral that can be used to implement a keyboard or mouse interface that
+ is IBM PS2 or AT compatible.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,pl050
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,pl050
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: KMI reference clock, used to generate the bus timing
+ - description: APB register access clock
+
+ clock-names:
+ items:
+ - const: KMIREFCLK
+ - const: apb_pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ serio@70000 {
+ compatible = "arm,pl050", "arm,primecell";
+ reg = <0x070000 0x1000>;
+ interrupts = <8>;
+ clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
+ clock-names = "KMIREFCLK", "apb_pclk";
+ };
+
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 05/11] dt-bindings: serio: add Arm PL050 DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Dmitry Torokhov, linux-input
The Arm PL050 "Keyboard/Mouse Interface" is an Arm system IP providing a
PS/2 compatible serial interface.
Add a simple DT schema binding, based on the TRM[1], the existing DTs and
the Linux driver.
[1] https://developer.arm.com/documentation/ddi0143/latest
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/serio/arm,pl050.yaml | 67 +++++++++++++++++++
1 file changed, 67 insertions(+)
create mode 100644 Documentation/devicetree/bindings/serio/arm,pl050.yaml
diff --git a/Documentation/devicetree/bindings/serio/arm,pl050.yaml b/Documentation/devicetree/bindings/serio/arm,pl050.yaml
new file mode 100644
index 0000000000000..d80f58d15497f
--- /dev/null
+++ b/Documentation/devicetree/bindings/serio/arm,pl050.yaml
@@ -0,0 +1,67 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serio/arm,pl050.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Ltd. PrimeCell PL050 PS/2 Keyboard/Mouse Interface
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm PrimeCell PS2 Keyboard/Mouse Interface (KMI) is an AMBA compliant
+ peripheral that can be used to implement a keyboard or mouse interface that
+ is IBM PS2 or AT compatible.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ const: arm,pl050
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - const: arm,pl050
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ items:
+ - description: KMI reference clock, used to generate the bus timing
+ - description: APB register access clock
+
+ clock-names:
+ items:
+ - const: KMIREFCLK
+ - const: apb_pclk
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ serio@70000 {
+ compatible = "arm,pl050", "arm,primecell";
+ reg = <0x070000 0x1000>;
+ interrupts = <8>;
+ clocks = <&mb_clk24mhz>, <&soc_smc50mhz>;
+ clock-names = "KMIREFCLK", "apb_pclk";
+ };
+
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 06/11] dt-bindings: arm: convert vexpress-sysregs to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm Versatile Express system control register block provides GPIO
functionality to some devices and is also used for board identification.
Extract the first half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/arm/vexpress-sysreg.yaml | 90 +++++++++++++++++++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
new file mode 100644
index 0000000000000..b5e26e41f88c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express system registers bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ This is a system control registers block, providing multiple low level
+ platform functions like board detection and identification, software
+ interrupt generation, MMC and NOR Flash control, etc.
+
+properties:
+ compatible:
+ const: arm,vexpress-sysreg
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+additionalProperties: false
+
+patternProperties:
+ '^gpio@[0-9a-f]+$':
+ type: object
+ additionalProperties: false
+ description:
+ GPIO children
+
+ properties:
+ compatible:
+ enum:
+ - arm,vexpress-sysreg,sys_led
+ - arm,vexpress-sysreg,sys_mci
+ - arm,vexpress-sysreg,sys_flash
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+ description: |
+ The first cell is the function number:
+ for sys_led : 0..7 = LED 0..7
+ for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT
+ for sys_flash : 0 = NOR FLASH WPn
+ The second cell can take standard GPIO flags.
+
+ reg:
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+
+examples:
+ - |
+ sysreg@0 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x1000>;
+
+ v2m_led_gpios: gpio@8 {
+ compatible = "arm,vexpress-sysreg,sys_led";
+ reg = <0x008 4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 06/11] dt-bindings: arm: convert vexpress-sysregs to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm Versatile Express system control register block provides GPIO
functionality to some devices and is also used for board identification.
Extract the first half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/arm/vexpress-sysreg.yaml | 90 +++++++++++++++++++
1 file changed, 90 insertions(+)
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
new file mode 100644
index 0000000000000..b5e26e41f88c8
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/vexpress-sysreg.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express system registers bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ This is a system control registers block, providing multiple low level
+ platform functions like board detection and identification, software
+ interrupt generation, MMC and NOR Flash control, etc.
+
+properties:
+ compatible:
+ const: arm,vexpress-sysreg
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+additionalProperties: false
+
+patternProperties:
+ '^gpio@[0-9a-f]+$':
+ type: object
+ additionalProperties: false
+ description:
+ GPIO children
+
+ properties:
+ compatible:
+ enum:
+ - arm,vexpress-sysreg,sys_led
+ - arm,vexpress-sysreg,sys_mci
+ - arm,vexpress-sysreg,sys_flash
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+ description: |
+ The first cell is the function number:
+ for sys_led : 0..7 = LED 0..7
+ for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT
+ for sys_flash : 0 = NOR FLASH WPn
+ The second cell can take standard GPIO flags.
+
+ reg:
+ maxItems: 1
+
+ required:
+ - compatible
+ - reg
+ - gpio-controller
+ - "#gpio-cells"
+
+required:
+ - compatible
+ - "#address-cells"
+ - "#size-cells"
+
+examples:
+ - |
+ sysreg@0 {
+ compatible = "arm,vexpress-sysreg";
+ reg = <0x00000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0 0x1000>;
+
+ v2m_led_gpios: gpio@8 {
+ compatible = "arm,vexpress-sysreg,sys_led";
+ reg = <0x008 4>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+ };
+
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 07/11] dt-bindings: arm: convert vexpress-config to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm Versatile Express system features a bridge device that provides
access to various smaller devices like clocks, reset gates and various
sensors.
Extract the second half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant. This makes the old .txt binding
redundant, so remove it.
This describes both the actual parent configuration bridge, as well as
all the possible children devices.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/arm/vexpress-config.yaml | 285 ++++++++++++++++++
.../bindings/arm/vexpress-sysreg.txt | 103 -------
2 files changed, 285 insertions(+), 103 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-config.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
diff --git a/Documentation/devicetree/bindings/arm/vexpress-config.yaml b/Documentation/devicetree/bindings/arm/vexpress-config.yaml
new file mode 100644
index 0000000000000..09e1adf5ca7a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress-config.yaml
@@ -0,0 +1,285 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express configuration bus bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ This is a system control register block, acting as a bridge to the
+ platform's configuration bus via "system control" interface, addressing
+ devices with site number, position in the board stack, config controller,
+ function and device numbers - see motherboard's TRM for more details.
+
+properties:
+ compatible:
+ const: arm,vexpress,config-bus
+
+ arm,vexpress,config-bridge:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the sysreg node.
+
+ muxfpga:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-muxfpga
+
+ arm,vexpress-sysreg,func:
+ description: FPGA specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 7
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ shutdown:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-shutdown
+
+ arm,vexpress-sysreg,func:
+ description: shutdown identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 8
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ reboot:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-reboot
+
+ arm,vexpress-sysreg,func:
+ description: reboot identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 9
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ dvimode:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-dvimode
+
+ arm,vexpress-sysreg,func:
+ description: DVI mode identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 11
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+additionalProperties: false
+
+required:
+ - compatible
+ - arm,vexpress,config-bridge
+
+patternProperties:
+ 'clk[0-9]*$':
+ type: object
+ description:
+ clocks
+
+ properties:
+ compatible:
+ const: arm,vexpress-osc
+
+ arm,vexpress-sysreg,func:
+ description: clock specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 1
+ - description: clock number
+
+ freq-range:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - description: minimal clock frequency
+ - description: maximum clock frequency
+
+ "#clock-cells":
+ const: 0
+
+ clock-output-names:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+ - "#clock-cells"
+
+ "^volt-.+$":
+ $ref: /schemas/regulator/regulator.yaml#
+ properties:
+ compatible:
+ const: arm,vexpress-volt
+
+ arm,vexpress-sysreg,func:
+ description: regulator specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 2
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ unevaluatedProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^amp-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-amp
+
+ arm,vexpress-sysreg,func:
+ description: current sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 3
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^temp-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-temp
+
+ arm,vexpress-sysreg,func:
+ description: temperature sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 4
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^reset[0-9]*$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-reset
+
+ arm,vexpress-sysreg,func:
+ description: reset specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 5
+ - description: reset device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^power-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-power
+
+ arm,vexpress-sysreg,func:
+ description: power sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 12
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^energy(-.+)?$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-energy
+
+ arm,vexpress-sysreg,func:
+ description: energy sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ oneOf:
+ - items:
+ - const: 13
+ - description: device number
+ - items:
+ - const: 13
+ - description: device number
+ - const: 13
+ - description: second device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+examples:
+ - |
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ clk0 {
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 0>;
+ #clock-cells = <0>;
+ };
+
+ energy {
+ compatible = "arm,vexpress-energy";
+ arm,vexpress-sysreg,func = <13 0>, <13 1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
deleted file mode 100644
index 50095802fb4ac..0000000000000
--- a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
+++ /dev/null
@@ -1,103 +0,0 @@
-ARM Versatile Express system registers
---------------------------------------
-
-This is a system control registers block, providing multiple low level
-platform functions like board detection and identification, software
-interrupt generation, MMC and NOR Flash control etc.
-
-Required node properties:
-- compatible value : = "arm,vexpress,sysreg";
-- reg : physical base address and the size of the registers window
-
-Deprecated properties, replaced by GPIO subnodes (see below):
-- gpio-controller : specifies that the node is a GPIO controller
-- #gpio-cells : size of the GPIO specifier, should be 2:
- - first cell is the pseudo-GPIO line number:
- 0 - MMC CARDIN
- 1 - MMC WPROT
- 2 - NOR FLASH WPn
- - second cell can take standard GPIO flags (currently ignored).
-
-Control registers providing pseudo-GPIO lines must be represented
-by subnodes, each of them requiring the following properties:
-- compatible value : one of
- "arm,vexpress-sysreg,sys_led"
- "arm,vexpress-sysreg,sys_mci"
- "arm,vexpress-sysreg,sys_flash"
-- gpio-controller : makes the node a GPIO controller
-- #gpio-cells : size of the GPIO specifier, must be 2:
- - first cell is the function number:
- - for sys_led : 0..7 = LED 0..7
- - for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT
- - for sys_flash : 0 = NOR FLASH WPn
- - second cell can take standard GPIO flags (currently ignored).
-
-Example:
- v2m_sysreg: sysreg@10000000 {
- compatible = "arm,vexpress-sysreg";
- reg = <0x10000000 0x1000>;
-
- v2m_led_gpios: sys_led@8 {
- compatible = "arm,vexpress-sysreg,sys_led";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- v2m_mmc_gpios: sys_mci@48 {
- compatible = "arm,vexpress-sysreg,sys_mci";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- v2m_flash_gpios: sys_flash@4c {
- compatible = "arm,vexpress-sysreg,sys_flash";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
-This block also can also act a bridge to the platform's configuration
-bus via "system control" interface, addressing devices with site number,
-position in the board stack, config controller, function and device
-numbers - see motherboard's TRM for more details. All configuration
-controller accessible via this interface must reference the sysreg
-node via "arm,vexpress,config-bridge" phandle and define appropriate
-topology properties - see main vexpress node documentation for more
-details. Each child of such node describes one function and must
-define the following properties:
-- compatible value : must be one of (corresponding to the TRM):
- "arm,vexpress-amp"
- "arm,vexpress-dvimode"
- "arm,vexpress-energy"
- "arm,vexpress-muxfpga"
- "arm,vexpress-osc"
- "arm,vexpress-power"
- "arm,vexpress-reboot"
- "arm,vexpress-reset"
- "arm,vexpress-scc"
- "arm,vexpress-shutdown"
- "arm,vexpress-temp"
- "arm,vexpress-volt"
-- arm,vexpress-sysreg,func : must contain a set of two cells long groups:
- - first cell of each group defines the function number
- (eg. 1 for clock generator, 2 for voltage regulators etc.)
- - second cell of each group defines device number (eg. osc 0,
- osc 1 etc.)
- - some functions (eg. energy meter, with its 64 bit long counter)
- are using more than one function/device number pair
-
-Example:
- mcc {
- compatible = "arm,vexpress,config-bus";
- arm,vexpress,config-bridge = <&v2m_sysreg>;
-
- osc@0 {
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <1 0>;
- };
-
- energy@0 {
- compatible = "arm,vexpress-energy";
- arm,vexpress-sysreg,func = <13 0>, <13 1>;
- };
- };
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 07/11] dt-bindings: arm: convert vexpress-config to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
The Arm Versatile Express system features a bridge device that provides
access to various smaller devices like clocks, reset gates and various
sensors.
Extract the second half of the informal vexpress-sysreg.txt binding and
make it proper DT schema compliant. This makes the old .txt binding
redundant, so remove it.
This describes both the actual parent configuration bridge, as well as
all the possible children devices.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/arm/vexpress-config.yaml | 285 ++++++++++++++++++
.../bindings/arm/vexpress-sysreg.txt | 103 -------
2 files changed, 285 insertions(+), 103 deletions(-)
create mode 100644 Documentation/devicetree/bindings/arm/vexpress-config.yaml
delete mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
diff --git a/Documentation/devicetree/bindings/arm/vexpress-config.yaml b/Documentation/devicetree/bindings/arm/vexpress-config.yaml
new file mode 100644
index 0000000000000..09e1adf5ca7a0
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/vexpress-config.yaml
@@ -0,0 +1,285 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/vexpress-config.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: ARM Versatile Express configuration bus bindings
+
+maintainers:
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ This is a system control register block, acting as a bridge to the
+ platform's configuration bus via "system control" interface, addressing
+ devices with site number, position in the board stack, config controller,
+ function and device numbers - see motherboard's TRM for more details.
+
+properties:
+ compatible:
+ const: arm,vexpress,config-bus
+
+ arm,vexpress,config-bridge:
+ $ref: /schemas/types.yaml#/definitions/phandle
+ description:
+ Phandle to the sysreg node.
+
+ muxfpga:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-muxfpga
+
+ arm,vexpress-sysreg,func:
+ description: FPGA specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 7
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ shutdown:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-shutdown
+
+ arm,vexpress-sysreg,func:
+ description: shutdown identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 8
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ reboot:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-reboot
+
+ arm,vexpress-sysreg,func:
+ description: reboot identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 9
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ dvimode:
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-dvimode
+
+ arm,vexpress-sysreg,func:
+ description: DVI mode identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 11
+ - description: device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+additionalProperties: false
+
+required:
+ - compatible
+ - arm,vexpress,config-bridge
+
+patternProperties:
+ 'clk[0-9]*$':
+ type: object
+ description:
+ clocks
+
+ properties:
+ compatible:
+ const: arm,vexpress-osc
+
+ arm,vexpress-sysreg,func:
+ description: clock specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 1
+ - description: clock number
+
+ freq-range:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - description: minimal clock frequency
+ - description: maximum clock frequency
+
+ "#clock-cells":
+ const: 0
+
+ clock-output-names:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+ - "#clock-cells"
+
+ "^volt-.+$":
+ $ref: /schemas/regulator/regulator.yaml#
+ properties:
+ compatible:
+ const: arm,vexpress-volt
+
+ arm,vexpress-sysreg,func:
+ description: regulator specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 2
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ unevaluatedProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^amp-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-amp
+
+ arm,vexpress-sysreg,func:
+ description: current sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 3
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^temp-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-temp
+
+ arm,vexpress-sysreg,func:
+ description: temperature sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 4
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^reset[0-9]*$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-reset
+
+ arm,vexpress-sysreg,func:
+ description: reset specifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 5
+ - description: reset device number
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^power-.+$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-power
+
+ arm,vexpress-sysreg,func:
+ description: power sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - const: 12
+ - description: device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+ "^energy(-.+)?$":
+ type: object
+ properties:
+ compatible:
+ const: arm,vexpress-energy
+
+ arm,vexpress-sysreg,func:
+ description: energy sensor identifier
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ oneOf:
+ - items:
+ - const: 13
+ - description: device number
+ - items:
+ - const: 13
+ - description: device number
+ - const: 13
+ - description: second device number
+
+ label:
+ maxItems: 1
+
+ additionalProperties: false
+ required:
+ - compatible
+ - arm,vexpress-sysreg,func
+
+examples:
+ - |
+ mcc {
+ compatible = "arm,vexpress,config-bus";
+ arm,vexpress,config-bridge = <&v2m_sysreg>;
+
+ clk0 {
+ compatible = "arm,vexpress-osc";
+ arm,vexpress-sysreg,func = <1 0>;
+ #clock-cells = <0>;
+ };
+
+ energy {
+ compatible = "arm,vexpress-energy";
+ arm,vexpress-sysreg,func = <13 0>, <13 1>;
+ };
+ };
diff --git a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt b/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
deleted file mode 100644
index 50095802fb4ac..0000000000000
--- a/Documentation/devicetree/bindings/arm/vexpress-sysreg.txt
+++ /dev/null
@@ -1,103 +0,0 @@
-ARM Versatile Express system registers
---------------------------------------
-
-This is a system control registers block, providing multiple low level
-platform functions like board detection and identification, software
-interrupt generation, MMC and NOR Flash control etc.
-
-Required node properties:
-- compatible value : = "arm,vexpress,sysreg";
-- reg : physical base address and the size of the registers window
-
-Deprecated properties, replaced by GPIO subnodes (see below):
-- gpio-controller : specifies that the node is a GPIO controller
-- #gpio-cells : size of the GPIO specifier, should be 2:
- - first cell is the pseudo-GPIO line number:
- 0 - MMC CARDIN
- 1 - MMC WPROT
- 2 - NOR FLASH WPn
- - second cell can take standard GPIO flags (currently ignored).
-
-Control registers providing pseudo-GPIO lines must be represented
-by subnodes, each of them requiring the following properties:
-- compatible value : one of
- "arm,vexpress-sysreg,sys_led"
- "arm,vexpress-sysreg,sys_mci"
- "arm,vexpress-sysreg,sys_flash"
-- gpio-controller : makes the node a GPIO controller
-- #gpio-cells : size of the GPIO specifier, must be 2:
- - first cell is the function number:
- - for sys_led : 0..7 = LED 0..7
- - for sys_mci : 0 = MMC CARDIN, 1 = MMC WPROT
- - for sys_flash : 0 = NOR FLASH WPn
- - second cell can take standard GPIO flags (currently ignored).
-
-Example:
- v2m_sysreg: sysreg@10000000 {
- compatible = "arm,vexpress-sysreg";
- reg = <0x10000000 0x1000>;
-
- v2m_led_gpios: sys_led@8 {
- compatible = "arm,vexpress-sysreg,sys_led";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- v2m_mmc_gpios: sys_mci@48 {
- compatible = "arm,vexpress-sysreg,sys_mci";
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- v2m_flash_gpios: sys_flash@4c {
- compatible = "arm,vexpress-sysreg,sys_flash";
- gpio-controller;
- #gpio-cells = <2>;
- };
- };
-
-This block also can also act a bridge to the platform's configuration
-bus via "system control" interface, addressing devices with site number,
-position in the board stack, config controller, function and device
-numbers - see motherboard's TRM for more details. All configuration
-controller accessible via this interface must reference the sysreg
-node via "arm,vexpress,config-bridge" phandle and define appropriate
-topology properties - see main vexpress node documentation for more
-details. Each child of such node describes one function and must
-define the following properties:
-- compatible value : must be one of (corresponding to the TRM):
- "arm,vexpress-amp"
- "arm,vexpress-dvimode"
- "arm,vexpress-energy"
- "arm,vexpress-muxfpga"
- "arm,vexpress-osc"
- "arm,vexpress-power"
- "arm,vexpress-reboot"
- "arm,vexpress-reset"
- "arm,vexpress-scc"
- "arm,vexpress-shutdown"
- "arm,vexpress-temp"
- "arm,vexpress-volt"
-- arm,vexpress-sysreg,func : must contain a set of two cells long groups:
- - first cell of each group defines the function number
- (eg. 1 for clock generator, 2 for voltage regulators etc.)
- - second cell of each group defines device number (eg. osc 0,
- osc 1 etc.)
- - some functions (eg. energy meter, with its 64 bit long counter)
- are using more than one function/device number pair
-
-Example:
- mcc {
- compatible = "arm,vexpress,config-bus";
- arm,vexpress,config-bridge = <&v2m_sysreg>;
-
- osc@0 {
- compatible = "arm,vexpress-osc";
- arm,vexpress-sysreg,func = <1 0>;
- };
-
- energy@0 {
- compatible = "arm,vexpress-energy";
- arm,vexpress-sysreg,func = <13 0>, <13 1>;
- };
- };
--
2.25.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.
Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
.../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
2 files changed, 174 insertions(+), 110 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt
deleted file mode 100644
index 3f977e72a2005..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,pl11x.txt
+++ /dev/null
@@ -1,110 +0,0 @@
-* ARM PrimeCell Color LCD Controller PL110/PL111
-
-See also Documentation/devicetree/bindings/arm/primecell.yaml
-
-Required properties:
-
-- compatible: must be one of:
- "arm,pl110", "arm,primecell"
- "arm,pl111", "arm,primecell"
-
-- reg: base address and size of the control registers block
-
-- interrupt-names: either the single entry "combined" representing a
- combined interrupt output (CLCDINTR), or the four entries
- "mbe", "vcomp", "lnbu", "fuf" representing the individual
- CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
-
-- interrupts: contains an interrupt specifier for each entry in
- interrupt-names
-
-- clock-names: should contain "clcdclk" and "apb_pclk"
-
-- clocks: contains phandle and clock specifier pairs for the entries
- in the clock-names property. See
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer
- may be located anywhere in the memory
-
-- max-memory-bandwidth: maximum bandwidth in bytes per second that the
- cell's memory interface can handle; if not present, the memory
- interface is fast enough to handle all possible video modes
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
- for video transmitter interfaces; see
- Documentation/devicetree/bindings/media/video-interfaces.txt
-
-Deprecated properties:
- The port's endbpoint subnode had this, now deprecated property
- in the past. Drivers should be able to survive without it:
-
- - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
- defining the way CLD pads are wired up; first value
- contains index of the "CLD" external pin (pad) used
- as R0 (first bit of the red component), second value
- index of the pad used as G0, third value index of the
- pad used as B0, see also "LCD panel signal multiplexing
- details" paragraphs in the PL110/PL111 Technical
- Reference Manuals; this implicitly defines available
- color modes, for example:
- - PL111 TFT 4:4:4 panel:
- arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
- - PL110 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
- - PL111 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
- - PL111 TFT 5:6:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
- - PL110 and PL111 TFT 8:8:8 panel:
- arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
- - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
- arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
-
-
-Example:
-
- clcd@10020000 {
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x10020000 0x1000>;
- interrupt-names = "combined";
- interrupts = <0 44 4>;
- clocks = <&oscclk1>, <&oscclk2>;
- clock-names = "clcdclk", "apb_pclk";
- max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
-
- port {
- clcd_pads: endpoint {
- remote-endpoint = <&clcd_panel>;
- };
- };
-
- };
-
- panel {
- compatible = "panel-dpi";
-
- port {
- clcd_panel: endpoint {
- remote-endpoint = <&clcd_pads>;
- };
- };
-
- panel-timing {
- clock-frequency = <25175000>;
- hactive = <640>;
- hback-porch = <40>;
- hfront-porch = <24>;
- hsync-len = <96>;
- vactive = <480>;
- vback-porch = <32>;
- vfront-porch = <11>;
- vsync-len = <2>;
- };
- };
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
new file mode 100644
index 0000000000000..c17838c197da8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm PrimeCell Color LCD Controller PL110/PL111
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
+ a framebuffer region in system memory, and creates timed signals for
+ a variety of LCD panels.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - arm,pl110
+ - arm,pl111
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,pl110
+ - arm,pl111
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupt-names:
+ oneOf:
+ - const: combined
+ description:
+ The IP provides four individual interrupt lines, but also one
+ combined line. If the integration only connects this line to the
+ interrupt controller, this single interrupt is noted here.
+ - items:
+ - const: mbe # CLCDMBEINTR
+ - const: vcomp # CLCDVCOMPINTR
+ - const: lnbu # CLCDLNBUINTR
+ - const: fuf # CLCDFUFINTR
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: clcdclk
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: The CLCDCLK reference clock for the controller.
+ - description: The HCLK AHB slave clock for the register access.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ max-memory-bandwidth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Maximum bandwidth in bytes per second that the cell's memory interface
+ can handle.
+ If not present, the memory interface is fast enough to handle all
+ possible video modes.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+ properties:
+ endpoint:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ unevaluatedProperties: false
+
+ properties:
+ arm,pl11x,tft-r0g0b0-pads:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - description: index of CLD pad used for first red bit (R0)
+ - description: index of CLD pad used for first green bit (G0)
+ - description: index of CLD pad used for first blue bit (G0)
+ deprecated: true
+ description: |
+ DEPRECATED. An array of three 32-bit values, defining the way
+ CLD[23:0] pads are wired up.
+ The first value contains the index of the "CLD" external pin (pad)
+ used as R0 (first bit of the red component), the second value for
+ green, the third value for blue.
+ See also "LCD panel signal multiplexing details" paragraphs in the
+ PL110/PL111 Technical Reference Manuals.
+ This implicitly defines available color modes, for example:
+ - PL111 TFT 4:4:4 panel:
+ arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
+ - PL110 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+ - PL111 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
+ - PL111 TFT 5:6:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
+ - PL110 and PL111 TFT 8:8:8 panel:
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
+ arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupt-names
+ - interrupts
+ - clock-names
+ - clocks
+ - port
+
+examples:
+ - |
+ clcd@10020000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x10020000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <44>;
+ clocks = <&oscclk1>, <&oscclk2>;
+ clock-names = "clcdclk", "apb_pclk";
+ max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
+
+ port {
+ clcd_pads: endpoint {
+ remote-endpoint = <&clcd_panel>;
+ };
+ };
+ };
+
+ panel {
+ compatible = "arm,rtsm-display", "panel-dpi";
+ power-supply = <&vcc_supply>;
+
+ port {
+ clcd_panel: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+
+ panel-timing {
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ hback-porch = <40>;
+ hfront-porch = <24>;
+ hsync-len = <96>;
+ vactive = <480>;
+ vback-porch = <32>;
+ vfront-porch = <11>;
+ vsync-len = <2>;
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.
Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
.../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
2 files changed, 174 insertions(+), 110 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt
deleted file mode 100644
index 3f977e72a2005..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,pl11x.txt
+++ /dev/null
@@ -1,110 +0,0 @@
-* ARM PrimeCell Color LCD Controller PL110/PL111
-
-See also Documentation/devicetree/bindings/arm/primecell.yaml
-
-Required properties:
-
-- compatible: must be one of:
- "arm,pl110", "arm,primecell"
- "arm,pl111", "arm,primecell"
-
-- reg: base address and size of the control registers block
-
-- interrupt-names: either the single entry "combined" representing a
- combined interrupt output (CLCDINTR), or the four entries
- "mbe", "vcomp", "lnbu", "fuf" representing the individual
- CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
-
-- interrupts: contains an interrupt specifier for each entry in
- interrupt-names
-
-- clock-names: should contain "clcdclk" and "apb_pclk"
-
-- clocks: contains phandle and clock specifier pairs for the entries
- in the clock-names property. See
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer
- may be located anywhere in the memory
-
-- max-memory-bandwidth: maximum bandwidth in bytes per second that the
- cell's memory interface can handle; if not present, the memory
- interface is fast enough to handle all possible video modes
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
- for video transmitter interfaces; see
- Documentation/devicetree/bindings/media/video-interfaces.txt
-
-Deprecated properties:
- The port's endbpoint subnode had this, now deprecated property
- in the past. Drivers should be able to survive without it:
-
- - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
- defining the way CLD pads are wired up; first value
- contains index of the "CLD" external pin (pad) used
- as R0 (first bit of the red component), second value
- index of the pad used as G0, third value index of the
- pad used as B0, see also "LCD panel signal multiplexing
- details" paragraphs in the PL110/PL111 Technical
- Reference Manuals; this implicitly defines available
- color modes, for example:
- - PL111 TFT 4:4:4 panel:
- arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
- - PL110 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
- - PL111 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
- - PL111 TFT 5:6:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
- - PL110 and PL111 TFT 8:8:8 panel:
- arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
- - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
- arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
-
-
-Example:
-
- clcd@10020000 {
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x10020000 0x1000>;
- interrupt-names = "combined";
- interrupts = <0 44 4>;
- clocks = <&oscclk1>, <&oscclk2>;
- clock-names = "clcdclk", "apb_pclk";
- max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
-
- port {
- clcd_pads: endpoint {
- remote-endpoint = <&clcd_panel>;
- };
- };
-
- };
-
- panel {
- compatible = "panel-dpi";
-
- port {
- clcd_panel: endpoint {
- remote-endpoint = <&clcd_pads>;
- };
- };
-
- panel-timing {
- clock-frequency = <25175000>;
- hactive = <640>;
- hback-porch = <40>;
- hfront-porch = <24>;
- hsync-len = <96>;
- vactive = <480>;
- vback-porch = <32>;
- vfront-porch = <11>;
- vsync-len = <2>;
- };
- };
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
new file mode 100644
index 0000000000000..c17838c197da8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm PrimeCell Color LCD Controller PL110/PL111
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
+ a framebuffer region in system memory, and creates timed signals for
+ a variety of LCD panels.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - arm,pl110
+ - arm,pl111
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,pl110
+ - arm,pl111
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupt-names:
+ oneOf:
+ - const: combined
+ description:
+ The IP provides four individual interrupt lines, but also one
+ combined line. If the integration only connects this line to the
+ interrupt controller, this single interrupt is noted here.
+ - items:
+ - const: mbe # CLCDMBEINTR
+ - const: vcomp # CLCDVCOMPINTR
+ - const: lnbu # CLCDLNBUINTR
+ - const: fuf # CLCDFUFINTR
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: clcdclk
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: The CLCDCLK reference clock for the controller.
+ - description: The HCLK AHB slave clock for the register access.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ max-memory-bandwidth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Maximum bandwidth in bytes per second that the cell's memory interface
+ can handle.
+ If not present, the memory interface is fast enough to handle all
+ possible video modes.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+ properties:
+ endpoint:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ unevaluatedProperties: false
+
+ properties:
+ arm,pl11x,tft-r0g0b0-pads:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - description: index of CLD pad used for first red bit (R0)
+ - description: index of CLD pad used for first green bit (G0)
+ - description: index of CLD pad used for first blue bit (G0)
+ deprecated: true
+ description: |
+ DEPRECATED. An array of three 32-bit values, defining the way
+ CLD[23:0] pads are wired up.
+ The first value contains the index of the "CLD" external pin (pad)
+ used as R0 (first bit of the red component), the second value for
+ green, the third value for blue.
+ See also "LCD panel signal multiplexing details" paragraphs in the
+ PL110/PL111 Technical Reference Manuals.
+ This implicitly defines available color modes, for example:
+ - PL111 TFT 4:4:4 panel:
+ arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
+ - PL110 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+ - PL111 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
+ - PL111 TFT 5:6:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
+ - PL110 and PL111 TFT 8:8:8 panel:
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
+ arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupt-names
+ - interrupts
+ - clock-names
+ - clocks
+ - port
+
+examples:
+ - |
+ clcd@10020000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x10020000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <44>;
+ clocks = <&oscclk1>, <&oscclk2>;
+ clock-names = "clcdclk", "apb_pclk";
+ max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
+
+ port {
+ clcd_pads: endpoint {
+ remote-endpoint = <&clcd_panel>;
+ };
+ };
+ };
+
+ panel {
+ compatible = "arm,rtsm-display", "panel-dpi";
+ power-supply = <&vcc_supply>;
+
+ port {
+ clcd_panel: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+
+ panel-timing {
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ hback-porch = <40>;
+ hfront-porch = <24>;
+ hsync-len = <96>;
+ vactive = <480>;
+ vback-porch = <32>;
+ vfront-porch = <11>;
+ vsync-len = <2>;
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm PL110 and PL111 are IP blocks that provide a display engine with
an LCD interface, being able to drive a variety of LC panels.
Convert the binding over to DT schema, to the DTs can be automatically
checked.
This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
because this is used by several DTs in the tree.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
.../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
2 files changed, 174 insertions(+), 110 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.txt b/Documentation/devicetree/bindings/display/arm,pl11x.txt
deleted file mode 100644
index 3f977e72a2005..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,pl11x.txt
+++ /dev/null
@@ -1,110 +0,0 @@
-* ARM PrimeCell Color LCD Controller PL110/PL111
-
-See also Documentation/devicetree/bindings/arm/primecell.yaml
-
-Required properties:
-
-- compatible: must be one of:
- "arm,pl110", "arm,primecell"
- "arm,pl111", "arm,primecell"
-
-- reg: base address and size of the control registers block
-
-- interrupt-names: either the single entry "combined" representing a
- combined interrupt output (CLCDINTR), or the four entries
- "mbe", "vcomp", "lnbu", "fuf" representing the individual
- CLCDMBEINTR, CLCDVCOMPINTR, CLCDLNBUINTR, CLCDFUFINTR interrupts
-
-- interrupts: contains an interrupt specifier for each entry in
- interrupt-names
-
-- clock-names: should contain "clcdclk" and "apb_pclk"
-
-- clocks: contains phandle and clock specifier pairs for the entries
- in the clock-names property. See
- Documentation/devicetree/bindings/clock/clock-bindings.txt
-
-Optional properties:
-
-- memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer
- may be located anywhere in the memory
-
-- max-memory-bandwidth: maximum bandwidth in bytes per second that the
- cell's memory interface can handle; if not present, the memory
- interface is fast enough to handle all possible video modes
-
-Required sub-nodes:
-
-- port: describes LCD panel signals, following the common binding
- for video transmitter interfaces; see
- Documentation/devicetree/bindings/media/video-interfaces.txt
-
-Deprecated properties:
- The port's endbpoint subnode had this, now deprecated property
- in the past. Drivers should be able to survive without it:
-
- - arm,pl11x,tft-r0g0b0-pads: an array of three 32-bit values,
- defining the way CLD pads are wired up; first value
- contains index of the "CLD" external pin (pad) used
- as R0 (first bit of the red component), second value
- index of the pad used as G0, third value index of the
- pad used as B0, see also "LCD panel signal multiplexing
- details" paragraphs in the PL110/PL111 Technical
- Reference Manuals; this implicitly defines available
- color modes, for example:
- - PL111 TFT 4:4:4 panel:
- arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
- - PL110 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
- - PL111 TFT (1:)5:5:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
- - PL111 TFT 5:6:5 panel:
- arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
- - PL110 and PL111 TFT 8:8:8 panel:
- arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
- - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
- arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
-
-
-Example:
-
- clcd@10020000 {
- compatible = "arm,pl111", "arm,primecell";
- reg = <0x10020000 0x1000>;
- interrupt-names = "combined";
- interrupts = <0 44 4>;
- clocks = <&oscclk1>, <&oscclk2>;
- clock-names = "clcdclk", "apb_pclk";
- max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
-
- port {
- clcd_pads: endpoint {
- remote-endpoint = <&clcd_panel>;
- };
- };
-
- };
-
- panel {
- compatible = "panel-dpi";
-
- port {
- clcd_panel: endpoint {
- remote-endpoint = <&clcd_pads>;
- };
- };
-
- panel-timing {
- clock-frequency = <25175000>;
- hactive = <640>;
- hback-porch = <40>;
- hfront-porch = <24>;
- hsync-len = <96>;
- vactive = <480>;
- vback-porch = <32>;
- vfront-porch = <11>;
- vsync-len = <2>;
- };
- };
diff --git a/Documentation/devicetree/bindings/display/arm,pl11x.yaml b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
new file mode 100644
index 0000000000000..c17838c197da8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,pl11x.yaml
@@ -0,0 +1,174 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,pl11x.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm PrimeCell Color LCD Controller PL110/PL111
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Primcell PL010/PL111 is an LCD controller IP, than scans out
+ a framebuffer region in system memory, and creates timed signals for
+ a variety of LCD panels.
+
+# We need a select here so we don't match all nodes with 'arm,primecell'
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - arm,pl110
+ - arm,pl111
+ required:
+ - compatible
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - arm,pl110
+ - arm,pl111
+ - const: arm,primecell
+
+ reg:
+ maxItems: 1
+
+ interrupt-names:
+ oneOf:
+ - const: combined
+ description:
+ The IP provides four individual interrupt lines, but also one
+ combined line. If the integration only connects this line to the
+ interrupt controller, this single interrupt is noted here.
+ - items:
+ - const: mbe # CLCDMBEINTR
+ - const: vcomp # CLCDVCOMPINTR
+ - const: lnbu # CLCDLNBUINTR
+ - const: fuf # CLCDFUFINTR
+
+ interrupts:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ items:
+ - const: clcdclk
+ - const: apb_pclk
+
+ clocks:
+ items:
+ - description: The CLCDCLK reference clock for the controller.
+ - description: The HCLK AHB slave clock for the register access.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ max-memory-bandwidth:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Maximum bandwidth in bytes per second that the cell's memory interface
+ can handle.
+ If not present, the memory interface is fast enough to handle all
+ possible video modes.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ additionalProperties: false
+
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+ properties:
+ endpoint:
+ $ref: /schemas/graph.yaml#/$defs/endpoint-base
+ unevaluatedProperties: false
+
+ properties:
+ arm,pl11x,tft-r0g0b0-pads:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ items:
+ - description: index of CLD pad used for first red bit (R0)
+ - description: index of CLD pad used for first green bit (G0)
+ - description: index of CLD pad used for first blue bit (G0)
+ deprecated: true
+ description: |
+ DEPRECATED. An array of three 32-bit values, defining the way
+ CLD[23:0] pads are wired up.
+ The first value contains the index of the "CLD" external pin (pad)
+ used as R0 (first bit of the red component), the second value for
+ green, the third value for blue.
+ See also "LCD panel signal multiplexing details" paragraphs in the
+ PL110/PL111 Technical Reference Manuals.
+ This implicitly defines available color modes, for example:
+ - PL111 TFT 4:4:4 panel:
+ arm,pl11x,tft-r0g0b0-pads = <4 15 20>;
+ - PL110 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <1 7 13>;
+ - PL111 TFT (1:)5:5:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 11 19>;
+ - PL111 TFT 5:6:5 panel:
+ arm,pl11x,tft-r0g0b0-pads = <3 10 19>;
+ - PL110 and PL111 TFT 8:8:8 panel:
+ arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
+ - PL110 and PL111 TFT 8:8:8 panel, R & B components swapped:
+ arm,pl11x,tft-r0g0b0-pads = <16 8 0>;
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupt-names
+ - interrupts
+ - clock-names
+ - clocks
+ - port
+
+examples:
+ - |
+ clcd@10020000 {
+ compatible = "arm,pl111", "arm,primecell";
+ reg = <0x10020000 0x1000>;
+ interrupt-names = "combined";
+ interrupts = <44>;
+ clocks = <&oscclk1>, <&oscclk2>;
+ clock-names = "clcdclk", "apb_pclk";
+ max-memory-bandwidth = <94371840>; /* Bps, 1024x768@60 16bpp */
+
+ port {
+ clcd_pads: endpoint {
+ remote-endpoint = <&clcd_panel>;
+ };
+ };
+ };
+
+ panel {
+ compatible = "arm,rtsm-display", "panel-dpi";
+ power-supply = <&vcc_supply>;
+
+ port {
+ clcd_panel: endpoint {
+ remote-endpoint = <&clcd_pads>;
+ };
+ };
+
+ panel-timing {
+ clock-frequency = <25175000>;
+ hactive = <640>;
+ hback-porch = <40>;
+ hfront-porch = <24>;
+ hsync-len = <96>;
+ vactive = <480>;
+ vback-porch = <32>;
+ vfront-porch = <11>;
+ vsync-len = <2>;
+ };
+ };
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
.../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
2 files changed, 89 insertions(+), 79 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.txt b/Documentation/devicetree/bindings/display/arm,hdlcd.txt
deleted file mode 100644
index 78bc24296f3e4..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,hdlcd.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-ARM HDLCD
-
-This is a display controller found on several development platforms produced
-by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
-streamer that reads the data from a framebuffer and sends it to a single
-digital encoder (DVI or HDMI).
-
-Required properties:
- - compatible: "arm,hdlcd"
- - reg: Physical base address and length of the controller's registers.
- - interrupts: One interrupt used by the display controller to notify the
- interrupt controller when any of the interrupt sources programmed in
- the interrupt mask register have activated.
- - clocks: A list of phandle + clock-specifier pairs, one for each
- entry in 'clock-names'.
- - clock-names: A list of clock names. For HDLCD it should contain:
- - "pxlclk" for the clock feeding the output PLL of the controller.
-
-Required sub-nodes:
- - port: The HDLCD connection to an encoder chip. The connection is modeled
- using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt.
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be
- used for the framebuffer; if not present, the framebuffer may be located
- anywhere in memory.
-
-
-Example:
-
-/ {
- ...
-
- hdlcd@2b000000 {
- compatible = "arm,hdlcd";
- reg = <0 0x2b000000 0 0x1000>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&oscclk5>;
- clock-names = "pxlclk";
- port {
- hdlcd_output: endpoint@0 {
- remote-endpoint = <&hdmi_enc_input>;
- };
- };
- };
-
- /* HDMI encoder on I2C bus */
- i2c@7ffa0000 {
- ....
- hdmi-transmitter@70 {
- compatible = ".....";
- reg = <0x70>;
- port@0 {
- hdmi_enc_input: endpoint {
- remote-endpoint = <&hdlcd_output>;
- };
-
- hdmi_enc_output: endpoint {
- remote-endpoint = <&hdmi_1_port>;
- };
- };
- };
-
- };
-
- hdmi1: connector@1 {
- compatible = "hdmi-connector";
- type = "a";
- port {
- hdmi_1_port: endpoint {
- remote-endpoint = <&hdmi_enc_output>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.yaml b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
new file mode 100644
index 0000000000000..a2670258c48d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm HDLCD display controller binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm HDLCD is a display controller found on several development platforms
+ produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
+ RGB streamer that reads the data from a framebuffer and sends it to a single
+ digital encoder (DVI or HDMI).
+
+properties:
+ compatible:
+ const: arm,hdlcd
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: pxlclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - port
+
+examples:
+ - |
+ hdlcd@2b000000 {
+ compatible = "arm,hdlcd";
+ reg = <0x2b000000 0x1000>;
+ interrupts = <0 85 4>;
+ clocks = <&oscclk5>;
+ clock-names = "pxlclk";
+ port {
+ hdlcd_output: endpoint {
+ remote-endpoint = <&hdmi_enc_input>;
+ };
+ };
+ };
+
+ /* HDMI encoder on I2C bus */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi-transmitter@70 {
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+ port {
+ hdmi_enc_input: endpoint {
+ remote-endpoint = <&hdlcd_output>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
.../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
2 files changed, 89 insertions(+), 79 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.txt b/Documentation/devicetree/bindings/display/arm,hdlcd.txt
deleted file mode 100644
index 78bc24296f3e4..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,hdlcd.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-ARM HDLCD
-
-This is a display controller found on several development platforms produced
-by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
-streamer that reads the data from a framebuffer and sends it to a single
-digital encoder (DVI or HDMI).
-
-Required properties:
- - compatible: "arm,hdlcd"
- - reg: Physical base address and length of the controller's registers.
- - interrupts: One interrupt used by the display controller to notify the
- interrupt controller when any of the interrupt sources programmed in
- the interrupt mask register have activated.
- - clocks: A list of phandle + clock-specifier pairs, one for each
- entry in 'clock-names'.
- - clock-names: A list of clock names. For HDLCD it should contain:
- - "pxlclk" for the clock feeding the output PLL of the controller.
-
-Required sub-nodes:
- - port: The HDLCD connection to an encoder chip. The connection is modeled
- using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt.
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be
- used for the framebuffer; if not present, the framebuffer may be located
- anywhere in memory.
-
-
-Example:
-
-/ {
- ...
-
- hdlcd@2b000000 {
- compatible = "arm,hdlcd";
- reg = <0 0x2b000000 0 0x1000>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&oscclk5>;
- clock-names = "pxlclk";
- port {
- hdlcd_output: endpoint@0 {
- remote-endpoint = <&hdmi_enc_input>;
- };
- };
- };
-
- /* HDMI encoder on I2C bus */
- i2c@7ffa0000 {
- ....
- hdmi-transmitter@70 {
- compatible = ".....";
- reg = <0x70>;
- port@0 {
- hdmi_enc_input: endpoint {
- remote-endpoint = <&hdlcd_output>;
- };
-
- hdmi_enc_output: endpoint {
- remote-endpoint = <&hdmi_1_port>;
- };
- };
- };
-
- };
-
- hdmi1: connector@1 {
- compatible = "hdmi-connector";
- type = "a";
- port {
- hdmi_1_port: endpoint {
- remote-endpoint = <&hdmi_enc_output>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.yaml b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
new file mode 100644
index 0000000000000..a2670258c48d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm HDLCD display controller binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm HDLCD is a display controller found on several development platforms
+ produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
+ RGB streamer that reads the data from a framebuffer and sends it to a single
+ digital encoder (DVI or HDMI).
+
+properties:
+ compatible:
+ const: arm,hdlcd
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: pxlclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - port
+
+examples:
+ - |
+ hdlcd@2b000000 {
+ compatible = "arm,hdlcd";
+ reg = <0x2b000000 0x1000>;
+ interrupts = <0 85 4>;
+ clocks = <&oscclk5>;
+ clock-names = "pxlclk";
+ port {
+ hdlcd_output: endpoint {
+ remote-endpoint = <&hdmi_enc_input>;
+ };
+ };
+ };
+
+ /* HDMI encoder on I2C bus */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi-transmitter@70 {
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+ port {
+ hdmi_enc_input: endpoint {
+ remote-endpoint = <&hdlcd_output>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm HDLCD is a display controller that scans out a framebuffer and
hands a signal to a digital encoder to generate a DVI or HDMI signal.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
.../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
2 files changed, 89 insertions(+), 79 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.txt b/Documentation/devicetree/bindings/display/arm,hdlcd.txt
deleted file mode 100644
index 78bc24296f3e4..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,hdlcd.txt
+++ /dev/null
@@ -1,79 +0,0 @@
-ARM HDLCD
-
-This is a display controller found on several development platforms produced
-by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
-streamer that reads the data from a framebuffer and sends it to a single
-digital encoder (DVI or HDMI).
-
-Required properties:
- - compatible: "arm,hdlcd"
- - reg: Physical base address and length of the controller's registers.
- - interrupts: One interrupt used by the display controller to notify the
- interrupt controller when any of the interrupt sources programmed in
- the interrupt mask register have activated.
- - clocks: A list of phandle + clock-specifier pairs, one for each
- entry in 'clock-names'.
- - clock-names: A list of clock names. For HDLCD it should contain:
- - "pxlclk" for the clock feeding the output PLL of the controller.
-
-Required sub-nodes:
- - port: The HDLCD connection to an encoder chip. The connection is modeled
- using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt.
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt) to be
- used for the framebuffer; if not present, the framebuffer may be located
- anywhere in memory.
-
-
-Example:
-
-/ {
- ...
-
- hdlcd@2b000000 {
- compatible = "arm,hdlcd";
- reg = <0 0x2b000000 0 0x1000>;
- interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&oscclk5>;
- clock-names = "pxlclk";
- port {
- hdlcd_output: endpoint@0 {
- remote-endpoint = <&hdmi_enc_input>;
- };
- };
- };
-
- /* HDMI encoder on I2C bus */
- i2c@7ffa0000 {
- ....
- hdmi-transmitter@70 {
- compatible = ".....";
- reg = <0x70>;
- port@0 {
- hdmi_enc_input: endpoint {
- remote-endpoint = <&hdlcd_output>;
- };
-
- hdmi_enc_output: endpoint {
- remote-endpoint = <&hdmi_1_port>;
- };
- };
- };
-
- };
-
- hdmi1: connector@1 {
- compatible = "hdmi-connector";
- type = "a";
- port {
- hdmi_1_port: endpoint {
- remote-endpoint = <&hdmi_enc_output>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,hdlcd.yaml b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
new file mode 100644
index 0000000000000..a2670258c48d3
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,hdlcd.yaml
@@ -0,0 +1,89 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm HDLCD display controller binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm HDLCD is a display controller found on several development platforms
+ produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
+ RGB streamer that reads the data from a framebuffer and sends it to a single
+ digital encoder (DVI or HDMI).
+
+properties:
+ compatible:
+ const: arm,hdlcd
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: pxlclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ maxItems: 1
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - port
+
+examples:
+ - |
+ hdlcd@2b000000 {
+ compatible = "arm,hdlcd";
+ reg = <0x2b000000 0x1000>;
+ interrupts = <0 85 4>;
+ clocks = <&oscclk5>;
+ clock-names = "pxlclk";
+ port {
+ hdlcd_output: endpoint {
+ remote-endpoint = <&hdmi_enc_input>;
+ };
+ };
+ };
+
+ /* HDMI encoder on I2C bus */
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ hdmi-transmitter@70 {
+ compatible = "nxp,tda998x";
+ reg = <0x70>;
+ port {
+ hdmi_enc_input: endpoint {
+ remote-endpoint = <&hdlcd_output>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,malidp.txt | 68 ----------
.../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
2 files changed, 116 insertions(+), 68 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt
deleted file mode 100644
index 7a97a2b48c2a2..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,malidp.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-ARM Mali-DP
-
-The following bindings apply to a family of Display Processors sold as
-licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
-DP650 processors that offer multiple composition layers, support for
-rotation and scaling output.
-
-Required properties:
- - compatible: should be one of
- "arm,mali-dp500"
- "arm,mali-dp550"
- "arm,mali-dp650"
- depending on the particular implementation present in the hardware
- - reg: Physical base address and size of the block of registers used by
- the processor.
- - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt,
- interrupt client nodes.
- - interrupt-names: name of the engine inside the processor that will
- use the corresponding interrupt. Should be one of "DE" or "SE".
- - clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
- - clock-names: A list of clock names. It should contain:
- - "pclk": for the APB interface clock
- - "aclk": for the AXI interface clock
- - "mclk": for the main processor clock
- - "pxlclk": for the pixel clock feeding the output PLL of the processor.
- - arm,malidp-output-port-lines: Array of u8 values describing the number
- of output lines per channel (R, G and B).
-
-Required sub-nodes:
- - port: The Mali DP connection to an encoder input port. The connection
- is modelled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
- - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS
- levels of DP500's QoS signaling.
-
-
-Example:
-
-/ {
- ...
-
- dp0: malidp@6f200000 {
- compatible = "arm,mali-dp650";
- reg = <0 0x6f200000 0 0x20000>;
- memory-region = <&display_reserved>;
- interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>,
- <0 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "DE", "SE";
- clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
- clock-names = "pxlclk", "mclk", "aclk", "pclk";
- arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
- arm,malidp-arqos-high-level = <0xd000d000>;
- port {
- dp0_output: endpoint {
- remote-endpoint = <&tda998x_2_input>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
new file mode 100644
index 0000000000000..ea7b7100548bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Mali Display Processor (Mali-DP) binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The following bindings apply to a family of Display Processors sold as
+ licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
+ DP650 processors that offer multiple composition layers, support for
+ rotation and scaling output.
+
+properties:
+ compatible:
+ enum:
+ - arm,mali-dp500
+ - arm,mali-dp550
+ - arm,mali-dp650
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description:
+ The interrupt used by the Display Engine (DE). Can be shared with
+ the interrupt for the Scaling Engine (SE), but it will have to be
+ listed individually.
+ - description:
+ The interrupt used by the Scaling Engine (SE). Can be shared with
+ the interrupt for the Display Engine (DE), but it will have to be
+ listed individually.
+
+ interrupt-names:
+ items:
+ - const: DE
+ - const: SE
+
+ clock-names:
+ items:
+ - const: pxlclk
+ - const: mclk
+ - const: aclk
+ - const: pclk
+
+ clocks:
+ items:
+ - description: the pixel clock feeding the output PLL of the processor
+ - description: the main processor clock
+ - description: the AXI interface clock
+ - description: the APB interface clock
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ arm,malidp-output-port-lines:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ description:
+ Number of output lines/bits for each colour channel.
+ items:
+ - description: number of output lines for the red channel (R)
+ - description: number of output lines for the green channel (G)
+ - description: number of output lines for the blue channel (B)
+
+ arm,malidp-arqos-high-level:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ integer describing the ARQoS levels of DP500's QoS signaling
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - port
+ - arm,malidp-output-port-lines
+
+examples:
+ - |
+ dp0: malidp@6f200000 {
+ compatible = "arm,mali-dp650";
+ reg = <0x6f200000 0x20000>;
+ memory-region = <&display_reserved>;
+ interrupts = <168>, <168>;
+ interrupt-names = "DE", "SE";
+ clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
+ clock-names = "pxlclk", "mclk", "aclk", "pclk";
+ arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+ arm,malidp-arqos-high-level = <0xd000d000>;
+
+ port {
+ dp0_output: endpoint {
+ remote-endpoint = <&tda998x_2_input>;
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,malidp.txt | 68 ----------
.../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
2 files changed, 116 insertions(+), 68 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt
deleted file mode 100644
index 7a97a2b48c2a2..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,malidp.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-ARM Mali-DP
-
-The following bindings apply to a family of Display Processors sold as
-licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
-DP650 processors that offer multiple composition layers, support for
-rotation and scaling output.
-
-Required properties:
- - compatible: should be one of
- "arm,mali-dp500"
- "arm,mali-dp550"
- "arm,mali-dp650"
- depending on the particular implementation present in the hardware
- - reg: Physical base address and size of the block of registers used by
- the processor.
- - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt,
- interrupt client nodes.
- - interrupt-names: name of the engine inside the processor that will
- use the corresponding interrupt. Should be one of "DE" or "SE".
- - clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
- - clock-names: A list of clock names. It should contain:
- - "pclk": for the APB interface clock
- - "aclk": for the AXI interface clock
- - "mclk": for the main processor clock
- - "pxlclk": for the pixel clock feeding the output PLL of the processor.
- - arm,malidp-output-port-lines: Array of u8 values describing the number
- of output lines per channel (R, G and B).
-
-Required sub-nodes:
- - port: The Mali DP connection to an encoder input port. The connection
- is modelled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
- - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS
- levels of DP500's QoS signaling.
-
-
-Example:
-
-/ {
- ...
-
- dp0: malidp@6f200000 {
- compatible = "arm,mali-dp650";
- reg = <0 0x6f200000 0 0x20000>;
- memory-region = <&display_reserved>;
- interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>,
- <0 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "DE", "SE";
- clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
- clock-names = "pxlclk", "mclk", "aclk", "pclk";
- arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
- arm,malidp-arqos-high-level = <0xd000d000>;
- port {
- dp0_output: endpoint {
- remote-endpoint = <&tda998x_2_input>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
new file mode 100644
index 0000000000000..ea7b7100548bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Mali Display Processor (Mali-DP) binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The following bindings apply to a family of Display Processors sold as
+ licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
+ DP650 processors that offer multiple composition layers, support for
+ rotation and scaling output.
+
+properties:
+ compatible:
+ enum:
+ - arm,mali-dp500
+ - arm,mali-dp550
+ - arm,mali-dp650
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description:
+ The interrupt used by the Display Engine (DE). Can be shared with
+ the interrupt for the Scaling Engine (SE), but it will have to be
+ listed individually.
+ - description:
+ The interrupt used by the Scaling Engine (SE). Can be shared with
+ the interrupt for the Display Engine (DE), but it will have to be
+ listed individually.
+
+ interrupt-names:
+ items:
+ - const: DE
+ - const: SE
+
+ clock-names:
+ items:
+ - const: pxlclk
+ - const: mclk
+ - const: aclk
+ - const: pclk
+
+ clocks:
+ items:
+ - description: the pixel clock feeding the output PLL of the processor
+ - description: the main processor clock
+ - description: the AXI interface clock
+ - description: the APB interface clock
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ arm,malidp-output-port-lines:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ description:
+ Number of output lines/bits for each colour channel.
+ items:
+ - description: number of output lines for the red channel (R)
+ - description: number of output lines for the green channel (G)
+ - description: number of output lines for the blue channel (B)
+
+ arm,malidp-arqos-high-level:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ integer describing the ARQoS levels of DP500's QoS signaling
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - port
+ - arm,malidp-output-port-lines
+
+examples:
+ - |
+ dp0: malidp@6f200000 {
+ compatible = "arm,mali-dp650";
+ reg = <0x6f200000 0x20000>;
+ memory-region = <&display_reserved>;
+ interrupts = <168>, <168>;
+ interrupt-names = "DE", "SE";
+ clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
+ clock-names = "pxlclk", "mclk", "aclk", "pclk";
+ arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+ arm,malidp-arqos-high-level = <0xd000d000>;
+
+ port {
+ dp0_output: endpoint {
+ remote-endpoint = <&tda998x_2_input>;
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
out a framebuffer and hands the pixels over to a digital signal encoder.
It supports multiple layers, scaling and rotation.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,malidp.txt | 68 ----------
.../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
2 files changed, 116 insertions(+), 68 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.txt b/Documentation/devicetree/bindings/display/arm,malidp.txt
deleted file mode 100644
index 7a97a2b48c2a2..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,malidp.txt
+++ /dev/null
@@ -1,68 +0,0 @@
-ARM Mali-DP
-
-The following bindings apply to a family of Display Processors sold as
-licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
-DP650 processors that offer multiple composition layers, support for
-rotation and scaling output.
-
-Required properties:
- - compatible: should be one of
- "arm,mali-dp500"
- "arm,mali-dp550"
- "arm,mali-dp650"
- depending on the particular implementation present in the hardware
- - reg: Physical base address and size of the block of registers used by
- the processor.
- - interrupts: Interrupt list, as defined in ../interrupt-controller/interrupts.txt,
- interrupt client nodes.
- - interrupt-names: name of the engine inside the processor that will
- use the corresponding interrupt. Should be one of "DE" or "SE".
- - clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
- - clock-names: A list of clock names. It should contain:
- - "pclk": for the APB interface clock
- - "aclk": for the AXI interface clock
- - "mclk": for the main processor clock
- - "pxlclk": for the pixel clock feeding the output PLL of the processor.
- - arm,malidp-output-port-lines: Array of u8 values describing the number
- of output lines per channel (R, G and B).
-
-Required sub-nodes:
- - port: The Mali DP connection to an encoder input port. The connection
- is modelled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
- - arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS
- levels of DP500's QoS signaling.
-
-
-Example:
-
-/ {
- ...
-
- dp0: malidp@6f200000 {
- compatible = "arm,mali-dp650";
- reg = <0 0x6f200000 0 0x20000>;
- memory-region = <&display_reserved>;
- interrupts = <0 168 IRQ_TYPE_LEVEL_HIGH>,
- <0 168 IRQ_TYPE_LEVEL_HIGH>;
- interrupt-names = "DE", "SE";
- clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
- clock-names = "pxlclk", "mclk", "aclk", "pclk";
- arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
- arm,malidp-arqos-high-level = <0xd000d000>;
- port {
- dp0_output: endpoint {
- remote-endpoint = <&tda998x_2_input>;
- };
- };
- };
-
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
new file mode 100644
index 0000000000000..ea7b7100548bf
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -0,0 +1,116 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,malidp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Mali Display Processor (Mali-DP) binding
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The following bindings apply to a family of Display Processors sold as
+ licensable IP by ARM Ltd. The bindings describe the Mali DP500, DP550 and
+ DP650 processors that offer multiple composition layers, support for
+ rotation and scaling output.
+
+properties:
+ compatible:
+ enum:
+ - arm,mali-dp500
+ - arm,mali-dp550
+ - arm,mali-dp650
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ items:
+ - description:
+ The interrupt used by the Display Engine (DE). Can be shared with
+ the interrupt for the Scaling Engine (SE), but it will have to be
+ listed individually.
+ - description:
+ The interrupt used by the Scaling Engine (SE). Can be shared with
+ the interrupt for the Display Engine (DE), but it will have to be
+ listed individually.
+
+ interrupt-names:
+ items:
+ - const: DE
+ - const: SE
+
+ clock-names:
+ items:
+ - const: pxlclk
+ - const: mclk
+ - const: aclk
+ - const: pclk
+
+ clocks:
+ items:
+ - description: the pixel clock feeding the output PLL of the processor
+ - description: the main processor clock
+ - description: the AXI interface clock
+ - description: the APB interface clock
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ arm,malidp-output-port-lines:
+ $ref: /schemas/types.yaml#/definitions/uint8-array
+ description:
+ Number of output lines/bits for each colour channel.
+ items:
+ - description: number of output lines for the red channel (R)
+ - description: number of output lines for the green channel (G)
+ - description: number of output lines for the blue channel (B)
+
+ arm,malidp-arqos-high-level:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ integer describing the ARQoS levels of DP500's QoS signaling
+
+ port:
+ $ref: /schemas/graph.yaml#/properties/port
+ unevaluatedProperties: false
+ description:
+ Output endpoint of the controller, connecting the LCD panel signals.
+
+additionalProperties: false
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-names
+ - clocks
+ - clock-names
+ - port
+ - arm,malidp-output-port-lines
+
+examples:
+ - |
+ dp0: malidp@6f200000 {
+ compatible = "arm,mali-dp650";
+ reg = <0x6f200000 0x20000>;
+ memory-region = <&display_reserved>;
+ interrupts = <168>, <168>;
+ interrupt-names = "DE", "SE";
+ clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
+ clock-names = "pxlclk", "mclk", "aclk", "pclk";
+ arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+ arm,malidp-arqos-high-level = <0xd000d000>;
+
+ port {
+ dp0_output: endpoint {
+ remote-endpoint = <&tda998x_2_input>;
+ };
+ };
+ };
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 14:05 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,komeda.txt | 78 -----------
.../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
2 files changed, 130 insertions(+), 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
deleted file mode 100644
index 8513695ee47fe..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,komeda.txt
+++ /dev/null
@@ -1,78 +0,0 @@
-Device Tree bindings for Arm Komeda display driver
-
-Required properties:
-- compatible: Should be "arm,mali-d71"
-- reg: Physical base address and length of the registers in the system
-- interrupts: the interrupt line number of the device in the system
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: A list of clock names. It should contain:
- - "aclk": for the main processor clock
-- #address-cells: Must be 1
-- #size-cells: Must be 0
-- iommus: configure the stream id to IOMMU, Must be configured if want to
- enable iommu in display. for how to configure this node please reference
- devicetree/bindings/iommu/arm,smmu-v3.txt,
- devicetree/bindings/iommu/iommu.txt
-
-Required properties for sub-node: pipeline@nq
-Each device contains one or two pipeline sub-nodes (at least one), each
-pipeline node should provide properties:
-- reg: Zero-indexed identifier for the pipeline
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: should contain:
- - "pxclk": pixel clock
-
-- port: each pipeline connect to an encoder input port. The connection is
- modeled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
-
-Example:
-/ {
- ...
-
- dp0: display@c00000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "arm,mali-d71";
- reg = <0xc00000 0x20000>;
- interrupts = <0 168 4>;
- clocks = <&dpu_aclk>;
- clock-names = "aclk";
- iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
- <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
- <&smmu 8>, <&smmu 9>;
-
- dp0_pipe0: pipeline@0 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <0>;
-
- port {
- dp0_pipe0_out: endpoint {
- remote-endpoint = <&db_dvi0_in>;
- };
- };
- };
-
- dp0_pipe1: pipeline@1 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <1>;
-
- port {
- dp0_pipe1_out: endpoint {
- remote-endpoint = <&db_dvi1_in>;
- };
- };
- };
- };
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
new file mode 100644
index 0000000000000..9f4aade97f10a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Komeda display processor
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Mali D71 display processor supports up to two displays with up
+ to a 4K resolution each. Each pipeline can be composed of up to four
+ layers. It is typically connected to a digital display connector like HDMI.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: arm,mali-d32
+ - const: arm,mali-d71
+ - const: arm,mali-d71
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: aclk
+
+ clocks:
+ maxItems: 1
+ description: The main DPU processor clock
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ description:
+ The stream IDs for each of the used pipelines, each four IDs for the
+ four layers, plus one for the write-back stream.
+ minItems: 5
+ maxItems: 10
+
+patternProperties:
+ '^pipeline@[01]$':
+ type: object
+ description:
+ clocks
+
+ properties:
+ reg:
+ enum: [ 0, 1 ]
+
+ clock-names:
+ const: pxclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+
+additionalProperties: false
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+ - pipeline@0
+
+examples:
+ - |
+ display@c00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "arm,mali-d71";
+ reg = <0xc00000 0x20000>;
+ interrupts = <168>;
+ clocks = <&dpu_aclk>;
+ clock-names = "aclk";
+ iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+ <&smmu 8>,
+ <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+ <&smmu 9>;
+
+ dp0_pipe0: pipeline@0 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <0>;
+
+ port {
+ dp0_pipe0_out: endpoint {
+ remote-endpoint = <&db_dvi0_in>;
+ };
+ };
+ };
+
+ dp0_pipe1: pipeline@1 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <1>;
+
+ port {
+ dp0_pipe1_out: endpoint {
+ remote-endpoint = <&db_dvi1_in>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,komeda.txt | 78 -----------
.../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
2 files changed, 130 insertions(+), 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
deleted file mode 100644
index 8513695ee47fe..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,komeda.txt
+++ /dev/null
@@ -1,78 +0,0 @@
-Device Tree bindings for Arm Komeda display driver
-
-Required properties:
-- compatible: Should be "arm,mali-d71"
-- reg: Physical base address and length of the registers in the system
-- interrupts: the interrupt line number of the device in the system
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: A list of clock names. It should contain:
- - "aclk": for the main processor clock
-- #address-cells: Must be 1
-- #size-cells: Must be 0
-- iommus: configure the stream id to IOMMU, Must be configured if want to
- enable iommu in display. for how to configure this node please reference
- devicetree/bindings/iommu/arm,smmu-v3.txt,
- devicetree/bindings/iommu/iommu.txt
-
-Required properties for sub-node: pipeline@nq
-Each device contains one or two pipeline sub-nodes (at least one), each
-pipeline node should provide properties:
-- reg: Zero-indexed identifier for the pipeline
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: should contain:
- - "pxclk": pixel clock
-
-- port: each pipeline connect to an encoder input port. The connection is
- modeled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
-
-Example:
-/ {
- ...
-
- dp0: display@c00000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "arm,mali-d71";
- reg = <0xc00000 0x20000>;
- interrupts = <0 168 4>;
- clocks = <&dpu_aclk>;
- clock-names = "aclk";
- iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
- <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
- <&smmu 8>, <&smmu 9>;
-
- dp0_pipe0: pipeline@0 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <0>;
-
- port {
- dp0_pipe0_out: endpoint {
- remote-endpoint = <&db_dvi0_in>;
- };
- };
- };
-
- dp0_pipe1: pipeline@1 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <1>;
-
- port {
- dp0_pipe1_out: endpoint {
- remote-endpoint = <&db_dvi1_in>;
- };
- };
- };
- };
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
new file mode 100644
index 0000000000000..9f4aade97f10a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Komeda display processor
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Mali D71 display processor supports up to two displays with up
+ to a 4K resolution each. Each pipeline can be composed of up to four
+ layers. It is typically connected to a digital display connector like HDMI.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: arm,mali-d32
+ - const: arm,mali-d71
+ - const: arm,mali-d71
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: aclk
+
+ clocks:
+ maxItems: 1
+ description: The main DPU processor clock
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ description:
+ The stream IDs for each of the used pipelines, each four IDs for the
+ four layers, plus one for the write-back stream.
+ minItems: 5
+ maxItems: 10
+
+patternProperties:
+ '^pipeline@[01]$':
+ type: object
+ description:
+ clocks
+
+ properties:
+ reg:
+ enum: [ 0, 1 ]
+
+ clock-names:
+ const: pxclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+
+additionalProperties: false
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+ - pipeline@0
+
+examples:
+ - |
+ display@c00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "arm,mali-d71";
+ reg = <0xc00000 0x20000>;
+ interrupts = <168>;
+ clocks = <&dpu_aclk>;
+ clock-names = "aclk";
+ iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+ <&smmu 8>,
+ <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+ <&smmu 9>;
+
+ dp0_pipe0: pipeline@0 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <0>;
+
+ port {
+ dp0_pipe0_out: endpoint {
+ remote-endpoint = <&db_dvi0_in>;
+ };
+ };
+ };
+
+ dp0_pipe1: pipeline@1 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <1>;
+
+ port {
+ dp0_pipe1_out: endpoint {
+ remote-endpoint = <&db_dvi1_in>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
^ permalink raw reply related [flat|nested] 62+ messages in thread
* [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
@ 2022-05-06 14:05 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-06 14:05 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, David Airlie, Daniel Vetter, dri-devel
The Arm Komeda (aka Mali-D71) is a display controller that scans out a
framebuffer and hands a signal to a digital encoder to generate a DVI
or HDMI signal. It supports up to two pipelines, each frame can be
composed of up to four layers.
Convert the existing DT binding to DT schema.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
.../bindings/display/arm,komeda.txt | 78 -----------
.../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
2 files changed, 130 insertions(+), 78 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
deleted file mode 100644
index 8513695ee47fe..0000000000000
--- a/Documentation/devicetree/bindings/display/arm,komeda.txt
+++ /dev/null
@@ -1,78 +0,0 @@
-Device Tree bindings for Arm Komeda display driver
-
-Required properties:
-- compatible: Should be "arm,mali-d71"
-- reg: Physical base address and length of the registers in the system
-- interrupts: the interrupt line number of the device in the system
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: A list of clock names. It should contain:
- - "aclk": for the main processor clock
-- #address-cells: Must be 1
-- #size-cells: Must be 0
-- iommus: configure the stream id to IOMMU, Must be configured if want to
- enable iommu in display. for how to configure this node please reference
- devicetree/bindings/iommu/arm,smmu-v3.txt,
- devicetree/bindings/iommu/iommu.txt
-
-Required properties for sub-node: pipeline@nq
-Each device contains one or two pipeline sub-nodes (at least one), each
-pipeline node should provide properties:
-- reg: Zero-indexed identifier for the pipeline
-- clocks: A list of phandle + clock-specifier pairs, one for each entry
- in 'clock-names'
-- clock-names: should contain:
- - "pxclk": pixel clock
-
-- port: each pipeline connect to an encoder input port. The connection is
- modeled using the OF graph bindings specified in
- Documentation/devicetree/bindings/graph.txt
-
-Optional properties:
- - memory-region: phandle to a node describing memory (see
- Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
- to be used for the framebuffer; if not present, the framebuffer may
- be located anywhere in memory.
-
-Example:
-/ {
- ...
-
- dp0: display@c00000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "arm,mali-d71";
- reg = <0xc00000 0x20000>;
- interrupts = <0 168 4>;
- clocks = <&dpu_aclk>;
- clock-names = "aclk";
- iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
- <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
- <&smmu 8>, <&smmu 9>;
-
- dp0_pipe0: pipeline@0 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <0>;
-
- port {
- dp0_pipe0_out: endpoint {
- remote-endpoint = <&db_dvi0_in>;
- };
- };
- };
-
- dp0_pipe1: pipeline@1 {
- clocks = <&fpgaosc2>;
- clock-names = "pxclk";
- reg = <1>;
-
- port {
- dp0_pipe1_out: endpoint {
- remote-endpoint = <&db_dvi1_in>;
- };
- };
- };
- };
- ...
-};
diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
new file mode 100644
index 0000000000000..9f4aade97f10a
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
@@ -0,0 +1,130 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Arm Komeda display processor
+
+maintainers:
+ - Liviu Dudau <Liviu.Dudau@arm.com>
+ - Andre Przywara <andre.przywara@arm.com>
+
+description:
+ The Arm Mali D71 display processor supports up to two displays with up
+ to a 4K resolution each. Each pipeline can be composed of up to four
+ layers. It is typically connected to a digital display connector like HDMI.
+
+properties:
+ compatible:
+ oneOf:
+ - items:
+ - const: arm,mali-d32
+ - const: arm,mali-d71
+ - const: arm,mali-d71
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ const: aclk
+
+ clocks:
+ maxItems: 1
+ description: The main DPU processor clock
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ memory-region:
+ maxItems: 1
+ description:
+ Phandle to a node describing memory to be used for the framebuffer.
+ If not present, the framebuffer may be located anywhere in memory.
+
+ iommus:
+ description:
+ The stream IDs for each of the used pipelines, each four IDs for the
+ four layers, plus one for the write-back stream.
+ minItems: 5
+ maxItems: 10
+
+patternProperties:
+ '^pipeline@[01]$':
+ type: object
+ description:
+ clocks
+
+ properties:
+ reg:
+ enum: [ 0, 1 ]
+
+ clock-names:
+ const: pxclk
+
+ clocks:
+ maxItems: 1
+ description: The input reference for the pixel clock.
+
+ port:
+ $ref: /schemas/graph.yaml#/$defs/port-base
+ unevaluatedProperties: false
+
+additionalProperties: false
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+ - pipeline@0
+
+examples:
+ - |
+ display@c00000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "arm,mali-d71";
+ reg = <0xc00000 0x20000>;
+ interrupts = <168>;
+ clocks = <&dpu_aclk>;
+ clock-names = "aclk";
+ iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
+ <&smmu 8>,
+ <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
+ <&smmu 9>;
+
+ dp0_pipe0: pipeline@0 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <0>;
+
+ port {
+ dp0_pipe0_out: endpoint {
+ remote-endpoint = <&db_dvi0_in>;
+ };
+ };
+ };
+
+ dp0_pipe1: pipeline@1 {
+ clocks = <&fpgaosc2>;
+ clock-names = "pxclk";
+ reg = <1>;
+
+ port {
+ dp0_pipe1_out: endpoint {
+ remote-endpoint = <&db_dvi1_in>;
+ };
+ };
+ };
+ };
+...
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 22:39 ` Rob Herring
-1 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Will Deacon, David Airlie, Daniel Vetter, linux-arm-kernel,
Krzysztof Kozlowski, Rob Herring, dri-devel, devicetree,
Robin Murphy, Liviu Dudau
On Fri, 06 May 2022 15:05:31 +0100, Andre Przywara wrote:
> The Arm HDLCD is a display controller that scans out a framebuffer and
> hands a signal to a digital encoder to generate a DVI or HDMI signal.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
> .../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
> 2 files changed, 89 insertions(+), 79 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
hdlcd@2a110000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca5s.dtb
hdlcd@2b000000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dtb
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 22:39 ` Rob Herring
-1 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: David Airlie, devicetree, Robin Murphy, dri-devel,
linux-arm-kernel, Liviu Dudau, Will Deacon, Krzysztof Kozlowski,
Rob Herring, Daniel Vetter
On Fri, 06 May 2022 15:05:30 +0100, Andre Przywara wrote:
> The Arm PL110 and PL111 are IP blocks that provide a display engine with
> an LCD interface, being able to drive a variety of LC panels.
>
> Convert the binding over to DT schema, to the DTs can be automatically
> checked.
> This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
> because this is used by several DTs in the tree.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
> .../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
> 2 files changed, 174 insertions(+), 110 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
clcd@10020000: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp.dtb
clcd@31040000: 'interrupt-names' is a required property
arch/arm/boot/dts/lpc3250-phy3250.dtb
clcd@60000000: 'clock-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'clocks' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'port' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@90000000: 'clock-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'clocks' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'port' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@c0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@fc200000: 'clock-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'clocks' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'port' is a required property
arch/arm/boot/dts/spear600-evb.dtb
display@1000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@10120000: 'interrupt-names' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
lcd@C0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/nspire-clp.dtb
arch/arm/boot/dts/nspire-cx.dtb
arch/arm/boot/dts/nspire-tp.dtb
lcd-controller@40008000: 'resets' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/lpc4337-ciaa.dtb
arch/arm/boot/dts/lpc4350-hitex-eval.dtb
arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb
arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 06/11] dt-bindings: arm: convert vexpress-sysregs to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-06 22:39 ` Rob Herring
-1 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Robin Murphy, linux-arm-kernel, Rob Herring, Will Deacon,
devicetree, Liviu Dudau, Krzysztof Kozlowski
On Fri, 06 May 2022 15:05:28 +0100, Andre Przywara wrote:
> The Arm Versatile Express system control register block provides GPIO
> functionality to some devices and is also used for board identification.
>
> Extract the first half of the informal vexpress-sysreg.txt binding and
> make it proper DT schema compliant.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/arm/vexpress-sysreg.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
sysreg@10000: '#address-cells' is a required property
arch/arm64/boot/dts/arm/foundation-v8.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3-psci.dtb
arch/arm64/boot/dts/arm/foundation-v8-psci.dtb
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
sysreg@10000: '#gpio-cells', 'gpio-controller' do not match any of the regexes: '^gpio@[0-9a-f]+$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
sysreg@10000: '#size-cells' is a required property
arch/arm64/boot/dts/arm/foundation-v8.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3-psci.dtb
arch/arm64/boot/dts/arm/foundation-v8-psci.dtb
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-06 22:39 ` Rob Herring
-1 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, linux-arm-kernel, dri-devel, devicetree,
Robin Murphy, Liviu Dudau, David Airlie, Daniel Vetter,
Krzysztof Kozlowski, Will Deacon
On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> out a framebuffer and hands the pixels over to a digital signal encoder.
> It supports multiple layers, scaling and rotation.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,malidp.txt | 68 ----------
> .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> 2 files changed, 116 insertions(+), 68 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: devicetree, David Airlie, Robin Murphy, Liviu Dudau, dri-devel,
Rob Herring, Krzysztof Kozlowski, Will Deacon, linux-arm-kernel
On Fri, 06 May 2022 15:05:31 +0100, Andre Przywara wrote:
> The Arm HDLCD is a display controller that scans out a framebuffer and
> hands a signal to a digital encoder to generate a DVI or HDMI signal.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
> .../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
> 2 files changed, 89 insertions(+), 79 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
hdlcd@2a110000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca5s.dtb
hdlcd@2b000000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dtb
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Rob Herring, Krzysztof Kozlowski, Robin Murphy, linux-arm-kernel
On Fri, 06 May 2022 15:05:30 +0100, Andre Przywara wrote:
> The Arm PL110 and PL111 are IP blocks that provide a display engine with
> an LCD interface, being able to drive a variety of LC panels.
>
> Convert the binding over to DT schema, to the DTs can be automatically
> checked.
> This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
> because this is used by several DTs in the tree.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
> .../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
> 2 files changed, 174 insertions(+), 110 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
clcd@10020000: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp.dtb
clcd@31040000: 'interrupt-names' is a required property
arch/arm/boot/dts/lpc3250-phy3250.dtb
clcd@60000000: 'clock-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'clocks' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'port' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@90000000: 'clock-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'clocks' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'port' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@c0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@fc200000: 'clock-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'clocks' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'port' is a required property
arch/arm/boot/dts/spear600-evb.dtb
display@1000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@10120000: 'interrupt-names' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
lcd@C0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/nspire-clp.dtb
arch/arm/boot/dts/nspire-cx.dtb
arch/arm/boot/dts/nspire-tp.dtb
lcd-controller@40008000: 'resets' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/lpc4337-ciaa.dtb
arch/arm/boot/dts/lpc4350-hitex-eval.dtb
arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb
arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: devicetree, Krzysztof Kozlowski, David Airlie, Will Deacon,
Liviu Dudau, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> out a framebuffer and hands the pixels over to a digital signal encoder.
> It supports multiple layers, scaling and rotation.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,malidp.txt | 68 ----------
> .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> 2 files changed, 116 insertions(+), 68 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 06/11] dt-bindings: arm: convert vexpress-sysregs to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Robin Murphy, linux-arm-kernel, Rob Herring, Will Deacon,
devicetree, Liviu Dudau, Krzysztof Kozlowski
On Fri, 06 May 2022 15:05:28 +0100, Andre Przywara wrote:
> The Arm Versatile Express system control register block provides GPIO
> functionality to some devices and is also used for board identification.
>
> Extract the first half of the informal vexpress-sysreg.txt binding and
> make it proper DT schema compliant.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/arm/vexpress-sysreg.yaml | 90 +++++++++++++++++++
> 1 file changed, 90 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/arm/vexpress-sysreg.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
sysreg@10000: '#address-cells' is a required property
arch/arm64/boot/dts/arm/foundation-v8.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3-psci.dtb
arch/arm64/boot/dts/arm/foundation-v8-psci.dtb
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
sysreg@10000: '#gpio-cells', 'gpio-controller' do not match any of the regexes: '^gpio@[0-9a-f]+$', 'pinctrl-[0-9]+'
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
sysreg@10000: '#size-cells' is a required property
arch/arm64/boot/dts/arm/foundation-v8.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3.dtb
arch/arm64/boot/dts/arm/foundation-v8-gicv3-psci.dtb
arch/arm64/boot/dts/arm/foundation-v8-psci.dtb
arch/arm64/boot/dts/arm/fvp-base-revc.dtb
arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dtb
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Will Deacon, David Airlie, Daniel Vetter, linux-arm-kernel,
Krzysztof Kozlowski, Rob Herring, dri-devel, devicetree,
Robin Murphy, Liviu Dudau
On Fri, 06 May 2022 15:05:31 +0100, Andre Przywara wrote:
> The Arm HDLCD is a display controller that scans out a framebuffer and
> hands a signal to a digital encoder to generate a DVI or HDMI signal.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,hdlcd.txt | 79 ----------------
> .../bindings/display/arm,hdlcd.yaml | 89 +++++++++++++++++++
> 2 files changed, 89 insertions(+), 79 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,hdlcd.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
hdlcd@2a110000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca5s.dtb
hdlcd@2b000000: 'port' is a required property
arch/arm/boot/dts/vexpress-v2p-ca15_a7.dtb
arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dtb
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: David Airlie, devicetree, Robin Murphy, dri-devel,
linux-arm-kernel, Liviu Dudau, Will Deacon, Krzysztof Kozlowski,
Rob Herring, Daniel Vetter
On Fri, 06 May 2022 15:05:30 +0100, Andre Przywara wrote:
> The Arm PL110 and PL111 are IP blocks that provide a display engine with
> an LCD interface, being able to drive a variety of LC panels.
>
> Convert the binding over to DT schema, to the DTs can be automatically
> checked.
> This still contains the deprecated "arm,pl11x,tft-r0g0b0-pads" property,
> because this is used by several DTs in the tree.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../devicetree/bindings/display/arm,pl11x.txt | 110 -----------
> .../bindings/display/arm,pl11x.yaml | 174 ++++++++++++++++++
> 2 files changed, 174 insertions(+), 110 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,pl11x.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
clcd@10020000: 'oneOf' conditional failed, one must be fixed:
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-11mp-ctrevb.dtb
arch/arm/boot/dts/arm-realview-eb-11mp.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp-bbrevd.dtb
arch/arm/boot/dts/arm-realview-eb-a9mp.dtb
clcd@31040000: 'interrupt-names' is a required property
arch/arm/boot/dts/lpc3250-phy3250.dtb
clcd@60000000: 'clock-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'clocks' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@60000000: 'port' is a required property
arch/arm/boot/dts/spear300-evb.dtb
clcd@90000000: 'clock-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'clocks' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@90000000: 'port' is a required property
arch/arm/boot/dts/spear320-hmi.dtb
clcd@c0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorcp.dtb
clcd@c0000000: 'port' is a required property
arch/arm/boot/dts/integratorcp.dtb
clcd@fc200000: 'clock-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'clocks' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'interrupt-names' is a required property
arch/arm/boot/dts/spear600-evb.dtb
clcd@fc200000: 'port' is a required property
arch/arm/boot/dts/spear600-evb.dtb
display@1000000: 'interrupt-names' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@1000000: 'port' is a required property
arch/arm/boot/dts/integratorap-im-pd1.dtb
display@10120000: 'interrupt-names' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port@0' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
display@10120000: 'port' is a required property
arch/arm/boot/dts/versatile-ab.dtb
arch/arm/boot/dts/versatile-ab-ib2.dtb
arch/arm/boot/dts/versatile-pb.dtb
lcd@C0000000: 'interrupt-names' is a required property
arch/arm/boot/dts/nspire-clp.dtb
arch/arm/boot/dts/nspire-cx.dtb
arch/arm/boot/dts/nspire-tp.dtb
lcd-controller@40008000: 'resets' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm/boot/dts/lpc4337-ciaa.dtb
arch/arm/boot/dts/lpc4350-hitex-eval.dtb
arch/arm/boot/dts/lpc4357-ea4357-devkit.dtb
arch/arm/boot/dts/lpc4357-myd-lpc4357.dtb
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-06 22:39 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-06 22:39 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, linux-arm-kernel, dri-devel, devicetree,
Robin Murphy, Liviu Dudau, David Airlie, Daniel Vetter,
Krzysztof Kozlowski, Will Deacon
On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> out a framebuffer and hands the pixels over to a digital signal encoder.
> It supports multiple layers, scaling and rotation.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,malidp.txt | 68 ----------
> .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> 2 files changed, 116 insertions(+), 68 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
>
Running 'make dtbs_check' with the schema in this patch gives the
following warnings. Consider if they are expected or the schema is
incorrect. These may not be new warnings.
Note that it is not yet a requirement to have 0 warnings for dtbs_check.
This will change in the future.
Full log is available here: https://patchwork.ozlabs.org/patch/
display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 03/11] dt-bindings: arm: sp810: convert to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-07 16:39 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:39 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm SP810 IP is a "system controller", providing clocks, timer and a
> watchdog.
>
> Convert the DT binding to DT schema, to allow automatic validation.
>
> The existing .txt binding described all properties as required, but the
> assigned-clock* and clock-output-names are actually not (from a hardware
> perspective). The only existing driver I could find (in Linux) doesn't
> require them either, so drop those properties from the "required" list.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 03/11] dt-bindings: arm: sp810: convert to DT schema
@ 2022-05-07 16:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:39 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon, linux-arm-kernel
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm SP810 IP is a "system controller", providing clocks, timer and a
> watchdog.
>
> Convert the DT binding to DT schema, to allow automatic validation.
>
> The existing .txt binding described all properties as required, but the
> assigned-clock* and clock-output-names are actually not (from a hardware
> perspective). The only existing driver I could find (in Linux) doesn't
> require them either, so drop those properties from the "required" list.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-07 16:39 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:39 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Jaroslav Kysela, Takashi Iwai, alsa-devel
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
> a peripheral that provides communication with an audio CODEC.
>
> Add a simple DT schema binding for it, so that DTs can be validated
> automatically.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
@ 2022-05-07 16:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:39 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, alsa-devel, Will Deacon, Liviu Dudau, Takashi Iwai,
Robin Murphy, linux-arm-kernel
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
> a peripheral that provides communication with an audio CODEC.
>
> Add a simple DT schema binding for it, so that DTs can be validated
> automatically.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI DT schema
@ 2022-05-07 16:39 ` Krzysztof Kozlowski
0 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:39 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Jaroslav Kysela, Takashi Iwai, alsa-devel
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm PrimeCell Advanced Audio CODEC Interface (AACI aka PL041) is
> a peripheral that provides communication with an audio CODEC.
>
> Add a simple DT schema binding for it, so that DTs can be validated
> automatically.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 05/11] dt-bindings: serio: add Arm PL050 DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-07 16:40 ` Krzysztof Kozlowski
-1 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:40 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Dmitry Torokhov, linux-input
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm PL050 "Keyboard/Mouse Interface" is an Arm system IP providing a
> PS/2 compatible serial interface.
>
> Add a simple DT schema binding, based on the TRM[1], the existing DTs and
> the Linux driver.
>
> [1] https://developer.arm.com/documentation/ddi0143/latest
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 05/11] dt-bindings: serio: add Arm PL050 DT schema
@ 2022-05-07 16:40 ` Krzysztof Kozlowski
0 siblings, 0 replies; 62+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-07 16:40 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: Liviu Dudau, Robin Murphy, devicetree, Will Deacon,
linux-arm-kernel, Dmitry Torokhov, linux-input
On 06/05/2022 16:05, Andre Przywara wrote:
> The Arm PL050 "Keyboard/Mouse Interface" is an Arm system IP providing a
> PS/2 compatible serial interface.
>
> Add a simple DT schema binding, based on the TRM[1], the existing DTs and
> the Linux driver.
>
> [1] https://developer.arm.com/documentation/ddi0143/latest
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
2022-05-06 22:39 ` Rob Herring
(?)
@ 2022-05-09 13:49 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-09 13:49 UTC (permalink / raw)
To: Rob Herring
Cc: Rob Herring, linux-arm-kernel, dri-devel, devicetree,
Robin Murphy, Liviu Dudau, David Airlie, Daniel Vetter,
Krzysztof Kozlowski, Will Deacon
On Fri, 06 May 2022 17:39:53 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > out a framebuffer and hands the pixels over to a digital signal encoder.
> > It supports multiple layers, scaling and rotation.
> >
> > Convert the existing DT binding to DT schema.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> > .../bindings/display/arm,malidp.txt | 68 ----------
> > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > 2 files changed, 116 insertions(+), 68 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/
>
>
> display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
Ah, good point, I missed that directory when testing. I came up with the
following change on top:
==============================
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
index ea7b7100548bf..bc0d3f3ab2b75 100644
--- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -76,6 +76,14 @@ properties:
description:
integer describing the ARQoS levels of DP500's QoS signaling
+ arm,malidp-arqos-value:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Quality-of-Service value for the display engine FIFOs, to write
+ into the RQOS register of the DP500.
+ See the ARM Mali-DP500 TRM for details on the encoding.
+ If omitted, the RQOS register will not be changed.
+
port:
$ref: /schemas/graph.yaml#/properties/port
unevaluatedProperties: false
==============================
Cheers,
Andre
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-09 13:49 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-09 13:49 UTC (permalink / raw)
To: Rob Herring
Cc: devicetree, Krzysztof Kozlowski, David Airlie, Will Deacon,
Liviu Dudau, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Fri, 06 May 2022 17:39:53 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > out a framebuffer and hands the pixels over to a digital signal encoder.
> > It supports multiple layers, scaling and rotation.
> >
> > Convert the existing DT binding to DT schema.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> > .../bindings/display/arm,malidp.txt | 68 ----------
> > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > 2 files changed, 116 insertions(+), 68 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/
>
>
> display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
Ah, good point, I missed that directory when testing. I came up with the
following change on top:
==============================
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
index ea7b7100548bf..bc0d3f3ab2b75 100644
--- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -76,6 +76,14 @@ properties:
description:
integer describing the ARQoS levels of DP500's QoS signaling
+ arm,malidp-arqos-value:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Quality-of-Service value for the display engine FIFOs, to write
+ into the RQOS register of the DP500.
+ See the ARM Mali-DP500 TRM for details on the encoding.
+ If omitted, the RQOS register will not be changed.
+
port:
$ref: /schemas/graph.yaml#/properties/port
unevaluatedProperties: false
==============================
Cheers,
Andre
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-09 13:49 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-05-09 13:49 UTC (permalink / raw)
To: Rob Herring
Cc: Rob Herring, linux-arm-kernel, dri-devel, devicetree,
Robin Murphy, Liviu Dudau, David Airlie, Daniel Vetter,
Krzysztof Kozlowski, Will Deacon
On Fri, 06 May 2022 17:39:53 -0500
Rob Herring <robh@kernel.org> wrote:
> On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > out a framebuffer and hands the pixels over to a digital signal encoder.
> > It supports multiple layers, scaling and rotation.
> >
> > Convert the existing DT binding to DT schema.
> >
> > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > ---
> > .../bindings/display/arm,malidp.txt | 68 ----------
> > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > 2 files changed, 116 insertions(+), 68 deletions(-)
> > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> >
>
> Running 'make dtbs_check' with the schema in this patch gives the
> following warnings. Consider if they are expected or the schema is
> incorrect. These may not be new warnings.
>
> Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> This will change in the future.
>
> Full log is available here: https://patchwork.ozlabs.org/patch/
>
>
> display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
Ah, good point, I missed that directory when testing. I came up with the
following change on top:
==============================
diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
index ea7b7100548bf..bc0d3f3ab2b75 100644
--- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
+++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
@@ -76,6 +76,14 @@ properties:
description:
integer describing the ARQoS levels of DP500's QoS signaling
+ arm,malidp-arqos-value:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description:
+ Quality-of-Service value for the display engine FIFOs, to write
+ into the RQOS register of the DP500.
+ See the ARM Mali-DP500 TRM for details on the encoding.
+ If omitted, the RQOS register will not be changed.
+
port:
$ref: /schemas/graph.yaml#/properties/port
unevaluatedProperties: false
==============================
Cheers,
Andre
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals to DT schema
2022-05-06 14:05 ` Andre Przywara
@ 2022-05-09 19:15 ` Rob Herring
-1 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-09 19:15 UTC (permalink / raw)
To: Andre Przywara
Cc: Krzysztof Kozlowski, Liviu Dudau, Robin Murphy, devicetree,
Will Deacon, linux-arm-kernel
On Fri, May 6, 2022 at 9:05 AM Andre Przywara <andre.przywara@arm.com> wrote:
>
> Hi,
>
> this drop fixes the review comments from Krzysztof and Rob (many
> thanks for that!). Changelog below.
>
> =================
> In an effort to get the FVP DTs to pass the automated DT bindings checks,
> this series collects some DT schema binding conversions for various
> Arm Ltd. IP devices.
> This is mostly for old IP, but it's still used by the FVPs, for which we
> have DTs in the tree.
>
> Please have a look!
>
> Cheers,
> Andre
>
> Changelog:
> v1 .. v2:
> - all: fix indentation in examples (4 spaces)
> - all: drop line break preservation in descriptions
> - smmu-v3: tighten IRQ ordering to only allow certain combinations
> - spe-pmu: move new .yaml file into perf/ directory
> - sp810: don't require fixed clock output names
> - sp810: explain optional assigned-clock properties
> - pl041/pl051: rename binding file name
> - pl041/pl051: use generic node name in example nodes
> - vexpress-sysreg: specify additionalProperties
> - vexpress-sysreg: disallow uppercase hex letters in node name address
> - vexpress-config: specify additionalProperties
> - hdlcd/mali-dp: use properties/port instead of $defs/port-base
>
> Andre Przywara (11):
> dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional
> dt-bindings: arm: spe-pmu: convert to DT schema
> dt-bindings: arm: sp810: convert to DT schema
> dt-bindings: sound: add Arm PL041 AACI DT schema
> dt-bindings: serio: add Arm PL050 DT schema
> dt-bindings: arm: convert vexpress-sysregs to DT schema
> dt-bindings: arm: convert vexpress-config to DT schema
> dt-bindings: display: convert PL110/PL111 to DT schema
> dt-bindings: display: convert Arm HDLCD to DT schema
> dt-bindings: display: convert Arm Mali-DP to DT schema
> dt-bindings: display: convert Arm Komeda to DT schema
I've applied the whole series. I made pl11x interrupts optional as
Realview EB doesn't have an interrupt, and I squashed in the
'arm,malidp-arqos-value' property addition.
Thanks,
Rob
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals to DT schema
@ 2022-05-09 19:15 ` Rob Herring
0 siblings, 0 replies; 62+ messages in thread
From: Rob Herring @ 2022-05-09 19:15 UTC (permalink / raw)
To: Andre Przywara
Cc: Krzysztof Kozlowski, Liviu Dudau, Robin Murphy, devicetree,
Will Deacon, linux-arm-kernel
On Fri, May 6, 2022 at 9:05 AM Andre Przywara <andre.przywara@arm.com> wrote:
>
> Hi,
>
> this drop fixes the review comments from Krzysztof and Rob (many
> thanks for that!). Changelog below.
>
> =================
> In an effort to get the FVP DTs to pass the automated DT bindings checks,
> this series collects some DT schema binding conversions for various
> Arm Ltd. IP devices.
> This is mostly for old IP, but it's still used by the FVPs, for which we
> have DTs in the tree.
>
> Please have a look!
>
> Cheers,
> Andre
>
> Changelog:
> v1 .. v2:
> - all: fix indentation in examples (4 spaces)
> - all: drop line break preservation in descriptions
> - smmu-v3: tighten IRQ ordering to only allow certain combinations
> - spe-pmu: move new .yaml file into perf/ directory
> - sp810: don't require fixed clock output names
> - sp810: explain optional assigned-clock properties
> - pl041/pl051: rename binding file name
> - pl041/pl051: use generic node name in example nodes
> - vexpress-sysreg: specify additionalProperties
> - vexpress-sysreg: disallow uppercase hex letters in node name address
> - vexpress-config: specify additionalProperties
> - hdlcd/mali-dp: use properties/port instead of $defs/port-base
>
> Andre Przywara (11):
> dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional
> dt-bindings: arm: spe-pmu: convert to DT schema
> dt-bindings: arm: sp810: convert to DT schema
> dt-bindings: sound: add Arm PL041 AACI DT schema
> dt-bindings: serio: add Arm PL050 DT schema
> dt-bindings: arm: convert vexpress-sysregs to DT schema
> dt-bindings: arm: convert vexpress-config to DT schema
> dt-bindings: display: convert PL110/PL111 to DT schema
> dt-bindings: display: convert Arm HDLCD to DT schema
> dt-bindings: display: convert Arm Mali-DP to DT schema
> dt-bindings: display: convert Arm Komeda to DT schema
I've applied the whole series. I made pl11x interrupts optional as
Realview EB doesn't have an interrupt, and I squashed in the
'arm,malidp-arqos-value' property addition.
Thanks,
Rob
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
2022-05-09 13:49 ` Andre Przywara
(?)
@ 2022-05-11 12:03 ` Liviu Dudau
-1 siblings, 0 replies; 62+ messages in thread
From: Liviu Dudau @ 2022-05-11 12:03 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, David Airlie,
Will Deacon, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> On Fri, 06 May 2022 17:39:53 -0500
> Rob Herring <robh@kernel.org> wrote:
>
> > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > It supports multiple layers, scaling and rotation.
> > >
> > > Convert the existing DT binding to DT schema.
> > >
> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > ---
> > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > >
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/
> >
> >
> > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
>
> Ah, good point, I missed that directory when testing. I came up with the
> following change on top:
>
> ==============================
> diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> index ea7b7100548bf..bc0d3f3ab2b75 100644
> --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> @@ -76,6 +76,14 @@ properties:
> description:
> integer describing the ARQoS levels of DP500's QoS signaling
>
> + arm,malidp-arqos-value:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Quality-of-Service value for the display engine FIFOs, to write
> + into the RQOS register of the DP500.
> + See the ARM Mali-DP500 TRM for details on the encoding.
> + If omitted, the RQOS register will not be changed.
> +
Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
("dt/bindings: display: Add optional property node define for Mali DP500") is
introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Appologies for signing off on the wrong patch content at that time.
Best regards,
Liviu
> port:
> $ref: /schemas/graph.yaml#/properties/port
> unevaluatedProperties: false
> ==============================
>
> Cheers,
> Andre
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-11 12:03 ` Liviu Dudau
0 siblings, 0 replies; 62+ messages in thread
From: Liviu Dudau @ 2022-05-11 12:03 UTC (permalink / raw)
To: Andre Przywara
Cc: devicetree, David Airlie, Robin Murphy, dri-devel, Rob Herring,
Krzysztof Kozlowski, Will Deacon, linux-arm-kernel
On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> On Fri, 06 May 2022 17:39:53 -0500
> Rob Herring <robh@kernel.org> wrote:
>
> > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > It supports multiple layers, scaling and rotation.
> > >
> > > Convert the existing DT binding to DT schema.
> > >
> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > ---
> > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > >
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/
> >
> >
> > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
>
> Ah, good point, I missed that directory when testing. I came up with the
> following change on top:
>
> ==============================
> diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> index ea7b7100548bf..bc0d3f3ab2b75 100644
> --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> @@ -76,6 +76,14 @@ properties:
> description:
> integer describing the ARQoS levels of DP500's QoS signaling
>
> + arm,malidp-arqos-value:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Quality-of-Service value for the display engine FIFOs, to write
> + into the RQOS register of the DP500.
> + See the ARM Mali-DP500 TRM for details on the encoding.
> + If omitted, the RQOS register will not be changed.
> +
Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
("dt/bindings: display: Add optional property node define for Mali DP500") is
introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Appologies for signing off on the wrong patch content at that time.
Best regards,
Liviu
> port:
> $ref: /schemas/graph.yaml#/properties/port
> unevaluatedProperties: false
> ==============================
>
> Cheers,
> Andre
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-05-11 12:03 ` Liviu Dudau
0 siblings, 0 replies; 62+ messages in thread
From: Liviu Dudau @ 2022-05-11 12:03 UTC (permalink / raw)
To: Andre Przywara
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, David Airlie,
Will Deacon, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> On Fri, 06 May 2022 17:39:53 -0500
> Rob Herring <robh@kernel.org> wrote:
>
> > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > It supports multiple layers, scaling and rotation.
> > >
> > > Convert the existing DT binding to DT schema.
> > >
> > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > ---
> > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > >
> >
> > Running 'make dtbs_check' with the schema in this patch gives the
> > following warnings. Consider if they are expected or the schema is
> > incorrect. These may not be new warnings.
> >
> > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > This will change in the future.
> >
> > Full log is available here: https://patchwork.ozlabs.org/patch/
> >
> >
> > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
>
> Ah, good point, I missed that directory when testing. I came up with the
> following change on top:
>
> ==============================
> diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> index ea7b7100548bf..bc0d3f3ab2b75 100644
> --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> @@ -76,6 +76,14 @@ properties:
> description:
> integer describing the ARQoS levels of DP500's QoS signaling
>
> + arm,malidp-arqos-value:
> + $ref: /schemas/types.yaml#/definitions/uint32
> + description:
> + Quality-of-Service value for the display engine FIFOs, to write
> + into the RQOS register of the DP500.
> + See the ARM Mali-DP500 TRM for details on the encoding.
> + If omitted, the RQOS register will not be changed.
> +
Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
("dt/bindings: display: Add optional property node define for Mali DP500") is
introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Appologies for signing off on the wrong patch content at that time.
Best regards,
Liviu
> port:
> $ref: /schemas/graph.yaml#/properties/port
> unevaluatedProperties: false
> ==============================
>
> Cheers,
> Andre
--
====================
| I would like to |
| fix the world, |
| but they're not |
| giving me the |
\ source code! /
---------------
¯\_(ツ)_/¯
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
2022-05-06 14:05 ` Andre Przywara
(?)
@ 2022-05-13 10:42 ` Carsten Haitzler
-1 siblings, 0 replies; 62+ messages in thread
From: Carsten Haitzler @ 2022-05-13 10:42 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Robin Murphy, Liviu Dudau, dri-devel,
Will Deacon, linux-arm-kernel
That seems sensible to me. It matches the kind of DT content I know
works. It's certainly more detailed now.
On 5/6/22 15:05, Andre Przywara wrote:
> The Arm Komeda (aka Mali-D71) is a display controller that scans out a
> framebuffer and hands a signal to a digital encoder to generate a DVI
> or HDMI signal. It supports up to two pipelines, each frame can be
> composed of up to four layers.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,komeda.txt | 78 -----------
> .../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
> 2 files changed, 130 insertions(+), 78 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
> deleted file mode 100644
> index 8513695ee47fe..0000000000000
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ /dev/null
> @@ -1,78 +0,0 @@
> -Device Tree bindings for Arm Komeda display driver
> -
> -Required properties:
> -- compatible: Should be "arm,mali-d71"
> -- reg: Physical base address and length of the registers in the system
> -- interrupts: the interrupt line number of the device in the system
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: A list of clock names. It should contain:
> - - "aclk": for the main processor clock
> -- #address-cells: Must be 1
> -- #size-cells: Must be 0
> -- iommus: configure the stream id to IOMMU, Must be configured if want to
> - enable iommu in display. for how to configure this node please reference
> - devicetree/bindings/iommu/arm,smmu-v3.txt,
> - devicetree/bindings/iommu/iommu.txt
> -
> -Required properties for sub-node: pipeline@nq
> -Each device contains one or two pipeline sub-nodes (at least one), each
> -pipeline node should provide properties:
> -- reg: Zero-indexed identifier for the pipeline
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: should contain:
> - - "pxclk": pixel clock
> -
> -- port: each pipeline connect to an encoder input port. The connection is
> - modeled using the OF graph bindings specified in
> - Documentation/devicetree/bindings/graph.txt
> -
> -Optional properties:
> - - memory-region: phandle to a node describing memory (see
> - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
> - to be used for the framebuffer; if not present, the framebuffer may
> - be located anywhere in memory.
> -
> -Example:
> -/ {
> - ...
> -
> - dp0: display@c00000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "arm,mali-d71";
> - reg = <0xc00000 0x20000>;
> - interrupts = <0 168 4>;
> - clocks = <&dpu_aclk>;
> - clock-names = "aclk";
> - iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> - <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> - <&smmu 8>, <&smmu 9>;
> -
> - dp0_pipe0: pipeline@0 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <0>;
> -
> - port {
> - dp0_pipe0_out: endpoint {
> - remote-endpoint = <&db_dvi0_in>;
> - };
> - };
> - };
> -
> - dp0_pipe1: pipeline@1 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <1>;
> -
> - port {
> - dp0_pipe1_out: endpoint {
> - remote-endpoint = <&db_dvi1_in>;
> - };
> - };
> - };
> - };
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> new file mode 100644
> index 0000000000000..9f4aade97f10a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Komeda display processor
> +
> +maintainers:
> + - Liviu Dudau <Liviu.Dudau@arm.com>
> + - Andre Przywara <andre.przywara@arm.com>
> +
> +description:
> + The Arm Mali D71 display processor supports up to two displays with up
> + to a 4K resolution each. Each pipeline can be composed of up to four
> + layers. It is typically connected to a digital display connector like HDMI.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: arm,mali-d32
> + - const: arm,mali-d71
> + - const: arm,mali-d71
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-names:
> + const: aclk
> +
> + clocks:
> + maxItems: 1
> + description: The main DPU processor clock
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + memory-region:
> + maxItems: 1
> + description:
> + Phandle to a node describing memory to be used for the framebuffer.
> + If not present, the framebuffer may be located anywhere in memory.
> +
> + iommus:
> + description:
> + The stream IDs for each of the used pipelines, each four IDs for the
> + four layers, plus one for the write-back stream.
> + minItems: 5
> + maxItems: 10
> +
> +patternProperties:
> + '^pipeline@[01]$':
> + type: object
> + description:
> + clocks
> +
> + properties:
> + reg:
> + enum: [ 0, 1 ]
> +
> + clock-names:
> + const: pxclk
> +
> + clocks:
> + maxItems: 1
> + description: The input reference for the pixel clock.
> +
> + port:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +required:
> + - "#address-cells"
> + - "#size-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - pipeline@0
> +
> +examples:
> + - |
> + display@c00000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "arm,mali-d71";
> + reg = <0xc00000 0x20000>;
> + interrupts = <168>;
> + clocks = <&dpu_aclk>;
> + clock-names = "aclk";
> + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> + <&smmu 8>,
> + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> + <&smmu 9>;
> +
> + dp0_pipe0: pipeline@0 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <0>;
> +
> + port {
> + dp0_pipe0_out: endpoint {
> + remote-endpoint = <&db_dvi0_in>;
> + };
> + };
> + };
> +
> + dp0_pipe1: pipeline@1 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <1>;
> +
> + port {
> + dp0_pipe1_out: endpoint {
> + remote-endpoint = <&db_dvi1_in>;
> + };
> + };
> + };
> + };
> +...
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
@ 2022-05-13 10:42 ` Carsten Haitzler
0 siblings, 0 replies; 62+ messages in thread
From: Carsten Haitzler @ 2022-05-13 10:42 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
That seems sensible to me. It matches the kind of DT content I know
works. It's certainly more detailed now.
On 5/6/22 15:05, Andre Przywara wrote:
> The Arm Komeda (aka Mali-D71) is a display controller that scans out a
> framebuffer and hands a signal to a digital encoder to generate a DVI
> or HDMI signal. It supports up to two pipelines, each frame can be
> composed of up to four layers.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,komeda.txt | 78 -----------
> .../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
> 2 files changed, 130 insertions(+), 78 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
> deleted file mode 100644
> index 8513695ee47fe..0000000000000
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ /dev/null
> @@ -1,78 +0,0 @@
> -Device Tree bindings for Arm Komeda display driver
> -
> -Required properties:
> -- compatible: Should be "arm,mali-d71"
> -- reg: Physical base address and length of the registers in the system
> -- interrupts: the interrupt line number of the device in the system
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: A list of clock names. It should contain:
> - - "aclk": for the main processor clock
> -- #address-cells: Must be 1
> -- #size-cells: Must be 0
> -- iommus: configure the stream id to IOMMU, Must be configured if want to
> - enable iommu in display. for how to configure this node please reference
> - devicetree/bindings/iommu/arm,smmu-v3.txt,
> - devicetree/bindings/iommu/iommu.txt
> -
> -Required properties for sub-node: pipeline@nq
> -Each device contains one or two pipeline sub-nodes (at least one), each
> -pipeline node should provide properties:
> -- reg: Zero-indexed identifier for the pipeline
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: should contain:
> - - "pxclk": pixel clock
> -
> -- port: each pipeline connect to an encoder input port. The connection is
> - modeled using the OF graph bindings specified in
> - Documentation/devicetree/bindings/graph.txt
> -
> -Optional properties:
> - - memory-region: phandle to a node describing memory (see
> - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
> - to be used for the framebuffer; if not present, the framebuffer may
> - be located anywhere in memory.
> -
> -Example:
> -/ {
> - ...
> -
> - dp0: display@c00000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "arm,mali-d71";
> - reg = <0xc00000 0x20000>;
> - interrupts = <0 168 4>;
> - clocks = <&dpu_aclk>;
> - clock-names = "aclk";
> - iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> - <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> - <&smmu 8>, <&smmu 9>;
> -
> - dp0_pipe0: pipeline@0 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <0>;
> -
> - port {
> - dp0_pipe0_out: endpoint {
> - remote-endpoint = <&db_dvi0_in>;
> - };
> - };
> - };
> -
> - dp0_pipe1: pipeline@1 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <1>;
> -
> - port {
> - dp0_pipe1_out: endpoint {
> - remote-endpoint = <&db_dvi1_in>;
> - };
> - };
> - };
> - };
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> new file mode 100644
> index 0000000000000..9f4aade97f10a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Komeda display processor
> +
> +maintainers:
> + - Liviu Dudau <Liviu.Dudau@arm.com>
> + - Andre Przywara <andre.przywara@arm.com>
> +
> +description:
> + The Arm Mali D71 display processor supports up to two displays with up
> + to a 4K resolution each. Each pipeline can be composed of up to four
> + layers. It is typically connected to a digital display connector like HDMI.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: arm,mali-d32
> + - const: arm,mali-d71
> + - const: arm,mali-d71
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-names:
> + const: aclk
> +
> + clocks:
> + maxItems: 1
> + description: The main DPU processor clock
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + memory-region:
> + maxItems: 1
> + description:
> + Phandle to a node describing memory to be used for the framebuffer.
> + If not present, the framebuffer may be located anywhere in memory.
> +
> + iommus:
> + description:
> + The stream IDs for each of the used pipelines, each four IDs for the
> + four layers, plus one for the write-back stream.
> + minItems: 5
> + maxItems: 10
> +
> +patternProperties:
> + '^pipeline@[01]$':
> + type: object
> + description:
> + clocks
> +
> + properties:
> + reg:
> + enum: [ 0, 1 ]
> +
> + clock-names:
> + const: pxclk
> +
> + clocks:
> + maxItems: 1
> + description: The input reference for the pixel clock.
> +
> + port:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +required:
> + - "#address-cells"
> + - "#size-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - pipeline@0
> +
> +examples:
> + - |
> + display@c00000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "arm,mali-d71";
> + reg = <0xc00000 0x20000>;
> + interrupts = <168>;
> + clocks = <&dpu_aclk>;
> + clock-names = "aclk";
> + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> + <&smmu 8>,
> + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> + <&smmu 9>;
> +
> + dp0_pipe0: pipeline@0 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <0>;
> +
> + port {
> + dp0_pipe0_out: endpoint {
> + remote-endpoint = <&db_dvi0_in>;
> + };
> + };
> + };
> +
> + dp0_pipe1: pipeline@1 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <1>;
> +
> + port {
> + dp0_pipe1_out: endpoint {
> + remote-endpoint = <&db_dvi1_in>;
> + };
> + };
> + };
> + };
> +...
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda to DT schema
@ 2022-05-13 10:42 ` Carsten Haitzler
0 siblings, 0 replies; 62+ messages in thread
From: Carsten Haitzler @ 2022-05-13 10:42 UTC (permalink / raw)
To: Andre Przywara, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, Will Deacon, Liviu Dudau, dri-devel,
Robin Murphy, linux-arm-kernel
That seems sensible to me. It matches the kind of DT content I know
works. It's certainly more detailed now.
On 5/6/22 15:05, Andre Przywara wrote:
> The Arm Komeda (aka Mali-D71) is a display controller that scans out a
> framebuffer and hands a signal to a digital encoder to generate a DVI
> or HDMI signal. It supports up to two pipelines, each frame can be
> composed of up to four layers.
>
> Convert the existing DT binding to DT schema.
>
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> ---
> .../bindings/display/arm,komeda.txt | 78 -----------
> .../bindings/display/arm,komeda.yaml | 130 ++++++++++++++++++
> 2 files changed, 130 insertions(+), 78 deletions(-)
> delete mode 100644 Documentation/devicetree/bindings/display/arm,komeda.txt
> create mode 100644 Documentation/devicetree/bindings/display/arm,komeda.yaml
>
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.txt b/Documentation/devicetree/bindings/display/arm,komeda.txt
> deleted file mode 100644
> index 8513695ee47fe..0000000000000
> --- a/Documentation/devicetree/bindings/display/arm,komeda.txt
> +++ /dev/null
> @@ -1,78 +0,0 @@
> -Device Tree bindings for Arm Komeda display driver
> -
> -Required properties:
> -- compatible: Should be "arm,mali-d71"
> -- reg: Physical base address and length of the registers in the system
> -- interrupts: the interrupt line number of the device in the system
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: A list of clock names. It should contain:
> - - "aclk": for the main processor clock
> -- #address-cells: Must be 1
> -- #size-cells: Must be 0
> -- iommus: configure the stream id to IOMMU, Must be configured if want to
> - enable iommu in display. for how to configure this node please reference
> - devicetree/bindings/iommu/arm,smmu-v3.txt,
> - devicetree/bindings/iommu/iommu.txt
> -
> -Required properties for sub-node: pipeline@nq
> -Each device contains one or two pipeline sub-nodes (at least one), each
> -pipeline node should provide properties:
> -- reg: Zero-indexed identifier for the pipeline
> -- clocks: A list of phandle + clock-specifier pairs, one for each entry
> - in 'clock-names'
> -- clock-names: should contain:
> - - "pxclk": pixel clock
> -
> -- port: each pipeline connect to an encoder input port. The connection is
> - modeled using the OF graph bindings specified in
> - Documentation/devicetree/bindings/graph.txt
> -
> -Optional properties:
> - - memory-region: phandle to a node describing memory (see
> - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
> - to be used for the framebuffer; if not present, the framebuffer may
> - be located anywhere in memory.
> -
> -Example:
> -/ {
> - ...
> -
> - dp0: display@c00000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "arm,mali-d71";
> - reg = <0xc00000 0x20000>;
> - interrupts = <0 168 4>;
> - clocks = <&dpu_aclk>;
> - clock-names = "aclk";
> - iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> - <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> - <&smmu 8>, <&smmu 9>;
> -
> - dp0_pipe0: pipeline@0 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <0>;
> -
> - port {
> - dp0_pipe0_out: endpoint {
> - remote-endpoint = <&db_dvi0_in>;
> - };
> - };
> - };
> -
> - dp0_pipe1: pipeline@1 {
> - clocks = <&fpgaosc2>;
> - clock-names = "pxclk";
> - reg = <1>;
> -
> - port {
> - dp0_pipe1_out: endpoint {
> - remote-endpoint = <&db_dvi1_in>;
> - };
> - };
> - };
> - };
> - ...
> -};
> diff --git a/Documentation/devicetree/bindings/display/arm,komeda.yaml b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> new file mode 100644
> index 0000000000000..9f4aade97f10a
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/display/arm,komeda.yaml
> @@ -0,0 +1,130 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/display/arm,komeda.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Arm Komeda display processor
> +
> +maintainers:
> + - Liviu Dudau <Liviu.Dudau@arm.com>
> + - Andre Przywara <andre.przywara@arm.com>
> +
> +description:
> + The Arm Mali D71 display processor supports up to two displays with up
> + to a 4K resolution each. Each pipeline can be composed of up to four
> + layers. It is typically connected to a digital display connector like HDMI.
> +
> +properties:
> + compatible:
> + oneOf:
> + - items:
> + - const: arm,mali-d32
> + - const: arm,mali-d71
> + - const: arm,mali-d71
> +
> + reg:
> + maxItems: 1
> +
> + interrupts:
> + maxItems: 1
> +
> + clock-names:
> + const: aclk
> +
> + clocks:
> + maxItems: 1
> + description: The main DPU processor clock
> +
> + "#address-cells":
> + const: 1
> +
> + "#size-cells":
> + const: 0
> +
> + memory-region:
> + maxItems: 1
> + description:
> + Phandle to a node describing memory to be used for the framebuffer.
> + If not present, the framebuffer may be located anywhere in memory.
> +
> + iommus:
> + description:
> + The stream IDs for each of the used pipelines, each four IDs for the
> + four layers, plus one for the write-back stream.
> + minItems: 5
> + maxItems: 10
> +
> +patternProperties:
> + '^pipeline@[01]$':
> + type: object
> + description:
> + clocks
> +
> + properties:
> + reg:
> + enum: [ 0, 1 ]
> +
> + clock-names:
> + const: pxclk
> +
> + clocks:
> + maxItems: 1
> + description: The input reference for the pixel clock.
> +
> + port:
> + $ref: /schemas/graph.yaml#/$defs/port-base
> + unevaluatedProperties: false
> +
> +additionalProperties: false
> +
> +required:
> + - "#address-cells"
> + - "#size-cells"
> + - compatible
> + - reg
> + - interrupts
> + - clock-names
> + - clocks
> + - pipeline@0
> +
> +examples:
> + - |
> + display@c00000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "arm,mali-d71";
> + reg = <0xc00000 0x20000>;
> + interrupts = <168>;
> + clocks = <&dpu_aclk>;
> + clock-names = "aclk";
> + iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
> + <&smmu 8>,
> + <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
> + <&smmu 9>;
> +
> + dp0_pipe0: pipeline@0 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <0>;
> +
> + port {
> + dp0_pipe0_out: endpoint {
> + remote-endpoint = <&db_dvi0_in>;
> + };
> + };
> + };
> +
> + dp0_pipe1: pipeline@1 {
> + clocks = <&fpgaosc2>;
> + clock-names = "pxclk";
> + reg = <1>;
> +
> + port {
> + dp0_pipe1_out: endpoint {
> + remote-endpoint = <&db_dvi1_in>;
> + };
> + };
> + };
> + };
> +...
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
2022-05-11 12:03 ` Liviu Dudau
(?)
@ 2022-06-09 16:31 ` Andre Przywara
-1 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-06-09 16:31 UTC (permalink / raw)
To: Liviu Dudau
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, David Airlie,
Will Deacon, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Wed, 11 May 2022 13:03:36 +0100
Liviu Dudau <liviu.dudau@arm.com> wrote:
Hi Liviu,
> On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> > On Fri, 06 May 2022 17:39:53 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >
> > > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > > It supports multiple layers, scaling and rotation.
> > > >
> > > > Convert the existing DT binding to DT schema.
> > > >
> > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > > ---
> > > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > > >
> > >
> > > Running 'make dtbs_check' with the schema in this patch gives the
> > > following warnings. Consider if they are expected or the schema is
> > > incorrect. These may not be new warnings.
> > >
> > > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > > This will change in the future.
> > >
> > > Full log is available here: https://patchwork.ozlabs.org/patch/
> > >
> > >
> > > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
> >
> > Ah, good point, I missed that directory when testing. I came up with the
> > following change on top:
> >
> > ==============================
> > diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > index ea7b7100548bf..bc0d3f3ab2b75 100644
> > --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > @@ -76,6 +76,14 @@ properties:
> > description:
> > integer describing the ARQoS levels of DP500's QoS signaling
> >
> > + arm,malidp-arqos-value:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + Quality-of-Service value for the display engine FIFOs, to write
> > + into the RQOS register of the DP500.
> > + See the ARM Mali-DP500 TRM for details on the encoding.
> > + If omitted, the RQOS register will not be changed.
> > +
>
> Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
> ("dt/bindings: display: Add optional property node define for Mali DP500") is
> introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
> message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Ah, thanks for the report and the background, and sorry for the delay. I
verified that, and sent a patch[1], since this binding here was already
merged.
Cheers,
Andre
[1]
https://lore.kernel.org/linux-arm-kernel/20220609162729.1441760-1-andre.przywara@arm.com/T/#u
>
> Appologies for signing off on the wrong patch content at that time.
>
> Best regards,
> Liviu
>
> > port:
> > $ref: /schemas/graph.yaml#/properties/port
> > unevaluatedProperties: false
> > ==============================
> >
> > Cheers,
> > Andre
>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-06-09 16:31 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-06-09 16:31 UTC (permalink / raw)
To: Liviu Dudau
Cc: devicetree, David Airlie, Robin Murphy, dri-devel, Rob Herring,
Krzysztof Kozlowski, Will Deacon, linux-arm-kernel
On Wed, 11 May 2022 13:03:36 +0100
Liviu Dudau <liviu.dudau@arm.com> wrote:
Hi Liviu,
> On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> > On Fri, 06 May 2022 17:39:53 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >
> > > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > > It supports multiple layers, scaling and rotation.
> > > >
> > > > Convert the existing DT binding to DT schema.
> > > >
> > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > > ---
> > > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > > >
> > >
> > > Running 'make dtbs_check' with the schema in this patch gives the
> > > following warnings. Consider if they are expected or the schema is
> > > incorrect. These may not be new warnings.
> > >
> > > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > > This will change in the future.
> > >
> > > Full log is available here: https://patchwork.ozlabs.org/patch/
> > >
> > >
> > > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
> >
> > Ah, good point, I missed that directory when testing. I came up with the
> > following change on top:
> >
> > ==============================
> > diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > index ea7b7100548bf..bc0d3f3ab2b75 100644
> > --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > @@ -76,6 +76,14 @@ properties:
> > description:
> > integer describing the ARQoS levels of DP500's QoS signaling
> >
> > + arm,malidp-arqos-value:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + Quality-of-Service value for the display engine FIFOs, to write
> > + into the RQOS register of the DP500.
> > + See the ARM Mali-DP500 TRM for details on the encoding.
> > + If omitted, the RQOS register will not be changed.
> > +
>
> Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
> ("dt/bindings: display: Add optional property node define for Mali DP500") is
> introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
> message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Ah, thanks for the report and the background, and sorry for the delay. I
verified that, and sent a patch[1], since this binding here was already
merged.
Cheers,
Andre
[1]
https://lore.kernel.org/linux-arm-kernel/20220609162729.1441760-1-andre.przywara@arm.com/T/#u
>
> Appologies for signing off on the wrong patch content at that time.
>
> Best regards,
> Liviu
>
> > port:
> > $ref: /schemas/graph.yaml#/properties/port
> > unevaluatedProperties: false
> > ==============================
> >
> > Cheers,
> > Andre
>
^ permalink raw reply [flat|nested] 62+ messages in thread
* Re: [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP to DT schema
@ 2022-06-09 16:31 ` Andre Przywara
0 siblings, 0 replies; 62+ messages in thread
From: Andre Przywara @ 2022-06-09 16:31 UTC (permalink / raw)
To: Liviu Dudau
Cc: Rob Herring, devicetree, Krzysztof Kozlowski, David Airlie,
Will Deacon, dri-devel, Rob Herring, Robin Murphy,
linux-arm-kernel
On Wed, 11 May 2022 13:03:36 +0100
Liviu Dudau <liviu.dudau@arm.com> wrote:
Hi Liviu,
> On Mon, May 09, 2022 at 02:49:01PM +0100, Andre Przywara wrote:
> > On Fri, 06 May 2022 17:39:53 -0500
> > Rob Herring <robh@kernel.org> wrote:
> >
> > > On Fri, 06 May 2022 15:05:32 +0100, Andre Przywara wrote:
> > > > The Arm Mali Display Processor (DP) 5xx/6xx is a series of IP that scans
> > > > out a framebuffer and hands the pixels over to a digital signal encoder.
> > > > It supports multiple layers, scaling and rotation.
> > > >
> > > > Convert the existing DT binding to DT schema.
> > > >
> > > > Signed-off-by: Andre Przywara <andre.przywara@arm.com>
> > > > ---
> > > > .../bindings/display/arm,malidp.txt | 68 ----------
> > > > .../bindings/display/arm,malidp.yaml | 116 ++++++++++++++++++
> > > > 2 files changed, 116 insertions(+), 68 deletions(-)
> > > > delete mode 100644 Documentation/devicetree/bindings/display/arm,malidp.txt
> > > > create mode 100644 Documentation/devicetree/bindings/display/arm,malidp.yaml
> > > >
> > >
> > > Running 'make dtbs_check' with the schema in this patch gives the
> > > following warnings. Consider if they are expected or the schema is
> > > incorrect. These may not be new warnings.
> > >
> > > Note that it is not yet a requirement to have 0 warnings for dtbs_check.
> > > This will change in the future.
> > >
> > > Full log is available here: https://patchwork.ozlabs.org/patch/
> > >
> > >
> > > display@f080000: 'arm,malidp-arqos-value' does not match any of the regexes: 'pinctrl-[0-9]+'
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-kbox-a-230-ls.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var3-ads2.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-qds.dtb
> > > arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dtb
> >
> > Ah, good point, I missed that directory when testing. I came up with the
> > following change on top:
> >
> > ==============================
> > diff --git a/Documentation/devicetree/bindings/display/arm,malidp.yaml b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > index ea7b7100548bf..bc0d3f3ab2b75 100644
> > --- a/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > +++ b/Documentation/devicetree/bindings/display/arm,malidp.yaml
> > @@ -76,6 +76,14 @@ properties:
> > description:
> > integer describing the ARQoS levels of DP500's QoS signaling
> >
> > + arm,malidp-arqos-value:
> > + $ref: /schemas/types.yaml#/definitions/uint32
> > + description:
> > + Quality-of-Service value for the display engine FIFOs, to write
> > + into the RQOS register of the DP500.
> > + See the ARM Mali-DP500 TRM for details on the encoding.
> > + If omitted, the RQOS register will not be changed.
> > +
>
> Actually, this needs to replace 'arm,malidp-arqos-high-level'. Commit ce6eb0253cba
> ("dt/bindings: display: Add optional property node define for Mali DP500") is
> introducing the wrong property (it mentions 'arm,malidp-arqos-value' in the commit
> message). There is no user of 'arm,malidp-arqos-high-level' in the kernel.
Ah, thanks for the report and the background, and sorry for the delay. I
verified that, and sent a patch[1], since this binding here was already
merged.
Cheers,
Andre
[1]
https://lore.kernel.org/linux-arm-kernel/20220609162729.1441760-1-andre.przywara@arm.com/T/#u
>
> Appologies for signing off on the wrong patch content at that time.
>
> Best regards,
> Liviu
>
> > port:
> > $ref: /schemas/graph.yaml#/properties/port
> > unevaluatedProperties: false
> > ==============================
> >
> > Cheers,
> > Andre
>
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 62+ messages in thread
end of thread, other threads:[~2022-06-09 16:33 UTC | newest]
Thread overview: 62+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-06 14:05 [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals to DT schema Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 01/11] dt-bindings: iommu: arm,smmu-v3: make PRI IRQ optional Andre Przywara
2022-05-06 14:05 ` [PATCH v2 01/11] dt-bindings: iommu: arm, smmu-v3: " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 02/11] dt-bindings: arm: spe-pmu: convert to DT schema Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 03/11] dt-bindings: arm: sp810: " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-07 16:39 ` Krzysztof Kozlowski
2022-05-07 16:39 ` Krzysztof Kozlowski
2022-05-06 14:05 ` [PATCH v2 04/11] dt-bindings: sound: add Arm PL041 AACI " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-07 16:39 ` Krzysztof Kozlowski
2022-05-07 16:39 ` Krzysztof Kozlowski
2022-05-07 16:39 ` Krzysztof Kozlowski
2022-05-06 14:05 ` [PATCH v2 05/11] dt-bindings: serio: add Arm PL050 " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-07 16:40 ` Krzysztof Kozlowski
2022-05-07 16:40 ` Krzysztof Kozlowski
2022-05-06 14:05 ` [PATCH v2 06/11] dt-bindings: arm: convert vexpress-sysregs to " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 14:05 ` [PATCH v2 07/11] dt-bindings: arm: convert vexpress-config " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 08/11] dt-bindings: display: convert PL110/PL111 " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 14:05 ` [PATCH v2 09/11] dt-bindings: display: convert Arm HDLCD " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 14:05 ` [PATCH v2 10/11] dt-bindings: display: convert Arm Mali-DP " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-06 22:39 ` Rob Herring
2022-05-09 13:49 ` Andre Przywara
2022-05-09 13:49 ` Andre Przywara
2022-05-09 13:49 ` Andre Przywara
2022-05-11 12:03 ` Liviu Dudau
2022-05-11 12:03 ` Liviu Dudau
2022-05-11 12:03 ` Liviu Dudau
2022-06-09 16:31 ` Andre Przywara
2022-06-09 16:31 ` Andre Przywara
2022-06-09 16:31 ` Andre Przywara
2022-05-06 14:05 ` [PATCH v2 11/11] dt-bindings: display: convert Arm Komeda " Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-06 14:05 ` Andre Przywara
2022-05-13 10:42 ` Carsten Haitzler
2022-05-13 10:42 ` Carsten Haitzler
2022-05-13 10:42 ` Carsten Haitzler
2022-05-09 19:15 ` [PATCH v2 00/11] dt-bindings: Convert Arm Ltd. peripherals " Rob Herring
2022-05-09 19:15 ` Rob Herring
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