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* [PATCH] misc: Correct Kconfig dependencies for a number of options
@ 2022-05-10 15:08 Tom Rini
  2022-05-10 16:43 ` Sean Anderson
  0 siblings, 1 reply; 3+ messages in thread
From: Tom Rini @ 2022-05-10 15:08 UTC (permalink / raw)
  To: u-boot

We have many cases of SPL (or TPL or VPL) drivers that don't depend on
SPL_MISC (and so on) but rather just MISC.

Signed-off-by: Tom Rini <trini@konsulko.com>
---
 drivers/misc/Kconfig | 34 +++++++++++++++++++++++-----------
 1 file changed, 23 insertions(+), 11 deletions(-)

diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index c829939622b0..ebe84b15a49a 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -115,7 +115,7 @@ config CROS_EC
 
 config SPL_CROS_EC
 	bool "Enable Chrome OS EC in SPL"
-	depends on SPL
+	depends on SPL && SPL_MISC
 	help
 	  Enable access to the Chrome OS EC in SPL. This is a separate
 	  microcontroller typically available on a SPI bus on Chromebooks. It
@@ -125,7 +125,7 @@ config SPL_CROS_EC
 
 config TPL_CROS_EC
 	bool "Enable Chrome OS EC in TPL"
-	depends on TPL
+	depends on TPL && TPL_MISC
 	help
 	  Enable access to the Chrome OS EC in TPL. This is a separate
 	  microcontroller typically available on a SPI bus on Chromebooks. It
@@ -135,7 +135,7 @@ config TPL_CROS_EC
 
 config VPL_CROS_EC
 	bool "Enable Chrome OS EC in VPL"
-	depends on VPL
+	depends on VPL && VPL_MISC
 	help
 	  Enable access to the Chrome OS EC in VPL. This is a separate
 	  microcontroller typically available on a SPI bus on Chromebooks. It
@@ -163,7 +163,7 @@ config CROS_EC_LPC
 
 config SPL_CROS_EC_LPC
 	bool "Enable Chrome OS EC LPC driver in SPL"
-	depends on CROS_EC
+	depends on CROS_EC && SPL_MISC
 	help
 	  Enable I2C access to the Chrome OS EC. This is used on x86
 	  Chromebooks such as link and falco. The keyboard is provided
@@ -172,7 +172,7 @@ config SPL_CROS_EC_LPC
 
 config TPL_CROS_EC_LPC
 	bool "Enable Chrome OS EC LPC driver in TPL"
-	depends on CROS_EC
+	depends on CROS_EC && TPL_MISC
 	help
 	  Enable I2C access to the Chrome OS EC. This is used on x86
 	  Chromebooks such as link and falco. The keyboard is provided
@@ -181,7 +181,7 @@ config TPL_CROS_EC_LPC
 
 config VPL_CROS_EC_LPC
 	bool "Enable Chrome OS EC LPC driver in VPL"
-	depends on CROS_EC
+	depends on CROS_EC && VPL_MISC
 	help
 	  Enable I2C access to the Chrome OS EC. This is used on x86
 	  Chromebooks such as link and falco. The keyboard is provided
@@ -274,7 +274,7 @@ config MXC_OCOTP
 
 config SPL_MXC_OCOTP
 	bool "Enable MXC OCOTP driver in SPL"
-	depends on SPL && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610)
+	depends on SPL_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610)
 	default y
 	help
 	  If you say Y here, you will get support for the One Time
@@ -304,7 +304,7 @@ config P2SB
 
 config SPL_P2SB
 	bool "Intel Primary to Sideband Bridge in SPL"
-	depends on SPL && (X86 || SANDBOX)
+	depends on SPL_MISC && (X86 || SANDBOX)
 	help
 	  The Primary to Sideband Bridge is used to access various peripherals
 	  through memory-mapped I/O in a large chunk of PCI space. The space is
@@ -314,7 +314,7 @@ config SPL_P2SB
 
 config TPL_P2SB
 	bool "Intel Primary to Sideband Bridge in TPL"
-	depends on TPL && (X86 || SANDBOX)
+	depends on TPL_MISC && (X86 || SANDBOX)
 	help
 	  The Primary to Sideband Bridge is used to access various peripherals
 	  through memory-mapped I/O in a large chunk of PCI space. The space is
@@ -333,7 +333,7 @@ config PWRSEQ
 
 config SPL_PWRSEQ
 	bool "Enable power-sequencing drivers for SPL"
-	depends on PWRSEQ
+	depends on SPL_MISC && PWRSEQ
 	help
 	  Power-sequencing drivers provide support for controlling power for
 	  devices. They are typically referenced by a phandle from another
@@ -441,7 +441,7 @@ config I2C_EEPROM
 
 config SPL_I2C_EEPROM
 	bool "Enable driver for generic I2C-attached EEPROMs for SPL"
-	depends on MISC && SPL && SPL_DM
+	depends on SPL_MISC
 	help
 	  This option is an SPL-variant of the I2C_EEPROM option.
 	  See the help of I2C_EEPROM for details.
@@ -494,7 +494,7 @@ config FS_LOADER
 
 config SPL_FS_LOADER
 	bool "Enable loader driver for file system"
+	depends on SPL
 	help
 	  This is file system generic loader which can be used to load
 	  the file image from the storage into target such as memory.
-- 
2.25.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] misc: Correct Kconfig dependencies for a number of options
  2022-05-10 15:08 [PATCH] misc: Correct Kconfig dependencies for a number of options Tom Rini
@ 2022-05-10 16:43 ` Sean Anderson
  2022-05-10 16:45   ` Tom Rini
  0 siblings, 1 reply; 3+ messages in thread
From: Sean Anderson @ 2022-05-10 16:43 UTC (permalink / raw)
  To: Tom Rini, u-boot

Hi Tom,

On 5/10/22 11:08 AM, Tom Rini wrote:
> We have many cases of SPL (or TPL or VPL) drivers that don't depend on
> SPL_MISC (and so on) but rather just MISC.
> 
> Signed-off-by: Tom Rini <trini@konsulko.com>
> ---
>  drivers/misc/Kconfig | 34 +++++++++++++++++++++++-----------
>  1 file changed, 23 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> index c829939622b0..ebe84b15a49a 100644
> --- a/drivers/misc/Kconfig
> +++ b/drivers/misc/Kconfig
> @@ -115,7 +115,7 @@ config CROS_EC
>  
>  config SPL_CROS_EC
>  	bool "Enable Chrome OS EC in SPL"
> -	depends on SPL
> +	depends on SPL && SPL_MISC

Can't we just depend on SPL_MISC?

--Sean

>  	help
>  	  Enable access to the Chrome OS EC in SPL. This is a separate
>  	  microcontroller typically available on a SPI bus on Chromebooks. It
> @@ -125,7 +125,7 @@ config SPL_CROS_EC
>  
>  config TPL_CROS_EC
>  	bool "Enable Chrome OS EC in TPL"
> -	depends on TPL
> +	depends on TPL && TPL_MISC
>  	help
>  	  Enable access to the Chrome OS EC in TPL. This is a separate
>  	  microcontroller typically available on a SPI bus on Chromebooks. It
> @@ -135,7 +135,7 @@ config TPL_CROS_EC
>  
>  config VPL_CROS_EC
>  	bool "Enable Chrome OS EC in VPL"
> -	depends on VPL
> +	depends on VPL && VPL_MISC
>  	help
>  	  Enable access to the Chrome OS EC in VPL. This is a separate
>  	  microcontroller typically available on a SPI bus on Chromebooks. It
> @@ -163,7 +163,7 @@ config CROS_EC_LPC
>  
>  config SPL_CROS_EC_LPC
>  	bool "Enable Chrome OS EC LPC driver in SPL"
> -	depends on CROS_EC
> +	depends on CROS_EC && SPL_MISC
>  	help
>  	  Enable I2C access to the Chrome OS EC. This is used on x86
>  	  Chromebooks such as link and falco. The keyboard is provided
> @@ -172,7 +172,7 @@ config SPL_CROS_EC_LPC
>  
>  config TPL_CROS_EC_LPC
>  	bool "Enable Chrome OS EC LPC driver in TPL"
> -	depends on CROS_EC
> +	depends on CROS_EC && TPL_MISC
>  	help
>  	  Enable I2C access to the Chrome OS EC. This is used on x86
>  	  Chromebooks such as link and falco. The keyboard is provided
> @@ -181,7 +181,7 @@ config TPL_CROS_EC_LPC
>  
>  config VPL_CROS_EC_LPC
>  	bool "Enable Chrome OS EC LPC driver in VPL"
> -	depends on CROS_EC
> +	depends on CROS_EC && VPL_MISC
>  	help
>  	  Enable I2C access to the Chrome OS EC. This is used on x86
>  	  Chromebooks such as link and falco. The keyboard is provided
> @@ -274,7 +274,7 @@ config MXC_OCOTP
>  
>  config SPL_MXC_OCOTP
>  	bool "Enable MXC OCOTP driver in SPL"
> -	depends on SPL && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610)
> +	depends on SPL_MISC && (ARCH_IMX8M || ARCH_MX6 || ARCH_MX7 || ARCH_MX7ULP || ARCH_VF610)
>  	default y
>  	help
>  	  If you say Y here, you will get support for the One Time
> @@ -304,7 +304,7 @@ config P2SB
>  
>  config SPL_P2SB
>  	bool "Intel Primary to Sideband Bridge in SPL"
> -	depends on SPL && (X86 || SANDBOX)
> +	depends on SPL_MISC && (X86 || SANDBOX)
>  	help
>  	  The Primary to Sideband Bridge is used to access various peripherals
>  	  through memory-mapped I/O in a large chunk of PCI space. The space is
> @@ -314,7 +314,7 @@ config SPL_P2SB
>  
>  config TPL_P2SB
>  	bool "Intel Primary to Sideband Bridge in TPL"
> -	depends on TPL && (X86 || SANDBOX)
> +	depends on TPL_MISC && (X86 || SANDBOX)
>  	help
>  	  The Primary to Sideband Bridge is used to access various peripherals
>  	  through memory-mapped I/O in a large chunk of PCI space. The space is
> @@ -333,7 +333,7 @@ config PWRSEQ
>  
>  config SPL_PWRSEQ
>  	bool "Enable power-sequencing drivers for SPL"
> -	depends on PWRSEQ
> +	depends on SPL_MISC && PWRSEQ
>  	help
>  	  Power-sequencing drivers provide support for controlling power for
>  	  devices. They are typically referenced by a phandle from another
> @@ -441,7 +441,7 @@ config I2C_EEPROM
>  
>  config SPL_I2C_EEPROM
>  	bool "Enable driver for generic I2C-attached EEPROMs for SPL"
> -	depends on MISC && SPL && SPL_DM
> +	depends on SPL_MISC
>  	help
>  	  This option is an SPL-variant of the I2C_EEPROM option.
>  	  See the help of I2C_EEPROM for details.
> @@ -494,7 +494,7 @@ config FS_LOADER
>  
>  config SPL_FS_LOADER
>  	bool "Enable loader driver for file system"
> +	depends on SPL
>  	help
>  	  This is file system generic loader which can be used to load
>  	  the file image from the storage into target such as memory.
> 

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] misc: Correct Kconfig dependencies for a number of options
  2022-05-10 16:43 ` Sean Anderson
@ 2022-05-10 16:45   ` Tom Rini
  0 siblings, 0 replies; 3+ messages in thread
From: Tom Rini @ 2022-05-10 16:45 UTC (permalink / raw)
  To: Sean Anderson; +Cc: u-boot

[-- Attachment #1: Type: text/plain, Size: 1305 bytes --]

On Tue, May 10, 2022 at 12:43:40PM -0400, Sean Anderson wrote:
> Hi Tom,
> 
> On 5/10/22 11:08 AM, Tom Rini wrote:
> > We have many cases of SPL (or TPL or VPL) drivers that don't depend on
> > SPL_MISC (and so on) but rather just MISC.
> > 
> > Signed-off-by: Tom Rini <trini@konsulko.com>
> > ---
> >  drivers/misc/Kconfig | 34 +++++++++++++++++++++++-----------
> >  1 file changed, 23 insertions(+), 11 deletions(-)
> > 
> > diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
> > index c829939622b0..ebe84b15a49a 100644
> > --- a/drivers/misc/Kconfig
> > +++ b/drivers/misc/Kconfig
> > @@ -115,7 +115,7 @@ config CROS_EC
> >  
> >  config SPL_CROS_EC
> >  	bool "Enable Chrome OS EC in SPL"
> > -	depends on SPL
> > +	depends on SPL && SPL_MISC
> 
> Can't we just depend on SPL_MISC?

Yes and..

> 
> --Sean
> 
> >  	help
> >  	  Enable access to the Chrome OS EC in SPL. This is a separate
> >  	  microcontroller typically available on a SPI bus on Chromebooks. It
> > @@ -125,7 +125,7 @@ config SPL_CROS_EC
> >  
> >  config TPL_CROS_EC
> >  	bool "Enable Chrome OS EC in TPL"
> > -	depends on TPL
> > +	depends on TPL && TPL_MISC

TPL_MISC alone too.  I caught this in some places but not all, I'll
respin and check for others.  Thanks!

-- 
Tom

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^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2022-05-10 16:45 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-05-10 15:08 [PATCH] misc: Correct Kconfig dependencies for a number of options Tom Rini
2022-05-10 16:43 ` Sean Anderson
2022-05-10 16:45   ` Tom Rini

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