[PATCH] ARM: dts: imx6qdl: correct PU regulator ramp delay

[PATCH] ARM: dts: imx6qdl: correct PU regulator ramp delay

[Lucas Stach]

Contrary to what was believed at the time, the ramp delay of 150us is not
plenty for the PU LDO with the default step time of 512 pulses of the 24MHz
clock. Measurements have shown that after enabling the LDO the voltage on
VDDPU_CAP jumps to ~750mV in the first step and after that the regulator
executes the normal ramp up as defined by the step size control.

This means it takes the regulator between 360us and 370us to ramp up to
the nominal 1.15V voltage for this power domain. With the old setting of
the ramp delay the power up of the PU GPC domain would happen in the middle
of the regulator ramp with the voltage being at around 900mV. Apparently
this was enough for most units to properly power up the peripherals in the
domain and execute the reset. Some units however, fail to power up properly,
especially when the chip is at a low temperature. In that case any access
to the GPU registers would yield an incorrect result with no way to recover
from this situation.

Change the ramp delay to 380us to cover the measured ramp up time with a
bit of additional slack.

Fixes: 40130d327f72 ("ARM: dts: imx6qdl: Allow disabling the PU regulator,
                     add a enable ramp delay")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
---
 arch/arm/boot/dts/imx6qdl.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index d27beb47f9a3..652feff33496 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -762,7 +762,7 @@ reg_pu: regulator-vddpu {
 					regulator-name = "vddpu";
 					regulator-min-microvolt = <725000>;
 					regulator-max-microvolt = <1450000>;
-					regulator-enable-ramp-delay = <150>;
+					regulator-enable-ramp-delay = <380>;
 					anatop-reg-offset = <0x140>;
 					anatop-vol-bit-shift = <9>;
 					anatop-vol-bit-width = <5>;
-- 
2.30.2


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Re: [PATCH] ARM: dts: imx6qdl: correct PU regulator ramp delay

[Francesco Dolcini]

On Wed, May 11, 2022 at 06:08:23PM +0200, Lucas Stach wrote:
> Fixes: 40130d327f72 ("ARM: dts: imx6qdl: Allow disabling the PU regulator,
>                      add a enable ramp delay")
Fixes tag needs to be on a single line

Francesco


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Re: [PATCH] ARM: dts: imx6qdl: correct PU regulator ramp delay

[Shawn Guo]

On Wed, May 11, 2022 at 06:08:23PM +0200, Lucas Stach wrote:
> Contrary to what was believed at the time, the ramp delay of 150us is not
> plenty for the PU LDO with the default step time of 512 pulses of the 24MHz
> clock. Measurements have shown that after enabling the LDO the voltage on
> VDDPU_CAP jumps to ~750mV in the first step and after that the regulator
> executes the normal ramp up as defined by the step size control.
> 
> This means it takes the regulator between 360us and 370us to ramp up to
> the nominal 1.15V voltage for this power domain. With the old setting of
> the ramp delay the power up of the PU GPC domain would happen in the middle
> of the regulator ramp with the voltage being at around 900mV. Apparently
> this was enough for most units to properly power up the peripherals in the
> domain and execute the reset. Some units however, fail to power up properly,
> especially when the chip is at a low temperature. In that case any access
> to the GPU registers would yield an incorrect result with no way to recover
> from this situation.
> 
> Change the ramp delay to 380us to cover the measured ramp up time with a
> bit of additional slack.
> 
> Fixes: 40130d327f72 ("ARM: dts: imx6qdl: Allow disabling the PU regulator,
>                      add a enable ramp delay")
> Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

Applied, thanks!

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