* [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode
@ 2022-05-13 8:47 Nirmoy Das
2022-05-13 9:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable Tile4 tiling mode (rev3) Patchwork
` (3 more replies)
0 siblings, 4 replies; 7+ messages in thread
From: Nirmoy Das @ 2022-05-13 8:47 UTC (permalink / raw)
To: intel-gfx; +Cc: krishnaiah.bommu, matthew.auld, chris.p.wilson
From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Enable Tile4 tiling mode on platform that supports
Tile4 but no TileY like DG2.
v3: add a function to find X-tile availability for a platform.
v2: disable X-tile for iGPU in fastblit
fix checkpath --strict warnings
Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
---
.../i915/gem/selftests/i915_gem_client_blt.c | 250 ++++++++++++++----
drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 ++
2 files changed, 227 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
index ddd0772fd828..3cfc621ef363 100644
--- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
+++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
@@ -6,6 +6,7 @@
#include "i915_selftest.h"
#include "gt/intel_context.h"
+#include "gt/intel_engine_regs.h"
#include "gt/intel_engine_user.h"
#include "gt/intel_gpu_commands.h"
#include "gt/intel_gt.h"
@@ -18,10 +19,71 @@
#include "huge_gem_object.h"
#include "mock_context.h"
+#define OW_SIZE 16 /* in bytes */
+#define F_SUBTILE_SIZE 64 /* in bytes */
+#define F_TILE_WIDTH 128 /* in bytes */
+#define F_TILE_HEIGHT 32 /* in pixels */
+#define F_SUBTILE_WIDTH OW_SIZE /* in bytes */
+#define F_SUBTILE_HEIGHT 4 /* in pixels */
+
+static int linear_x_y_to_ftiled_pos(int x, int y, u32 stride, int bpp)
+{
+ int tile_base;
+ int tile_x, tile_y;
+ int swizzle, subtile;
+ int pixel_size = bpp / 8;
+ int pos;
+
+ /*
+ * Subtile remapping for F tile. Note that map[a]==b implies map[b]==a
+ * so we can use the same table to tile and until.
+ */
+ static const u8 f_subtile_map[] = {
+ 0, 1, 2, 3, 8, 9, 10, 11,
+ 4, 5, 6, 7, 12, 13, 14, 15,
+ 16, 17, 18, 19, 24, 25, 26, 27,
+ 20, 21, 22, 23, 28, 29, 30, 31,
+ 32, 33, 34, 35, 40, 41, 42, 43,
+ 36, 37, 38, 39, 44, 45, 46, 47,
+ 48, 49, 50, 51, 56, 57, 58, 59,
+ 52, 53, 54, 55, 60, 61, 62, 63
+ };
+
+ x *= pixel_size;
+ /*
+ * Where does the 4k tile start (in bytes)? This is the same for Y and
+ * F so we can use the Y-tile algorithm to get to that point.
+ */
+ tile_base =
+ y / F_TILE_HEIGHT * stride * F_TILE_HEIGHT +
+ x / F_TILE_WIDTH * 4096;
+
+ /* Find pixel within tile */
+ tile_x = x % F_TILE_WIDTH;
+ tile_y = y % F_TILE_HEIGHT;
+
+ /* And figure out the subtile within the 4k tile */
+ subtile = tile_y / F_SUBTILE_HEIGHT * 8 + tile_x / F_SUBTILE_WIDTH;
+
+ /* Swizzle the subtile number according to the bspec diagram */
+ swizzle = f_subtile_map[subtile];
+
+ /* Calculate new position */
+ pos = tile_base +
+ swizzle * F_SUBTILE_SIZE +
+ tile_y % F_SUBTILE_HEIGHT * OW_SIZE +
+ tile_x % F_SUBTILE_WIDTH;
+
+ GEM_BUG_ON(!IS_ALIGNED(pos, pixel_size));
+
+ return pos / pixel_size * 4;
+}
+
enum client_tiling {
CLIENT_TILING_LINEAR,
CLIENT_TILING_X,
CLIENT_TILING_Y,
+ CLIENT_TILING_4,
CLIENT_NUM_TILING_TYPES
};
@@ -45,6 +107,36 @@ struct tiled_blits {
u32 height;
};
+static bool supports_x_tiling(const struct drm_i915_private *i915)
+{
+ int gen = GRAPHICS_VER(i915);
+
+ if (gen < 12)
+ return true;
+
+ if (!HAS_LMEM(i915) || IS_DG1(i915))
+ return false;
+
+ return true;
+}
+
+static bool fast_blit_ok(const struct blit_buffer *buf)
+{
+ int gen = GRAPHICS_VER(buf->vma->vm->i915);
+
+ if (gen < 9)
+ return false;
+
+ if (gen < 12)
+ return true;
+
+ /* filter out platforms with unsupported X-tile support in fastblit */
+ if (buf->tiling == CLIENT_TILING_X && !supports_x_tiling(buf->vma->vm->i915))
+ return false;
+
+ return true;
+}
+
static int prepare_blit(const struct tiled_blits *t,
struct blit_buffer *dst,
struct blit_buffer *src,
@@ -59,51 +151,103 @@ static int prepare_blit(const struct tiled_blits *t,
if (IS_ERR(cs))
return PTR_ERR(cs);
- *cs++ = MI_LOAD_REGISTER_IMM(1);
- *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
- cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
- if (src->tiling == CLIENT_TILING_Y)
- cmd |= BCS_SRC_Y;
- if (dst->tiling == CLIENT_TILING_Y)
- cmd |= BCS_DST_Y;
- *cs++ = cmd;
-
- cmd = MI_FLUSH_DW;
- if (ver >= 8)
- cmd++;
- *cs++ = cmd;
- *cs++ = 0;
- *cs++ = 0;
- *cs++ = 0;
-
- cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
- if (ver >= 8)
- cmd += 2;
-
- src_pitch = t->width * 4;
- if (src->tiling) {
- cmd |= XY_SRC_COPY_BLT_SRC_TILED;
- src_pitch /= 4;
- }
+ if (fast_blit_ok(dst) && fast_blit_ok(src)) {
+ struct intel_gt *gt = t->ce->engine->gt;
+ u32 src_tiles = 0, dst_tiles = 0;
+ u32 src_4t = 0, dst_4t = 0;
+
+ /* Need to program BLIT_CCTL if it is not done previously
+ * before using XY_FAST_COPY_BLT
+ */
+ *cs++ = MI_LOAD_REGISTER_IMM(1);
+ *cs++ = i915_mmio_reg_offset(BLIT_CCTL(t->ce->engine->mmio_base));
+ *cs++ = (BLIT_CCTL_SRC_MOCS(gt->mocs.uc_index) |
+ BLIT_CCTL_DST_MOCS(gt->mocs.uc_index));
+
+ src_pitch = t->width; /* in dwords */
+ if (src->tiling == CLIENT_TILING_4) {
+ src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
+ src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;
+ } else if (src->tiling == CLIENT_TILING_Y) {
+ src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
+ } else if (src->tiling == CLIENT_TILING_X) {
+ src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);
+ } else {
+ src_pitch *= 4; /* in bytes */
+ }
- dst_pitch = t->width * 4;
- if (dst->tiling) {
- cmd |= XY_SRC_COPY_BLT_DST_TILED;
- dst_pitch /= 4;
- }
+ dst_pitch = t->width; /* in dwords */
+ if (dst->tiling == CLIENT_TILING_4) {
+ dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
+ dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;
+ } else if (dst->tiling == CLIENT_TILING_Y) {
+ dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
+ } else if (dst->tiling == CLIENT_TILING_X) {
+ dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);
+ } else {
+ dst_pitch *= 4; /* in bytes */
+ }
- *cs++ = cmd;
- *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
- *cs++ = 0;
- *cs++ = t->height << 16 | t->width;
- *cs++ = lower_32_bits(dst->vma->node.start);
- if (use_64b_reloc)
+ *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2) |
+ src_tiles | dst_tiles;
+ *cs++ = src_4t | dst_4t | BLT_DEPTH_32 | dst_pitch;
+ *cs++ = 0;
+ *cs++ = t->height << 16 | t->width;
+ *cs++ = lower_32_bits(dst->vma->node.start);
*cs++ = upper_32_bits(dst->vma->node.start);
- *cs++ = 0;
- *cs++ = src_pitch;
- *cs++ = lower_32_bits(src->vma->node.start);
- if (use_64b_reloc)
+ *cs++ = 0;
+ *cs++ = src_pitch;
+ *cs++ = lower_32_bits(src->vma->node.start);
*cs++ = upper_32_bits(src->vma->node.start);
+ } else {
+ if (ver >= 6) {
+ *cs++ = MI_LOAD_REGISTER_IMM(1);
+ *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
+ cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
+ if (src->tiling == CLIENT_TILING_Y)
+ cmd |= BCS_SRC_Y;
+ if (dst->tiling == CLIENT_TILING_Y)
+ cmd |= BCS_DST_Y;
+ *cs++ = cmd;
+
+ cmd = MI_FLUSH_DW;
+ if (ver >= 8)
+ cmd++;
+ *cs++ = cmd;
+ *cs++ = 0;
+ *cs++ = 0;
+ *cs++ = 0;
+ }
+
+ cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
+ if (ver >= 8)
+ cmd += 2;
+
+ src_pitch = t->width * 4;
+ if (src->tiling) {
+ cmd |= XY_SRC_COPY_BLT_SRC_TILED;
+ src_pitch /= 4;
+ }
+
+ dst_pitch = t->width * 4;
+ if (dst->tiling) {
+ cmd |= XY_SRC_COPY_BLT_DST_TILED;
+ dst_pitch /= 4;
+ }
+
+ *cs++ = cmd;
+ *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
+ *cs++ = 0;
+ *cs++ = t->height << 16 | t->width;
+ *cs++ = lower_32_bits(dst->vma->node.start);
+ if (use_64b_reloc)
+ *cs++ = upper_32_bits(dst->vma->node.start);
+ *cs++ = 0;
+ *cs++ = src_pitch;
+ *cs++ = lower_32_bits(src->vma->node.start);
+ if (use_64b_reloc)
+ *cs++ = upper_32_bits(src->vma->node.start);
+ }
*cs++ = MI_BATCH_BUFFER_END;
@@ -181,7 +325,13 @@ static int tiled_blits_create_buffers(struct tiled_blits *t,
t->buffers[i].vma = vma;
t->buffers[i].tiling =
- i915_prandom_u32_max_state(CLIENT_TILING_Y + 1, prng);
+ i915_prandom_u32_max_state(CLIENT_NUM_TILING_TYPES, prng);
+
+ /* Platforms support either TileY or Tile4, not both */
+ if (HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_Y)
+ t->buffers[i].tiling = CLIENT_TILING_4;
+ else if (!HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_4)
+ t->buffers[i].tiling = CLIENT_TILING_Y;
}
return 0;
@@ -206,7 +356,8 @@ static u64 swizzle_bit(unsigned int bit, u64 offset)
static u64 tiled_offset(const struct intel_gt *gt,
u64 v,
unsigned int stride,
- enum client_tiling tiling)
+ enum client_tiling tiling,
+ int x_pos, int y_pos)
{
unsigned int swizzle;
u64 x, y;
@@ -216,7 +367,12 @@ static u64 tiled_offset(const struct intel_gt *gt,
y = div64_u64_rem(v, stride, &x);
- if (tiling == CLIENT_TILING_X) {
+ if (tiling == CLIENT_TILING_4) {
+ v = linear_x_y_to_ftiled_pos(x_pos, y_pos, stride, 32);
+
+ /* no swizzling for f-tiling */
+ swizzle = I915_BIT_6_SWIZZLE_NONE;
+ } else if (tiling == CLIENT_TILING_X) {
v = div64_u64_rem(y, 8, &y) * stride * 8;
v += y * 512;
v += div64_u64_rem(x, 512, &x) << 12;
@@ -259,6 +415,7 @@ static const char *repr_tiling(enum client_tiling tiling)
case CLIENT_TILING_LINEAR: return "linear";
case CLIENT_TILING_X: return "X";
case CLIENT_TILING_Y: return "Y";
+ case CLIENT_TILING_4: return "F";
default: return "unknown";
}
}
@@ -284,7 +441,7 @@ static int verify_buffer(const struct tiled_blits *t,
} else {
u64 v = tiled_offset(buf->vma->vm->gt,
p * 4, t->width * 4,
- buf->tiling);
+ buf->tiling, x, y);
if (vaddr[v / sizeof(*vaddr)] != buf->start_val + p)
ret = -EINVAL;
@@ -504,6 +661,9 @@ static int tiled_blits_bounce(struct tiled_blits *t, struct rnd_state *prng)
if (err)
return err;
+ /* Simulating GTT eviction of the same buffer / layout */
+ t->buffers[2].tiling = t->buffers[0].tiling;
+
/* Reposition so that we overlap the old addresses, and slightly off */
err = tiled_blit(t,
&t->buffers[2], t->hole + t->align,
diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
index 556bca3be804..246ab8f7bf57 100644
--- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
+++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
@@ -236,6 +236,28 @@
#define XY_FAST_COLOR_BLT_DW 16
#define XY_FAST_COLOR_BLT_MOCS_MASK GENMASK(27, 21)
#define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
+
+#define XY_FAST_COPY_BLT_D0_SRC_TILING_MASK REG_GENMASK(21, 20)
+#define XY_FAST_COPY_BLT_D0_DST_TILING_MASK REG_GENMASK(14, 13)
+#define XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(mode) \
+ REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_SRC_TILING_MASK, mode)
+#define XY_FAST_COPY_BLT_D0_DST_TILE_MODE(mode) \
+ REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_DST_TILING_MASK, mode)
+#define LINEAR 0
+#define TILE_X 0x1
+#define XMAJOR 0x1
+#define YMAJOR 0x2
+#define TILE_64 0x3
+#define XY_FAST_COPY_BLT_D1_SRC_TILE4 REG_BIT(31)
+#define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
+#define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
+#define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
+/* Note: MOCS value = (index << 1) */
+#define BLIT_CCTL_SRC_MOCS(idx) \
+ REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, (idx) << 1)
+#define BLIT_CCTL_DST_MOCS(idx) \
+ REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, (idx) << 1)
+
#define SRC_COPY_BLT_CMD (2 << 29 | 0x43 << 22)
#define GEN9_XY_FAST_COPY_BLT_CMD (2 << 29 | 0x42 << 22)
#define XY_SRC_COPY_BLT_CMD (2 << 29 | 0x53 << 22)
--
2.35.1
^ permalink raw reply related [flat|nested] 7+ messages in thread
* [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable Tile4 tiling mode (rev3)
2022-05-13 8:47 [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Nirmoy Das
@ 2022-05-13 9:43 ` Patchwork
2022-05-13 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
` (2 subsequent siblings)
3 siblings, 0 replies; 7+ messages in thread
From: Patchwork @ 2022-05-13 9:43 UTC (permalink / raw)
To: Nirmoy Das; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 7834 bytes --]
== Series Details ==
Series: drm/i915: Enable Tile4 tiling mode (rev3)
URL : https://patchwork.freedesktop.org/series/103881/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11646 -> Patchwork_103881v3
====================================================
Summary
-------
**SUCCESS**
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/index.html
Participating hosts (40 -> 39)
------------------------------
Additional (4): bat-dg2-8 bat-jsl-2 fi-icl-u2 fi-hsw-4770
Missing (5): fi-rkl-11600 bat-dg1-6 fi-bsw-cyan bat-adlp-6 bat-rpls-2
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_103881v3:
### IGT changes ###
#### Suppressed ####
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
* igt@gem_exec_suspend@basic-s0@smem:
- {fi-ehl-2}: [DMESG-WARN][1] ([i915#5122]) -> [DMESG-WARN][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-ehl-2/igt@gem_exec_suspend@basic-s0@smem.html
* igt@i915_pm_rpm@basic-pci-d3-state:
- {bat-dg2-8}: NOTRUN -> [SKIP][3] +1 similar issue
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/bat-dg2-8/igt@i915_pm_rpm@basic-pci-d3-state.html
Known issues
------------
Here are the changes found in Patchwork_103881v3 that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_huc_copy@huc-copy:
- fi-hsw-4770: NOTRUN -> [SKIP][4] ([fdo#109271]) +9 similar issues
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-hsw-4770/igt@gem_huc_copy@huc-copy.html
- fi-icl-u2: NOTRUN -> [SKIP][5] ([i915#2190])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@gem_huc_copy@huc-copy.html
* igt@gem_lmem_swapping@parallel-random-engines:
- fi-icl-u2: NOTRUN -> [SKIP][6] ([i915#4613]) +3 similar issues
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@gem_lmem_swapping@parallel-random-engines.html
* igt@i915_pm_backlight@basic-brightness:
- fi-hsw-4770: NOTRUN -> [SKIP][7] ([fdo#109271] / [i915#3012])
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-hsw-4770/igt@i915_pm_backlight@basic-brightness.html
* igt@kms_chamelium@common-hpd-after-suspend:
- fi-hsw-4770: NOTRUN -> [SKIP][8] ([fdo#109271] / [fdo#111827]) +8 similar issues
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-hsw-4770/igt@kms_chamelium@common-hpd-after-suspend.html
* igt@kms_chamelium@hdmi-hpd-fast:
- fi-icl-u2: NOTRUN -> [SKIP][9] ([fdo#111827]) +8 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@kms_chamelium@hdmi-hpd-fast.html
* igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- fi-icl-u2: NOTRUN -> [SKIP][10] ([fdo#109278]) +2 similar issues
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy.html
* igt@kms_force_connector_basic@force-load-detect:
- fi-icl-u2: NOTRUN -> [SKIP][11] ([fdo#109285])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@kms_force_connector_basic@force-load-detect.html
* igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d:
- fi-hsw-4770: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#533])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-hsw-4770/igt@kms_pipe_crc_basic@compare-crc-sanitycheck-pipe-d.html
* igt@kms_psr@primary_mmap_gtt:
- fi-hsw-4770: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#1072]) +3 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-hsw-4770/igt@kms_psr@primary_mmap_gtt.html
* igt@kms_setmode@basic-clone-single-crtc:
- fi-icl-u2: NOTRUN -> [SKIP][14] ([i915#3555])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@kms_setmode@basic-clone-single-crtc.html
* igt@prime_vgem@basic-userptr:
- fi-icl-u2: NOTRUN -> [SKIP][15] ([i915#3301])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/fi-icl-u2/igt@prime_vgem@basic-userptr.html
#### Possible fixes ####
* igt@i915_selftest@live@gt_timelines:
- {bat-dg2-9}: [DMESG-WARN][16] ([i915#5763]) -> [PASS][17] +1 similar issue
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/bat-dg2-9/igt@i915_selftest@live@gt_timelines.html
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/bat-dg2-9/igt@i915_selftest@live@gt_timelines.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109285]: https://bugs.freedesktop.org/show_bug.cgi?id=109285
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1072]: https://gitlab.freedesktop.org/drm/intel/issues/1072
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2582]: https://gitlab.freedesktop.org/drm/intel/issues/2582
[i915#3012]: https://gitlab.freedesktop.org/drm/intel/issues/3012
[i915#3291]: https://gitlab.freedesktop.org/drm/intel/issues/3291
[i915#3301]: https://gitlab.freedesktop.org/drm/intel/issues/3301
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3595]: https://gitlab.freedesktop.org/drm/intel/issues/3595
[i915#3708]: https://gitlab.freedesktop.org/drm/intel/issues/3708
[i915#4077]: https://gitlab.freedesktop.org/drm/intel/issues/4077
[i915#4079]: https://gitlab.freedesktop.org/drm/intel/issues/4079
[i915#4083]: https://gitlab.freedesktop.org/drm/intel/issues/4083
[i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
[i915#4212]: https://gitlab.freedesktop.org/drm/intel/issues/4212
[i915#4213]: https://gitlab.freedesktop.org/drm/intel/issues/4213
[i915#4215]: https://gitlab.freedesktop.org/drm/intel/issues/4215
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4873]: https://gitlab.freedesktop.org/drm/intel/issues/4873
[i915#5122]: https://gitlab.freedesktop.org/drm/intel/issues/5122
[i915#5190]: https://gitlab.freedesktop.org/drm/intel/issues/5190
[i915#5274]: https://gitlab.freedesktop.org/drm/intel/issues/5274
[i915#533]: https://gitlab.freedesktop.org/drm/intel/issues/533
[i915#5354]: https://gitlab.freedesktop.org/drm/intel/issues/5354
[i915#5763]: https://gitlab.freedesktop.org/drm/intel/issues/5763
[i915#5885]: https://gitlab.freedesktop.org/drm/intel/issues/5885
Build changes
-------------
* Linux: CI_DRM_11646 -> Patchwork_103881v3
CI-20190529: 20190529
CI_DRM_11646: 8e5417afe580e2eac869c09e1454d174078523fd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103881v3: 8e5417afe580e2eac869c09e1454d174078523fd @ git://anongit.freedesktop.org/gfx-ci/linux
### Linux commits
69b2ca117104 drm/i915: Enable Tile4 tiling mode
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/index.html
[-- Attachment #2: Type: text/html, Size: 7861 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Enable Tile4 tiling mode (rev3)
2022-05-13 8:47 [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Nirmoy Das
2022-05-13 9:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable Tile4 tiling mode (rev3) Patchwork
@ 2022-05-13 11:01 ` Patchwork
2022-05-13 11:11 ` Das, Nirmoy
2022-05-13 18:11 ` [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Matt Roper
2022-05-24 6:15 ` Zbigniew Kempczyński
3 siblings, 1 reply; 7+ messages in thread
From: Patchwork @ 2022-05-13 11:01 UTC (permalink / raw)
To: Nirmoy Das; +Cc: intel-gfx
[-- Attachment #1: Type: text/plain, Size: 37695 bytes --]
== Series Details ==
Series: drm/i915: Enable Tile4 tiling mode (rev3)
URL : https://patchwork.freedesktop.org/series/103881/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11646_full -> Patchwork_103881v3_full
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with Patchwork_103881v3_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_103881v3_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (11 -> 11)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in Patchwork_103881v3_full:
### IGT changes ###
#### Possible regressions ####
* igt@kms_cursor_crc@pipe-a-cursor-dpms:
- shard-tglb: [PASS][1] -> [INCOMPLETE][2]
[1]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
[2]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-dpms.html
Known issues
------------
Here are the changes found in Patchwork_103881v3_full that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@gem_exec_fair@basic-deadline:
- shard-kbl: [PASS][3] -> [FAIL][4] ([i915#2846])
[3]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
[4]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl6/igt@gem_exec_fair@basic-deadline.html
* igt@gem_exec_fair@basic-none@vcs0:
- shard-apl: [PASS][5] -> [FAIL][6] ([i915#2842])
[5]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl4/igt@gem_exec_fair@basic-none@vcs0.html
[6]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@gem_exec_fair@basic-none@vcs0.html
* igt@gem_exec_fair@basic-pace@vecs0:
- shard-glk: [PASS][7] -> [FAIL][8] ([i915#2842]) +2 similar issues
[7]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk6/igt@gem_exec_fair@basic-pace@vecs0.html
[8]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@gem_exec_fair@basic-pace@vecs0.html
* igt@gem_exec_flush@basic-batch-kernel-default-wb:
- shard-snb: [PASS][9] -> [SKIP][10] ([fdo#109271]) +3 similar issues
[9]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-wb.html
[10]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb6/igt@gem_exec_flush@basic-batch-kernel-default-wb.html
* igt@gem_lmem_swapping@heavy-random:
- shard-tglb: NOTRUN -> [SKIP][11] ([i915#4613])
[11]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_lmem_swapping@heavy-random.html
* igt@gem_lmem_swapping@heavy-verify-random:
- shard-kbl: NOTRUN -> [SKIP][12] ([fdo#109271] / [i915#4613])
[12]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@gem_lmem_swapping@heavy-verify-random.html
- shard-skl: NOTRUN -> [SKIP][13] ([fdo#109271] / [i915#4613]) +2 similar issues
[13]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@gem_lmem_swapping@heavy-verify-random.html
* igt@gem_pwrite@basic-exhaustion:
- shard-apl: NOTRUN -> [WARN][14] ([i915#2658])
[14]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@gem_pwrite@basic-exhaustion.html
* igt@gem_pxp@display-protected-crc:
- shard-tglb: NOTRUN -> [SKIP][15] ([i915#4270])
[15]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_pxp@display-protected-crc.html
* igt@gem_userptr_blits@unsync-overlap:
- shard-tglb: NOTRUN -> [SKIP][16] ([i915#3297])
[16]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_userptr_blits@unsync-overlap.html
* igt@gen9_exec_parse@allowed-single:
- shard-glk: [PASS][17] -> [DMESG-WARN][18] ([i915#5566] / [i915#716])
[17]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk4/igt@gen9_exec_parse@allowed-single.html
[18]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@gen9_exec_parse@allowed-single.html
* igt@gen9_exec_parse@bb-start-cmd:
- shard-tglb: NOTRUN -> [SKIP][19] ([i915#2527] / [i915#2856])
[19]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gen9_exec_parse@bb-start-cmd.html
* igt@i915_pm_dc@dc3co-vpb-simulation:
- shard-iclb: NOTRUN -> [SKIP][20] ([i915#658])
[20]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_dc@dc3co-vpb-simulation.html
* igt@i915_pm_rpm@modeset-non-lpsp:
- shard-iclb: NOTRUN -> [SKIP][21] ([fdo#110892])
[21]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_rpm@modeset-non-lpsp.html
* igt@i915_pm_rpm@modeset-pc8-residency-stress:
- shard-tglb: NOTRUN -> [SKIP][22] ([fdo#109506] / [i915#2411])
[22]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@i915_pm_rpm@modeset-pc8-residency-stress.html
* igt@i915_pm_sseu@full-enable:
- shard-iclb: NOTRUN -> [SKIP][23] ([i915#4387])
[23]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_sseu@full-enable.html
* igt@i915_query@query-topology-unsupported:
- shard-tglb: NOTRUN -> [SKIP][24] ([fdo#109302])
[24]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@i915_query@query-topology-unsupported.html
* igt@i915_suspend@fence-restore-tiled2untiled:
- shard-glk: [PASS][25] -> [SKIP][26] ([fdo#109271])
[25]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk1/igt@i915_suspend@fence-restore-tiled2untiled.html
[26]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk3/igt@i915_suspend@fence-restore-tiled2untiled.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-iclb: NOTRUN -> [SKIP][27] ([i915#1769])
[27]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_big_fb@4-tiled-addfb-size-offset-overflow:
- shard-tglb: NOTRUN -> [SKIP][28] ([i915#5286]) +1 similar issue
[28]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
- shard-apl: NOTRUN -> [SKIP][29] ([fdo#109271]) +53 similar issues
[29]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
- shard-iclb: NOTRUN -> [SKIP][30] ([fdo#110723]) +1 similar issue
[30]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html
* igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][31] ([i915#3689] / [i915#3886]) +1 similar issue
[31]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
- shard-apl: NOTRUN -> [SKIP][32] ([fdo#109271] / [i915#3886]) +2 similar issues
[32]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html
* igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-kbl: NOTRUN -> [SKIP][33] ([fdo#109271] / [i915#3886]) +2 similar issues
[33]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs:
- shard-tglb: NOTRUN -> [SKIP][34] ([i915#3689])
[34]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs.html
* igt@kms_chamelium@dp-hpd-storm-disable:
- shard-skl: NOTRUN -> [SKIP][35] ([fdo#109271] / [fdo#111827]) +7 similar issues
[35]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@kms_chamelium@dp-hpd-storm-disable.html
* igt@kms_chamelium@vga-hpd-after-suspend:
- shard-iclb: NOTRUN -> [SKIP][36] ([fdo#109284] / [fdo#111827]) +2 similar issues
[36]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_chamelium@vga-hpd-after-suspend.html
* igt@kms_chamelium@vga-hpd-with-enabled-mode:
- shard-snb: NOTRUN -> [SKIP][37] ([fdo#109271] / [fdo#111827]) +1 similar issue
[37]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@kms_chamelium@vga-hpd-with-enabled-mode.html
* igt@kms_color@pipe-d-ctm-0-5:
- shard-skl: NOTRUN -> [SKIP][38] ([fdo#109271]) +74 similar issues
[38]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@kms_color@pipe-d-ctm-0-5.html
* igt@kms_color_chamelium@pipe-a-ctm-negative:
- shard-apl: NOTRUN -> [SKIP][39] ([fdo#109271] / [fdo#111827]) +1 similar issue
[39]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-negative.html
* igt@kms_color_chamelium@pipe-b-ctm-max:
- shard-tglb: NOTRUN -> [SKIP][40] ([fdo#109284] / [fdo#111827]) +3 similar issues
[40]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_color_chamelium@pipe-b-ctm-max.html
* igt@kms_color_chamelium@pipe-c-ctm-max:
- shard-kbl: NOTRUN -> [SKIP][41] ([fdo#109271] / [fdo#111827]) +2 similar issues
[41]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_color_chamelium@pipe-c-ctm-max.html
* igt@kms_content_protection@lic:
- shard-kbl: NOTRUN -> [TIMEOUT][42] ([i915#1319])
[42]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_content_protection@lic.html
* igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement:
- shard-tglb: NOTRUN -> [SKIP][43] ([i915#3319]) +1 similar issue
[43]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement.html
* igt@kms_cursor_crc@pipe-a-cursor-max-size-random:
- shard-tglb: NOTRUN -> [SKIP][44] ([i915#3359]) +1 similar issue
[44]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-max-size-random.html
* igt@kms_cursor_crc@pipe-a-cursor-max-size-sliding:
- shard-iclb: NOTRUN -> [SKIP][45] ([fdo#109278]) +9 similar issues
[45]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_cursor_crc@pipe-a-cursor-max-size-sliding.html
* igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
- shard-kbl: NOTRUN -> [SKIP][46] ([fdo#109271]) +27 similar issues
[46]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html
* igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding:
- shard-tglb: NOTRUN -> [SKIP][47] ([fdo#109279] / [i915#3359])
[47]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding.html
* igt@kms_cursor_legacy@flip-vs-cursor-legacy:
- shard-skl: [PASS][48] -> [FAIL][49] ([i915#2346])
[48]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
[49]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html
* igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled:
- shard-tglb: NOTRUN -> [SKIP][50] ([i915#5287])
[50]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled.html
* igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-4tiled:
- shard-iclb: NOTRUN -> [SKIP][51] ([i915#5287])
[51]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-4tiled.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-tglb: NOTRUN -> [SKIP][52] ([fdo#109274] / [fdo#111825])
[52]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [PASS][53] -> [FAIL][54] ([i915#79])
[53]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
[54]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-kbl: [PASS][55] -> [DMESG-WARN][56] ([i915#180]) +8 similar issues
[55]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[56]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
- shard-skl: [PASS][57] -> [INCOMPLETE][58] ([i915#4939])
[57]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
[58]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html
* igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
- shard-skl: [PASS][59] -> [FAIL][60] ([i915#2122]) +3 similar issues
[59]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl9/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
[60]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl7/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html
* igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
- shard-tglb: NOTRUN -> [SKIP][61] ([i915#2587])
[61]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
- shard-iclb: NOTRUN -> [SKIP][62] ([i915#2587])
[62]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
- shard-iclb: NOTRUN -> [SKIP][63] ([fdo#109280]) +1 similar issue
[63]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite:
- shard-tglb: NOTRUN -> [SKIP][64] ([fdo#109280] / [fdo#111825]) +5 similar issues
[64]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite.html
* igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
- shard-iclb: NOTRUN -> [SKIP][65] ([fdo#109289])
[65]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-apl: [PASS][66] -> [DMESG-WARN][67] ([i915#180]) +4 similar issues
[66]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[67]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
- shard-apl: NOTRUN -> [FAIL][68] ([fdo#108145] / [i915#265]) +1 similar issue
[68]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html
* igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
- shard-skl: NOTRUN -> [FAIL][69] ([fdo#108145] / [i915#265])
[69]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html
* igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
- shard-skl: [PASS][70] -> [FAIL][71] ([fdo#108145] / [i915#265])
[70]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
[71]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html
* igt@kms_plane_lowres@pipe-b-tiling-none:
- shard-iclb: NOTRUN -> [SKIP][72] ([i915#3536])
[72]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_plane_lowres@pipe-b-tiling-none.html
* igt@kms_plane_lowres@pipe-d-tiling-4:
- shard-tglb: NOTRUN -> [SKIP][73] ([i915#5288])
[73]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane_lowres@pipe-d-tiling-4.html
* igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
- shard-tglb: NOTRUN -> [SKIP][74] ([fdo#111615]) +2 similar issues
[74]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane_multiple@atomic-pipe-b-tiling-yf.html
* igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier:
- shard-iclb: [PASS][75] -> [SKIP][76] ([i915#5176]) +2 similar issues
[75]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb7/igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier.html
[76]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-kbl: NOTRUN -> [SKIP][77] ([fdo#109271] / [i915#658])
[77]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
* igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
- shard-apl: NOTRUN -> [SKIP][78] ([fdo#109271] / [i915#658])
[78]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html
* igt@kms_psr@psr2_primary_mmap_cpu:
- shard-iclb: [PASS][79] -> [SKIP][80] ([fdo#109441]) +2 similar issues
[79]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html
[80]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html
* igt@kms_setmode@basic-clone-single-crtc:
- shard-iclb: NOTRUN -> [SKIP][81] ([i915#3555])
[81]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_setmode@basic-clone-single-crtc.html
* igt@kms_writeback@writeback-fb-id:
- shard-tglb: NOTRUN -> [SKIP][82] ([i915#2437])
[82]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_writeback@writeback-fb-id.html
* igt@nouveau_crc@pipe-c-source-outp-inactive:
- shard-tglb: NOTRUN -> [SKIP][83] ([i915#2530])
[83]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@nouveau_crc@pipe-c-source-outp-inactive.html
* igt@perf@polling:
- shard-snb: NOTRUN -> [SKIP][84] ([fdo#109271]) +46 similar issues
[84]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@perf@polling.html
* igt@prime_nv_pcopy@test3_1:
- shard-iclb: NOTRUN -> [SKIP][85] ([fdo#109291])
[85]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@prime_nv_pcopy@test3_1.html
* igt@prime_nv_test@i915_nv_sharing:
- shard-tglb: NOTRUN -> [SKIP][86] ([fdo#109291])
[86]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@prime_nv_test@i915_nv_sharing.html
* igt@prime_vgem@fence-write-hang:
- shard-iclb: NOTRUN -> [SKIP][87] ([fdo#109295])
[87]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@prime_vgem@fence-write-hang.html
* igt@syncobj_timeline@invalid-transfer-non-existent-point:
- shard-apl: NOTRUN -> [DMESG-WARN][88] ([i915#5098])
[88]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@syncobj_timeline@invalid-transfer-non-existent-point.html
* igt@sysfs_clients@fair-3:
- shard-apl: NOTRUN -> [SKIP][89] ([fdo#109271] / [i915#2994])
[89]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@sysfs_clients@fair-3.html
#### Possible fixes ####
* igt@gem_ctx_isolation@preservation-s3@bcs0:
- shard-skl: [INCOMPLETE][90] ([i915#4793]) -> [PASS][91]
[90]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html
[91]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@gem_ctx_isolation@preservation-s3@bcs0.html
* igt@gem_exec_fair@basic-pace-share@rcs0:
- shard-tglb: [FAIL][92] ([i915#2842]) -> [PASS][93]
[92]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
[93]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html
* igt@gem_exec_fair@basic-throttle@rcs0:
- shard-glk: [FAIL][94] ([i915#2842]) -> [PASS][95]
[94]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk4/igt@gem_exec_fair@basic-throttle@rcs0.html
[95]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html
* igt@gem_exec_whisper@basic-fds-forked-all:
- {shard-tglu}: [INCOMPLETE][96] ([i915#5966]) -> [PASS][97]
[96]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglu-6/igt@gem_exec_whisper@basic-fds-forked-all.html
[97]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglu-3/igt@gem_exec_whisper@basic-fds-forked-all.html
* igt@i915_suspend@debugfs-reader:
- shard-skl: [INCOMPLETE][98] ([i915#4939]) -> [PASS][99]
[98]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl7/igt@i915_suspend@debugfs-reader.html
[99]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@i915_suspend@debugfs-reader.html
* igt@i915_suspend@forcewake:
- shard-skl: [INCOMPLETE][100] ([i915#4817]) -> [PASS][101]
[100]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl8/igt@i915_suspend@forcewake.html
[101]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@i915_suspend@forcewake.html
* igt@kms_cursor_crc@pipe-a-cursor-suspend:
- shard-snb: [INCOMPLETE][102] -> [PASS][103]
[102]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-snb6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
[103]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html
* igt@kms_fbcon_fbt@fbc-suspend:
- shard-apl: [INCOMPLETE][104] ([i915#180] / [i915#1982]) -> [PASS][105]
[104]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html
[105]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html
* igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2:
- shard-glk: [FAIL][106] ([i915#2122]) -> [PASS][107]
[106]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk1/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html
[107]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk2/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html
* igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
- shard-apl: [DMESG-WARN][108] ([i915#180]) -> [PASS][109] +3 similar issues
[108]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
[109]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html
* igt@kms_flip@flip-vs-suspend@a-dp1:
- shard-kbl: [DMESG-WARN][110] ([i915#180]) -> [PASS][111] +1 similar issue
[110]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl6/igt@kms_flip@flip-vs-suspend@a-dp1.html
[111]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_flip@flip-vs-suspend@a-dp1.html
* igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
- shard-tglb: [INCOMPLETE][112] -> [PASS][113]
[112]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
[113]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html
* igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale:
- shard-iclb: [SKIP][114] ([i915#5235]) -> [PASS][115] +2 similar issues
[114]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale.html
[115]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale.html
* igt@kms_psr@psr2_no_drrs:
- shard-iclb: [SKIP][116] ([fdo#109441]) -> [PASS][117]
[116]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@kms_psr@psr2_no_drrs.html
[117]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_psr@psr2_no_drrs.html
* igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
- shard-tglb: [SKIP][118] ([i915#5519]) -> [PASS][119]
[118]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
[119]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-iclb: [SKIP][120] ([i915#5519]) -> [PASS][121]
[120]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
[121]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@perf@polling-parameterized:
- shard-skl: [FAIL][122] ([i915#5639]) -> [PASS][123]
[122]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl2/igt@perf@polling-parameterized.html
[123]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@perf@polling-parameterized.html
#### Warnings ####
* igt@gem_exec_balancer@parallel-bb-first:
- shard-iclb: [SKIP][124] ([i915#4525]) -> [DMESG-WARN][125] ([i915#5614])
[124]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html
[125]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html
* igt@gem_exec_balancer@parallel-keep-submit-fence:
- shard-iclb: [DMESG-WARN][126] ([i915#5614]) -> [SKIP][127] ([i915#4525])
[126]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb1/igt@gem_exec_balancer@parallel-keep-submit-fence.html
[127]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@gem_exec_balancer@parallel-keep-submit-fence.html
* igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
- shard-iclb: [SKIP][128] ([i915#2920]) -> [SKIP][129] ([i915#658])
[128]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
[129]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html
* igt@kms_psr2_su@page_flip-p010:
- shard-iclb: [SKIP][130] ([fdo#109642] / [fdo#111068] / [i915#658]) -> [FAIL][131] ([i915#5939])
[130]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@kms_psr2_su@page_flip-p010.html
[131]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_psr2_su@page_flip-p010.html
* igt@runner@aborted:
- shard-apl: ([FAIL][132], [FAIL][133], [FAIL][134], [FAIL][135], [FAIL][136], [FAIL][137], [FAIL][138], [FAIL][139]) ([fdo#109271] / [i915#180] / [i915#3002] / [i915#4312] / [i915#5257]) -> ([FAIL][140], [FAIL][141], [FAIL][142], [FAIL][143], [FAIL][144], [FAIL][145], [FAIL][146]) ([i915#180] / [i915#3002] / [i915#4312] / [i915#5257])
[132]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl7/igt@runner@aborted.html
[133]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl1/igt@runner@aborted.html
[134]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl2/igt@runner@aborted.html
[135]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html
[136]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl6/igt@runner@aborted.html
[137]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html
[138]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl6/igt@runner@aborted.html
[139]: https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html
[140]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html
[141]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@runner@aborted.html
[142]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl6/igt@runner@aborted.html
[143]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl3/igt@runner@aborted.html
[144]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@runner@aborted.html
[145]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html
[146]: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[fdo#108145]: https://bugs.freedesktop.org/show_bug.cgi?id=108145
[fdo#109271]: https://bugs.freedesktop.org/show_bug.cgi?id=109271
[fdo#109274]: https://bugs.freedesktop.org/show_bug.cgi?id=109274
[fdo#109278]: https://bugs.freedesktop.org/show_bug.cgi?id=109278
[fdo#109279]: https://bugs.freedesktop.org/show_bug.cgi?id=109279
[fdo#109280]: https://bugs.freedesktop.org/show_bug.cgi?id=109280
[fdo#109284]: https://bugs.freedesktop.org/show_bug.cgi?id=109284
[fdo#109289]: https://bugs.freedesktop.org/show_bug.cgi?id=109289
[fdo#109291]: https://bugs.freedesktop.org/show_bug.cgi?id=109291
[fdo#109295]: https://bugs.freedesktop.org/show_bug.cgi?id=109295
[fdo#109302]: https://bugs.freedesktop.org/show_bug.cgi?id=109302
[fdo#109441]: https://bugs.freedesktop.org/show_bug.cgi?id=109441
[fdo#109506]: https://bugs.freedesktop.org/show_bug.cgi?id=109506
[fdo#109642]: https://bugs.freedesktop.org/show_bug.cgi?id=109642
[fdo#110189]: https://bugs.freedesktop.org/show_bug.cgi?id=110189
[fdo#110723]: https://bugs.freedesktop.org/show_bug.cgi?id=110723
[fdo#110892]: https://bugs.freedesktop.org/show_bug.cgi?id=110892
[fdo#111068]: https://bugs.freedesktop.org/show_bug.cgi?id=111068
[fdo#111615]: https://bugs.freedesktop.org/show_bug.cgi?id=111615
[fdo#111825]: https://bugs.freedesktop.org/show_bug.cgi?id=111825
[fdo#111827]: https://bugs.freedesktop.org/show_bug.cgi?id=111827
[i915#1155]: https://gitlab.freedesktop.org/drm/intel/issues/1155
[i915#1319]: https://gitlab.freedesktop.org/drm/intel/issues/1319
[i915#1769]: https://gitlab.freedesktop.org/drm/intel/issues/1769
[i915#180]: https://gitlab.freedesktop.org/drm/intel/issues/180
[i915#1839]: https://gitlab.freedesktop.org/drm/intel/issues/1839
[i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
[i915#2122]: https://gitlab.freedesktop.org/drm/intel/issues/2122
[i915#2346]: https://gitlab.freedesktop.org/drm/intel/issues/2346
[i915#2411]: https://gitlab.freedesktop.org/drm/intel/issues/2411
[i915#2437]: https://gitlab.freedesktop.org/drm/intel/issues/2437
[i915#2527]: https://gitlab.freedesktop.org/drm/intel/issues/2527
[i915#2530]: https://gitlab.freedesktop.org/drm/intel/issues/2530
[i915#2587]: https://gitlab.freedesktop.org/drm/intel/issues/2587
[i915#265]: https://gitlab.freedesktop.org/drm/intel/issues/265
[i915#2658]: https://gitlab.freedesktop.org/drm/intel/issues/2658
[i915#2842]: https://gitlab.freedesktop.org/drm/intel/issues/2842
[i915#2846]: https://gitlab.freedesktop.org/drm/intel/issues/2846
[i915#2856]: https://gitlab.freedesktop.org/drm/intel/issues/2856
[i915#2920]: https://gitlab.freedesktop.org/drm/intel/issues/2920
[i915#2994]: https://gitlab.freedesktop.org/drm/intel/issues/2994
[i915#3002]: https://gitlab.freedesktop.org/drm/intel/issues/3002
[i915#3063]: https://gitlab.freedesktop.org/drm/intel/issues/3063
[i915#3297]: https://gitlab.freedesktop.org/drm/intel/issues/3297
[i915#3319]: https://gitlab.freedesktop.org/drm/intel/issues/3319
[i915#3359]: https://gitlab.freedesktop.org/drm/intel/issues/3359
[i915#3536]: https://gitlab.freedesktop.org/drm/intel/issues/3536
[i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
[i915#3689]: https://gitlab.freedesktop.org/drm/intel/issues/3689
[i915#3886]: https://gitlab.freedesktop.org/drm/intel/issues/3886
[i915#4270]: https://gitlab.freedesktop.org/drm/intel/issues/4270
[i915#4312]: https://gitlab.freedesktop.org/drm/intel/issues/4312
[i915#4387]: https://gitlab.freedesktop.org/drm/intel/issues/4387
[i915#4525]: https://gitlab.freedesktop.org/drm/intel/issues/4525
[i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
[i915#4793]: https://gitlab.freedesktop.org/drm/intel/issues/4793
[i915#4817]: https://gitlab.freedesktop.org/drm/intel/issues/4817
[i915#4939]: https://gitlab.freedesktop.org/drm/intel/issues/4939
[i915#5076]: https://gitlab.freedesktop.org/drm/intel/issues/5076
[i915#5098]: https://gitlab.freedesktop.org/drm/intel/issues/5098
[i915#5176]: https://gitlab.freedesktop.org/drm/intel/issues/5176
[i915#5235]: https://gitlab.freedesktop.org/drm/intel/issues/5235
[i915#5257]: https://gitlab.freedesktop.org/drm/intel/issues/5257
[i915#5286]: https://gitlab.freedesktop.org/drm/intel/issues/5286
[i915#5287]: https://gitlab.freedesktop.org/drm/intel/issues/5287
[i915#5288]: https://gitlab.freedesktop.org/drm/intel/issues/5288
[i915#5519]: https://gitlab.freedesktop.org/drm/intel/issues/5519
[i915#5566]: https://gitlab.freedesktop.org/drm/intel/issues/5566
[i915#5614]: https://gitlab.freedesktop.org/drm/intel/issues/5614
[i915#5639]: https://gitlab.freedesktop.org/drm/intel/issues/5639
[i915#5939]: https://gitlab.freedesktop.org/drm/intel/issues/5939
[i915#5966]: https://gitlab.freedesktop.org/drm/intel/issues/5966
[i915#658]: https://gitlab.freedesktop.org/drm/intel/issues/658
[i915#716]: https://gitlab.freedesktop.org/drm/intel/issues/716
[i915#79]: https://gitlab.freedesktop.org/drm/intel/issues/79
Build changes
-------------
* Linux: CI_DRM_11646 -> Patchwork_103881v3
CI-20190529: 20190529
CI_DRM_11646: 8e5417afe580e2eac869c09e1454d174078523fd @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_103881v3: 8e5417afe580e2eac869c09e1454d174078523fd @ git://anongit.freedesktop.org/gfx-ci/linux
piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @ git://anongit.freedesktop.org/piglit
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/index.html
[-- Attachment #2: Type: text/html, Size: 44840 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Enable Tile4 tiling mode (rev3)
2022-05-13 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-05-13 11:11 ` Das, Nirmoy
0 siblings, 0 replies; 7+ messages in thread
From: Das, Nirmoy @ 2022-05-13 11:11 UTC (permalink / raw)
To: intel-gfx, Patchwork, Nirmoy Das; +Cc: Matthew Auld, Chris Wilson
[-- Attachment #1: Type: text/plain, Size: 42463 bytes --]
On 5/13/2022 1:01 PM, Patchwork wrote:
> Project List - Patchwork *Patch Details*
> *Series:* drm/i915: Enable Tile4 tiling mode (rev3)
> *URL:* https://patchwork.freedesktop.org/series/103881/
> *State:* failure
> *Details:*
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/index.html
>
>
> CI Bug Log - changes from CI_DRM_11646_full -> Patchwork_103881v3_full
>
>
> Summary
>
> *FAILURE*
>
> Serious unknown changes coming with Patchwork_103881v3_full absolutely
> need to be
> verified manually.
>
> If you think the reported changes have nothing to do with the changes
> introduced in Patchwork_103881v3_full, please notify your bug team to
> allow them
> to document this new failure mode, which will reduce false positives
> in CI.
>
>
> Participating hosts (11 -> 11)
>
> No changes in participating hosts
>
>
> Possible new issues
>
> Here are the unknown changes that may have been introduced in
> Patchwork_103881v3_full:
>
>
> IGT changes
>
>
> Possible regressions
>
> * igt@kms_cursor_crc@pipe-a-cursor-dpms:
> o shard-tglb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-dpms.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb8/igt@kms_cursor_crc@pipe-a-cursor-dpms.html>
>
This is unrelated as this patch only changes igt@i915_selftest@live@client
Regards,
Nirmoy
> *
>
>
> Known issues
>
> Here are the changes found in Patchwork_103881v3_full that come from
> known issues:
>
>
> IGT changes
>
>
> Issues hit
>
> *
>
> igt@gem_exec_fair@basic-deadline:
>
> o shard-kbl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl6/igt@gem_exec_fair@basic-deadline.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl6/igt@gem_exec_fair@basic-deadline.html>
> (i915#2846 <https://gitlab.freedesktop.org/drm/intel/issues/2846>)
> *
>
> igt@gem_exec_fair@basic-none@vcs0:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl4/igt@gem_exec_fair@basic-none@vcs0.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@gem_exec_fair@basic-none@vcs0.html>
> (i915#2842 <https://gitlab.freedesktop.org/drm/intel/issues/2842>)
> *
>
> igt@gem_exec_fair@basic-pace@vecs0:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk6/igt@gem_exec_fair@basic-pace@vecs0.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@gem_exec_fair@basic-pace@vecs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) +2
> similar issues
> *
>
> igt@gem_exec_flush@basic-batch-kernel-default-wb:
>
> o shard-snb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-snb7/igt@gem_exec_flush@basic-batch-kernel-default-wb.html>
> -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb6/igt@gem_exec_flush@basic-batch-kernel-default-wb.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +3
> similar issues
> *
>
> igt@gem_lmem_swapping@heavy-random:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_lmem_swapping@heavy-random.html>
> (i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
> *
>
> igt@gem_lmem_swapping@heavy-verify-random:
>
> o
>
> shard-kbl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@gem_lmem_swapping@heavy-verify-random.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613 <https://gitlab.freedesktop.org/drm/intel/issues/4613>)
>
> o
>
> shard-skl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@gem_lmem_swapping@heavy-verify-random.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#4613
> <https://gitlab.freedesktop.org/drm/intel/issues/4613>) +2
> similar issues
>
> *
>
> igt@gem_pwrite@basic-exhaustion:
>
> o shard-apl: NOTRUN -> WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@gem_pwrite@basic-exhaustion.html>
> (i915#2658 <https://gitlab.freedesktop.org/drm/intel/issues/2658>)
> *
>
> igt@gem_pxp@display-protected-crc:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_pxp@display-protected-crc.html>
> (i915#4270 <https://gitlab.freedesktop.org/drm/intel/issues/4270>)
> *
>
> igt@gem_userptr_blits@unsync-overlap:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gem_userptr_blits@unsync-overlap.html>
> (i915#3297 <https://gitlab.freedesktop.org/drm/intel/issues/3297>)
> *
>
> igt@gen9_exec_parse@allowed-single:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk4/igt@gen9_exec_parse@allowed-single.html>
> -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@gen9_exec_parse@allowed-single.html>
> (i915#5566
> <https://gitlab.freedesktop.org/drm/intel/issues/5566> /
> i915#716 <https://gitlab.freedesktop.org/drm/intel/issues/716>)
> *
>
> igt@gen9_exec_parse@bb-start-cmd:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@gen9_exec_parse@bb-start-cmd.html>
> (i915#2527
> <https://gitlab.freedesktop.org/drm/intel/issues/2527> /
> i915#2856 <https://gitlab.freedesktop.org/drm/intel/issues/2856>)
> *
>
> igt@i915_pm_dc@dc3co-vpb-simulation:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_dc@dc3co-vpb-simulation.html>
> (i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@i915_pm_rpm@modeset-non-lpsp:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_rpm@modeset-non-lpsp.html>
> (fdo#110892 <https://bugs.freedesktop.org/show_bug.cgi?id=110892>)
> *
>
> igt@i915_pm_rpm@modeset-pc8-residency-stress:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@i915_pm_rpm@modeset-pc8-residency-stress.html>
> (fdo#109506
> <https://bugs.freedesktop.org/show_bug.cgi?id=109506> /
> i915#2411 <https://gitlab.freedesktop.org/drm/intel/issues/2411>)
> *
>
> igt@i915_pm_sseu@full-enable:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@i915_pm_sseu@full-enable.html>
> (i915#4387 <https://gitlab.freedesktop.org/drm/intel/issues/4387>)
> *
>
> igt@i915_query@query-topology-unsupported:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@i915_query@query-topology-unsupported.html>
> (fdo#109302 <https://bugs.freedesktop.org/show_bug.cgi?id=109302>)
> *
>
> igt@i915_suspend@fence-restore-tiled2untiled:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk1/igt@i915_suspend@fence-restore-tiled2untiled.html>
> -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk3/igt@i915_suspend@fence-restore-tiled2untiled.html>
> (fdo#109271 <https://bugs.freedesktop.org/show_bug.cgi?id=109271>)
> *
>
> igt@kms_atomic_transition@plane-all-modeset-transition:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_atomic_transition@plane-all-modeset-transition.html>
> (i915#1769 <https://gitlab.freedesktop.org/drm/intel/issues/1769>)
> *
>
> igt@kms_big_fb@4-tiled-addfb-size-offset-overflow:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_big_fb@4-tiled-addfb-size-offset-overflow.html>
> (i915#5286
> <https://gitlab.freedesktop.org/drm/intel/issues/5286>) +1
> similar issue
> *
>
> igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +53
> similar issues
> *
>
> igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-0-async-flip.html>
> (fdo#110723
> <https://bugs.freedesktop.org/show_bug.cgi?id=110723>) +1
> similar issue
> *
>
> igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_ccs@pipe-a-missing-ccs-buffer-y_tiled_gen12_mc_ccs.html>
> (i915#3689
> <https://gitlab.freedesktop.org/drm/intel/issues/3689> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +1
> similar issue
> *
>
> igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@kms_ccs@pipe-c-bad-aux-stride-y_tiled_gen12_rc_ccs_cc.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +2
> similar issues
> *
>
> igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs:
>
> o shard-kbl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_ccs@pipe-c-bad-rotation-90-y_tiled_gen12_mc_ccs.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#3886
> <https://gitlab.freedesktop.org/drm/intel/issues/3886>) +2
> similar issues
> *
>
> igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_ccs@pipe-d-bad-rotation-90-y_tiled_gen12_mc_ccs.html>
> (i915#3689 <https://gitlab.freedesktop.org/drm/intel/issues/3689>)
> *
>
> igt@kms_chamelium@dp-hpd-storm-disable:
>
> o shard-skl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@kms_chamelium@dp-hpd-storm-disable.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +7
> similar issues
> *
>
> igt@kms_chamelium@vga-hpd-after-suspend:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_chamelium@vga-hpd-after-suspend.html>
> (fdo#109284
> <https://bugs.freedesktop.org/show_bug.cgi?id=109284> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +2
> similar issues
> *
>
> igt@kms_chamelium@vga-hpd-with-enabled-mode:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@kms_chamelium@vga-hpd-with-enabled-mode.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
> *
>
> igt@kms_color@pipe-d-ctm-0-5:
>
> o shard-skl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@kms_color@pipe-d-ctm-0-5.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +74
> similar issues
> *
>
> igt@kms_color_chamelium@pipe-a-ctm-negative:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@kms_color_chamelium@pipe-a-ctm-negative.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +1
> similar issue
> *
>
> igt@kms_color_chamelium@pipe-b-ctm-max:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_color_chamelium@pipe-b-ctm-max.html>
> (fdo#109284
> <https://bugs.freedesktop.org/show_bug.cgi?id=109284> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +3
> similar issues
> *
>
> igt@kms_color_chamelium@pipe-c-ctm-max:
>
> o shard-kbl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_color_chamelium@pipe-c-ctm-max.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> fdo#111827
> <https://bugs.freedesktop.org/show_bug.cgi?id=111827>) +2
> similar issues
> *
>
> igt@kms_content_protection@lic:
>
> o shard-kbl: NOTRUN -> TIMEOUT
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_content_protection@lic.html>
> (i915#1319 <https://gitlab.freedesktop.org/drm/intel/issues/1319>)
> *
>
> igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-32x32-rapid-movement.html>
> (i915#3319
> <https://gitlab.freedesktop.org/drm/intel/issues/3319>) +1
> similar issue
> *
>
> igt@kms_cursor_crc@pipe-a-cursor-max-size-random:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-a-cursor-max-size-random.html>
> (i915#3359
> <https://gitlab.freedesktop.org/drm/intel/issues/3359>) +1
> similar issue
> *
>
> igt@kms_cursor_crc@pipe-a-cursor-max-size-sliding:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_cursor_crc@pipe-a-cursor-max-size-sliding.html>
> (fdo#109278
> <https://bugs.freedesktop.org/show_bug.cgi?id=109278>) +9
> similar issues
> *
>
> igt@kms_cursor_crc@pipe-b-cursor-32x10-random:
>
> o shard-kbl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_cursor_crc@pipe-b-cursor-32x10-random.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +27
> similar issues
> *
>
> igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_cursor_crc@pipe-b-cursor-512x170-sliding.html>
> (fdo#109279
> <https://bugs.freedesktop.org/show_bug.cgi?id=109279> /
> i915#3359 <https://gitlab.freedesktop.org/drm/intel/issues/3359>)
> *
>
> igt@kms_cursor_legacy@flip-vs-cursor-legacy:
>
> o shard-skl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl10/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@kms_cursor_legacy@flip-vs-cursor-legacy.html>
> (i915#2346 <https://gitlab.freedesktop.org/drm/intel/issues/2346>)
> *
>
> igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_draw_crc@draw-method-rgb565-pwrite-4tiled.html>
> (i915#5287 <https://gitlab.freedesktop.org/drm/intel/issues/5287>)
> *
>
> igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-4tiled:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_draw_crc@draw-method-xrgb2101010-mmap-cpu-4tiled.html>
> (i915#5287 <https://gitlab.freedesktop.org/drm/intel/issues/5287>)
> *
>
> igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html>
> (fdo#109274
> <https://bugs.freedesktop.org/show_bug.cgi?id=109274> /
> fdo#111825 <https://bugs.freedesktop.org/show_bug.cgi?id=111825>)
> *
>
> igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2:
>
> o shard-glk: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk6/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk1/igt@kms_flip@2x-flip-vs-expired-vblank@ab-hdmi-a1-hdmi-a2.html>
> (i915#79 <https://gitlab.freedesktop.org/drm/intel/issues/79>)
> *
>
> igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
>
> o shard-kbl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl7/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html>
> -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl1/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html>
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180>) +8
> similar issues
> *
>
> igt@kms_flip@flip-vs-suspend-interruptible@c-edp1:
>
> o shard-skl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html>
> -> INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@kms_flip@flip-vs-suspend-interruptible@c-edp1.html>
> (i915#4939 <https://gitlab.freedesktop.org/drm/intel/issues/4939>)
> *
>
> igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1:
>
> o shard-skl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl9/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl7/igt@kms_flip@plain-flip-ts-check-interruptible@c-edp1.html>
> (i915#2122
> <https://gitlab.freedesktop.org/drm/intel/issues/2122>) +3
> similar issues
> *
>
> igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_flip_scaled_crc@flip-32bpp-ytileccs-to-64bpp-ytile-downscaling.html>
> (i915#2587 <https://gitlab.freedesktop.org/drm/intel/issues/2587>)
> *
>
> igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html>
> (i915#2587 <https://gitlab.freedesktop.org/drm/intel/issues/2587>)
> *
>
> igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-shrfb-draw-mmap-cpu.html>
> (fdo#109280
> <https://bugs.freedesktop.org/show_bug.cgi?id=109280>) +1
> similar issue
> *
>
> igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-pwrite.html>
> (fdo#109280
> <https://bugs.freedesktop.org/show_bug.cgi?id=109280> /
> fdo#111825
> <https://bugs.freedesktop.org/show_bug.cgi?id=111825>) +5
> similar issues
> *
>
> igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_pipe_b_c_ivb@enable-pipe-c-while-b-has-3-lanes.html>
> (fdo#109289 <https://bugs.freedesktop.org/show_bug.cgi?id=109289>)
> *
>
> igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
>
> o shard-apl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html>
> -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html>
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180>) +4
> similar issues
> *
>
> igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb:
>
> o shard-apl: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl1/igt@kms_plane_alpha_blend@pipe-a-alpha-opaque-fb.html>
> (fdo#108145
> <https://bugs.freedesktop.org/show_bug.cgi?id=108145> /
> i915#265
> <https://gitlab.freedesktop.org/drm/intel/issues/265>) +1
> similar issue
> *
>
> igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min:
>
> o shard-skl: NOTRUN -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-min.html>
> (fdo#108145
> <https://bugs.freedesktop.org/show_bug.cgi?id=108145> /
> i915#265 <https://gitlab.freedesktop.org/drm/intel/issues/265>)
> *
>
> igt@kms_plane_alpha_blend@pipe-a-coverage-7efc:
>
> o shard-skl: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl1/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html>
> -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl2/igt@kms_plane_alpha_blend@pipe-a-coverage-7efc.html>
> (fdo#108145
> <https://bugs.freedesktop.org/show_bug.cgi?id=108145> /
> i915#265 <https://gitlab.freedesktop.org/drm/intel/issues/265>)
> *
>
> igt@kms_plane_lowres@pipe-b-tiling-none:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_plane_lowres@pipe-b-tiling-none.html>
> (i915#3536 <https://gitlab.freedesktop.org/drm/intel/issues/3536>)
> *
>
> igt@kms_plane_lowres@pipe-d-tiling-4:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane_lowres@pipe-d-tiling-4.html>
> (i915#5288 <https://gitlab.freedesktop.org/drm/intel/issues/5288>)
> *
>
> igt@kms_plane_multiple@atomic-pipe-b-tiling-yf:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane_multiple@atomic-pipe-b-tiling-yf.html>
> (fdo#111615
> <https://bugs.freedesktop.org/show_bug.cgi?id=111615>) +2
> similar issues
> *
>
> igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier:
>
> o shard-iclb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb7/igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier.html>
> -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_plane_scaling@downscale-with-modifier-factor-0-5@pipe-c-edp-1-downscale-with-modifier.html>
> (i915#5176
> <https://gitlab.freedesktop.org/drm/intel/issues/5176>) +2
> similar issues
> *
>
> igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
>
> o shard-kbl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr2_sf@overlay-plane-update-continuous-sf:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_psr2_sf@overlay-plane-update-continuous-sf.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr@psr2_primary_mmap_cpu:
>
> o shard-iclb: PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_psr@psr2_primary_mmap_cpu.html>
> -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb7/igt@kms_psr@psr2_primary_mmap_cpu.html>
> (fdo#109441
> <https://bugs.freedesktop.org/show_bug.cgi?id=109441>) +2
> similar issues
> *
>
> igt@kms_setmode@basic-clone-single-crtc:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@kms_setmode@basic-clone-single-crtc.html>
> (i915#3555 <https://gitlab.freedesktop.org/drm/intel/issues/3555>)
> *
>
> igt@kms_writeback@writeback-fb-id:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_writeback@writeback-fb-id.html>
> (i915#2437 <https://gitlab.freedesktop.org/drm/intel/issues/2437>)
> *
>
> igt@nouveau_crc@pipe-c-source-outp-inactive:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@nouveau_crc@pipe-c-source-outp-inactive.html>
> (i915#2530 <https://gitlab.freedesktop.org/drm/intel/issues/2530>)
> *
>
> igt@perf@polling:
>
> o shard-snb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@perf@polling.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271>) +46
> similar issues
> *
>
> igt@prime_nv_pcopy@test3_1:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@prime_nv_pcopy@test3_1.html>
> (fdo#109291 <https://bugs.freedesktop.org/show_bug.cgi?id=109291>)
> *
>
> igt@prime_nv_test@i915_nv_sharing:
>
> o shard-tglb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@prime_nv_test@i915_nv_sharing.html>
> (fdo#109291 <https://bugs.freedesktop.org/show_bug.cgi?id=109291>)
> *
>
> igt@prime_vgem@fence-write-hang:
>
> o shard-iclb: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@prime_vgem@fence-write-hang.html>
> (fdo#109295 <https://bugs.freedesktop.org/show_bug.cgi?id=109295>)
> *
>
> igt@syncobj_timeline@invalid-transfer-non-existent-point:
>
> o shard-apl: NOTRUN -> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@syncobj_timeline@invalid-transfer-non-existent-point.html>
> (i915#5098 <https://gitlab.freedesktop.org/drm/intel/issues/5098>)
> *
>
> igt@sysfs_clients@fair-3:
>
> o shard-apl: NOTRUN -> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@sysfs_clients@fair-3.html>
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#2994 <https://gitlab.freedesktop.org/drm/intel/issues/2994>)
>
>
> Possible fixes
>
> *
>
> igt@gem_ctx_isolation@preservation-s3@bcs0:
>
> o shard-skl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl6/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> (i915#4793
> <https://gitlab.freedesktop.org/drm/intel/issues/4793>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl8/igt@gem_ctx_isolation@preservation-s3@bcs0.html>
> *
>
> igt@gem_exec_fair@basic-pace-share@rcs0:
>
> o shard-tglb: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb6/igt@gem_exec_fair@basic-pace-share@rcs0.html>
> *
>
> igt@gem_exec_fair@basic-throttle@rcs0:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk4/igt@gem_exec_fair@basic-throttle@rcs0.html>
> (i915#2842
> <https://gitlab.freedesktop.org/drm/intel/issues/2842>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk5/igt@gem_exec_fair@basic-throttle@rcs0.html>
> *
>
> igt@gem_exec_whisper@basic-fds-forked-all:
>
> o {shard-tglu}: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglu-6/igt@gem_exec_whisper@basic-fds-forked-all.html>
> (i915#5966
> <https://gitlab.freedesktop.org/drm/intel/issues/5966>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglu-3/igt@gem_exec_whisper@basic-fds-forked-all.html>
> *
>
> igt@i915_suspend@debugfs-reader:
>
> o shard-skl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl7/igt@i915_suspend@debugfs-reader.html>
> (i915#4939
> <https://gitlab.freedesktop.org/drm/intel/issues/4939>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl6/igt@i915_suspend@debugfs-reader.html>
> *
>
> igt@i915_suspend@forcewake:
>
> o shard-skl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl8/igt@i915_suspend@forcewake.html>
> (i915#4817
> <https://gitlab.freedesktop.org/drm/intel/issues/4817>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@i915_suspend@forcewake.html>
> *
>
> igt@kms_cursor_crc@pipe-a-cursor-suspend:
>
> o shard-snb: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-snb6/igt@kms_cursor_crc@pipe-a-cursor-suspend.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-snb4/igt@kms_cursor_crc@pipe-a-cursor-suspend.html>
> *
>
> igt@kms_fbcon_fbt@fbc-suspend:
>
> o shard-apl: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@kms_fbcon_fbt@fbc-suspend.html>
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180> /
> i915#1982
> <https://gitlab.freedesktop.org/drm/intel/issues/1982>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl7/igt@kms_fbcon_fbt@fbc-suspend.html>
> *
>
> igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2:
>
> o shard-glk: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-glk1/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html>
> (i915#2122
> <https://gitlab.freedesktop.org/drm/intel/issues/2122>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-glk2/igt@kms_flip@2x-flip-vs-wf_vblank@ab-hdmi-a1-hdmi-a2.html>
> *
>
> igt@kms_flip@flip-vs-suspend-interruptible@a-dp1:
>
> o shard-apl: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html>
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@kms_flip@flip-vs-suspend-interruptible@a-dp1.html>
> +3 similar issues
> *
>
> igt@kms_flip@flip-vs-suspend@a-dp1:
>
> o shard-kbl: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-kbl6/igt@kms_flip@flip-vs-suspend@a-dp1.html>
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-kbl4/igt@kms_flip@flip-vs-suspend@a-dp1.html>
> +1 similar issue
> *
>
> igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes:
>
> o shard-tglb: INCOMPLETE
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb5/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html>
> -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb3/igt@kms_plane@plane-panning-bottom-right-suspend@pipe-a-planes.html>
> *
>
> igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale.html>
> (i915#5235
> <https://gitlab.freedesktop.org/drm/intel/issues/5235>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb4/igt@kms_plane_scaling@planes-unity-scaling-downscale-factor-0-5@pipe-a-edp-1-planes-upscale-downscale.html>
> +2 similar issues
> *
>
> igt@kms_psr@psr2_no_drrs:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@kms_psr@psr2_no_drrs.html>
> (fdo#109441
> <https://bugs.freedesktop.org/show_bug.cgi?id=109441>) -> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_psr@psr2_no_drrs.html>
> *
>
> igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
>
> o shard-tglb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-tglb5/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html>
> (i915#5519
> <https://gitlab.freedesktop.org/drm/intel/issues/5519>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-tglb7/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html>
> *
>
> igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html>
> (i915#5519
> <https://gitlab.freedesktop.org/drm/intel/issues/5519>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb8/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html>
> *
>
> igt@perf@polling-parameterized:
>
> o shard-skl: FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-skl2/igt@perf@polling-parameterized.html>
> (i915#5639
> <https://gitlab.freedesktop.org/drm/intel/issues/5639>) ->
> PASS
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-skl10/igt@perf@polling-parameterized.html>
>
>
> Warnings
>
> *
>
> igt@gem_exec_balancer@parallel-bb-first:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@gem_exec_balancer@parallel-bb-first.html>
> (i915#4525
> <https://gitlab.freedesktop.org/drm/intel/issues/4525>) ->
> DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb4/igt@gem_exec_balancer@parallel-bb-first.html>
> (i915#5614 <https://gitlab.freedesktop.org/drm/intel/issues/5614>)
> *
>
> igt@gem_exec_balancer@parallel-keep-submit-fence:
>
> o shard-iclb: DMESG-WARN
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb1/igt@gem_exec_balancer@parallel-keep-submit-fence.html>
> (i915#5614
> <https://gitlab.freedesktop.org/drm/intel/issues/5614>) ->
> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb3/igt@gem_exec_balancer@parallel-keep-submit-fence.html>
> (i915#4525 <https://gitlab.freedesktop.org/drm/intel/issues/4525>)
> *
>
> igt@kms_psr2_sf@overlay-plane-move-continuous-sf:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb2/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html>
> (i915#2920
> <https://gitlab.freedesktop.org/drm/intel/issues/2920>) ->
> SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb7/igt@kms_psr2_sf@overlay-plane-move-continuous-sf.html>
> (i915#658 <https://gitlab.freedesktop.org/drm/intel/issues/658>)
> *
>
> igt@kms_psr2_su@page_flip-p010:
>
> o shard-iclb: SKIP
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-iclb6/igt@kms_psr2_su@page_flip-p010.html>
> (fdo#109642
> <https://bugs.freedesktop.org/show_bug.cgi?id=109642> /
> fdo#111068
> <https://bugs.freedesktop.org/show_bug.cgi?id=111068> /
> i915#658
> <https://gitlab.freedesktop.org/drm/intel/issues/658>) -> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-iclb2/igt@kms_psr2_su@page_flip-p010.html>
> (i915#5939 <https://gitlab.freedesktop.org/drm/intel/issues/5939>)
> *
>
> igt@runner@aborted:
>
> o shard-apl: (FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl7/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl1/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl2/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl6/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl6/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_11646/shard-apl8/igt@runner@aborted.html>)
> (fdo#109271
> <https://bugs.freedesktop.org/show_bug.cgi?id=109271> /
> i915#180 <https://gitlab.freedesktop.org/drm/intel/issues/180>
> / i915#3002
> <https://gitlab.freedesktop.org/drm/intel/issues/3002> /
> i915#4312
> <https://gitlab.freedesktop.org/drm/intel/issues/4312> /
> i915#5257
> <https://gitlab.freedesktop.org/drm/intel/issues/5257>) ->
> (FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl6/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl3/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl4/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html>,
> FAIL
> <https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_103881v3/shard-apl8/igt@runner@aborted.html>)
> (i915#180
> <https://gitlab.freedesktop.org/drm/intel/issues/180> /
> i915#3002
> <https://gitlab.freedesktop.org/drm/intel/issues/3002> /
> i915#4312
> <https://gitlab.freedesktop.org/drm/intel/issues/4312> /
> i915#5257 <https://gitlab.freedesktop.org/drm/intel/issues/5257>)
>
> {name}: This element is suppressed. This means it is ignored when
> computing
> the status of the difference (SUCCESS, WARNING, or FAILURE).
>
>
> Build changes
>
> * Linux: CI_DRM_11646 -> Patchwork_103881v3
>
> CI-20190529: 20190529
> CI_DRM_11646: 8e5417afe580e2eac869c09e1454d174078523fd @
> git://anongit.freedesktop.org/gfx-ci/linux
> IGT_6471: 1d6816f1200520f936a799b7b0ef2e6f396abb16 @
> https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
> Patchwork_103881v3: 8e5417afe580e2eac869c09e1454d174078523fd @
> git://anongit.freedesktop.org/gfx-ci/linux
> piglit_4509: fdc5a4ca11124ab8413c7988896eec4c97336694 @
> git://anongit.freedesktop.org/piglit
>
[-- Attachment #2: Type: text/html, Size: 63280 bytes --]
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode
2022-05-13 8:47 [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Nirmoy Das
2022-05-13 9:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable Tile4 tiling mode (rev3) Patchwork
2022-05-13 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
@ 2022-05-13 18:11 ` Matt Roper
2022-05-16 7:25 ` Das, Nirmoy
2022-05-24 6:15 ` Zbigniew Kempczyński
3 siblings, 1 reply; 7+ messages in thread
From: Matt Roper @ 2022-05-13 18:11 UTC (permalink / raw)
To: Nirmoy Das; +Cc: krishnaiah.bommu, intel-gfx, matthew.auld, chris.p.wilson
On Fri, May 13, 2022 at 10:47:54AM +0200, Nirmoy Das wrote:
> From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>
> Enable Tile4 tiling mode on platform that supports
> Tile4 but no TileY like DG2.
Drive-by comment: the patch description doesn't match what the code is
actually doing. Tile4 is already enabled on these platforms (e.g., see
"drm/i915/dg2: Tile 4 plane format support").
This patch appears to just be updating selftest code, not enabling
anything new.
Matt
>
> v3: add a function to find X-tile availability for a platform.
> v2: disable X-tile for iGPU in fastblit
> fix checkpath --strict warnings
>
> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
> ---
> .../i915/gem/selftests/i915_gem_client_blt.c | 250 ++++++++++++++----
> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 ++
> 2 files changed, 227 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> index ddd0772fd828..3cfc621ef363 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> @@ -6,6 +6,7 @@
> #include "i915_selftest.h"
>
> #include "gt/intel_context.h"
> +#include "gt/intel_engine_regs.h"
> #include "gt/intel_engine_user.h"
> #include "gt/intel_gpu_commands.h"
> #include "gt/intel_gt.h"
> @@ -18,10 +19,71 @@
> #include "huge_gem_object.h"
> #include "mock_context.h"
>
> +#define OW_SIZE 16 /* in bytes */
> +#define F_SUBTILE_SIZE 64 /* in bytes */
> +#define F_TILE_WIDTH 128 /* in bytes */
> +#define F_TILE_HEIGHT 32 /* in pixels */
> +#define F_SUBTILE_WIDTH OW_SIZE /* in bytes */
> +#define F_SUBTILE_HEIGHT 4 /* in pixels */
> +
> +static int linear_x_y_to_ftiled_pos(int x, int y, u32 stride, int bpp)
> +{
> + int tile_base;
> + int tile_x, tile_y;
> + int swizzle, subtile;
> + int pixel_size = bpp / 8;
> + int pos;
> +
> + /*
> + * Subtile remapping for F tile. Note that map[a]==b implies map[b]==a
> + * so we can use the same table to tile and until.
> + */
> + static const u8 f_subtile_map[] = {
> + 0, 1, 2, 3, 8, 9, 10, 11,
> + 4, 5, 6, 7, 12, 13, 14, 15,
> + 16, 17, 18, 19, 24, 25, 26, 27,
> + 20, 21, 22, 23, 28, 29, 30, 31,
> + 32, 33, 34, 35, 40, 41, 42, 43,
> + 36, 37, 38, 39, 44, 45, 46, 47,
> + 48, 49, 50, 51, 56, 57, 58, 59,
> + 52, 53, 54, 55, 60, 61, 62, 63
> + };
> +
> + x *= pixel_size;
> + /*
> + * Where does the 4k tile start (in bytes)? This is the same for Y and
> + * F so we can use the Y-tile algorithm to get to that point.
> + */
> + tile_base =
> + y / F_TILE_HEIGHT * stride * F_TILE_HEIGHT +
> + x / F_TILE_WIDTH * 4096;
> +
> + /* Find pixel within tile */
> + tile_x = x % F_TILE_WIDTH;
> + tile_y = y % F_TILE_HEIGHT;
> +
> + /* And figure out the subtile within the 4k tile */
> + subtile = tile_y / F_SUBTILE_HEIGHT * 8 + tile_x / F_SUBTILE_WIDTH;
> +
> + /* Swizzle the subtile number according to the bspec diagram */
> + swizzle = f_subtile_map[subtile];
> +
> + /* Calculate new position */
> + pos = tile_base +
> + swizzle * F_SUBTILE_SIZE +
> + tile_y % F_SUBTILE_HEIGHT * OW_SIZE +
> + tile_x % F_SUBTILE_WIDTH;
> +
> + GEM_BUG_ON(!IS_ALIGNED(pos, pixel_size));
> +
> + return pos / pixel_size * 4;
> +}
> +
> enum client_tiling {
> CLIENT_TILING_LINEAR,
> CLIENT_TILING_X,
> CLIENT_TILING_Y,
> + CLIENT_TILING_4,
> CLIENT_NUM_TILING_TYPES
> };
>
> @@ -45,6 +107,36 @@ struct tiled_blits {
> u32 height;
> };
>
> +static bool supports_x_tiling(const struct drm_i915_private *i915)
> +{
> + int gen = GRAPHICS_VER(i915);
> +
> + if (gen < 12)
> + return true;
> +
> + if (!HAS_LMEM(i915) || IS_DG1(i915))
> + return false;
> +
> + return true;
> +}
> +
> +static bool fast_blit_ok(const struct blit_buffer *buf)
> +{
> + int gen = GRAPHICS_VER(buf->vma->vm->i915);
> +
> + if (gen < 9)
> + return false;
> +
> + if (gen < 12)
> + return true;
> +
> + /* filter out platforms with unsupported X-tile support in fastblit */
> + if (buf->tiling == CLIENT_TILING_X && !supports_x_tiling(buf->vma->vm->i915))
> + return false;
> +
> + return true;
> +}
> +
> static int prepare_blit(const struct tiled_blits *t,
> struct blit_buffer *dst,
> struct blit_buffer *src,
> @@ -59,51 +151,103 @@ static int prepare_blit(const struct tiled_blits *t,
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - *cs++ = MI_LOAD_REGISTER_IMM(1);
> - *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
> - cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
> - if (src->tiling == CLIENT_TILING_Y)
> - cmd |= BCS_SRC_Y;
> - if (dst->tiling == CLIENT_TILING_Y)
> - cmd |= BCS_DST_Y;
> - *cs++ = cmd;
> -
> - cmd = MI_FLUSH_DW;
> - if (ver >= 8)
> - cmd++;
> - *cs++ = cmd;
> - *cs++ = 0;
> - *cs++ = 0;
> - *cs++ = 0;
> -
> - cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
> - if (ver >= 8)
> - cmd += 2;
> -
> - src_pitch = t->width * 4;
> - if (src->tiling) {
> - cmd |= XY_SRC_COPY_BLT_SRC_TILED;
> - src_pitch /= 4;
> - }
> + if (fast_blit_ok(dst) && fast_blit_ok(src)) {
> + struct intel_gt *gt = t->ce->engine->gt;
> + u32 src_tiles = 0, dst_tiles = 0;
> + u32 src_4t = 0, dst_4t = 0;
> +
> + /* Need to program BLIT_CCTL if it is not done previously
> + * before using XY_FAST_COPY_BLT
> + */
> + *cs++ = MI_LOAD_REGISTER_IMM(1);
> + *cs++ = i915_mmio_reg_offset(BLIT_CCTL(t->ce->engine->mmio_base));
> + *cs++ = (BLIT_CCTL_SRC_MOCS(gt->mocs.uc_index) |
> + BLIT_CCTL_DST_MOCS(gt->mocs.uc_index));
> +
> + src_pitch = t->width; /* in dwords */
> + if (src->tiling == CLIENT_TILING_4) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
> + src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;
> + } else if (src->tiling == CLIENT_TILING_Y) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
> + } else if (src->tiling == CLIENT_TILING_X) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);
> + } else {
> + src_pitch *= 4; /* in bytes */
> + }
>
> - dst_pitch = t->width * 4;
> - if (dst->tiling) {
> - cmd |= XY_SRC_COPY_BLT_DST_TILED;
> - dst_pitch /= 4;
> - }
> + dst_pitch = t->width; /* in dwords */
> + if (dst->tiling == CLIENT_TILING_4) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
> + dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;
> + } else if (dst->tiling == CLIENT_TILING_Y) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
> + } else if (dst->tiling == CLIENT_TILING_X) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);
> + } else {
> + dst_pitch *= 4; /* in bytes */
> + }
>
> - *cs++ = cmd;
> - *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
> - *cs++ = 0;
> - *cs++ = t->height << 16 | t->width;
> - *cs++ = lower_32_bits(dst->vma->node.start);
> - if (use_64b_reloc)
> + *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2) |
> + src_tiles | dst_tiles;
> + *cs++ = src_4t | dst_4t | BLT_DEPTH_32 | dst_pitch;
> + *cs++ = 0;
> + *cs++ = t->height << 16 | t->width;
> + *cs++ = lower_32_bits(dst->vma->node.start);
> *cs++ = upper_32_bits(dst->vma->node.start);
> - *cs++ = 0;
> - *cs++ = src_pitch;
> - *cs++ = lower_32_bits(src->vma->node.start);
> - if (use_64b_reloc)
> + *cs++ = 0;
> + *cs++ = src_pitch;
> + *cs++ = lower_32_bits(src->vma->node.start);
> *cs++ = upper_32_bits(src->vma->node.start);
> + } else {
> + if (ver >= 6) {
> + *cs++ = MI_LOAD_REGISTER_IMM(1);
> + *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
> + cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
> + if (src->tiling == CLIENT_TILING_Y)
> + cmd |= BCS_SRC_Y;
> + if (dst->tiling == CLIENT_TILING_Y)
> + cmd |= BCS_DST_Y;
> + *cs++ = cmd;
> +
> + cmd = MI_FLUSH_DW;
> + if (ver >= 8)
> + cmd++;
> + *cs++ = cmd;
> + *cs++ = 0;
> + *cs++ = 0;
> + *cs++ = 0;
> + }
> +
> + cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
> + if (ver >= 8)
> + cmd += 2;
> +
> + src_pitch = t->width * 4;
> + if (src->tiling) {
> + cmd |= XY_SRC_COPY_BLT_SRC_TILED;
> + src_pitch /= 4;
> + }
> +
> + dst_pitch = t->width * 4;
> + if (dst->tiling) {
> + cmd |= XY_SRC_COPY_BLT_DST_TILED;
> + dst_pitch /= 4;
> + }
> +
> + *cs++ = cmd;
> + *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
> + *cs++ = 0;
> + *cs++ = t->height << 16 | t->width;
> + *cs++ = lower_32_bits(dst->vma->node.start);
> + if (use_64b_reloc)
> + *cs++ = upper_32_bits(dst->vma->node.start);
> + *cs++ = 0;
> + *cs++ = src_pitch;
> + *cs++ = lower_32_bits(src->vma->node.start);
> + if (use_64b_reloc)
> + *cs++ = upper_32_bits(src->vma->node.start);
> + }
>
> *cs++ = MI_BATCH_BUFFER_END;
>
> @@ -181,7 +325,13 @@ static int tiled_blits_create_buffers(struct tiled_blits *t,
>
> t->buffers[i].vma = vma;
> t->buffers[i].tiling =
> - i915_prandom_u32_max_state(CLIENT_TILING_Y + 1, prng);
> + i915_prandom_u32_max_state(CLIENT_NUM_TILING_TYPES, prng);
> +
> + /* Platforms support either TileY or Tile4, not both */
> + if (HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_Y)
> + t->buffers[i].tiling = CLIENT_TILING_4;
> + else if (!HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_4)
> + t->buffers[i].tiling = CLIENT_TILING_Y;
> }
>
> return 0;
> @@ -206,7 +356,8 @@ static u64 swizzle_bit(unsigned int bit, u64 offset)
> static u64 tiled_offset(const struct intel_gt *gt,
> u64 v,
> unsigned int stride,
> - enum client_tiling tiling)
> + enum client_tiling tiling,
> + int x_pos, int y_pos)
> {
> unsigned int swizzle;
> u64 x, y;
> @@ -216,7 +367,12 @@ static u64 tiled_offset(const struct intel_gt *gt,
>
> y = div64_u64_rem(v, stride, &x);
>
> - if (tiling == CLIENT_TILING_X) {
> + if (tiling == CLIENT_TILING_4) {
> + v = linear_x_y_to_ftiled_pos(x_pos, y_pos, stride, 32);
> +
> + /* no swizzling for f-tiling */
> + swizzle = I915_BIT_6_SWIZZLE_NONE;
> + } else if (tiling == CLIENT_TILING_X) {
> v = div64_u64_rem(y, 8, &y) * stride * 8;
> v += y * 512;
> v += div64_u64_rem(x, 512, &x) << 12;
> @@ -259,6 +415,7 @@ static const char *repr_tiling(enum client_tiling tiling)
> case CLIENT_TILING_LINEAR: return "linear";
> case CLIENT_TILING_X: return "X";
> case CLIENT_TILING_Y: return "Y";
> + case CLIENT_TILING_4: return "F";
> default: return "unknown";
> }
> }
> @@ -284,7 +441,7 @@ static int verify_buffer(const struct tiled_blits *t,
> } else {
> u64 v = tiled_offset(buf->vma->vm->gt,
> p * 4, t->width * 4,
> - buf->tiling);
> + buf->tiling, x, y);
>
> if (vaddr[v / sizeof(*vaddr)] != buf->start_val + p)
> ret = -EINVAL;
> @@ -504,6 +661,9 @@ static int tiled_blits_bounce(struct tiled_blits *t, struct rnd_state *prng)
> if (err)
> return err;
>
> + /* Simulating GTT eviction of the same buffer / layout */
> + t->buffers[2].tiling = t->buffers[0].tiling;
> +
> /* Reposition so that we overlap the old addresses, and slightly off */
> err = tiled_blit(t,
> &t->buffers[2], t->hole + t->align,
> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> index 556bca3be804..246ab8f7bf57 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> @@ -236,6 +236,28 @@
> #define XY_FAST_COLOR_BLT_DW 16
> #define XY_FAST_COLOR_BLT_MOCS_MASK GENMASK(27, 21)
> #define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
> +
> +#define XY_FAST_COPY_BLT_D0_SRC_TILING_MASK REG_GENMASK(21, 20)
> +#define XY_FAST_COPY_BLT_D0_DST_TILING_MASK REG_GENMASK(14, 13)
> +#define XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(mode) \
> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_SRC_TILING_MASK, mode)
> +#define XY_FAST_COPY_BLT_D0_DST_TILE_MODE(mode) \
> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_DST_TILING_MASK, mode)
> +#define LINEAR 0
> +#define TILE_X 0x1
> +#define XMAJOR 0x1
> +#define YMAJOR 0x2
> +#define TILE_64 0x3
> +#define XY_FAST_COPY_BLT_D1_SRC_TILE4 REG_BIT(31)
> +#define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
> +#define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
> +#define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
> +/* Note: MOCS value = (index << 1) */
> +#define BLIT_CCTL_SRC_MOCS(idx) \
> + REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, (idx) << 1)
> +#define BLIT_CCTL_DST_MOCS(idx) \
> + REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, (idx) << 1)
> +
> #define SRC_COPY_BLT_CMD (2 << 29 | 0x43 << 22)
> #define GEN9_XY_FAST_COPY_BLT_CMD (2 << 29 | 0x42 << 22)
> #define XY_SRC_COPY_BLT_CMD (2 << 29 | 0x53 << 22)
> --
> 2.35.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode
2022-05-13 18:11 ` [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Matt Roper
@ 2022-05-16 7:25 ` Das, Nirmoy
0 siblings, 0 replies; 7+ messages in thread
From: Das, Nirmoy @ 2022-05-16 7:25 UTC (permalink / raw)
To: Matt Roper, Nirmoy Das
Cc: krishnaiah.bommu, intel-gfx, matthew.auld, chris.p.wilson
On 5/13/2022 8:11 PM, Matt Roper wrote:
> On Fri, May 13, 2022 at 10:47:54AM +0200, Nirmoy Das wrote:
>> From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>>
>> Enable Tile4 tiling mode on platform that supports
>> Tile4 but no TileY like DG2.
> Drive-by comment: the patch description doesn't match what the code is
> actually doing. Tile4 is already enabled on these platforms (e.g., see
> "drm/i915/dg2: Tile 4 plane format support").
This is meant to enable tile4 mode for selftest. I will update and resend.
Thanks,
Nirmoy
>
> This patch appears to just be updating selftest code, not enabling
> anything new.
>
>
> Matt
>
>> v3: add a function to find X-tile availability for a platform.
>> v2: disable X-tile for iGPU in fastblit
>> fix checkpath --strict warnings
>>
>> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
>> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
>> ---
>> .../i915/gem/selftests/i915_gem_client_blt.c | 250 ++++++++++++++----
>> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 ++
>> 2 files changed, 227 insertions(+), 45 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
>> index ddd0772fd828..3cfc621ef363 100644
>> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
>> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
>> @@ -6,6 +6,7 @@
>> #include "i915_selftest.h"
>>
>> #include "gt/intel_context.h"
>> +#include "gt/intel_engine_regs.h"
>> #include "gt/intel_engine_user.h"
>> #include "gt/intel_gpu_commands.h"
>> #include "gt/intel_gt.h"
>> @@ -18,10 +19,71 @@
>> #include "huge_gem_object.h"
>> #include "mock_context.h"
>>
>> +#define OW_SIZE 16 /* in bytes */
>> +#define F_SUBTILE_SIZE 64 /* in bytes */
>> +#define F_TILE_WIDTH 128 /* in bytes */
>> +#define F_TILE_HEIGHT 32 /* in pixels */
>> +#define F_SUBTILE_WIDTH OW_SIZE /* in bytes */
>> +#define F_SUBTILE_HEIGHT 4 /* in pixels */
>> +
>> +static int linear_x_y_to_ftiled_pos(int x, int y, u32 stride, int bpp)
>> +{
>> + int tile_base;
>> + int tile_x, tile_y;
>> + int swizzle, subtile;
>> + int pixel_size = bpp / 8;
>> + int pos;
>> +
>> + /*
>> + * Subtile remapping for F tile. Note that map[a]==b implies map[b]==a
>> + * so we can use the same table to tile and until.
>> + */
>> + static const u8 f_subtile_map[] = {
>> + 0, 1, 2, 3, 8, 9, 10, 11,
>> + 4, 5, 6, 7, 12, 13, 14, 15,
>> + 16, 17, 18, 19, 24, 25, 26, 27,
>> + 20, 21, 22, 23, 28, 29, 30, 31,
>> + 32, 33, 34, 35, 40, 41, 42, 43,
>> + 36, 37, 38, 39, 44, 45, 46, 47,
>> + 48, 49, 50, 51, 56, 57, 58, 59,
>> + 52, 53, 54, 55, 60, 61, 62, 63
>> + };
>> +
>> + x *= pixel_size;
>> + /*
>> + * Where does the 4k tile start (in bytes)? This is the same for Y and
>> + * F so we can use the Y-tile algorithm to get to that point.
>> + */
>> + tile_base =
>> + y / F_TILE_HEIGHT * stride * F_TILE_HEIGHT +
>> + x / F_TILE_WIDTH * 4096;
>> +
>> + /* Find pixel within tile */
>> + tile_x = x % F_TILE_WIDTH;
>> + tile_y = y % F_TILE_HEIGHT;
>> +
>> + /* And figure out the subtile within the 4k tile */
>> + subtile = tile_y / F_SUBTILE_HEIGHT * 8 + tile_x / F_SUBTILE_WIDTH;
>> +
>> + /* Swizzle the subtile number according to the bspec diagram */
>> + swizzle = f_subtile_map[subtile];
>> +
>> + /* Calculate new position */
>> + pos = tile_base +
>> + swizzle * F_SUBTILE_SIZE +
>> + tile_y % F_SUBTILE_HEIGHT * OW_SIZE +
>> + tile_x % F_SUBTILE_WIDTH;
>> +
>> + GEM_BUG_ON(!IS_ALIGNED(pos, pixel_size));
>> +
>> + return pos / pixel_size * 4;
>> +}
>> +
>> enum client_tiling {
>> CLIENT_TILING_LINEAR,
>> CLIENT_TILING_X,
>> CLIENT_TILING_Y,
>> + CLIENT_TILING_4,
>> CLIENT_NUM_TILING_TYPES
>> };
>>
>> @@ -45,6 +107,36 @@ struct tiled_blits {
>> u32 height;
>> };
>>
>> +static bool supports_x_tiling(const struct drm_i915_private *i915)
>> +{
>> + int gen = GRAPHICS_VER(i915);
>> +
>> + if (gen < 12)
>> + return true;
>> +
>> + if (!HAS_LMEM(i915) || IS_DG1(i915))
>> + return false;
>> +
>> + return true;
>> +}
>> +
>> +static bool fast_blit_ok(const struct blit_buffer *buf)
>> +{
>> + int gen = GRAPHICS_VER(buf->vma->vm->i915);
>> +
>> + if (gen < 9)
>> + return false;
>> +
>> + if (gen < 12)
>> + return true;
>> +
>> + /* filter out platforms with unsupported X-tile support in fastblit */
>> + if (buf->tiling == CLIENT_TILING_X && !supports_x_tiling(buf->vma->vm->i915))
>> + return false;
>> +
>> + return true;
>> +}
>> +
>> static int prepare_blit(const struct tiled_blits *t,
>> struct blit_buffer *dst,
>> struct blit_buffer *src,
>> @@ -59,51 +151,103 @@ static int prepare_blit(const struct tiled_blits *t,
>> if (IS_ERR(cs))
>> return PTR_ERR(cs);
>>
>> - *cs++ = MI_LOAD_REGISTER_IMM(1);
>> - *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
>> - cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
>> - if (src->tiling == CLIENT_TILING_Y)
>> - cmd |= BCS_SRC_Y;
>> - if (dst->tiling == CLIENT_TILING_Y)
>> - cmd |= BCS_DST_Y;
>> - *cs++ = cmd;
>> -
>> - cmd = MI_FLUSH_DW;
>> - if (ver >= 8)
>> - cmd++;
>> - *cs++ = cmd;
>> - *cs++ = 0;
>> - *cs++ = 0;
>> - *cs++ = 0;
>> -
>> - cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
>> - if (ver >= 8)
>> - cmd += 2;
>> -
>> - src_pitch = t->width * 4;
>> - if (src->tiling) {
>> - cmd |= XY_SRC_COPY_BLT_SRC_TILED;
>> - src_pitch /= 4;
>> - }
>> + if (fast_blit_ok(dst) && fast_blit_ok(src)) {
>> + struct intel_gt *gt = t->ce->engine->gt;
>> + u32 src_tiles = 0, dst_tiles = 0;
>> + u32 src_4t = 0, dst_4t = 0;
>> +
>> + /* Need to program BLIT_CCTL if it is not done previously
>> + * before using XY_FAST_COPY_BLT
>> + */
>> + *cs++ = MI_LOAD_REGISTER_IMM(1);
>> + *cs++ = i915_mmio_reg_offset(BLIT_CCTL(t->ce->engine->mmio_base));
>> + *cs++ = (BLIT_CCTL_SRC_MOCS(gt->mocs.uc_index) |
>> + BLIT_CCTL_DST_MOCS(gt->mocs.uc_index));
>> +
>> + src_pitch = t->width; /* in dwords */
>> + if (src->tiling == CLIENT_TILING_4) {
>> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
>> + src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;
>> + } else if (src->tiling == CLIENT_TILING_Y) {
>> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
>> + } else if (src->tiling == CLIENT_TILING_X) {
>> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);
>> + } else {
>> + src_pitch *= 4; /* in bytes */
>> + }
>>
>> - dst_pitch = t->width * 4;
>> - if (dst->tiling) {
>> - cmd |= XY_SRC_COPY_BLT_DST_TILED;
>> - dst_pitch /= 4;
>> - }
>> + dst_pitch = t->width; /* in dwords */
>> + if (dst->tiling == CLIENT_TILING_4) {
>> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
>> + dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;
>> + } else if (dst->tiling == CLIENT_TILING_Y) {
>> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
>> + } else if (dst->tiling == CLIENT_TILING_X) {
>> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);
>> + } else {
>> + dst_pitch *= 4; /* in bytes */
>> + }
>>
>> - *cs++ = cmd;
>> - *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
>> - *cs++ = 0;
>> - *cs++ = t->height << 16 | t->width;
>> - *cs++ = lower_32_bits(dst->vma->node.start);
>> - if (use_64b_reloc)
>> + *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2) |
>> + src_tiles | dst_tiles;
>> + *cs++ = src_4t | dst_4t | BLT_DEPTH_32 | dst_pitch;
>> + *cs++ = 0;
>> + *cs++ = t->height << 16 | t->width;
>> + *cs++ = lower_32_bits(dst->vma->node.start);
>> *cs++ = upper_32_bits(dst->vma->node.start);
>> - *cs++ = 0;
>> - *cs++ = src_pitch;
>> - *cs++ = lower_32_bits(src->vma->node.start);
>> - if (use_64b_reloc)
>> + *cs++ = 0;
>> + *cs++ = src_pitch;
>> + *cs++ = lower_32_bits(src->vma->node.start);
>> *cs++ = upper_32_bits(src->vma->node.start);
>> + } else {
>> + if (ver >= 6) {
>> + *cs++ = MI_LOAD_REGISTER_IMM(1);
>> + *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
>> + cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
>> + if (src->tiling == CLIENT_TILING_Y)
>> + cmd |= BCS_SRC_Y;
>> + if (dst->tiling == CLIENT_TILING_Y)
>> + cmd |= BCS_DST_Y;
>> + *cs++ = cmd;
>> +
>> + cmd = MI_FLUSH_DW;
>> + if (ver >= 8)
>> + cmd++;
>> + *cs++ = cmd;
>> + *cs++ = 0;
>> + *cs++ = 0;
>> + *cs++ = 0;
>> + }
>> +
>> + cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
>> + if (ver >= 8)
>> + cmd += 2;
>> +
>> + src_pitch = t->width * 4;
>> + if (src->tiling) {
>> + cmd |= XY_SRC_COPY_BLT_SRC_TILED;
>> + src_pitch /= 4;
>> + }
>> +
>> + dst_pitch = t->width * 4;
>> + if (dst->tiling) {
>> + cmd |= XY_SRC_COPY_BLT_DST_TILED;
>> + dst_pitch /= 4;
>> + }
>> +
>> + *cs++ = cmd;
>> + *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
>> + *cs++ = 0;
>> + *cs++ = t->height << 16 | t->width;
>> + *cs++ = lower_32_bits(dst->vma->node.start);
>> + if (use_64b_reloc)
>> + *cs++ = upper_32_bits(dst->vma->node.start);
>> + *cs++ = 0;
>> + *cs++ = src_pitch;
>> + *cs++ = lower_32_bits(src->vma->node.start);
>> + if (use_64b_reloc)
>> + *cs++ = upper_32_bits(src->vma->node.start);
>> + }
>>
>> *cs++ = MI_BATCH_BUFFER_END;
>>
>> @@ -181,7 +325,13 @@ static int tiled_blits_create_buffers(struct tiled_blits *t,
>>
>> t->buffers[i].vma = vma;
>> t->buffers[i].tiling =
>> - i915_prandom_u32_max_state(CLIENT_TILING_Y + 1, prng);
>> + i915_prandom_u32_max_state(CLIENT_NUM_TILING_TYPES, prng);
>> +
>> + /* Platforms support either TileY or Tile4, not both */
>> + if (HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_Y)
>> + t->buffers[i].tiling = CLIENT_TILING_4;
>> + else if (!HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_4)
>> + t->buffers[i].tiling = CLIENT_TILING_Y;
>> }
>>
>> return 0;
>> @@ -206,7 +356,8 @@ static u64 swizzle_bit(unsigned int bit, u64 offset)
>> static u64 tiled_offset(const struct intel_gt *gt,
>> u64 v,
>> unsigned int stride,
>> - enum client_tiling tiling)
>> + enum client_tiling tiling,
>> + int x_pos, int y_pos)
>> {
>> unsigned int swizzle;
>> u64 x, y;
>> @@ -216,7 +367,12 @@ static u64 tiled_offset(const struct intel_gt *gt,
>>
>> y = div64_u64_rem(v, stride, &x);
>>
>> - if (tiling == CLIENT_TILING_X) {
>> + if (tiling == CLIENT_TILING_4) {
>> + v = linear_x_y_to_ftiled_pos(x_pos, y_pos, stride, 32);
>> +
>> + /* no swizzling for f-tiling */
>> + swizzle = I915_BIT_6_SWIZZLE_NONE;
>> + } else if (tiling == CLIENT_TILING_X) {
>> v = div64_u64_rem(y, 8, &y) * stride * 8;
>> v += y * 512;
>> v += div64_u64_rem(x, 512, &x) << 12;
>> @@ -259,6 +415,7 @@ static const char *repr_tiling(enum client_tiling tiling)
>> case CLIENT_TILING_LINEAR: return "linear";
>> case CLIENT_TILING_X: return "X";
>> case CLIENT_TILING_Y: return "Y";
>> + case CLIENT_TILING_4: return "F";
>> default: return "unknown";
>> }
>> }
>> @@ -284,7 +441,7 @@ static int verify_buffer(const struct tiled_blits *t,
>> } else {
>> u64 v = tiled_offset(buf->vma->vm->gt,
>> p * 4, t->width * 4,
>> - buf->tiling);
>> + buf->tiling, x, y);
>>
>> if (vaddr[v / sizeof(*vaddr)] != buf->start_val + p)
>> ret = -EINVAL;
>> @@ -504,6 +661,9 @@ static int tiled_blits_bounce(struct tiled_blits *t, struct rnd_state *prng)
>> if (err)
>> return err;
>>
>> + /* Simulating GTT eviction of the same buffer / layout */
>> + t->buffers[2].tiling = t->buffers[0].tiling;
>> +
>> /* Reposition so that we overlap the old addresses, and slightly off */
>> err = tiled_blit(t,
>> &t->buffers[2], t->hole + t->align,
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
>> index 556bca3be804..246ab8f7bf57 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
>> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
>> @@ -236,6 +236,28 @@
>> #define XY_FAST_COLOR_BLT_DW 16
>> #define XY_FAST_COLOR_BLT_MOCS_MASK GENMASK(27, 21)
>> #define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
>> +
>> +#define XY_FAST_COPY_BLT_D0_SRC_TILING_MASK REG_GENMASK(21, 20)
>> +#define XY_FAST_COPY_BLT_D0_DST_TILING_MASK REG_GENMASK(14, 13)
>> +#define XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(mode) \
>> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_SRC_TILING_MASK, mode)
>> +#define XY_FAST_COPY_BLT_D0_DST_TILE_MODE(mode) \
>> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_DST_TILING_MASK, mode)
>> +#define LINEAR 0
>> +#define TILE_X 0x1
>> +#define XMAJOR 0x1
>> +#define YMAJOR 0x2
>> +#define TILE_64 0x3
>> +#define XY_FAST_COPY_BLT_D1_SRC_TILE4 REG_BIT(31)
>> +#define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
>> +#define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
>> +#define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
>> +/* Note: MOCS value = (index << 1) */
>> +#define BLIT_CCTL_SRC_MOCS(idx) \
>> + REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, (idx) << 1)
>> +#define BLIT_CCTL_DST_MOCS(idx) \
>> + REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, (idx) << 1)
>> +
>> #define SRC_COPY_BLT_CMD (2 << 29 | 0x43 << 22)
>> #define GEN9_XY_FAST_COPY_BLT_CMD (2 << 29 | 0x42 << 22)
>> #define XY_SRC_COPY_BLT_CMD (2 << 29 | 0x53 << 22)
>> --
>> 2.35.1
>>
^ permalink raw reply [flat|nested] 7+ messages in thread
* Re: [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode
2022-05-13 8:47 [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Nirmoy Das
` (2 preceding siblings ...)
2022-05-13 18:11 ` [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Matt Roper
@ 2022-05-24 6:15 ` Zbigniew Kempczyński
3 siblings, 0 replies; 7+ messages in thread
From: Zbigniew Kempczyński @ 2022-05-24 6:15 UTC (permalink / raw)
To: Nirmoy Das; +Cc: krishnaiah.bommu, intel-gfx, matthew.auld, chris.p.wilson
On Fri, May 13, 2022 at 10:47:54AM +0200, Nirmoy Das wrote:
> From: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
>
> Enable Tile4 tiling mode on platform that supports
> Tile4 but no TileY like DG2.
>
> v3: add a function to find X-tile availability for a platform.
> v2: disable X-tile for iGPU in fastblit
> fix checkpath --strict warnings
>
> Signed-off-by: Bommu Krishnaiah <krishnaiah.bommu@intel.com>
> Co-developed-by: Nirmoy Das <nirmoy.das@intel.com>
> Signed-off-by: Nirmoy Das <nirmoy.das@intel.com>
Looks good for me, X is skipped on DG1 and integrated (gen12):
Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
--
Zbigniew
> ---
> .../i915/gem/selftests/i915_gem_client_blt.c | 250 ++++++++++++++----
> drivers/gpu/drm/i915/gt/intel_gpu_commands.h | 22 ++
> 2 files changed, 227 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> index ddd0772fd828..3cfc621ef363 100644
> --- a/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> +++ b/drivers/gpu/drm/i915/gem/selftests/i915_gem_client_blt.c
> @@ -6,6 +6,7 @@
> #include "i915_selftest.h"
>
> #include "gt/intel_context.h"
> +#include "gt/intel_engine_regs.h"
> #include "gt/intel_engine_user.h"
> #include "gt/intel_gpu_commands.h"
> #include "gt/intel_gt.h"
> @@ -18,10 +19,71 @@
> #include "huge_gem_object.h"
> #include "mock_context.h"
>
> +#define OW_SIZE 16 /* in bytes */
> +#define F_SUBTILE_SIZE 64 /* in bytes */
> +#define F_TILE_WIDTH 128 /* in bytes */
> +#define F_TILE_HEIGHT 32 /* in pixels */
> +#define F_SUBTILE_WIDTH OW_SIZE /* in bytes */
> +#define F_SUBTILE_HEIGHT 4 /* in pixels */
> +
> +static int linear_x_y_to_ftiled_pos(int x, int y, u32 stride, int bpp)
> +{
> + int tile_base;
> + int tile_x, tile_y;
> + int swizzle, subtile;
> + int pixel_size = bpp / 8;
> + int pos;
> +
> + /*
> + * Subtile remapping for F tile. Note that map[a]==b implies map[b]==a
> + * so we can use the same table to tile and until.
> + */
> + static const u8 f_subtile_map[] = {
> + 0, 1, 2, 3, 8, 9, 10, 11,
> + 4, 5, 6, 7, 12, 13, 14, 15,
> + 16, 17, 18, 19, 24, 25, 26, 27,
> + 20, 21, 22, 23, 28, 29, 30, 31,
> + 32, 33, 34, 35, 40, 41, 42, 43,
> + 36, 37, 38, 39, 44, 45, 46, 47,
> + 48, 49, 50, 51, 56, 57, 58, 59,
> + 52, 53, 54, 55, 60, 61, 62, 63
> + };
> +
> + x *= pixel_size;
> + /*
> + * Where does the 4k tile start (in bytes)? This is the same for Y and
> + * F so we can use the Y-tile algorithm to get to that point.
> + */
> + tile_base =
> + y / F_TILE_HEIGHT * stride * F_TILE_HEIGHT +
> + x / F_TILE_WIDTH * 4096;
> +
> + /* Find pixel within tile */
> + tile_x = x % F_TILE_WIDTH;
> + tile_y = y % F_TILE_HEIGHT;
> +
> + /* And figure out the subtile within the 4k tile */
> + subtile = tile_y / F_SUBTILE_HEIGHT * 8 + tile_x / F_SUBTILE_WIDTH;
> +
> + /* Swizzle the subtile number according to the bspec diagram */
> + swizzle = f_subtile_map[subtile];
> +
> + /* Calculate new position */
> + pos = tile_base +
> + swizzle * F_SUBTILE_SIZE +
> + tile_y % F_SUBTILE_HEIGHT * OW_SIZE +
> + tile_x % F_SUBTILE_WIDTH;
> +
> + GEM_BUG_ON(!IS_ALIGNED(pos, pixel_size));
> +
> + return pos / pixel_size * 4;
> +}
> +
> enum client_tiling {
> CLIENT_TILING_LINEAR,
> CLIENT_TILING_X,
> CLIENT_TILING_Y,
> + CLIENT_TILING_4,
> CLIENT_NUM_TILING_TYPES
> };
>
> @@ -45,6 +107,36 @@ struct tiled_blits {
> u32 height;
> };
>
> +static bool supports_x_tiling(const struct drm_i915_private *i915)
> +{
> + int gen = GRAPHICS_VER(i915);
> +
> + if (gen < 12)
> + return true;
> +
> + if (!HAS_LMEM(i915) || IS_DG1(i915))
> + return false;
> +
> + return true;
> +}
> +
> +static bool fast_blit_ok(const struct blit_buffer *buf)
> +{
> + int gen = GRAPHICS_VER(buf->vma->vm->i915);
> +
> + if (gen < 9)
> + return false;
> +
> + if (gen < 12)
> + return true;
> +
> + /* filter out platforms with unsupported X-tile support in fastblit */
> + if (buf->tiling == CLIENT_TILING_X && !supports_x_tiling(buf->vma->vm->i915))
> + return false;
> +
> + return true;
> +}
> +
> static int prepare_blit(const struct tiled_blits *t,
> struct blit_buffer *dst,
> struct blit_buffer *src,
> @@ -59,51 +151,103 @@ static int prepare_blit(const struct tiled_blits *t,
> if (IS_ERR(cs))
> return PTR_ERR(cs);
>
> - *cs++ = MI_LOAD_REGISTER_IMM(1);
> - *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
> - cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
> - if (src->tiling == CLIENT_TILING_Y)
> - cmd |= BCS_SRC_Y;
> - if (dst->tiling == CLIENT_TILING_Y)
> - cmd |= BCS_DST_Y;
> - *cs++ = cmd;
> -
> - cmd = MI_FLUSH_DW;
> - if (ver >= 8)
> - cmd++;
> - *cs++ = cmd;
> - *cs++ = 0;
> - *cs++ = 0;
> - *cs++ = 0;
> -
> - cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
> - if (ver >= 8)
> - cmd += 2;
> -
> - src_pitch = t->width * 4;
> - if (src->tiling) {
> - cmd |= XY_SRC_COPY_BLT_SRC_TILED;
> - src_pitch /= 4;
> - }
> + if (fast_blit_ok(dst) && fast_blit_ok(src)) {
> + struct intel_gt *gt = t->ce->engine->gt;
> + u32 src_tiles = 0, dst_tiles = 0;
> + u32 src_4t = 0, dst_4t = 0;
> +
> + /* Need to program BLIT_CCTL if it is not done previously
> + * before using XY_FAST_COPY_BLT
> + */
> + *cs++ = MI_LOAD_REGISTER_IMM(1);
> + *cs++ = i915_mmio_reg_offset(BLIT_CCTL(t->ce->engine->mmio_base));
> + *cs++ = (BLIT_CCTL_SRC_MOCS(gt->mocs.uc_index) |
> + BLIT_CCTL_DST_MOCS(gt->mocs.uc_index));
> +
> + src_pitch = t->width; /* in dwords */
> + if (src->tiling == CLIENT_TILING_4) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
> + src_4t = XY_FAST_COPY_BLT_D1_SRC_TILE4;
> + } else if (src->tiling == CLIENT_TILING_Y) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(YMAJOR);
> + } else if (src->tiling == CLIENT_TILING_X) {
> + src_tiles = XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(TILE_X);
> + } else {
> + src_pitch *= 4; /* in bytes */
> + }
>
> - dst_pitch = t->width * 4;
> - if (dst->tiling) {
> - cmd |= XY_SRC_COPY_BLT_DST_TILED;
> - dst_pitch /= 4;
> - }
> + dst_pitch = t->width; /* in dwords */
> + if (dst->tiling == CLIENT_TILING_4) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
> + dst_4t = XY_FAST_COPY_BLT_D1_DST_TILE4;
> + } else if (dst->tiling == CLIENT_TILING_Y) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(YMAJOR);
> + } else if (dst->tiling == CLIENT_TILING_X) {
> + dst_tiles = XY_FAST_COPY_BLT_D0_DST_TILE_MODE(TILE_X);
> + } else {
> + dst_pitch *= 4; /* in bytes */
> + }
>
> - *cs++ = cmd;
> - *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
> - *cs++ = 0;
> - *cs++ = t->height << 16 | t->width;
> - *cs++ = lower_32_bits(dst->vma->node.start);
> - if (use_64b_reloc)
> + *cs++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2) |
> + src_tiles | dst_tiles;
> + *cs++ = src_4t | dst_4t | BLT_DEPTH_32 | dst_pitch;
> + *cs++ = 0;
> + *cs++ = t->height << 16 | t->width;
> + *cs++ = lower_32_bits(dst->vma->node.start);
> *cs++ = upper_32_bits(dst->vma->node.start);
> - *cs++ = 0;
> - *cs++ = src_pitch;
> - *cs++ = lower_32_bits(src->vma->node.start);
> - if (use_64b_reloc)
> + *cs++ = 0;
> + *cs++ = src_pitch;
> + *cs++ = lower_32_bits(src->vma->node.start);
> *cs++ = upper_32_bits(src->vma->node.start);
> + } else {
> + if (ver >= 6) {
> + *cs++ = MI_LOAD_REGISTER_IMM(1);
> + *cs++ = i915_mmio_reg_offset(BCS_SWCTRL);
> + cmd = (BCS_SRC_Y | BCS_DST_Y) << 16;
> + if (src->tiling == CLIENT_TILING_Y)
> + cmd |= BCS_SRC_Y;
> + if (dst->tiling == CLIENT_TILING_Y)
> + cmd |= BCS_DST_Y;
> + *cs++ = cmd;
> +
> + cmd = MI_FLUSH_DW;
> + if (ver >= 8)
> + cmd++;
> + *cs++ = cmd;
> + *cs++ = 0;
> + *cs++ = 0;
> + *cs++ = 0;
> + }
> +
> + cmd = XY_SRC_COPY_BLT_CMD | BLT_WRITE_RGBA | (8 - 2);
> + if (ver >= 8)
> + cmd += 2;
> +
> + src_pitch = t->width * 4;
> + if (src->tiling) {
> + cmd |= XY_SRC_COPY_BLT_SRC_TILED;
> + src_pitch /= 4;
> + }
> +
> + dst_pitch = t->width * 4;
> + if (dst->tiling) {
> + cmd |= XY_SRC_COPY_BLT_DST_TILED;
> + dst_pitch /= 4;
> + }
> +
> + *cs++ = cmd;
> + *cs++ = BLT_DEPTH_32 | BLT_ROP_SRC_COPY | dst_pitch;
> + *cs++ = 0;
> + *cs++ = t->height << 16 | t->width;
> + *cs++ = lower_32_bits(dst->vma->node.start);
> + if (use_64b_reloc)
> + *cs++ = upper_32_bits(dst->vma->node.start);
> + *cs++ = 0;
> + *cs++ = src_pitch;
> + *cs++ = lower_32_bits(src->vma->node.start);
> + if (use_64b_reloc)
> + *cs++ = upper_32_bits(src->vma->node.start);
> + }
>
> *cs++ = MI_BATCH_BUFFER_END;
>
> @@ -181,7 +325,13 @@ static int tiled_blits_create_buffers(struct tiled_blits *t,
>
> t->buffers[i].vma = vma;
> t->buffers[i].tiling =
> - i915_prandom_u32_max_state(CLIENT_TILING_Y + 1, prng);
> + i915_prandom_u32_max_state(CLIENT_NUM_TILING_TYPES, prng);
> +
> + /* Platforms support either TileY or Tile4, not both */
> + if (HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_Y)
> + t->buffers[i].tiling = CLIENT_TILING_4;
> + else if (!HAS_4TILE(i915) && t->buffers[i].tiling == CLIENT_TILING_4)
> + t->buffers[i].tiling = CLIENT_TILING_Y;
> }
>
> return 0;
> @@ -206,7 +356,8 @@ static u64 swizzle_bit(unsigned int bit, u64 offset)
> static u64 tiled_offset(const struct intel_gt *gt,
> u64 v,
> unsigned int stride,
> - enum client_tiling tiling)
> + enum client_tiling tiling,
> + int x_pos, int y_pos)
> {
> unsigned int swizzle;
> u64 x, y;
> @@ -216,7 +367,12 @@ static u64 tiled_offset(const struct intel_gt *gt,
>
> y = div64_u64_rem(v, stride, &x);
>
> - if (tiling == CLIENT_TILING_X) {
> + if (tiling == CLIENT_TILING_4) {
> + v = linear_x_y_to_ftiled_pos(x_pos, y_pos, stride, 32);
> +
> + /* no swizzling for f-tiling */
> + swizzle = I915_BIT_6_SWIZZLE_NONE;
> + } else if (tiling == CLIENT_TILING_X) {
> v = div64_u64_rem(y, 8, &y) * stride * 8;
> v += y * 512;
> v += div64_u64_rem(x, 512, &x) << 12;
> @@ -259,6 +415,7 @@ static const char *repr_tiling(enum client_tiling tiling)
> case CLIENT_TILING_LINEAR: return "linear";
> case CLIENT_TILING_X: return "X";
> case CLIENT_TILING_Y: return "Y";
> + case CLIENT_TILING_4: return "F";
> default: return "unknown";
> }
> }
> @@ -284,7 +441,7 @@ static int verify_buffer(const struct tiled_blits *t,
> } else {
> u64 v = tiled_offset(buf->vma->vm->gt,
> p * 4, t->width * 4,
> - buf->tiling);
> + buf->tiling, x, y);
>
> if (vaddr[v / sizeof(*vaddr)] != buf->start_val + p)
> ret = -EINVAL;
> @@ -504,6 +661,9 @@ static int tiled_blits_bounce(struct tiled_blits *t, struct rnd_state *prng)
> if (err)
> return err;
>
> + /* Simulating GTT eviction of the same buffer / layout */
> + t->buffers[2].tiling = t->buffers[0].tiling;
> +
> /* Reposition so that we overlap the old addresses, and slightly off */
> err = tiled_blit(t,
> &t->buffers[2], t->hole + t->align,
> diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> index 556bca3be804..246ab8f7bf57 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h
> @@ -236,6 +236,28 @@
> #define XY_FAST_COLOR_BLT_DW 16
> #define XY_FAST_COLOR_BLT_MOCS_MASK GENMASK(27, 21)
> #define XY_FAST_COLOR_BLT_MEM_TYPE_SHIFT 31
> +
> +#define XY_FAST_COPY_BLT_D0_SRC_TILING_MASK REG_GENMASK(21, 20)
> +#define XY_FAST_COPY_BLT_D0_DST_TILING_MASK REG_GENMASK(14, 13)
> +#define XY_FAST_COPY_BLT_D0_SRC_TILE_MODE(mode) \
> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_SRC_TILING_MASK, mode)
> +#define XY_FAST_COPY_BLT_D0_DST_TILE_MODE(mode) \
> + REG_FIELD_PREP(XY_FAST_COPY_BLT_D0_DST_TILING_MASK, mode)
> +#define LINEAR 0
> +#define TILE_X 0x1
> +#define XMAJOR 0x1
> +#define YMAJOR 0x2
> +#define TILE_64 0x3
> +#define XY_FAST_COPY_BLT_D1_SRC_TILE4 REG_BIT(31)
> +#define XY_FAST_COPY_BLT_D1_DST_TILE4 REG_BIT(30)
> +#define BLIT_CCTL_SRC_MOCS_MASK REG_GENMASK(6, 0)
> +#define BLIT_CCTL_DST_MOCS_MASK REG_GENMASK(14, 8)
> +/* Note: MOCS value = (index << 1) */
> +#define BLIT_CCTL_SRC_MOCS(idx) \
> + REG_FIELD_PREP(BLIT_CCTL_SRC_MOCS_MASK, (idx) << 1)
> +#define BLIT_CCTL_DST_MOCS(idx) \
> + REG_FIELD_PREP(BLIT_CCTL_DST_MOCS_MASK, (idx) << 1)
> +
> #define SRC_COPY_BLT_CMD (2 << 29 | 0x43 << 22)
> #define GEN9_XY_FAST_COPY_BLT_CMD (2 << 29 | 0x42 << 22)
> #define XY_SRC_COPY_BLT_CMD (2 << 29 | 0x53 << 22)
> --
> 2.35.1
>
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2022-05-24 6:15 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-13 8:47 [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Nirmoy Das
2022-05-13 9:43 ` [Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Enable Tile4 tiling mode (rev3) Patchwork
2022-05-13 11:01 ` [Intel-gfx] ✗ Fi.CI.IGT: failure " Patchwork
2022-05-13 11:11 ` Das, Nirmoy
2022-05-13 18:11 ` [Intel-gfx] [PATCH v3] drm/i915: Enable Tile4 tiling mode Matt Roper
2022-05-16 7:25 ` Das, Nirmoy
2022-05-24 6:15 ` Zbigniew Kempczyński
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