* [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-05-18 18:45 ` Nathan Chancellor
0 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-05-18 18:45 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Nick Desaulniers, Heiko Stuebner, linux-riscv, linux-kernel,
llvm, patches, Nathan Chancellor, Jessica Clarke
After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
builds with LLVM's integrated assembler fail like:
In file included from arch/riscv/kernel/asm-offsets.c:10:
In file included from ./include/linux/mm.h:29:
In file included from ./include/linux/pgtable.h:6:
In file included from ./arch/riscv/include/asm/pgtable.h:114:
./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
ALT_THEAD_PMA(prot_val);
^
./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
: "0"(_val), \
^
This was reported upstream to LLVM where Jessica pointed out a couple of
issues with the existing implementation of ALT_THEAD_PMA:
* t3 is modified but not listed in the clobbers list.
* "+r"(_val) marks _val as both an input and output of the asm but then
"0"(_val) marks _val as an input matching constraint, which does not
make much sense in this situation, as %1 is not actually used in the
asm and matching constraints are designed to be used for different
inputs that need to use the same register.
Drop the matching contraint and shift all the operands by one, as %1 is
unused, and mark t3 as clobbered. This resolves the build error and goes
not cause any problems with GNU as.
Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
Link: https://github.com/ClangBuiltLinux/linux/issues/1641
Link: https://github.com/llvm/llvm-project/issues/55514
Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
---
arch/riscv/include/asm/errata_list.h | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
index 9e2888dbb5b1..416ead0f9a65 100644
--- a/arch/riscv/include/asm/errata_list.h
+++ b/arch/riscv/include/asm/errata_list.h
@@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
"nop\n\t" \
"nop\n\t" \
"nop", \
- "li t3, %2\n\t" \
- "slli t3, t3, %4\n\t" \
+ "li t3, %1\n\t" \
+ "slli t3, t3, %3\n\t" \
"and t3, %0, t3\n\t" \
"bne t3, zero, 2f\n\t" \
- "li t3, %3\n\t" \
- "slli t3, t3, %4\n\t" \
+ "li t3, %2\n\t" \
+ "slli t3, t3, %3\n\t" \
"or %0, %0, t3\n\t" \
"2:", THEAD_VENDOR_ID, \
ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
: "+r"(_val) \
- : "0"(_val), \
- "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
+ : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
"I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
- "I"(ALT_THEAD_PBMT_SHIFT))
+ "I"(ALT_THEAD_PBMT_SHIFT) \
+ : "t3")
#else
#define ALT_THEAD_PMA(_val)
#endif
base-commit: 93c0651617a62a69717299f1464dda798af8bebb
--
2.36.1
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-05-18 18:45 ` Nathan Chancellor
@ 2022-05-18 20:45 ` Nick Desaulniers
-1 siblings, 0 replies; 14+ messages in thread
From: Nick Desaulniers @ 2022-05-18 20:45 UTC (permalink / raw)
To: Nathan Chancellor
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Heiko Stuebner,
linux-riscv, linux-kernel, llvm, patches, Jessica Clarke
On Wed, May 18, 2022 at 11:45 AM Nathan Chancellor <nathan@kernel.org> wrote:
>
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
s/contraint/constraint/
Thanks for the fix!
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> --
> 2.36.1
>
--
Thanks,
~Nick Desaulniers
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-05-18 20:45 ` Nick Desaulniers
0 siblings, 0 replies; 14+ messages in thread
From: Nick Desaulniers @ 2022-05-18 20:45 UTC (permalink / raw)
To: Nathan Chancellor
Cc: Paul Walmsley, Palmer Dabbelt, Albert Ou, Heiko Stuebner,
linux-riscv, linux-kernel, llvm, patches, Jessica Clarke
On Wed, May 18, 2022 at 11:45 AM Nathan Chancellor <nathan@kernel.org> wrote:
>
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
s/contraint/constraint/
Thanks for the fix!
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> --
> 2.36.1
>
--
Thanks,
~Nick Desaulniers
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-05-18 18:45 ` Nathan Chancellor
@ 2022-05-19 7:21 ` Heiko Stübner
-1 siblings, 0 replies; 14+ messages in thread
From: Heiko Stübner @ 2022-05-19 7:21 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Nathan Chancellor
Cc: Nick Desaulniers, linux-riscv, linux-kernel, llvm, patches,
Nathan Chancellor, Jessica Clarke
Am Mittwoch, 18. Mai 2022, 20:45:29 CEST schrieb Nathan Chancellor:
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
I'm not sure anymore why it ended up the original way, but with this change
it definitly looks better
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
On an actual D1-Nezha board also
Tested-by: Heiko Stuebner <heiko@sntech.de>
Thanks for doing that improvement
Heiko
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-05-19 7:21 ` Heiko Stübner
0 siblings, 0 replies; 14+ messages in thread
From: Heiko Stübner @ 2022-05-19 7:21 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou, Nathan Chancellor
Cc: Nick Desaulniers, linux-riscv, linux-kernel, llvm, patches,
Nathan Chancellor, Jessica Clarke
Am Mittwoch, 18. Mai 2022, 20:45:29 CEST schrieb Nathan Chancellor:
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
I'm not sure anymore why it ended up the original way, but with this change
it definitly looks better
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
On an actual D1-Nezha board also
Tested-by: Heiko Stuebner <heiko@sntech.de>
Thanks for doing that improvement
Heiko
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-05-18 18:45 ` Nathan Chancellor
@ 2022-05-26 2:40 ` Nathan Chancellor
-1 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-05-26 2:40 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Nick Desaulniers, Heiko Stuebner, linux-riscv, linux-kernel,
llvm, patches, Jessica Clarke
Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
Our builds on -next have been broken for a week now. Hopefully these can
make the first RISC-V pull request to avoid mainline being broken in the
same fashion.
Cheers,
Nathan
On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> --
> 2.36.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-05-26 2:40 ` Nathan Chancellor
0 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-05-26 2:40 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Nick Desaulniers, Heiko Stuebner, linux-riscv, linux-kernel,
llvm, patches, Jessica Clarke
Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
Our builds on -next have been broken for a week now. Hopefully these can
make the first RISC-V pull request to avoid mainline being broken in the
same fashion.
Cheers,
Nathan
On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> builds with LLVM's integrated assembler fail like:
>
> In file included from arch/riscv/kernel/asm-offsets.c:10:
> In file included from ./include/linux/mm.h:29:
> In file included from ./include/linux/pgtable.h:6:
> In file included from ./arch/riscv/include/asm/pgtable.h:114:
> ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> ALT_THEAD_PMA(prot_val);
> ^
> ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> : "0"(_val), \
> ^
>
> This was reported upstream to LLVM where Jessica pointed out a couple of
> issues with the existing implementation of ALT_THEAD_PMA:
>
> * t3 is modified but not listed in the clobbers list.
>
> * "+r"(_val) marks _val as both an input and output of the asm but then
> "0"(_val) marks _val as an input matching constraint, which does not
> make much sense in this situation, as %1 is not actually used in the
> asm and matching constraints are designed to be used for different
> inputs that need to use the same register.
>
> Drop the matching contraint and shift all the operands by one, as %1 is
> unused, and mark t3 as clobbered. This resolves the build error and goes
> not cause any problems with GNU as.
>
> Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> Link: https://github.com/llvm/llvm-project/issues/55514
> Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> ---
> arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> index 9e2888dbb5b1..416ead0f9a65 100644
> --- a/arch/riscv/include/asm/errata_list.h
> +++ b/arch/riscv/include/asm/errata_list.h
> @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> "nop\n\t" \
> "nop\n\t" \
> "nop", \
> - "li t3, %2\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %1\n\t" \
> + "slli t3, t3, %3\n\t" \
> "and t3, %0, t3\n\t" \
> "bne t3, zero, 2f\n\t" \
> - "li t3, %3\n\t" \
> - "slli t3, t3, %4\n\t" \
> + "li t3, %2\n\t" \
> + "slli t3, t3, %3\n\t" \
> "or %0, %0, t3\n\t" \
> "2:", THEAD_VENDOR_ID, \
> ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> : "+r"(_val) \
> - : "0"(_val), \
> - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> - "I"(ALT_THEAD_PBMT_SHIFT))
> + "I"(ALT_THEAD_PBMT_SHIFT) \
> + : "t3")
> #else
> #define ALT_THEAD_PMA(_val)
> #endif
>
> base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> --
> 2.36.1
>
>
> _______________________________________________
> linux-riscv mailing list
> linux-riscv@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-riscv
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-05-26 2:40 ` Nathan Chancellor
@ 2022-06-13 20:26 ` Nathan Chancellor
-1 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-06-13 20:26 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Nick Desaulniers, Heiko Stuebner, linux-riscv, linux-kernel,
llvm, patches, Jessica Clarke
On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
> Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
>
> Our builds on -next have been broken for a week now. Hopefully these can
> make the first RISC-V pull request to avoid mainline being broken in the
> same fashion.
One more small ping. The patch linked above made it into 5.19-rc1 but
this one has not been applied so our builds are still broken.
Cheers,
Nathan
> On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> > builds with LLVM's integrated assembler fail like:
> >
> > In file included from arch/riscv/kernel/asm-offsets.c:10:
> > In file included from ./include/linux/mm.h:29:
> > In file included from ./include/linux/pgtable.h:6:
> > In file included from ./arch/riscv/include/asm/pgtable.h:114:
> > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> > ALT_THEAD_PMA(prot_val);
> > ^
> > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> > : "0"(_val), \
> > ^
> >
> > This was reported upstream to LLVM where Jessica pointed out a couple of
> > issues with the existing implementation of ALT_THEAD_PMA:
> >
> > * t3 is modified but not listed in the clobbers list.
> >
> > * "+r"(_val) marks _val as both an input and output of the asm but then
> > "0"(_val) marks _val as an input matching constraint, which does not
> > make much sense in this situation, as %1 is not actually used in the
> > asm and matching constraints are designed to be used for different
> > inputs that need to use the same register.
> >
> > Drop the matching contraint and shift all the operands by one, as %1 is
> > unused, and mark t3 as clobbered. This resolves the build error and goes
> > not cause any problems with GNU as.
> >
> > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> > Link: https://github.com/llvm/llvm-project/issues/55514
> > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> > ---
> > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> > index 9e2888dbb5b1..416ead0f9a65 100644
> > --- a/arch/riscv/include/asm/errata_list.h
> > +++ b/arch/riscv/include/asm/errata_list.h
> > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> > "nop\n\t" \
> > "nop\n\t" \
> > "nop", \
> > - "li t3, %2\n\t" \
> > - "slli t3, t3, %4\n\t" \
> > + "li t3, %1\n\t" \
> > + "slli t3, t3, %3\n\t" \
> > "and t3, %0, t3\n\t" \
> > "bne t3, zero, 2f\n\t" \
> > - "li t3, %3\n\t" \
> > - "slli t3, t3, %4\n\t" \
> > + "li t3, %2\n\t" \
> > + "slli t3, t3, %3\n\t" \
> > "or %0, %0, t3\n\t" \
> > "2:", THEAD_VENDOR_ID, \
> > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> > : "+r"(_val) \
> > - : "0"(_val), \
> > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > - "I"(ALT_THEAD_PBMT_SHIFT))
> > + "I"(ALT_THEAD_PBMT_SHIFT) \
> > + : "t3")
> > #else
> > #define ALT_THEAD_PMA(_val)
> > #endif
> >
> > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> > --
> > 2.36.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-06-13 20:26 ` Nathan Chancellor
0 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-06-13 20:26 UTC (permalink / raw)
To: Paul Walmsley, Palmer Dabbelt, Albert Ou
Cc: Nick Desaulniers, Heiko Stuebner, linux-riscv, linux-kernel,
llvm, patches, Jessica Clarke
On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
> Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
>
> Our builds on -next have been broken for a week now. Hopefully these can
> make the first RISC-V pull request to avoid mainline being broken in the
> same fashion.
One more small ping. The patch linked above made it into 5.19-rc1 but
this one has not been applied so our builds are still broken.
Cheers,
Nathan
> On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> > builds with LLVM's integrated assembler fail like:
> >
> > In file included from arch/riscv/kernel/asm-offsets.c:10:
> > In file included from ./include/linux/mm.h:29:
> > In file included from ./include/linux/pgtable.h:6:
> > In file included from ./arch/riscv/include/asm/pgtable.h:114:
> > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> > ALT_THEAD_PMA(prot_val);
> > ^
> > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> > : "0"(_val), \
> > ^
> >
> > This was reported upstream to LLVM where Jessica pointed out a couple of
> > issues with the existing implementation of ALT_THEAD_PMA:
> >
> > * t3 is modified but not listed in the clobbers list.
> >
> > * "+r"(_val) marks _val as both an input and output of the asm but then
> > "0"(_val) marks _val as an input matching constraint, which does not
> > make much sense in this situation, as %1 is not actually used in the
> > asm and matching constraints are designed to be used for different
> > inputs that need to use the same register.
> >
> > Drop the matching contraint and shift all the operands by one, as %1 is
> > unused, and mark t3 as clobbered. This resolves the build error and goes
> > not cause any problems with GNU as.
> >
> > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> > Link: https://github.com/llvm/llvm-project/issues/55514
> > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> > ---
> > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> > 1 file changed, 7 insertions(+), 7 deletions(-)
> >
> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> > index 9e2888dbb5b1..416ead0f9a65 100644
> > --- a/arch/riscv/include/asm/errata_list.h
> > +++ b/arch/riscv/include/asm/errata_list.h
> > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> > "nop\n\t" \
> > "nop\n\t" \
> > "nop", \
> > - "li t3, %2\n\t" \
> > - "slli t3, t3, %4\n\t" \
> > + "li t3, %1\n\t" \
> > + "slli t3, t3, %3\n\t" \
> > "and t3, %0, t3\n\t" \
> > "bne t3, zero, 2f\n\t" \
> > - "li t3, %3\n\t" \
> > - "slli t3, t3, %4\n\t" \
> > + "li t3, %2\n\t" \
> > + "slli t3, t3, %3\n\t" \
> > "or %0, %0, t3\n\t" \
> > "2:", THEAD_VENDOR_ID, \
> > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> > : "+r"(_val) \
> > - : "0"(_val), \
> > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > - "I"(ALT_THEAD_PBMT_SHIFT))
> > + "I"(ALT_THEAD_PBMT_SHIFT) \
> > + : "t3")
> > #else
> > #define ALT_THEAD_PMA(_val)
> > #endif
> >
> > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> > --
> > 2.36.1
> >
> >
> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-06-13 20:26 ` Nathan Chancellor
@ 2022-06-17 21:54 ` Palmer Dabbelt
-1 siblings, 0 replies; 14+ messages in thread
From: Palmer Dabbelt @ 2022-06-17 21:54 UTC (permalink / raw)
To: nathan
Cc: Paul Walmsley, aou, ndesaulniers, heiko, linux-riscv,
linux-kernel, llvm, patches, jrtc27
On Mon, 13 Jun 2022 13:26:17 PDT (-0700), nathan@kernel.org wrote:
> On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
>> Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
>>
>> Our builds on -next have been broken for a week now. Hopefully these can
>> make the first RISC-V pull request to avoid mainline being broken in the
>> same fashion.
>
> One more small ping. The patch linked above made it into 5.19-rc1 but
> this one has not been applied so our builds are still broken.
Sorry I dropped the ball on this one, it's in fixes. Thanks!
> Cheers,
> Nathan
>
>> On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
>> > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
>> > builds with LLVM's integrated assembler fail like:
>> >
>> > In file included from arch/riscv/kernel/asm-offsets.c:10:
>> > In file included from ./include/linux/mm.h:29:
>> > In file included from ./include/linux/pgtable.h:6:
>> > In file included from ./arch/riscv/include/asm/pgtable.h:114:
>> > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
>> > ALT_THEAD_PMA(prot_val);
>> > ^
>> > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
>> > : "0"(_val), \
>> > ^
>> >
>> > This was reported upstream to LLVM where Jessica pointed out a couple of
>> > issues with the existing implementation of ALT_THEAD_PMA:
>> >
>> > * t3 is modified but not listed in the clobbers list.
>> >
>> > * "+r"(_val) marks _val as both an input and output of the asm but then
>> > "0"(_val) marks _val as an input matching constraint, which does not
>> > make much sense in this situation, as %1 is not actually used in the
>> > asm and matching constraints are designed to be used for different
>> > inputs that need to use the same register.
>> >
>> > Drop the matching contraint and shift all the operands by one, as %1 is
>> > unused, and mark t3 as clobbered. This resolves the build error and goes
>> > not cause any problems with GNU as.
>> >
>> > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
>> > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
>> > Link: https://github.com/llvm/llvm-project/issues/55514
>> > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
>> > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
>> > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
>> > ---
>> > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
>> > 1 file changed, 7 insertions(+), 7 deletions(-)
>> >
>> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
>> > index 9e2888dbb5b1..416ead0f9a65 100644
>> > --- a/arch/riscv/include/asm/errata_list.h
>> > +++ b/arch/riscv/include/asm/errata_list.h
>> > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
>> > "nop\n\t" \
>> > "nop\n\t" \
>> > "nop", \
>> > - "li t3, %2\n\t" \
>> > - "slli t3, t3, %4\n\t" \
>> > + "li t3, %1\n\t" \
>> > + "slli t3, t3, %3\n\t" \
>> > "and t3, %0, t3\n\t" \
>> > "bne t3, zero, 2f\n\t" \
>> > - "li t3, %3\n\t" \
>> > - "slli t3, t3, %4\n\t" \
>> > + "li t3, %2\n\t" \
>> > + "slli t3, t3, %3\n\t" \
>> > "or %0, %0, t3\n\t" \
>> > "2:", THEAD_VENDOR_ID, \
>> > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
>> > : "+r"(_val) \
>> > - : "0"(_val), \
>> > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > - "I"(ALT_THEAD_PBMT_SHIFT))
>> > + "I"(ALT_THEAD_PBMT_SHIFT) \
>> > + : "t3")
>> > #else
>> > #define ALT_THEAD_PMA(_val)
>> > #endif
>> >
>> > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
>> > --
>> > 2.36.1
>> >
>> >
>> > _______________________________________________
>> > linux-riscv mailing list
>> > linux-riscv@lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-06-17 21:54 ` Palmer Dabbelt
0 siblings, 0 replies; 14+ messages in thread
From: Palmer Dabbelt @ 2022-06-17 21:54 UTC (permalink / raw)
To: nathan
Cc: Paul Walmsley, aou, ndesaulniers, heiko, linux-riscv,
linux-kernel, llvm, patches, jrtc27
On Mon, 13 Jun 2022 13:26:17 PDT (-0700), nathan@kernel.org wrote:
> On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
>> Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
>>
>> Our builds on -next have been broken for a week now. Hopefully these can
>> make the first RISC-V pull request to avoid mainline being broken in the
>> same fashion.
>
> One more small ping. The patch linked above made it into 5.19-rc1 but
> this one has not been applied so our builds are still broken.
Sorry I dropped the ball on this one, it's in fixes. Thanks!
> Cheers,
> Nathan
>
>> On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
>> > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
>> > builds with LLVM's integrated assembler fail like:
>> >
>> > In file included from arch/riscv/kernel/asm-offsets.c:10:
>> > In file included from ./include/linux/mm.h:29:
>> > In file included from ./include/linux/pgtable.h:6:
>> > In file included from ./arch/riscv/include/asm/pgtable.h:114:
>> > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
>> > ALT_THEAD_PMA(prot_val);
>> > ^
>> > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
>> > : "0"(_val), \
>> > ^
>> >
>> > This was reported upstream to LLVM where Jessica pointed out a couple of
>> > issues with the existing implementation of ALT_THEAD_PMA:
>> >
>> > * t3 is modified but not listed in the clobbers list.
>> >
>> > * "+r"(_val) marks _val as both an input and output of the asm but then
>> > "0"(_val) marks _val as an input matching constraint, which does not
>> > make much sense in this situation, as %1 is not actually used in the
>> > asm and matching constraints are designed to be used for different
>> > inputs that need to use the same register.
>> >
>> > Drop the matching contraint and shift all the operands by one, as %1 is
>> > unused, and mark t3 as clobbered. This resolves the build error and goes
>> > not cause any problems with GNU as.
>> >
>> > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
>> > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
>> > Link: https://github.com/llvm/llvm-project/issues/55514
>> > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
>> > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
>> > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
>> > ---
>> > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
>> > 1 file changed, 7 insertions(+), 7 deletions(-)
>> >
>> > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
>> > index 9e2888dbb5b1..416ead0f9a65 100644
>> > --- a/arch/riscv/include/asm/errata_list.h
>> > +++ b/arch/riscv/include/asm/errata_list.h
>> > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
>> > "nop\n\t" \
>> > "nop\n\t" \
>> > "nop", \
>> > - "li t3, %2\n\t" \
>> > - "slli t3, t3, %4\n\t" \
>> > + "li t3, %1\n\t" \
>> > + "slli t3, t3, %3\n\t" \
>> > "and t3, %0, t3\n\t" \
>> > "bne t3, zero, 2f\n\t" \
>> > - "li t3, %3\n\t" \
>> > - "slli t3, t3, %4\n\t" \
>> > + "li t3, %2\n\t" \
>> > + "slli t3, t3, %3\n\t" \
>> > "or %0, %0, t3\n\t" \
>> > "2:", THEAD_VENDOR_ID, \
>> > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
>> > : "+r"(_val) \
>> > - : "0"(_val), \
>> > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
>> > - "I"(ALT_THEAD_PBMT_SHIFT))
>> > + "I"(ALT_THEAD_PBMT_SHIFT) \
>> > + : "t3")
>> > #else
>> > #define ALT_THEAD_PMA(_val)
>> > #endif
>> >
>> > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
>> > --
>> > 2.36.1
>> >
>> >
>> > _______________________________________________
>> > linux-riscv mailing list
>> > linux-riscv@lists.infradead.org
>> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>>
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
2022-06-17 21:54 ` Palmer Dabbelt
@ 2022-06-17 21:57 ` Nathan Chancellor
-1 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-06-17 21:57 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, aou, ndesaulniers, heiko, linux-riscv,
linux-kernel, llvm, patches, jrtc27
On Fri, Jun 17, 2022 at 02:54:37PM -0700, Palmer Dabbelt wrote:
> On Mon, 13 Jun 2022 13:26:17 PDT (-0700), nathan@kernel.org wrote:
> > On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
> > > Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
> > >
> > > Our builds on -next have been broken for a week now. Hopefully these can
> > > make the first RISC-V pull request to avoid mainline being broken in the
> > > same fashion.
> >
> > One more small ping. The patch linked above made it into 5.19-rc1 but
> > this one has not been applied so our builds are still broken.
>
> Sorry I dropped the ball on this one, it's in fixes. Thanks!
Better late than never :) thanks a lot!
Cheers,
Nathan
> > > On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> > > > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> > > > builds with LLVM's integrated assembler fail like:
> > > >
> > > > In file included from arch/riscv/kernel/asm-offsets.c:10:
> > > > In file included from ./include/linux/mm.h:29:
> > > > In file included from ./include/linux/pgtable.h:6:
> > > > In file included from ./arch/riscv/include/asm/pgtable.h:114:
> > > > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> > > > ALT_THEAD_PMA(prot_val);
> > > > ^
> > > > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> > > > : "0"(_val), \
> > > > ^
> > > >
> > > > This was reported upstream to LLVM where Jessica pointed out a couple of
> > > > issues with the existing implementation of ALT_THEAD_PMA:
> > > >
> > > > * t3 is modified but not listed in the clobbers list.
> > > >
> > > > * "+r"(_val) marks _val as both an input and output of the asm but then
> > > > "0"(_val) marks _val as an input matching constraint, which does not
> > > > make much sense in this situation, as %1 is not actually used in the
> > > > asm and matching constraints are designed to be used for different
> > > > inputs that need to use the same register.
> > > >
> > > > Drop the matching contraint and shift all the operands by one, as %1 is
> > > > unused, and mark t3 as clobbered. This resolves the build error and goes
> > > > not cause any problems with GNU as.
> > > >
> > > > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> > > > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> > > > Link: https://github.com/llvm/llvm-project/issues/55514
> > > > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> > > > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> > > > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> > > > ---
> > > > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> > > > 1 file changed, 7 insertions(+), 7 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> > > > index 9e2888dbb5b1..416ead0f9a65 100644
> > > > --- a/arch/riscv/include/asm/errata_list.h
> > > > +++ b/arch/riscv/include/asm/errata_list.h
> > > > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> > > > "nop\n\t" \
> > > > "nop\n\t" \
> > > > "nop", \
> > > > - "li t3, %2\n\t" \
> > > > - "slli t3, t3, %4\n\t" \
> > > > + "li t3, %1\n\t" \
> > > > + "slli t3, t3, %3\n\t" \
> > > > "and t3, %0, t3\n\t" \
> > > > "bne t3, zero, 2f\n\t" \
> > > > - "li t3, %3\n\t" \
> > > > - "slli t3, t3, %4\n\t" \
> > > > + "li t3, %2\n\t" \
> > > > + "slli t3, t3, %3\n\t" \
> > > > "or %0, %0, t3\n\t" \
> > > > "2:", THEAD_VENDOR_ID, \
> > > > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> > > > : "+r"(_val) \
> > > > - : "0"(_val), \
> > > > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > - "I"(ALT_THEAD_PBMT_SHIFT))
> > > > + "I"(ALT_THEAD_PBMT_SHIFT) \
> > > > + : "t3")
> > > > #else
> > > > #define ALT_THEAD_PMA(_val)
> > > > #endif
> > > >
> > > > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> > > > --
> > > > 2.36.1
> > > >
> > > >
> > > > _______________________________________________
> > > > linux-riscv mailing list
> > > > linux-riscv@lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/linux-riscv
> > >
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH] riscv: Fix ALT_THEAD_PMA's asm parameters
@ 2022-06-17 21:57 ` Nathan Chancellor
0 siblings, 0 replies; 14+ messages in thread
From: Nathan Chancellor @ 2022-06-17 21:57 UTC (permalink / raw)
To: Palmer Dabbelt
Cc: Paul Walmsley, aou, ndesaulniers, heiko, linux-riscv,
linux-kernel, llvm, patches, jrtc27
On Fri, Jun 17, 2022 at 02:54:37PM -0700, Palmer Dabbelt wrote:
> On Mon, 13 Jun 2022 13:26:17 PDT (-0700), nathan@kernel.org wrote:
> > On Wed, May 25, 2022 at 07:40:37PM -0700, Nathan Chancellor wrote:
> > > Small ping on this and https://lore.kernel.org/20220516214520.3252074-1-nathan@kernel.org/.
> > >
> > > Our builds on -next have been broken for a week now. Hopefully these can
> > > make the first RISC-V pull request to avoid mainline being broken in the
> > > same fashion.
> >
> > One more small ping. The patch linked above made it into 5.19-rc1 but
> > this one has not been applied so our builds are still broken.
>
> Sorry I dropped the ball on this one, it's in fixes. Thanks!
Better late than never :) thanks a lot!
Cheers,
Nathan
> > > On Wed, May 18, 2022 at 11:45:29AM -0700, Nathan Chancellor wrote:
> > > > After commit a35707c3d850 ("riscv: add memory-type errata for T-Head"),
> > > > builds with LLVM's integrated assembler fail like:
> > > >
> > > > In file included from arch/riscv/kernel/asm-offsets.c:10:
> > > > In file included from ./include/linux/mm.h:29:
> > > > In file included from ./include/linux/pgtable.h:6:
> > > > In file included from ./arch/riscv/include/asm/pgtable.h:114:
> > > > ./arch/riscv/include/asm/pgtable-64.h:210:2: error: invalid input constraint '0' in asm
> > > > ALT_THEAD_PMA(prot_val);
> > > > ^
> > > > ./arch/riscv/include/asm/errata_list.h:88:4: note: expanded from macro 'ALT_THEAD_PMA'
> > > > : "0"(_val), \
> > > > ^
> > > >
> > > > This was reported upstream to LLVM where Jessica pointed out a couple of
> > > > issues with the existing implementation of ALT_THEAD_PMA:
> > > >
> > > > * t3 is modified but not listed in the clobbers list.
> > > >
> > > > * "+r"(_val) marks _val as both an input and output of the asm but then
> > > > "0"(_val) marks _val as an input matching constraint, which does not
> > > > make much sense in this situation, as %1 is not actually used in the
> > > > asm and matching constraints are designed to be used for different
> > > > inputs that need to use the same register.
> > > >
> > > > Drop the matching contraint and shift all the operands by one, as %1 is
> > > > unused, and mark t3 as clobbered. This resolves the build error and goes
> > > > not cause any problems with GNU as.
> > > >
> > > > Fixes: a35707c3d850 ("riscv: add memory-type errata for T-Head")
> > > > Link: https://github.com/ClangBuiltLinux/linux/issues/1641
> > > > Link: https://github.com/llvm/llvm-project/issues/55514
> > > > Link: https://gcc.gnu.org/onlinedocs/gcc/Simple-Constraints.html
> > > > Suggested-by: Jessica Clarke <jrtc27@jrtc27.com>
> > > > Signed-off-by: Nathan Chancellor <nathan@kernel.org>
> > > > ---
> > > > arch/riscv/include/asm/errata_list.h | 14 +++++++-------
> > > > 1 file changed, 7 insertions(+), 7 deletions(-)
> > > >
> > > > diff --git a/arch/riscv/include/asm/errata_list.h b/arch/riscv/include/asm/errata_list.h
> > > > index 9e2888dbb5b1..416ead0f9a65 100644
> > > > --- a/arch/riscv/include/asm/errata_list.h
> > > > +++ b/arch/riscv/include/asm/errata_list.h
> > > > @@ -75,20 +75,20 @@ asm volatile(ALTERNATIVE( \
> > > > "nop\n\t" \
> > > > "nop\n\t" \
> > > > "nop", \
> > > > - "li t3, %2\n\t" \
> > > > - "slli t3, t3, %4\n\t" \
> > > > + "li t3, %1\n\t" \
> > > > + "slli t3, t3, %3\n\t" \
> > > > "and t3, %0, t3\n\t" \
> > > > "bne t3, zero, 2f\n\t" \
> > > > - "li t3, %3\n\t" \
> > > > - "slli t3, t3, %4\n\t" \
> > > > + "li t3, %2\n\t" \
> > > > + "slli t3, t3, %3\n\t" \
> > > > "or %0, %0, t3\n\t" \
> > > > "2:", THEAD_VENDOR_ID, \
> > > > ERRATA_THEAD_PBMT, CONFIG_ERRATA_THEAD_PBMT) \
> > > > : "+r"(_val) \
> > > > - : "0"(_val), \
> > > > - "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > + : "I"(_PAGE_MTMASK_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > "I"(_PAGE_PMA_THEAD >> ALT_THEAD_PBMT_SHIFT), \
> > > > - "I"(ALT_THEAD_PBMT_SHIFT))
> > > > + "I"(ALT_THEAD_PBMT_SHIFT) \
> > > > + : "t3")
> > > > #else
> > > > #define ALT_THEAD_PMA(_val)
> > > > #endif
> > > >
> > > > base-commit: 93c0651617a62a69717299f1464dda798af8bebb
> > > > --
> > > > 2.36.1
> > > >
> > > >
> > > > _______________________________________________
> > > > linux-riscv mailing list
> > > > linux-riscv@lists.infradead.org
> > > > http://lists.infradead.org/mailman/listinfo/linux-riscv
> > >
_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv
^ permalink raw reply [flat|nested] 14+ messages in thread