From: Vinicius Costa Gomes <vinicius.gomes@intel.com> To: netdev@vger.kernel.org Cc: Vinicius Costa Gomes <vinicius.gomes@intel.com>, jhs@mojatatu.com, xiyou.wangcong@gmail.com, jiri@resnulli.us, davem@davemloft.net, vladimir.oltean@nxp.com, po.liu@nxp.com, boon.leong.ong@intel.com, intel-wired-lan@lists.osuosl.org Subject: [PATCH net-next v5 04/11] igc: Set the RX packet buffer size for TSN mode Date: Thu, 19 May 2022 18:15:31 -0700 [thread overview] Message-ID: <20220520011538.1098888-5-vinicius.gomes@intel.com> (raw) In-Reply-To: <20220520011538.1098888-1-vinicius.gomes@intel.com> In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 ++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 5c66b97c0cfa..f609b2dbbc28 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -396,6 +396,8 @@ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ #define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +#define IGC_RXPBSIZE_TSN 0x0000f08f /* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 270a08196f49..40a730f8b3f3 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -54,12 +54,17 @@ static unsigned int igc_tsn_new_flags(struct igc_adapter *adapter) static int igc_tsn_disable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV); @@ -83,7 +88,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -94,6 +99,10 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; wr32(IGC_TQAVCTRL, tqavctrl); -- 2.35.3
WARNING: multiple messages have this Message-ID (diff)
From: Vinicius Costa Gomes <vinicius.gomes@intel.com> To: intel-wired-lan@osuosl.org Subject: [Intel-wired-lan] [PATCH net-next v5 04/11] igc: Set the RX packet buffer size for TSN mode Date: Thu, 19 May 2022 18:15:31 -0700 [thread overview] Message-ID: <20220520011538.1098888-5-vinicius.gomes@intel.com> (raw) In-Reply-To: <20220520011538.1098888-1-vinicius.gomes@intel.com> In preparation for supporting frame preemption, when entering TSN mode set the receive packet buffer to 16KB for the Express MAC, 16KB for the Preemptible MAC and 2KB for the BMC, according to the datasheet section 7.1.3.2. Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com> --- drivers/net/ethernet/intel/igc/igc_defines.h | 2 ++ drivers/net/ethernet/intel/igc/igc_tsn.c | 13 +++++++++++-- 2 files changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index 5c66b97c0cfa..f609b2dbbc28 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -396,6 +396,8 @@ #define IGC_RXPBS_CFG_TS_EN 0x80000000 /* Timestamp in Rx buffer */ #define IGC_TXPBSIZE_TSN 0x04145145 /* 5k bytes buffer for each queue */ +#define IGC_RXPBSIZE_TSN 0x0000f08f /* 15KB for EXP + 15KB for BE + 2KB for BMC */ +#define IGC_RXPBSIZE_SIZE_MASK 0x0001FFFF #define IGC_DTXMXPKTSZ_TSN 0x19 /* 1600 bytes of max TX DMA packet size */ #define IGC_DTXMXPKTSZ_DEFAULT 0x98 /* 9728-byte Jumbo frames */ diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 270a08196f49..40a730f8b3f3 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -54,12 +54,17 @@ static unsigned int igc_tsn_new_flags(struct igc_adapter *adapter) static int igc_tsn_disable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; - u32 tqavctrl; + u32 tqavctrl, rxpbs; int i; wr32(IGC_TXPBS, I225_TXPBSIZE_DEFAULT); wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_DEFAULT); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= I225_RXPBSIZE_DEFAULT; + + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl &= ~(IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV); @@ -83,7 +88,7 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) { struct igc_hw *hw = &adapter->hw; u32 tqavctrl, baset_l, baset_h; - u32 sec, nsec, cycle; + u32 sec, nsec, cycle, rxpbs; ktime_t base_time, systim; int i; @@ -94,6 +99,10 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) wr32(IGC_DTXMXPKTSZ, IGC_DTXMXPKTSZ_TSN); wr32(IGC_TXPBS, IGC_TXPBSIZE_TSN); + rxpbs = rd32(IGC_RXPBS) & ~IGC_RXPBSIZE_SIZE_MASK; + rxpbs |= IGC_RXPBSIZE_TSN; + wr32(IGC_RXPBS, rxpbs); + tqavctrl = rd32(IGC_TQAVCTRL); tqavctrl |= IGC_TQAVCTRL_TRANSMIT_MODE_TSN | IGC_TQAVCTRL_ENHANCED_QAV; wr32(IGC_TQAVCTRL, tqavctrl); -- 2.35.3
next prev parent reply other threads:[~2022-05-20 1:16 UTC|newest] Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-20 1:15 [PATCH net-next v5 00/11] ethtool: Add support for frame preemption Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 1:15 ` [PATCH net-next v5 01/11] ethtool: Add support for configuring " Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 9:06 ` Vladimir Oltean 2022-05-20 9:06 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 02/11] ethtool: Add support for Frame Preemption verification Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 9:16 ` Vladimir Oltean 2022-05-20 9:16 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 03/11] igc: Add support for receiving frames with all zeroes address Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 1:15 ` Vinicius Costa Gomes [this message] 2022-05-20 1:15 ` [Intel-wired-lan] [PATCH net-next v5 04/11] igc: Set the RX packet buffer size for TSN mode Vinicius Costa Gomes 2022-05-20 1:15 ` [PATCH net-next v5 05/11] igc: Optimze TX buffer sizes for TSN Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 9:33 ` Vladimir Oltean 2022-05-20 9:33 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 06/11] igc: Add support for receiving errored frames Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 9:19 ` Vladimir Oltean 2022-05-20 9:19 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 07/11] igc: Add support for enabling frame preemption via ethtool Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 1:15 ` [PATCH net-next v5 08/11] igc: Add support for setting frame preemption configuration Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 9:22 ` Vladimir Oltean 2022-05-20 9:22 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 09/11] igc: Add support for Frame Preemption verification Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 10:43 ` Vladimir Oltean 2022-05-20 10:43 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-27 9:08 ` Zhou Furong 2022-05-27 9:08 ` [Intel-wired-lan] " Zhou Furong 2022-05-20 1:15 ` [PATCH net-next v5 10/11] igc: Check incompatible configs for Frame Preemption Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 6:11 ` kernel test robot 2022-05-20 6:11 ` [Intel-wired-lan] " kernel test robot 2022-05-20 11:06 ` Vladimir Oltean 2022-05-20 11:06 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 1:15 ` [PATCH net-next v5 11/11] igc: Add support for exposing frame preemption stats registers Vinicius Costa Gomes 2022-05-20 1:15 ` [Intel-wired-lan] " Vinicius Costa Gomes 2022-05-20 12:13 ` Vladimir Oltean 2022-05-20 12:13 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-20 22:34 ` [PATCH net-next v5 00/11] ethtool: Add support for frame preemption Jakub Kicinski 2022-05-20 22:34 ` [Intel-wired-lan] " Jakub Kicinski 2022-05-21 15:03 ` Vladimir Oltean 2022-05-21 15:03 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-23 19:52 ` Jakub Kicinski 2022-05-23 19:52 ` [Intel-wired-lan] " Jakub Kicinski 2022-05-23 20:32 ` Vladimir Oltean 2022-05-23 20:32 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-23 21:31 ` Jakub Kicinski 2022-05-23 21:31 ` [Intel-wired-lan] " Jakub Kicinski 2022-05-23 22:49 ` Vladimir Oltean 2022-05-23 22:49 ` [Intel-wired-lan] " Vladimir Oltean 2022-05-23 23:33 ` Vladimir Oltean 2022-05-23 23:33 ` [Intel-wired-lan] " Vladimir Oltean
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