All of lore.kernel.org
 help / color / mirror / Atom feed
From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Andy Gross <agross@kernel.org>,
	Bjorn Andersson <bjorn.andersson@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzk@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
	Marijn Suijten <marijn.suijten@somainline.org>
Subject: [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support
Date: Sat, 21 May 2022 18:20:44 +0300	[thread overview]
Message-ID: <20220521152049.1490220-7-dmitry.baryshkov@linaro.org> (raw)
In-Reply-To: <20220521152049.1490220-1-dmitry.baryshkov@linaro.org>

Add DT entries for the second DWC3 USB host, which is limited to the
USB2.0 (HighSpeed), and the corresponding QUSB PHY.

Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
 arch/arm64/boot/dts/qcom/sdm630.dtsi | 55 ++++++++++++++++++++++++++++
 1 file changed, 55 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index eb8504e5735c..2b5dbc12bdf8 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -1270,6 +1270,20 @@ qusb2phy0: phy@c012000 {
 			status = "disabled";
 		};
 
+		qusb2phy1: phy@c014000 {
+			compatible = "qcom,sdm660-qusb2-phy";
+			reg = <0x0c014000 0x180>;
+			#phy-cells = <0>;
+
+			clocks = <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>,
+				 <&gcc GCC_RX1_USB2_CLKREF_CLK>;
+			clock-names = "cfg_ahb", "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_SEC_BCR>;
+			nvmem-cells = <&qusb2_hstx_trim>;
+			status = "disabled";
+		};
+
 		sdhc_2: sdhci@c084000 {
 			compatible = "qcom,sdm630-sdhci", "qcom,sdhci-msm-v5";
 			reg = <0x0c084000 0x1000>;
@@ -1375,6 +1389,47 @@ opp-384000000 {
 			};
 		};
 
+		usb2: usb@c2f8800 {
+			compatible = "qcom,sdm660-dwc3", "qcom,dwc3";
+			reg = <0x0c2f8800 0x400>;
+			status = "disabled";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB2_AXI_CLK>,
+				 <&gcc GCC_USB20_MASTER_CLK>,
+				 <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+				 <&gcc GCC_USB20_SLEEP_CLK>;
+			clock-names = "cfg_noc", "core",
+				      "mock_utmi", "sleep";
+
+			assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB20_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <60000000>;
+
+			interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-names = "hs_phy_irq";
+
+			qcom,select-utmi-as-pipe-clk;
+
+			resets = <&gcc GCC_USB_20_BCR>;
+
+			usb2_dwc3: usb@c200000 {
+				compatible = "snps,dwc3";
+				reg = <0x0c200000 0xc8d0>;
+				interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+				snps,dis_u2_susphy_quirk;
+				snps,dis_enblslpm_quirk;
+
+				/* This is the HS-only host */
+				maximum-speed = "high-speed";
+				phys = <&qusb2phy1>;
+				phy-names = "usb2-phy";
+				snps,hird-threshold = /bits/ 8 <0>;
+			};
+		};
+
 		mmcc: clock-controller@c8c0000 {
 			compatible = "qcom,mmcc-sdm630";
 			reg = <0x0c8c0000 0x40000>;
-- 
2.35.1


  parent reply	other threads:[~2022-05-21 15:21 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-21 15:20 [PATCH v6 00/11] arm64: dts: qcom: initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 01/11] arm64: dts: qcom: sdm630: disable dsi0/dsi0_phy by default Dmitry Baryshkov
2022-05-21 16:06   ` Marijn Suijten
2022-05-21 16:49     ` Krzysztof Kozlowski
2022-05-21 18:19       ` Marijn Suijten
2022-05-21 20:13     ` Dmitry Baryshkov
2022-05-21 22:15       ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 02/11] arm64: dts: qcom: sdm660: disable dsi1/dsi1_phy " Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 03/11] arm64: dts: qcom: sdm630: disable GPU " Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 04/11] arm64: dts: qcom: sdm630: fix the qusb2phy ref clock Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 05/11] arm64: dts: qcom: sdm630: rename qusb2phy to qusb2phy0 Dmitry Baryshkov
2022-05-21 16:07   ` Marijn Suijten
2022-05-21 15:20 ` Dmitry Baryshkov [this message]
2022-05-21 15:20 ` [PATCH v6 07/11] arm64: dts: qcom: sdm630: fix gpu's interconnect path Dmitry Baryshkov
2022-05-21 16:17   ` Marijn Suijten
2022-05-21 16:51     ` Krzysztof Kozlowski
2022-05-21 18:27       ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 08/11] arm64: dts: qcom: sdm636-sony-xperia-ganges-mermaid: correct sdc2 pinconf Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 09/11] arm64: dts: qcom: sdm660: move SDHC2 card detect pinconf to board files Dmitry Baryshkov
2022-05-21 16:19   ` Marijn Suijten
2022-05-21 15:20 ` [PATCH v6 10/11] arm64: dts: qcom: sdm660: Add initial Inforce IFC6560 board support Dmitry Baryshkov
2022-05-21 15:20 ` [PATCH v6 11/11] dt-bindings: arm: qcom: document sda660 SoC and ifc6560 board Dmitry Baryshkov
2022-05-21 16:20   ` Marijn Suijten
2022-05-21 16:30     ` Krzysztof Kozlowski
2022-05-21 16:37   ` Krzysztof Kozlowski

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220521152049.1490220-7-dmitry.baryshkov@linaro.org \
    --to=dmitry.baryshkov@linaro.org \
    --cc=agross@kernel.org \
    --cc=bjorn.andersson@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=krzk@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=marijn.suijten@somainline.org \
    --cc=robh+dt@kernel.org \
    --subject='Re: [PATCH v6 06/11] arm64: dts: qcom: sdm630: add second (HS) USB host support' \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.