* PCI: keystone: ks_pcie_v3_65_add_bus()
@ 2022-05-24 20:15 Bjorn Helgaas
2022-05-24 20:54 ` Rob Herring
0 siblings, 1 reply; 2+ messages in thread
From: Bjorn Helgaas @ 2022-05-24 20:15 UTC (permalink / raw)
To: Kishon Vijay Abraham I; +Cc: Jyri Sarha, Tomi Valkeinen, Rob Herring, linux-pci
Not sure whether anybody cares about the keystone driver any more. It
seems basically unmaintained after 57e1d8206e48 ("MAINTAINERS: move
Murali Karicheri to credits") [1].
Anyway, ks_pcie_v3_65_add_bus() [2] looks unusual to me. It's an
.add_bus() method that is called whenever we create a new PCI bus:
ks_pcie_v3_65_add_bus(...)
{
ks_pcie_set_dbi_mode
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 1)
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1)
ks_pcie_clear_dbi_mode(ks_pcie)
dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start)
}
This seems like something that should be done when the Root Port is
enumerated, not when we set up its secondary bus. Maybe somewhere in
ks_pcie_host_init() or ks_pcie_config_msi_irq()?
I don't think we should use .add_bus() unless it's actually something
related to adding a bus.
[1] https://git.kernel.org/linus/57e1d8206e48
[2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/pci/controller/dwc/pci-keystone.c?id=v5.18#n452
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: PCI: keystone: ks_pcie_v3_65_add_bus()
2022-05-24 20:15 PCI: keystone: ks_pcie_v3_65_add_bus() Bjorn Helgaas
@ 2022-05-24 20:54 ` Rob Herring
0 siblings, 0 replies; 2+ messages in thread
From: Rob Herring @ 2022-05-24 20:54 UTC (permalink / raw)
To: Bjorn Helgaas; +Cc: Kishon Vijay Abraham I, Jyri Sarha, Tomi Valkeinen, PCI
On Tue, May 24, 2022 at 3:15 PM Bjorn Helgaas <helgaas@kernel.org> wrote:
>
> Not sure whether anybody cares about the keystone driver any more. It
> seems basically unmaintained after 57e1d8206e48 ("MAINTAINERS: move
> Murali Karicheri to credits") [1].
>
> Anyway, ks_pcie_v3_65_add_bus() [2] looks unusual to me. It's an
> .add_bus() method that is called whenever we create a new PCI bus:
>
> ks_pcie_v3_65_add_bus(...)
> {
> ks_pcie_set_dbi_mode
> dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, 1)
> dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, SZ_4K - 1)
> ks_pcie_clear_dbi_mode(ks_pcie)
> dw_pcie_writel_dbi(pci, PCI_BASE_ADDRESS_0, ks_pcie->app.start)
> }
>
> This seems like something that should be done when the Root Port is
> enumerated, not when we set up its secondary bus. Maybe somewhere in
> ks_pcie_host_init() or ks_pcie_config_msi_irq()?
See these commits for the reasoning:
1df793054859 PCI: dwc: Convert to use pci_host_probe()
6ab15b5e7057 PCI: dwc: keystone: Convert .scan_bus() callback to use add_bus
6e8e104d2196 PCI: Also call .add_bus() callback for root bus
The reason was to keep the initialization in the same order as when we
had the DWC specific .scan_bus() op. There's not a driver hook in
between the h/w setup and scanning devices.
> I don't think we should use .add_bus() unless it's actually something
> related to adding a bus.
I think I was inspired from how pcibios_add_bus() is (ab)used.
Rob
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