* [PATCH v3 0/3] Microchip LAN966x USB device support
@ 2022-05-25 7:10 ` Herve Codina
0 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina
Hi,
This series add support for the USB device controller available on
the Microchip LAN966x SOCs (LAN9662 and LAN9668).
Both SOCs have the same controller and this controller is also the
same as the one present on the SAMAD3 SOC.
Regards,
Herve
Changes v2:
- Avoid wildcards in the DT compatible string
- Rename the DT node
Changes v3:
- Add Krzysztof's 'Acked-by' on patch 2/3
- Change node insertion point (sort nodes by base addresses) on patch 3/3
Herve Codina (3):
clk: lan966x: Fix the lan966x clock gate register address
dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
ARM: dts: lan966x: Add UDPHS support
Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
drivers/clk/clk-lan966x.c | 2 +-
3 files changed, 15 insertions(+), 1 deletion(-)
--
2.35.3
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v3 1/3] clk: lan966x: Fix the lan966x clock gate register address
2022-05-25 7:10 ` Herve Codina
@ 2022-05-25 7:10 ` Herve Codina
-1 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina
The register address used for the clock gate register is the base
register address coming from first reg map (ie. the generic
clock registers) instead of the second reg map defining the clock
gate register.
Use the correct clock gate register address.
Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
drivers/clk/clk-lan966x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index d1535ac13e89..81cb90955d68 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c
@@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,
hw_data->hws[i] =
devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
- "lan966x", 0, base,
+ "lan966x", 0, gate_base,
clk_gate_desc[idx].bit_idx,
0, &clk_gate_lock);
--
2.35.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 1/3] clk: lan966x: Fix the lan966x clock gate register address
@ 2022-05-25 7:10 ` Herve Codina
0 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina
The register address used for the clock gate register is the base
register address coming from first reg map (ie. the generic
clock registers) instead of the second reg map defining the clock
gate register.
Use the correct clock gate register address.
Fixes: 5ad5915dea00 ("clk: lan966x: Extend lan966x clock driver for clock gating support")
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
drivers/clk/clk-lan966x.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/clk-lan966x.c b/drivers/clk/clk-lan966x.c
index d1535ac13e89..81cb90955d68 100644
--- a/drivers/clk/clk-lan966x.c
+++ b/drivers/clk/clk-lan966x.c
@@ -213,7 +213,7 @@ static int lan966x_gate_clk_register(struct device *dev,
hw_data->hws[i] =
devm_clk_hw_register_gate(dev, clk_gate_desc[idx].name,
- "lan966x", 0, base,
+ "lan966x", 0, gate_base,
clk_gate_desc[idx].bit_idx,
0, &clk_gate_lock);
--
2.35.3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/3] dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
2022-05-25 7:10 ` Herve Codina
@ 2022-05-25 7:10 ` Herve Codina
-1 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina, Krzysztof Kozlowski
The USB device controller available in the Microchip LAN9662 SOC
is the same IP as the one present in the SAMA5D3 SOC.
Add the LAN9662 compatible string and set the SAMA5D3 compatible
string as a fallback for the LAN9662.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt
index f512f0290728..12183ef47ee4 100644
--- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -87,6 +87,9 @@ Required properties:
"atmel,at91sam9g45-udc"
"atmel,sama5d3-udc"
"microchip,sam9x60-udc"
+ "microchip,lan9662-udc"
+ For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
+ is required.
- reg: Address and length of the register set for the device
- interrupts: Should contain usba interrupt
- clocks: Should reference the peripheral and host clocks
--
2.35.3
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 2/3] dt-bindings: usb: atmel: Add Microchip LAN9662 compatible string
@ 2022-05-25 7:10 ` Herve Codina
0 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina, Krzysztof Kozlowski
The USB device controller available in the Microchip LAN9662 SOC
is the same IP as the one present in the SAMA5D3 SOC.
Add the LAN9662 compatible string and set the SAMA5D3 compatible
string as a fallback for the LAN9662.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
Documentation/devicetree/bindings/usb/atmel-usb.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/usb/atmel-usb.txt b/Documentation/devicetree/bindings/usb/atmel-usb.txt
index f512f0290728..12183ef47ee4 100644
--- a/Documentation/devicetree/bindings/usb/atmel-usb.txt
+++ b/Documentation/devicetree/bindings/usb/atmel-usb.txt
@@ -87,6 +87,9 @@ Required properties:
"atmel,at91sam9g45-udc"
"atmel,sama5d3-udc"
"microchip,sam9x60-udc"
+ "microchip,lan9662-udc"
+ For "microchip,lan9662-udc" the fallback "atmel,sama5d3-udc"
+ is required.
- reg: Address and length of the register set for the device
- interrupts: Should contain usba interrupt
- clocks: Should reference the peripheral and host clocks
--
2.35.3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
2022-05-25 7:10 ` Herve Codina
@ 2022-05-25 7:10 ` Herve Codina
-1 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina
Add UDPHS (the USB High Speed Device Port controller) support.
The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7d2869648050..e086df741f99 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
status = "disabled";
};
+ udc: usb@e0808000 {
+ compatible = "microchip,lan9662-udc",
+ "atmel,sama5d3-udc";
+ reg = <0x00200000 0x80000>,
+ <0xe0808000 0x400>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
can0: can@e081c000 {
compatible = "bosch,m_can";
reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
--
2.35.3
^ permalink raw reply related [flat|nested] 12+ messages in thread* [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
@ 2022-05-25 7:10 ` Herve Codina
0 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-05-25 7:10 UTC (permalink / raw)
To: Greg Kroah-Hartman, Rob Herring, Krzysztof Kozlowski,
Nicolas Ferre, Alexandre Belloni, Claudiu Beznea,
Michael Turquette, Stephen Boyd, Horatiu Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
Thomas Petazzoni, Herve Codina
Add UDPHS (the USB High Speed Device Port controller) support.
The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
IP. This IP is also the same as the one present in the SAMA5D3
SOC.
Signed-off-by: Herve Codina <herve.codina@bootlin.com>
---
arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7d2869648050..e086df741f99 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
status = "disabled";
};
+ udc: usb@e0808000 {
+ compatible = "microchip,lan9662-udc",
+ "atmel,sama5d3-udc";
+ reg = <0x00200000 0x80000>,
+ <0xe0808000 0x400>;
+ interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
+ clock-names = "pclk", "hclk";
+ status = "disabled";
+ };
+
can0: can@e081c000 {
compatible = "bosch,m_can";
reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
--
2.35.3
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 12+ messages in thread* Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
2022-05-25 7:10 ` Herve Codina
@ 2022-06-30 9:31 ` Claudiu.Beznea
-1 siblings, 0 replies; 12+ messages in thread
From: Claudiu.Beznea @ 2022-06-30 9:31 UTC (permalink / raw)
To: herve.codina, gregkh, robh+dt, krzysztof.kozlowski+dt,
Nicolas.Ferre, alexandre.belloni, mturquette, sboyd,
Horatiu.Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
thomas.petazzoni
On 25.05.2022 10:10, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add UDPHS (the USB High Speed Device Port controller) support.
>
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
>
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..e086df741f99 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> status = "disabled";
> };
>
> + udc: usb@e0808000 {
> + compatible = "microchip,lan9662-udc",
> + "atmel,sama5d3-udc";
> + reg = <0x00200000 0x80000>,
> + <0xe0808000 0x400>;
> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> + clock-names = "pclk", "hclk";
> + status = "disabled";
> + };
> +
This doesn't apply clean on top of v5.19-rc1. Can you check and resend?
> can0: can@e081c000 {
> compatible = "bosch,m_can";
> reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
> --
> 2.35.3
>
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
@ 2022-06-30 9:31 ` Claudiu.Beznea
0 siblings, 0 replies; 12+ messages in thread
From: Claudiu.Beznea @ 2022-06-30 9:31 UTC (permalink / raw)
To: herve.codina, gregkh, robh+dt, krzysztof.kozlowski+dt,
Nicolas.Ferre, alexandre.belloni, mturquette, sboyd,
Horatiu.Vultur
Cc: linux-usb, devicetree, linux-arm-kernel, linux-kernel, linux-clk,
thomas.petazzoni
On 25.05.2022 10:10, Herve Codina wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
>
> Add UDPHS (the USB High Speed Device Port controller) support.
>
> The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> IP. This IP is also the same as the one present in the SAMA5D3
> SOC.
>
> Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> ---
> arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> index 7d2869648050..e086df741f99 100644
> --- a/arch/arm/boot/dts/lan966x.dtsi
> +++ b/arch/arm/boot/dts/lan966x.dtsi
> @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> status = "disabled";
> };
>
> + udc: usb@e0808000 {
> + compatible = "microchip,lan9662-udc",
> + "atmel,sama5d3-udc";
> + reg = <0x00200000 0x80000>,
> + <0xe0808000 0x400>;
> + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> + clock-names = "pclk", "hclk";
> + status = "disabled";
> + };
> +
This doesn't apply clean on top of v5.19-rc1. Can you check and resend?
> can0: can@e081c000 {
> compatible = "bosch,m_can";
> reg = <0xe081c000 0xfc>, <0x00100000 0x4000>;
> --
> 2.35.3
>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
2022-06-30 9:31 ` Claudiu.Beznea
@ 2022-07-01 7:09 ` Herve Codina
-1 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-07-01 7:09 UTC (permalink / raw)
To: Claudiu.Beznea
Cc: gregkh, robh+dt, krzysztof.kozlowski+dt, Nicolas.Ferre,
alexandre.belloni, mturquette, sboyd, Horatiu.Vultur, linux-usb,
devicetree, linux-arm-kernel, linux-kernel, linux-clk,
thomas.petazzoni
Hi Claudiu,
On Thu, 30 Jun 2022 09:31:00 +0000
<Claudiu.Beznea@microchip.com> wrote:
> On 25.05.2022 10:10, Herve Codina wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Add UDPHS (the USB High Speed Device Port controller) support.
> >
> > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> > IP. This IP is also the same as the one present in the SAMA5D3
> > SOC.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> > index 7d2869648050..e086df741f99 100644
> > --- a/arch/arm/boot/dts/lan966x.dtsi
> > +++ b/arch/arm/boot/dts/lan966x.dtsi
> > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> > status = "disabled";
> > };
> >
> > + udc: usb@e0808000 {
> > + compatible = "microchip,lan9662-udc",
> > + "atmel,sama5d3-udc";
> > + reg = <0x00200000 0x80000>,
> > + <0xe0808000 0x400>;
> > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> > + clock-names = "pclk", "hclk";
> > + status = "disabled";
> > + };
> > +
>
> This doesn't apply clean on top of v5.19-rc1. Can you check and resend?
Sure,
I am going to send a rebased version of this series.
Thanks,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v3 3/3] ARM: dts: lan966x: Add UDPHS support
@ 2022-07-01 7:09 ` Herve Codina
0 siblings, 0 replies; 12+ messages in thread
From: Herve Codina @ 2022-07-01 7:09 UTC (permalink / raw)
To: Claudiu.Beznea
Cc: devicetree, alexandre.belloni, thomas.petazzoni, sboyd, gregkh,
mturquette, linux-usb, linux-clk, linux-kernel, robh+dt,
krzysztof.kozlowski+dt, Horatiu.Vultur, linux-arm-kernel
Hi Claudiu,
On Thu, 30 Jun 2022 09:31:00 +0000
<Claudiu.Beznea@microchip.com> wrote:
> On 25.05.2022 10:10, Herve Codina wrote:
> > EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> >
> > Add UDPHS (the USB High Speed Device Port controller) support.
> >
> > The both lan966x SOCs (LAN9662 and LAN9668) have the same UDPHS
> > IP. This IP is also the same as the one present in the SAMA5D3
> > SOC.
> >
> > Signed-off-by: Herve Codina <herve.codina@bootlin.com>
> > ---
> > arch/arm/boot/dts/lan966x.dtsi | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
> > index 7d2869648050..e086df741f99 100644
> > --- a/arch/arm/boot/dts/lan966x.dtsi
> > +++ b/arch/arm/boot/dts/lan966x.dtsi
> > @@ -196,6 +196,17 @@ watchdog: watchdog@e0090000 {
> > status = "disabled";
> > };
> >
> > + udc: usb@e0808000 {
> > + compatible = "microchip,lan9662-udc",
> > + "atmel,sama5d3-udc";
> > + reg = <0x00200000 0x80000>,
> > + <0xe0808000 0x400>;
> > + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
> > + clocks = <&clks GCK_GATE_UDPHS>, <&nic_clk>;
> > + clock-names = "pclk", "hclk";
> > + status = "disabled";
> > + };
> > +
>
> This doesn't apply clean on top of v5.19-rc1. Can you check and resend?
Sure,
I am going to send a rebased version of this series.
Thanks,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 12+ messages in thread