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* [PATCH 0/3] arm64: bcmbca: add bcm6858 soc support
@ 2022-05-27 17:13 ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel

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The initial support includes a bare-bone dts
for quad core ARM v8  with a brcm6345 uart.


Anand Gore (3):
  ARM64: dts: add dts files for bcmbca SoC bcm6858
  dt-bindings: arm64: add BCM6858 soc to binding document
  MAINTAINERS: add bcm6858 to bcmbca arch entry

 .../bindings/arm/bcm/brcm,bcmbca.yaml         |   8 ++
 MAINTAINERS                                   |   1 +
 arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
 .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
 .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
 5 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts

-- 
2.25.1


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^ permalink raw reply	[flat|nested] 13+ messages in thread
* [PATCH 0/3] arm64: bcmbca: add bcm6858 soc support
@ 2022-05-27 17:13 ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 766 bytes --]


The initial support includes a bare-bone dts
for quad core ARM v8  with a brcm6345 uart.


Anand Gore (3):
  ARM64: dts: add dts files for bcmbca SoC bcm6858
  dt-bindings: arm64: add BCM6858 soc to binding document
  MAINTAINERS: add bcm6858 to bcmbca arch entry

 .../bindings/arm/bcm/brcm,bcmbca.yaml         |   8 ++
 MAINTAINERS                                   |   1 +
 arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
 .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
 .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
 5 files changed, 161 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts

-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [PATCH 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
  2022-05-27 17:13 ` Anand Gore
@ 2022-05-27 17:13   ` Anand Gore
  -1 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel

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Add dts for ARMv8 based broadband SoC BCM6858.
bcm6858.dtsi is the SoC description dts header
and bcm96858.dts is a simple dts file for Broadcom
BCM96858 Reference board that only enables the UART port.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
 .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
 .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
 3 files changed, 152 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..7d98b0787b8c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+				bcm96858.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
new file mode 100644
index 000000000000..664b8f399d69
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "brcm,bcm6858", "brcm,bcmbca";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		B53_0: cpu@0 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x0>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_1: cpu@1 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x1>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_2: cpu@2 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x2>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_3: cpu@3 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x3>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	pmu: pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&B53_0>, <&B53_1>,
+			<&B53_2>, <&B53_3>;
+	};
+
+	clocks: clocks {
+		periph_clk:periph-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+		cpu_off = <1>;
+		cpu_on = <2>;
+	};
+
+	axi@81000000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0x81000000 0x0 0x4000>;
+
+		gic: interrupt-controller@1000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0x1000 0x0 0x1000>,
+				<0x0 0x2000 0x0 0x2000>;
+		};
+	};
+
+	bus@ff800000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0xff800000 0x0 0x62000>;
+
+		uart0: serial@640 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x0 0x640 0x0 0x18>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&periph_clk>;
+			clock-names = "refclk";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
new file mode 100644
index 000000000000..0cbf582f5d54
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+	model = "Broadcom BCM96858 Reference Board";
+	compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x08000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
@ 2022-05-27 17:13   ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 4758 bytes --]

Add dts for ARMv8 based broadband SoC BCM6858.
bcm6858.dtsi is the SoC description dts header
and bcm96858.dts is a simple dts file for Broadcom
BCM96858 Reference board that only enables the UART port.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
 .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
 .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
 3 files changed, 152 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
 create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts

diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..7d98b0787b8c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
 # SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+				bcm96858.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
new file mode 100644
index 000000000000..664b8f399d69
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,120 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+	compatible = "brcm,bcm6858", "brcm,bcmbca";
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	interrupt-parent = <&gic>;
+
+	cpus {
+		#address-cells = <2>;
+		#size-cells = <0>;
+
+		B53_0: cpu@0 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x0>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_1: cpu@1 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x1>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_2: cpu@2 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x2>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+
+		B53_3: cpu@3 {
+			compatible = "brcm,brahma-b53";
+			device_type = "cpu";
+			reg = <0x0 0x3>;
+			next-level-cache = <&L2_0>;
+			enable-method = "psci";
+		};
+		L2_0: l2-cache0 {
+			compatible = "cache";
+		};
+	};
+
+	timer {
+		compatible = "arm,armv8-timer";
+		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+	};
+
+	pmu: pmu {
+		compatible = "arm,armv8-pmuv3";
+		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+			<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-affinity = <&B53_0>, <&B53_1>,
+			<&B53_2>, <&B53_3>;
+	};
+
+	clocks: clocks {
+		periph_clk:periph-clk {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <200000000>;
+		};
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+		cpu_off = <1>;
+		cpu_on = <2>;
+	};
+
+	axi@81000000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0x81000000 0x0 0x4000>;
+
+		gic: interrupt-controller@1000 {
+			compatible = "arm,gic-400";
+			#interrupt-cells = <3>;
+			#address-cells = <0>;
+			interrupt-controller;
+			reg = <0x0 0x1000 0x0 0x1000>,
+				<0x0 0x2000 0x0 0x2000>;
+		};
+	};
+
+	bus@ff800000 {
+		compatible = "simple-bus";
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges = <0x0 0x0 0x0 0xff800000 0x0 0x62000>;
+
+		uart0: serial@640 {
+			compatible = "brcm,bcm6345-uart";
+			reg = <0x0 0x640 0x0 0x18>;
+			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&periph_clk>;
+			clock-names = "refclk";
+			status = "disabled";
+		};
+	};
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
new file mode 100644
index 000000000000..0cbf582f5d54
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+	model = "Broadcom BCM96858 Reference Board";
+	compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+	aliases {
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x08000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH 2/3] dt-bindings: arm64: add BCM6858 soc to binding document
  2022-05-27 17:13 ` Anand Gore
@ 2022-05-27 17:13   ` Anand Gore
  -1 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Rob Herring, devicetree, linux-kernel

[-- Attachment #1: Type: text/plain, Size: 860 bytes --]

Add BCM6858 SOC device tree description to bcmbca binding document.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 .../devicetree/bindings/arm/bcm/brcm,bcmbca.yaml          | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 24357cf09888..a63e355ba8f9 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -35,6 +35,14 @@ properties:
           - const: brcm,bcm63178
           - const: brcm,bcmbca
 
+      - description: BCM6858 based boards
+        items:
+          - enum:
+              - brcm,bcm96858
+          - const: brcm,bcm6858
+          - const: brcm,bcmbca
+
+
 additionalProperties: true
 
 ...
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH 2/3] dt-bindings: arm64: add BCM6858 soc to binding document
@ 2022-05-27 17:13   ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Rob Herring, devicetree, linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 860 bytes --]

Add BCM6858 SOC device tree description to bcmbca binding document.

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 .../devicetree/bindings/arm/bcm/brcm,bcmbca.yaml          | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 24357cf09888..a63e355ba8f9 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -35,6 +35,14 @@ properties:
           - const: brcm,bcm63178
           - const: brcm,bcmbca
 
+      - description: BCM6858 based boards
+        items:
+          - enum:
+              - brcm,bcm96858
+          - const: brcm,bcm6858
+          - const: brcm,bcmbca
+
+
 additionalProperties: true
 
 ...
-- 
2.25.1


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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry
  2022-05-27 17:13 ` Anand Gore
@ 2022-05-27 17:13   ` Anand Gore
  -1 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	linux-kernel

[-- Attachment #1: Type: text/plain, Size: 538 bytes --]

Add bcm6858 related files to BCMBCA ARCH maintainer list entry

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b263753f1f9..3ab33d0aeabf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3766,6 +3766,7 @@ T:	git git://github.com/broadcom/stblinux.git
 F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 N:	bcmbca
 N:	bcm[9]?47622
+N:	bcm[9]?6858
 N:	bcm[9]?63178
 
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
-- 
2.25.1


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^ permalink raw reply related	[flat|nested] 13+ messages in thread
* [PATCH 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry
@ 2022-05-27 17:13   ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 17:13 UTC (permalink / raw)
  To: Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin, Anand Gore,
	linux-kernel


[-- Attachment #1.1: Type: text/plain, Size: 538 bytes --]

Add bcm6858 related files to BCMBCA ARCH maintainer list entry

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b263753f1f9..3ab33d0aeabf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3766,6 +3766,7 @@ T:	git git://github.com/broadcom/stblinux.git
 F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 N:	bcmbca
 N:	bcm[9]?47622
+N:	bcm[9]?6858
 N:	bcm[9]?63178
 
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
-- 
2.25.1


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[-- Type: application/pkcs7-signature, Size: 4203 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
  2022-05-27 17:13   ` Anand Gore
@ 2022-05-28 10:37     ` Marc Zyngier
  -1 siblings, 0 replies; 13+ messages in thread
From: Marc Zyngier @ 2022-05-28 10:37 UTC (permalink / raw)
  To: Anand Gore
  Cc: Linux ARM List, dan.beygelman, samyon.furman, florian.fainelli,
	William Zhang, tomer.yacoby, kursad.oney, joel.peshkin,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel

On 2022-05-27 18:13, Anand Gore wrote:
> Add dts for ARMv8 based broadband SoC BCM6858.
> bcm6858.dtsi is the SoC description dts header
> and bcm96858.dts is a simple dts file for Broadcom
> BCM96858 Reference board that only enables the UART port.
> 
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> 
> ---
> 
>  arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
>  .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
>  .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
>  3 files changed, 152 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
>  create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
> 
> diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> index d5f89245336c..7d98b0787b8c 100644
> --- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> +++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> @@ -1,2 +1,3 @@
>  # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
> +dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
> +				bcm96858.dtb
> diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> new file mode 100644
> index 000000000000..664b8f399d69
> --- /dev/null
> +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2022 Broadcom Ltd.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +	compatible = "brcm,bcm6858", "brcm,bcmbca";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	interrupt-parent = <&gic>;
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		B53_0: cpu@0 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x0>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_1: cpu@1 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x1>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_2: cpu@2 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x2>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_3: cpu@3 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x3>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +		L2_0: l2-cache0 {
> +			compatible = "cache";
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 
> IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +	};
> +
> +	pmu: pmu {
> +		compatible = "arm,armv8-pmuv3";
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&B53_0>, <&B53_1>,
> +			<&B53_2>, <&B53_3>;
> +	};
> +
> +	clocks: clocks {
> +		periph_clk:periph-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <200000000>;
> +		};
> +	};
> +
> +	psci {
> +		compatible = "arm,psci-0.2";
> +		method = "smc";
> +		cpu_off = <1>;
> +		cpu_on = <2>;

No. Either this is PSCI 0.2 (and inventing your own function numbers
is pointless), or this isn't. Either way, this is wrong.

> +	};
> +
> +	axi@81000000 {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x0 0x0 0x0 0x81000000 0x0 0x4000>;
> +
> +		gic: interrupt-controller@1000 {
> +			compatible = "arm,gic-400";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0x0 0x1000 0x0 0x1000>,
> +				<0x0 0x2000 0x0 0x2000>;

GIC400 has another two regions for GICH and GICV, and a maintenance
interrupt. Please add both.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
@ 2022-05-28 10:37     ` Marc Zyngier
  0 siblings, 0 replies; 13+ messages in thread
From: Marc Zyngier @ 2022-05-28 10:37 UTC (permalink / raw)
  To: Anand Gore
  Cc: Linux ARM List, dan.beygelman, samyon.furman, florian.fainelli,
	William Zhang, tomer.yacoby, kursad.oney, joel.peshkin,
	Broadcom internal kernel review list, Florian Fainelli,
	Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel

On 2022-05-27 18:13, Anand Gore wrote:
> Add dts for ARMv8 based broadband SoC BCM6858.
> bcm6858.dtsi is the SoC description dts header
> and bcm96858.dts is a simple dts file for Broadcom
> BCM96858 Reference board that only enables the UART port.
> 
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> 
> ---
> 
>  arch/arm64/boot/dts/broadcom/bcmbca/Makefile  |   3 +-
>  .../boot/dts/broadcom/bcmbca/bcm6858.dtsi     | 120 ++++++++++++++++++
>  .../boot/dts/broadcom/bcmbca/bcm96858.dts     |  30 +++++
>  3 files changed, 152 insertions(+), 1 deletion(-)
>  create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
>  create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
> 
> diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> index d5f89245336c..7d98b0787b8c 100644
> --- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> +++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
> @@ -1,2 +1,3 @@
>  # SPDX-License-Identifier: GPL-2.0
> -dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
> +dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
> +				bcm96858.dtb
> diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> new file mode 100644
> index 000000000000..664b8f399d69
> --- /dev/null
> +++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
> @@ -0,0 +1,120 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright 2022 Broadcom Ltd.
> + */
> +
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> +/ {
> +	compatible = "brcm,bcm6858", "brcm,bcmbca";
> +	#address-cells = <2>;
> +	#size-cells = <2>;
> +
> +	interrupt-parent = <&gic>;
> +
> +	cpus {
> +		#address-cells = <2>;
> +		#size-cells = <0>;
> +
> +		B53_0: cpu@0 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x0>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_1: cpu@1 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x1>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_2: cpu@2 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x2>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +
> +		B53_3: cpu@3 {
> +			compatible = "brcm,brahma-b53";
> +			device_type = "cpu";
> +			reg = <0x0 0x3>;
> +			next-level-cache = <&L2_0>;
> +			enable-method = "psci";
> +		};
> +		L2_0: l2-cache0 {
> +			compatible = "cache";
> +		};
> +	};
> +
> +	timer {
> +		compatible = "arm,armv8-timer";
> +		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 
> IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
> +			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
> +	};
> +
> +	pmu: pmu {
> +		compatible = "arm,armv8-pmuv3";
> +		interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
> +			<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&B53_0>, <&B53_1>,
> +			<&B53_2>, <&B53_3>;
> +	};
> +
> +	clocks: clocks {
> +		periph_clk:periph-clk {
> +			compatible = "fixed-clock";
> +			#clock-cells = <0>;
> +			clock-frequency = <200000000>;
> +		};
> +	};
> +
> +	psci {
> +		compatible = "arm,psci-0.2";
> +		method = "smc";
> +		cpu_off = <1>;
> +		cpu_on = <2>;

No. Either this is PSCI 0.2 (and inventing your own function numbers
is pointless), or this isn't. Either way, this is wrong.

> +	};
> +
> +	axi@81000000 {
> +		compatible = "simple-bus";
> +		#address-cells = <2>;
> +		#size-cells = <2>;
> +		ranges = <0x0 0x0 0x0 0x81000000 0x0 0x4000>;
> +
> +		gic: interrupt-controller@1000 {
> +			compatible = "arm,gic-400";
> +			#interrupt-cells = <3>;
> +			#address-cells = <0>;
> +			interrupt-controller;
> +			reg = <0x0 0x1000 0x0 0x1000>,
> +				<0x0 0x2000 0x0 0x2000>;

GIC400 has another two regions for GICH and GICV, and a maintenance
interrupt. Please add both.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm64: add BCM6858 soc to binding document
  2022-05-27 17:13   ` Anand Gore
@ 2022-05-29 11:33     ` Krzysztof Kozlowski
  -1 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-29 11:33 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Rob Herring, devicetree, linux-kernel

On 27/05/2022 19:13, Anand Gore wrote:
> Add BCM6858 SOC device tree description to bcmbca binding document.
> 
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> 
> ---
> 
>  .../devicetree/bindings/arm/bcm/brcm,bcmbca.yaml          | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> index 24357cf09888..a63e355ba8f9 100644
> --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> @@ -35,6 +35,14 @@ properties:
>            - const: brcm,bcm63178
>            - const: brcm,bcmbca
>  
> +      - description: BCM6858 based boards
> +        items:
> +          - enum:
> +              - brcm,bcm96858
> +          - const: brcm,bcm6858
> +          - const: brcm,bcmbca
> +
> +

No need for two blank lines.

>  additionalProperties: true
>  
>  ...


Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 13+ messages in thread
* Re: [PATCH 2/3] dt-bindings: arm64: add BCM6858 soc to binding document
@ 2022-05-29 11:33     ` Krzysztof Kozlowski
  0 siblings, 0 replies; 13+ messages in thread
From: Krzysztof Kozlowski @ 2022-05-29 11:33 UTC (permalink / raw)
  To: Anand Gore, Linux ARM List
  Cc: dan.beygelman, samyon.furman, florian.fainelli, William Zhang,
	tomer.yacoby, kursad.oney, joel.peshkin,
	Broadcom internal kernel review list, Krzysztof Kozlowski,
	Rob Herring, devicetree, linux-kernel

On 27/05/2022 19:13, Anand Gore wrote:
> Add BCM6858 SOC device tree description to bcmbca binding document.
> 
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> 
> ---
> 
>  .../devicetree/bindings/arm/bcm/brcm,bcmbca.yaml          | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> index 24357cf09888..a63e355ba8f9 100644
> --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
> @@ -35,6 +35,14 @@ properties:
>            - const: brcm,bcm63178
>            - const: brcm,bcmbca
>  
> +      - description: BCM6858 based boards
> +        items:
> +          - enum:
> +              - brcm,bcm96858
> +          - const: brcm,bcm6858
> +          - const: brcm,bcmbca
> +
> +

No need for two blank lines.

>  additionalProperties: true
>  
>  ...


Best regards,
Krzysztof

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 13+ messages in thread
* [PATCH 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry
  2022-05-27 16:28 [PATCH 0/3] arm64: bcmbca: add bcm6858 soc support Anand Gore
@ 2022-05-27 16:28 ` Anand Gore
  0 siblings, 0 replies; 13+ messages in thread
From: Anand Gore @ 2022-05-27 16:28 UTC (permalink / raw)
  To: Linux ARM List
  Cc: William Zhang, samyon.furman, florian.fainelli, dan.beygelman,
	joel.peshkin, kursad.oney, tomer.yacoby, Anand Gore


[-- Attachment #1.1: Type: text/plain, Size: 538 bytes --]

Add bcm6858 related files to BCMBCA ARCH maintainer list entry

Signed-off-by: Anand Gore <anand.gore@broadcom.com>

---

 MAINTAINERS | 1 +
 1 file changed, 1 insertion(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 4b263753f1f9..3ab33d0aeabf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3766,6 +3766,7 @@ T:	git git://github.com/broadcom/stblinux.git
 F:	Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
 N:	bcmbca
 N:	bcm[9]?47622
+N:	bcm[9]?6858
 N:	bcm[9]?63178
 
 BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
-- 
2.25.1


[-- Attachment #1.2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4203 bytes --]

[-- Attachment #2: Type: text/plain, Size: 176 bytes --]

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply related	[flat|nested] 13+ messages in thread
end of thread, other threads:[~2022-05-29 11:34 UTC | newest]

Thread overview: 13+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-27 17:13 [PATCH 0/3] arm64: bcmbca: add bcm6858 soc support Anand Gore
2022-05-27 17:13 ` Anand Gore
2022-05-27 17:13 ` [PATCH 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858 Anand Gore
2022-05-27 17:13   ` Anand Gore
2022-05-28 10:37   ` Marc Zyngier
2022-05-28 10:37     ` Marc Zyngier
2022-05-27 17:13 ` [PATCH 2/3] dt-bindings: arm64: add BCM6858 soc to binding document Anand Gore
2022-05-27 17:13   ` Anand Gore
2022-05-29 11:33   ` Krzysztof Kozlowski
2022-05-29 11:33     ` Krzysztof Kozlowski
2022-05-27 17:13 ` [PATCH 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry Anand Gore
2022-05-27 17:13   ` Anand Gore
  -- strict thread matches above, loose matches on Subject: below --
2022-05-27 16:28 [PATCH 0/3] arm64: bcmbca: add bcm6858 soc support Anand Gore
2022-05-27 16:28 ` [PATCH 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry Anand Gore

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