* [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Add pwrap binding documentation for
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index 0581dbda4828..00b94601071e 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -29,6 +29,7 @@ Required properties in pwrap device node.
"mediatek,mt8183-pwrap" for MT8183 SoCs
"mediatek,mt8186-pwrap" for MT8186 SoCs
"mediatek,mt8195-pwrap" for MT8195 SoCs
+ "mediatek,mt8365-pwrap" for MT8365 SoCs
"mediatek,mt8516-pwrap" for MT8516 SoCs
- interrupts: IRQ for pwrap in SOC
- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
@@ -38,6 +39,8 @@ Required properties in pwrap device node.
- clock-names: Must include the following entries:
"spi": SPI bus clock
"wrap": Main module clock
+ "sys": System module clock (for MT8365 SoC)
+ "tmr": Timer module clock (for MT8365 SoC)
- clocks: Must contain an entry for each entry in clock-names.
Optional properities:
--
2.36.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Add pwrap binding documentation for
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index 0581dbda4828..00b94601071e 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -29,6 +29,7 @@ Required properties in pwrap device node.
"mediatek,mt8183-pwrap" for MT8183 SoCs
"mediatek,mt8186-pwrap" for MT8186 SoCs
"mediatek,mt8195-pwrap" for MT8195 SoCs
+ "mediatek,mt8365-pwrap" for MT8365 SoCs
"mediatek,mt8516-pwrap" for MT8516 SoCs
- interrupts: IRQ for pwrap in SOC
- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
@@ -38,6 +39,8 @@ Required properties in pwrap device node.
- clock-names: Must include the following entries:
"spi": SPI bus clock
"wrap": Main module clock
+ "sys": System module clock (for MT8365 SoC)
+ "tmr": Timer module clock (for MT8365 SoC)
- clocks: Must contain an entry for each entry in clock-names.
Optional properities:
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger
Cc: Fabien Parent, devicetree, linux-kernel, linux-arm-kernel,
linux-mediatek
Add pwrap binding documentation for
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
index 0581dbda4828..00b94601071e 100644
--- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
+++ b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt
@@ -29,6 +29,7 @@ Required properties in pwrap device node.
"mediatek,mt8183-pwrap" for MT8183 SoCs
"mediatek,mt8186-pwrap" for MT8186 SoCs
"mediatek,mt8195-pwrap" for MT8195 SoCs
+ "mediatek,mt8365-pwrap" for MT8365 SoCs
"mediatek,mt8516-pwrap" for MT8516 SoCs
- interrupts: IRQ for pwrap in SOC
- reg-names: "pwrap" is required; "pwrap-bridge" is optional.
@@ -38,6 +39,8 @@ Required properties in pwrap device node.
- clock-names: Must include the following entries:
"spi": SPI bus clock
"wrap": Main module clock
+ "sys": System module clock (for MT8365 SoC)
+ "tmr": Timer module clock (for MT8365 SoC)
- clocks: Must contain an entry for each entry in clock-names.
Optional properities:
--
2.36.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks
2022-05-30 13:55 ` Fabien Parent
(?)
@ 2022-05-30 13:55 ` Fabien Parent
-1 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index bf39a64f3ecc..8dea5e14d73e 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1163,6 +1163,8 @@ struct pmic_wrapper {
const struct pwrap_slv_type *slave;
struct clk *clk_spi;
struct clk *clk_wrap;
+ struct clk *clk_sys;
+ struct clk *clk_tmr;
struct reset_control *rstc;
struct reset_control *rstc_bridge;
@@ -2250,6 +2252,20 @@ static int pwrap_probe(struct platform_device *pdev)
return PTR_ERR(wrp->clk_wrap);
}
+ wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys");
+ if (IS_ERR(wrp->clk_sys)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys),
+ "failed to get clock: %pe\n",
+ wrp->clk_sys);
+ }
+
+ wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr");
+ if (IS_ERR(wrp->clk_tmr)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr),
+ "failed to get clock: %pe\n",
+ wrp->clk_tmr);
+ }
+
ret = clk_prepare_enable(wrp->clk_spi);
if (ret)
return ret;
@@ -2258,6 +2274,14 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret)
goto err_out1;
+ ret = clk_prepare_enable(wrp->clk_sys);
+ if (ret)
+ goto err_out2;
+
+ ret = clk_prepare_enable(wrp->clk_tmr);
+ if (ret)
+ goto err_out3;
+
/* Enable internal dynamic clock */
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
pwrap_writel(wrp, 1, PWRAP_DCM_EN);
@@ -2272,7 +2296,7 @@ static int pwrap_probe(struct platform_device *pdev)
ret = pwrap_init(wrp);
if (ret) {
dev_dbg(wrp->dev, "init failed with %d\n", ret);
- goto err_out2;
+ goto err_out4;
}
}
@@ -2286,7 +2310,7 @@ static int pwrap_probe(struct platform_device *pdev)
if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
- goto err_out2;
+ goto err_out4;
}
/* Initialize watchdog, may not be done by the bootloader */
@@ -2319,7 +2343,7 @@ static int pwrap_probe(struct platform_device *pdev)
IRQF_TRIGGER_HIGH,
"mt-pmic-pwrap", wrp);
if (ret)
- goto err_out2;
+ goto err_out4;
wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap);
if (IS_ERR(wrp->regmap)) {
@@ -2331,11 +2355,15 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret) {
dev_dbg(wrp->dev, "failed to create child devices at %pOF\n",
np);
- goto err_out2;
+ goto err_out4;
}
return 0;
+err_out4:
+ clk_disable_unprepare(wrp->clk_tmr);
+err_out3:
+ clk_disable_unprepare(wrp->clk_sys);
err_out2:
clk_disable_unprepare(wrp->clk_wrap);
err_out1:
--
2.36.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index bf39a64f3ecc..8dea5e14d73e 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1163,6 +1163,8 @@ struct pmic_wrapper {
const struct pwrap_slv_type *slave;
struct clk *clk_spi;
struct clk *clk_wrap;
+ struct clk *clk_sys;
+ struct clk *clk_tmr;
struct reset_control *rstc;
struct reset_control *rstc_bridge;
@@ -2250,6 +2252,20 @@ static int pwrap_probe(struct platform_device *pdev)
return PTR_ERR(wrp->clk_wrap);
}
+ wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys");
+ if (IS_ERR(wrp->clk_sys)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys),
+ "failed to get clock: %pe\n",
+ wrp->clk_sys);
+ }
+
+ wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr");
+ if (IS_ERR(wrp->clk_tmr)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr),
+ "failed to get clock: %pe\n",
+ wrp->clk_tmr);
+ }
+
ret = clk_prepare_enable(wrp->clk_spi);
if (ret)
return ret;
@@ -2258,6 +2274,14 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret)
goto err_out1;
+ ret = clk_prepare_enable(wrp->clk_sys);
+ if (ret)
+ goto err_out2;
+
+ ret = clk_prepare_enable(wrp->clk_tmr);
+ if (ret)
+ goto err_out3;
+
/* Enable internal dynamic clock */
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
pwrap_writel(wrp, 1, PWRAP_DCM_EN);
@@ -2272,7 +2296,7 @@ static int pwrap_probe(struct platform_device *pdev)
ret = pwrap_init(wrp);
if (ret) {
dev_dbg(wrp->dev, "init failed with %d\n", ret);
- goto err_out2;
+ goto err_out4;
}
}
@@ -2286,7 +2310,7 @@ static int pwrap_probe(struct platform_device *pdev)
if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
- goto err_out2;
+ goto err_out4;
}
/* Initialize watchdog, may not be done by the bootloader */
@@ -2319,7 +2343,7 @@ static int pwrap_probe(struct platform_device *pdev)
IRQF_TRIGGER_HIGH,
"mt-pmic-pwrap", wrp);
if (ret)
- goto err_out2;
+ goto err_out4;
wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap);
if (IS_ERR(wrp->regmap)) {
@@ -2331,11 +2355,15 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret) {
dev_dbg(wrp->dev, "failed to create child devices at %pOF\n",
np);
- goto err_out2;
+ goto err_out4;
}
return 0;
+err_out4:
+ clk_disable_unprepare(wrp->clk_tmr);
+err_out3:
+ clk_disable_unprepare(wrp->clk_sys);
err_out2:
clk_disable_unprepare(wrp->clk_wrap);
err_out1:
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index bf39a64f3ecc..8dea5e14d73e 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1163,6 +1163,8 @@ struct pmic_wrapper {
const struct pwrap_slv_type *slave;
struct clk *clk_spi;
struct clk *clk_wrap;
+ struct clk *clk_sys;
+ struct clk *clk_tmr;
struct reset_control *rstc;
struct reset_control *rstc_bridge;
@@ -2250,6 +2252,20 @@ static int pwrap_probe(struct platform_device *pdev)
return PTR_ERR(wrp->clk_wrap);
}
+ wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys");
+ if (IS_ERR(wrp->clk_sys)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys),
+ "failed to get clock: %pe\n",
+ wrp->clk_sys);
+ }
+
+ wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr");
+ if (IS_ERR(wrp->clk_tmr)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr),
+ "failed to get clock: %pe\n",
+ wrp->clk_tmr);
+ }
+
ret = clk_prepare_enable(wrp->clk_spi);
if (ret)
return ret;
@@ -2258,6 +2274,14 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret)
goto err_out1;
+ ret = clk_prepare_enable(wrp->clk_sys);
+ if (ret)
+ goto err_out2;
+
+ ret = clk_prepare_enable(wrp->clk_tmr);
+ if (ret)
+ goto err_out3;
+
/* Enable internal dynamic clock */
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
pwrap_writel(wrp, 1, PWRAP_DCM_EN);
@@ -2272,7 +2296,7 @@ static int pwrap_probe(struct platform_device *pdev)
ret = pwrap_init(wrp);
if (ret) {
dev_dbg(wrp->dev, "init failed with %d\n", ret);
- goto err_out2;
+ goto err_out4;
}
}
@@ -2286,7 +2310,7 @@ static int pwrap_probe(struct platform_device *pdev)
if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
- goto err_out2;
+ goto err_out4;
}
/* Initialize watchdog, may not be done by the bootloader */
@@ -2319,7 +2343,7 @@ static int pwrap_probe(struct platform_device *pdev)
IRQF_TRIGGER_HIGH,
"mt-pmic-pwrap", wrp);
if (ret)
- goto err_out2;
+ goto err_out4;
wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regmap);
if (IS_ERR(wrp->regmap)) {
@@ -2331,11 +2355,15 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret) {
dev_dbg(wrp->dev, "failed to create child devices at %pOF\n",
np);
- goto err_out2;
+ goto err_out4;
}
return 0;
+err_out4:
+ clk_disable_unprepare(wrp->clk_tmr);
+err_out3:
+ clk_disable_unprepare(wrp->clk_sys);
err_out2:
clk_disable_unprepare(wrp->clk_wrap);
err_out1:
--
2.36.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] soc: mediatek: pwrap: add mt8365 SoC support
2022-05-30 13:55 ` Fabien Parent
(?)
@ 2022-05-30 13:55 ` Fabien Parent
-1 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
Add PMIC Wrap support for MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 80 ++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 8dea5e14d73e..16595c3330ef 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -980,6 +980,68 @@ static int mt8195_regs[] = {
[PWRAP_WACS2_RDATA] = 0x8A8,
};
+static int mt8365_regs[] = {
+ [PWRAP_MUX_SEL] = 0x0,
+ [PWRAP_WRAP_EN] = 0x4,
+ [PWRAP_DIO_EN] = 0x8,
+ [PWRAP_CSHEXT_WRITE] = 0x24,
+ [PWRAP_CSHEXT_READ] = 0x28,
+ [PWRAP_STAUPD_PRD] = 0x3c,
+ [PWRAP_STAUPD_GRPEN] = 0x40,
+ [PWRAP_STAUPD_MAN_TRIG] = 0x58,
+ [PWRAP_STAUPD_STA] = 0x5c,
+ [PWRAP_WRAP_STA] = 0x60,
+ [PWRAP_HARB_INIT] = 0x64,
+ [PWRAP_HARB_HPRIO] = 0x68,
+ [PWRAP_HIPRIO_ARB_EN] = 0x6c,
+ [PWRAP_HARB_STA0] = 0x70,
+ [PWRAP_HARB_STA1] = 0x74,
+ [PWRAP_MAN_EN] = 0x7c,
+ [PWRAP_MAN_CMD] = 0x80,
+ [PWRAP_MAN_RDATA] = 0x84,
+ [PWRAP_MAN_VLDCLR] = 0x88,
+ [PWRAP_WACS0_EN] = 0x8c,
+ [PWRAP_INIT_DONE0] = 0x90,
+ [PWRAP_WACS0_CMD] = 0xc00,
+ [PWRAP_WACS0_RDATA] = 0xc04,
+ [PWRAP_WACS0_VLDCLR] = 0xc08,
+ [PWRAP_WACS1_EN] = 0x94,
+ [PWRAP_INIT_DONE1] = 0x98,
+ [PWRAP_WACS2_EN] = 0x9c,
+ [PWRAP_INIT_DONE2] = 0xa0,
+ [PWRAP_WACS2_CMD] = 0xc20,
+ [PWRAP_WACS2_RDATA] = 0xc24,
+ [PWRAP_WACS2_VLDCLR] = 0xc28,
+ [PWRAP_INT_EN] = 0xb4,
+ [PWRAP_INT_FLG_RAW] = 0xb8,
+ [PWRAP_INT_FLG] = 0xbc,
+ [PWRAP_INT_CLR] = 0xc0,
+ [PWRAP_SIG_ADR] = 0xd4,
+ [PWRAP_SIG_MODE] = 0xd8,
+ [PWRAP_SIG_VALUE] = 0xdc,
+ [PWRAP_SIG_ERRVAL] = 0xe0,
+ [PWRAP_CRC_EN] = 0xe4,
+ [PWRAP_TIMER_EN] = 0xe8,
+ [PWRAP_TIMER_STA] = 0xec,
+ [PWRAP_WDT_UNIT] = 0xf0,
+ [PWRAP_WDT_SRC_EN] = 0xf4,
+ [PWRAP_WDT_FLG] = 0xfc,
+ [PWRAP_DEBUG_INT_SEL] = 0x104,
+ [PWRAP_CIPHER_KEY_SEL] = 0x1c4,
+ [PWRAP_CIPHER_IV_SEL] = 0x1c8,
+ [PWRAP_CIPHER_RDY] = 0x1d0,
+ [PWRAP_CIPHER_MODE] = 0x1d4,
+ [PWRAP_CIPHER_SWRST] = 0x1d8,
+ [PWRAP_DCM_EN] = 0x1dc,
+ [PWRAP_DCM_DBC_PRD] = 0x1e0,
+ [PWRAP_EINT_STA0_ADR] = 0x44,
+ [PWRAP_EINT_STA1_ADR] = 0x48,
+ [PWRAP_INT1_EN] = 0xc4,
+ [PWRAP_INT1_FLG] = 0xcc,
+ [PWRAP_INT1_CLR] = 0xd0,
+ [PWRAP_WDT_SRC_EN_1] = 0xf8,
+};
+
static int mt8516_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1136,6 +1198,7 @@ enum pwrap_type {
PWRAP_MT8183,
PWRAP_MT8186,
PWRAP_MT8195,
+ PWRAP_MT8365,
PWRAP_MT8516,
};
@@ -1590,6 +1653,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT6797:
case PWRAP_MT8173:
case PWRAP_MT8186:
+ case PWRAP_MT8365:
case PWRAP_MT8516:
pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
break;
@@ -2112,6 +2176,19 @@ static struct pmic_wrapper_type pwrap_mt8195 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt8365 = {
+ .regs = mt8365_regs,
+ .type = PWRAP_MT8365,
+ .arb_en_all = 0x3ffff,
+ .int_en_all = 0x7f1fffff,
+ .int1_en_all = 0x0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_WDT_SRC1,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static struct pmic_wrapper_type pwrap_mt8516 = {
.regs = mt8516_regs,
.type = PWRAP_MT8516,
@@ -2171,6 +2248,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
}, {
.compatible = "mediatek,mt8195-pwrap",
.data = &pwrap_mt8195,
+ }, {
+ .compatible = "mediatek,mt8365-pwrap",
+ .data = &pwrap_mt8365,
}, {
.compatible = "mediatek,mt8516-pwrap",
.data = &pwrap_mt8516,
--
2.36.1
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] soc: mediatek: pwrap: add mt8365 SoC support
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
Add PMIC Wrap support for MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 80 ++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 8dea5e14d73e..16595c3330ef 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -980,6 +980,68 @@ static int mt8195_regs[] = {
[PWRAP_WACS2_RDATA] = 0x8A8,
};
+static int mt8365_regs[] = {
+ [PWRAP_MUX_SEL] = 0x0,
+ [PWRAP_WRAP_EN] = 0x4,
+ [PWRAP_DIO_EN] = 0x8,
+ [PWRAP_CSHEXT_WRITE] = 0x24,
+ [PWRAP_CSHEXT_READ] = 0x28,
+ [PWRAP_STAUPD_PRD] = 0x3c,
+ [PWRAP_STAUPD_GRPEN] = 0x40,
+ [PWRAP_STAUPD_MAN_TRIG] = 0x58,
+ [PWRAP_STAUPD_STA] = 0x5c,
+ [PWRAP_WRAP_STA] = 0x60,
+ [PWRAP_HARB_INIT] = 0x64,
+ [PWRAP_HARB_HPRIO] = 0x68,
+ [PWRAP_HIPRIO_ARB_EN] = 0x6c,
+ [PWRAP_HARB_STA0] = 0x70,
+ [PWRAP_HARB_STA1] = 0x74,
+ [PWRAP_MAN_EN] = 0x7c,
+ [PWRAP_MAN_CMD] = 0x80,
+ [PWRAP_MAN_RDATA] = 0x84,
+ [PWRAP_MAN_VLDCLR] = 0x88,
+ [PWRAP_WACS0_EN] = 0x8c,
+ [PWRAP_INIT_DONE0] = 0x90,
+ [PWRAP_WACS0_CMD] = 0xc00,
+ [PWRAP_WACS0_RDATA] = 0xc04,
+ [PWRAP_WACS0_VLDCLR] = 0xc08,
+ [PWRAP_WACS1_EN] = 0x94,
+ [PWRAP_INIT_DONE1] = 0x98,
+ [PWRAP_WACS2_EN] = 0x9c,
+ [PWRAP_INIT_DONE2] = 0xa0,
+ [PWRAP_WACS2_CMD] = 0xc20,
+ [PWRAP_WACS2_RDATA] = 0xc24,
+ [PWRAP_WACS2_VLDCLR] = 0xc28,
+ [PWRAP_INT_EN] = 0xb4,
+ [PWRAP_INT_FLG_RAW] = 0xb8,
+ [PWRAP_INT_FLG] = 0xbc,
+ [PWRAP_INT_CLR] = 0xc0,
+ [PWRAP_SIG_ADR] = 0xd4,
+ [PWRAP_SIG_MODE] = 0xd8,
+ [PWRAP_SIG_VALUE] = 0xdc,
+ [PWRAP_SIG_ERRVAL] = 0xe0,
+ [PWRAP_CRC_EN] = 0xe4,
+ [PWRAP_TIMER_EN] = 0xe8,
+ [PWRAP_TIMER_STA] = 0xec,
+ [PWRAP_WDT_UNIT] = 0xf0,
+ [PWRAP_WDT_SRC_EN] = 0xf4,
+ [PWRAP_WDT_FLG] = 0xfc,
+ [PWRAP_DEBUG_INT_SEL] = 0x104,
+ [PWRAP_CIPHER_KEY_SEL] = 0x1c4,
+ [PWRAP_CIPHER_IV_SEL] = 0x1c8,
+ [PWRAP_CIPHER_RDY] = 0x1d0,
+ [PWRAP_CIPHER_MODE] = 0x1d4,
+ [PWRAP_CIPHER_SWRST] = 0x1d8,
+ [PWRAP_DCM_EN] = 0x1dc,
+ [PWRAP_DCM_DBC_PRD] = 0x1e0,
+ [PWRAP_EINT_STA0_ADR] = 0x44,
+ [PWRAP_EINT_STA1_ADR] = 0x48,
+ [PWRAP_INT1_EN] = 0xc4,
+ [PWRAP_INT1_FLG] = 0xcc,
+ [PWRAP_INT1_CLR] = 0xd0,
+ [PWRAP_WDT_SRC_EN_1] = 0xf8,
+};
+
static int mt8516_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1136,6 +1198,7 @@ enum pwrap_type {
PWRAP_MT8183,
PWRAP_MT8186,
PWRAP_MT8195,
+ PWRAP_MT8365,
PWRAP_MT8516,
};
@@ -1590,6 +1653,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT6797:
case PWRAP_MT8173:
case PWRAP_MT8186:
+ case PWRAP_MT8365:
case PWRAP_MT8516:
pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
break;
@@ -2112,6 +2176,19 @@ static struct pmic_wrapper_type pwrap_mt8195 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt8365 = {
+ .regs = mt8365_regs,
+ .type = PWRAP_MT8365,
+ .arb_en_all = 0x3ffff,
+ .int_en_all = 0x7f1fffff,
+ .int1_en_all = 0x0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_WDT_SRC1,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static struct pmic_wrapper_type pwrap_mt8516 = {
.regs = mt8516_regs,
.type = PWRAP_MT8516,
@@ -2171,6 +2248,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
}, {
.compatible = "mediatek,mt8195-pwrap",
.data = &pwrap_mt8195,
+ }, {
+ .compatible = "mediatek,mt8365-pwrap",
+ .data = &pwrap_mt8365,
}, {
.compatible = "mediatek,mt8516-pwrap",
.data = &pwrap_mt8516,
--
2.36.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 3/3] soc: mediatek: pwrap: add mt8365 SoC support
@ 2022-05-30 13:55 ` Fabien Parent
0 siblings, 0 replies; 14+ messages in thread
From: Fabien Parent @ 2022-05-30 13:55 UTC (permalink / raw)
To: Matthias Brugger
Cc: Fabien Parent, linux-arm-kernel, linux-mediatek, linux-kernel
Add PMIC Wrap support for MT8365 SoC.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 80 ++++++++++++++++++++++++++++
1 file changed, 80 insertions(+)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index 8dea5e14d73e..16595c3330ef 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -980,6 +980,68 @@ static int mt8195_regs[] = {
[PWRAP_WACS2_RDATA] = 0x8A8,
};
+static int mt8365_regs[] = {
+ [PWRAP_MUX_SEL] = 0x0,
+ [PWRAP_WRAP_EN] = 0x4,
+ [PWRAP_DIO_EN] = 0x8,
+ [PWRAP_CSHEXT_WRITE] = 0x24,
+ [PWRAP_CSHEXT_READ] = 0x28,
+ [PWRAP_STAUPD_PRD] = 0x3c,
+ [PWRAP_STAUPD_GRPEN] = 0x40,
+ [PWRAP_STAUPD_MAN_TRIG] = 0x58,
+ [PWRAP_STAUPD_STA] = 0x5c,
+ [PWRAP_WRAP_STA] = 0x60,
+ [PWRAP_HARB_INIT] = 0x64,
+ [PWRAP_HARB_HPRIO] = 0x68,
+ [PWRAP_HIPRIO_ARB_EN] = 0x6c,
+ [PWRAP_HARB_STA0] = 0x70,
+ [PWRAP_HARB_STA1] = 0x74,
+ [PWRAP_MAN_EN] = 0x7c,
+ [PWRAP_MAN_CMD] = 0x80,
+ [PWRAP_MAN_RDATA] = 0x84,
+ [PWRAP_MAN_VLDCLR] = 0x88,
+ [PWRAP_WACS0_EN] = 0x8c,
+ [PWRAP_INIT_DONE0] = 0x90,
+ [PWRAP_WACS0_CMD] = 0xc00,
+ [PWRAP_WACS0_RDATA] = 0xc04,
+ [PWRAP_WACS0_VLDCLR] = 0xc08,
+ [PWRAP_WACS1_EN] = 0x94,
+ [PWRAP_INIT_DONE1] = 0x98,
+ [PWRAP_WACS2_EN] = 0x9c,
+ [PWRAP_INIT_DONE2] = 0xa0,
+ [PWRAP_WACS2_CMD] = 0xc20,
+ [PWRAP_WACS2_RDATA] = 0xc24,
+ [PWRAP_WACS2_VLDCLR] = 0xc28,
+ [PWRAP_INT_EN] = 0xb4,
+ [PWRAP_INT_FLG_RAW] = 0xb8,
+ [PWRAP_INT_FLG] = 0xbc,
+ [PWRAP_INT_CLR] = 0xc0,
+ [PWRAP_SIG_ADR] = 0xd4,
+ [PWRAP_SIG_MODE] = 0xd8,
+ [PWRAP_SIG_VALUE] = 0xdc,
+ [PWRAP_SIG_ERRVAL] = 0xe0,
+ [PWRAP_CRC_EN] = 0xe4,
+ [PWRAP_TIMER_EN] = 0xe8,
+ [PWRAP_TIMER_STA] = 0xec,
+ [PWRAP_WDT_UNIT] = 0xf0,
+ [PWRAP_WDT_SRC_EN] = 0xf4,
+ [PWRAP_WDT_FLG] = 0xfc,
+ [PWRAP_DEBUG_INT_SEL] = 0x104,
+ [PWRAP_CIPHER_KEY_SEL] = 0x1c4,
+ [PWRAP_CIPHER_IV_SEL] = 0x1c8,
+ [PWRAP_CIPHER_RDY] = 0x1d0,
+ [PWRAP_CIPHER_MODE] = 0x1d4,
+ [PWRAP_CIPHER_SWRST] = 0x1d8,
+ [PWRAP_DCM_EN] = 0x1dc,
+ [PWRAP_DCM_DBC_PRD] = 0x1e0,
+ [PWRAP_EINT_STA0_ADR] = 0x44,
+ [PWRAP_EINT_STA1_ADR] = 0x48,
+ [PWRAP_INT1_EN] = 0xc4,
+ [PWRAP_INT1_FLG] = 0xcc,
+ [PWRAP_INT1_CLR] = 0xd0,
+ [PWRAP_WDT_SRC_EN_1] = 0xf8,
+};
+
static int mt8516_regs[] = {
[PWRAP_MUX_SEL] = 0x0,
[PWRAP_WRAP_EN] = 0x4,
@@ -1136,6 +1198,7 @@ enum pwrap_type {
PWRAP_MT8183,
PWRAP_MT8186,
PWRAP_MT8195,
+ PWRAP_MT8365,
PWRAP_MT8516,
};
@@ -1590,6 +1653,7 @@ static int pwrap_init_cipher(struct pmic_wrapper *wrp)
case PWRAP_MT6797:
case PWRAP_MT8173:
case PWRAP_MT8186:
+ case PWRAP_MT8365:
case PWRAP_MT8516:
pwrap_writel(wrp, 1, PWRAP_CIPHER_EN);
break;
@@ -2112,6 +2176,19 @@ static struct pmic_wrapper_type pwrap_mt8195 = {
.init_soc_specific = NULL,
};
+static const struct pmic_wrapper_type pwrap_mt8365 = {
+ .regs = mt8365_regs,
+ .type = PWRAP_MT8365,
+ .arb_en_all = 0x3ffff,
+ .int_en_all = 0x7f1fffff,
+ .int1_en_all = 0x0,
+ .spi_w = PWRAP_MAN_CMD_SPI_WRITE,
+ .wdt_src = PWRAP_WDT_SRC_MASK_ALL,
+ .caps = PWRAP_CAP_INT1_EN | PWRAP_CAP_WDT_SRC1,
+ .init_reg_clock = pwrap_common_init_reg_clock,
+ .init_soc_specific = NULL,
+};
+
static struct pmic_wrapper_type pwrap_mt8516 = {
.regs = mt8516_regs,
.type = PWRAP_MT8516,
@@ -2171,6 +2248,9 @@ static const struct of_device_id of_pwrap_match_tbl[] = {
}, {
.compatible = "mediatek,mt8195-pwrap",
.data = &pwrap_mt8195,
+ }, {
+ .compatible = "mediatek,mt8365-pwrap",
+ .data = &pwrap_mt8365,
}, {
.compatible = "mediatek,mt8516-pwrap",
.data = &pwrap_mt8516,
--
2.36.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
2022-05-30 13:55 ` Fabien Parent
(?)
@ 2022-06-05 15:10 ` Rob Herring
-1 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2022-06-05 15:10 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, Krzysztof Kozlowski, Rob Herring, Matthias Brugger,
linux-kernel, linux-mediatek, linux-arm-kernel
On Mon, 30 May 2022 15:55:20 +0200, Fabien Parent wrote:
> Add pwrap binding documentation for
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
@ 2022-06-05 15:10 ` Rob Herring
0 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2022-06-05 15:10 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, Krzysztof Kozlowski, Rob Herring, Matthias Brugger,
linux-kernel, linux-mediatek, linux-arm-kernel
On Mon, 30 May 2022 15:55:20 +0200, Fabien Parent wrote:
> Add pwrap binding documentation for
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
Linux-mediatek mailing list
Linux-mediatek@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-mediatek
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings
@ 2022-06-05 15:10 ` Rob Herring
0 siblings, 0 replies; 14+ messages in thread
From: Rob Herring @ 2022-06-05 15:10 UTC (permalink / raw)
To: Fabien Parent
Cc: devicetree, Krzysztof Kozlowski, Rob Herring, Matthias Brugger,
linux-kernel, linux-mediatek, linux-arm-kernel
On Mon, 30 May 2022 15:55:20 +0200, Fabien Parent wrote:
> Add pwrap binding documentation for
>
> Signed-off-by: Fabien Parent <fparent@baylibre.com>
> ---
> Documentation/devicetree/bindings/soc/mediatek/pwrap.txt | 3 +++
> 1 file changed, 3 insertions(+)
>
Acked-by: Rob Herring <robh@kernel.org>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks
2022-10-20 13:09 [PATCH 0/3] mediatek: pwrap: Add mt8365 pwrap support fchiby
@ 2022-10-20 13:09 ` fchiby
0 siblings, 0 replies; 14+ messages in thread
From: fchiby @ 2022-10-20 13:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
AngeloGioacchino Del Regno, Johnson Wang, Zhiyong.Tao
Cc: Fabien Parent, Sen Chu, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek
From: Fabien Parent <fparent@baylibre.com>
MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index eb82ae06697f..d56b00023ccd 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1171,6 +1171,8 @@ struct pmic_wrapper {
const struct pwrap_slv_type *slave;
struct clk *clk_spi;
struct clk *clk_wrap;
+ struct clk *clk_sys;
+ struct clk *clk_tmr;
struct reset_control *rstc;
struct reset_control *rstc_bridge;
@@ -2214,6 +2216,20 @@ static int pwrap_probe(struct platform_device *pdev)
return PTR_ERR(wrp->clk_wrap);
}
+ wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys");
+ if (IS_ERR(wrp->clk_sys)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys),
+ "failed to get clock: %pe\n",
+ wrp->clk_sys);
+ }
+
+ wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr");
+ if (IS_ERR(wrp->clk_tmr)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr),
+ "failed to get clock: %pe\n",
+ wrp->clk_tmr);
+ }
+
ret = clk_prepare_enable(wrp->clk_spi);
if (ret)
return ret;
@@ -2222,6 +2238,14 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret)
goto err_out1;
+ ret = clk_prepare_enable(wrp->clk_sys);
+ if (ret)
+ goto err_out2;
+
+ ret = clk_prepare_enable(wrp->clk_tmr);
+ if (ret)
+ goto err_out3;
+
/* Enable internal dynamic clock */
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
pwrap_writel(wrp, 1, PWRAP_DCM_EN);
@@ -2236,7 +2260,7 @@ static int pwrap_probe(struct platform_device *pdev)
ret = pwrap_init(wrp);
if (ret) {
dev_dbg(wrp->dev, "init failed with %d\n", ret);
- goto err_out2;
+ goto err_out4;
}
}
@@ -2250,7 +2274,7 @@ static int pwrap_probe(struct platform_device *pdev)
if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
- goto err_out2;
+ goto err_out4;
}
/* Initialize watchdog, may not be done by the bootloader */
@@ -2288,7 +2312,7 @@ static int pwrap_probe(struct platform_device *pdev)
IRQF_TRIGGER_HIGH,
"mt-pmic-pwrap", wrp);
if (ret)
- goto err_out2;
+ goto err_out4;
wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regops->regmap);
if (IS_ERR(wrp->regmap)) {
@@ -2300,11 +2324,15 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret) {
dev_dbg(wrp->dev, "failed to create child devices at %pOF\n",
np);
- goto err_out2;
+ goto err_out4;
}
return 0;
+err_out4:
+ clk_disable_unprepare(wrp->clk_tmr);
+err_out3:
+ clk_disable_unprepare(wrp->clk_sys);
err_out2:
clk_disable_unprepare(wrp->clk_wrap);
err_out1:
--
2.25.1
^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks
@ 2022-10-20 13:09 ` fchiby
0 siblings, 0 replies; 14+ messages in thread
From: fchiby @ 2022-10-20 13:09 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Matthias Brugger,
AngeloGioacchino Del Regno, Johnson Wang, Zhiyong.Tao
Cc: Fabien Parent, Sen Chu, devicetree, linux-kernel,
linux-arm-kernel, linux-mediatek
From: Fabien Parent <fparent@baylibre.com>
MT8365 requires an extra 2 clocks to be enabled to behave correctly.
Add support these 2 clocks, they are made optional since they seem to
be present only on MT8365.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
---
drivers/soc/mediatek/mtk-pmic-wrap.c | 36 ++++++++++++++++++++++++----
1 file changed, 32 insertions(+), 4 deletions(-)
diff --git a/drivers/soc/mediatek/mtk-pmic-wrap.c b/drivers/soc/mediatek/mtk-pmic-wrap.c
index eb82ae06697f..d56b00023ccd 100644
--- a/drivers/soc/mediatek/mtk-pmic-wrap.c
+++ b/drivers/soc/mediatek/mtk-pmic-wrap.c
@@ -1171,6 +1171,8 @@ struct pmic_wrapper {
const struct pwrap_slv_type *slave;
struct clk *clk_spi;
struct clk *clk_wrap;
+ struct clk *clk_sys;
+ struct clk *clk_tmr;
struct reset_control *rstc;
struct reset_control *rstc_bridge;
@@ -2214,6 +2216,20 @@ static int pwrap_probe(struct platform_device *pdev)
return PTR_ERR(wrp->clk_wrap);
}
+ wrp->clk_sys = devm_clk_get_optional(wrp->dev, "sys");
+ if (IS_ERR(wrp->clk_sys)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_sys),
+ "failed to get clock: %pe\n",
+ wrp->clk_sys);
+ }
+
+ wrp->clk_tmr = devm_clk_get_optional(wrp->dev, "tmr");
+ if (IS_ERR(wrp->clk_tmr)) {
+ return dev_err_probe(wrp->dev, PTR_ERR(wrp->clk_tmr),
+ "failed to get clock: %pe\n",
+ wrp->clk_tmr);
+ }
+
ret = clk_prepare_enable(wrp->clk_spi);
if (ret)
return ret;
@@ -2222,6 +2238,14 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret)
goto err_out1;
+ ret = clk_prepare_enable(wrp->clk_sys);
+ if (ret)
+ goto err_out2;
+
+ ret = clk_prepare_enable(wrp->clk_tmr);
+ if (ret)
+ goto err_out3;
+
/* Enable internal dynamic clock */
if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
pwrap_writel(wrp, 1, PWRAP_DCM_EN);
@@ -2236,7 +2260,7 @@ static int pwrap_probe(struct platform_device *pdev)
ret = pwrap_init(wrp);
if (ret) {
dev_dbg(wrp->dev, "init failed with %d\n", ret);
- goto err_out2;
+ goto err_out4;
}
}
@@ -2250,7 +2274,7 @@ static int pwrap_probe(struct platform_device *pdev)
if (!(pwrap_readl(wrp, PWRAP_WACS2_RDATA) & mask_done)) {
dev_dbg(wrp->dev, "initialization isn't finished\n");
ret = -ENODEV;
- goto err_out2;
+ goto err_out4;
}
/* Initialize watchdog, may not be done by the bootloader */
@@ -2288,7 +2312,7 @@ static int pwrap_probe(struct platform_device *pdev)
IRQF_TRIGGER_HIGH,
"mt-pmic-pwrap", wrp);
if (ret)
- goto err_out2;
+ goto err_out4;
wrp->regmap = devm_regmap_init(wrp->dev, NULL, wrp, wrp->slave->regops->regmap);
if (IS_ERR(wrp->regmap)) {
@@ -2300,11 +2324,15 @@ static int pwrap_probe(struct platform_device *pdev)
if (ret) {
dev_dbg(wrp->dev, "failed to create child devices at %pOF\n",
np);
- goto err_out2;
+ goto err_out4;
}
return 0;
+err_out4:
+ clk_disable_unprepare(wrp->clk_tmr);
+err_out3:
+ clk_disable_unprepare(wrp->clk_sys);
err_out2:
clk_disable_unprepare(wrp->clk_wrap);
err_out1:
--
2.25.1
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^ permalink raw reply related [flat|nested] 14+ messages in thread
end of thread, other threads:[~2022-10-20 13:27 UTC | newest]
Thread overview: 14+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-30 13:55 [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-05-30 13:55 ` [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-05-30 13:55 ` [PATCH 3/3] soc: mediatek: pwrap: add mt8365 SoC support Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-05-30 13:55 ` Fabien Parent
2022-06-05 15:10 ` [PATCH 1/3] dt-bindings: soc: mediatek: pwrap: add MT8365 SoC bindings Rob Herring
2022-06-05 15:10 ` Rob Herring
2022-06-05 15:10 ` Rob Herring
2022-10-20 13:09 [PATCH 0/3] mediatek: pwrap: Add mt8365 pwrap support fchiby
2022-10-20 13:09 ` [PATCH 2/3] soc: mediatek: pwrap: add support for sys & tmr clocks fchiby
2022-10-20 13:09 ` fchiby
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