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From: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
To: u-boot@lists.denx.de
Cc: Michal Simek <michal.simek@xilinx.com>,
	Adrian Fiergolski <adrian.fiergolski@fastree3d.com>,
	Ricardo Salveti <ricardo@foundries.io>,
	Jorge Ramirez-Ortiz <jorge@foundries.io>,
	Igor Opaniuk <igor.opaniuk@foundries.io>,
	Oleksandr Suvorov <oleksandr.suvorov@foundries.io>,
	Michal Simek <michal.simek@amd.com>
Subject: [PATCH v8 10/14] fpga: xilinx: pass compatible flags to load() callback
Date: Wed,  1 Jun 2022 02:08:35 +0300	[thread overview]
Message-ID: <20220531230839.183690-11-oleksandr.suvorov@foundries.io> (raw)
In-Reply-To: <20220531230839.183690-10-oleksandr.suvorov@foundries.io>

These flags may be used to check whether an FPGA driver is able to
load a particular FPGA bitstream image.

Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io>
---

(no changes since v1)

 drivers/fpga/spartan2.c | 2 +-
 drivers/fpga/spartan3.c | 2 +-
 drivers/fpga/versalpl.c | 2 +-
 drivers/fpga/virtex2.c  | 2 +-
 drivers/fpga/xilinx.c   | 2 +-
 drivers/fpga/zynqmppl.c | 2 +-
 drivers/fpga/zynqpl.c   | 2 +-
 include/xilinx.h        | 2 +-
 8 files changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/fpga/spartan2.c b/drivers/fpga/spartan2.c
index 3435400e58b..328740f3f35 100644
--- a/drivers/fpga/spartan2.c
+++ b/drivers/fpga/spartan2.c
@@ -41,7 +41,7 @@ static int spartan2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
 static int spartan2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			 bitstream_type bstype)
+			 bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/spartan3.c b/drivers/fpga/spartan3.c
index 4850c99352d..918f6db5065 100644
--- a/drivers/fpga/spartan3.c
+++ b/drivers/fpga/spartan3.c
@@ -45,7 +45,7 @@ static int spartan3_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 /* ------------------------------------------------------------------------- */
 /* Spartan-II Generic Implementation */
 static int spartan3_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			 bitstream_type bstype)
+			 bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/versalpl.c b/drivers/fpga/versalpl.c
index c44a7d34557..d3876a8f541 100644
--- a/drivers/fpga/versalpl.c
+++ b/drivers/fpga/versalpl.c
@@ -27,7 +27,7 @@ static ulong versal_align_dma_buffer(ulong *buf, u32 len)
 }
 
 static int versal_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		       bitstream_type bstype)
+		       bitstream_type bstype, int flags)
 {
 	ulong bin_buf;
 	int ret;
diff --git a/drivers/fpga/virtex2.c b/drivers/fpga/virtex2.c
index b3e0537bab0..83b90298cad 100644
--- a/drivers/fpga/virtex2.c
+++ b/drivers/fpga/virtex2.c
@@ -94,7 +94,7 @@ static int virtex2_ss_load(xilinx_desc *desc, const void *buf, size_t bsize);
 static int virtex2_ss_dump(xilinx_desc *desc, const void *buf, size_t bsize);
 
 static int virtex2_load(xilinx_desc *desc, const void *buf, size_t bsize,
-			bitstream_type bstype)
+			bitstream_type bstype, int flags)
 {
 	int ret_val = FPGA_FAIL;
 
diff --git a/drivers/fpga/xilinx.c b/drivers/fpga/xilinx.c
index d9951ca3ecf..8170c3368ef 100644
--- a/drivers/fpga/xilinx.c
+++ b/drivers/fpga/xilinx.c
@@ -151,7 +151,7 @@ int xilinx_load(xilinx_desc *desc, const void *buf, size_t bsize,
 		return FPGA_FAIL;
 	}
 
-	return desc->operations->load(desc, buf, bsize, bstype);
+	return desc->operations->load(desc, buf, bsize, bstype, flags);
 }
 
 #if defined(CONFIG_CMD_FPGA_LOADFS)
diff --git a/drivers/fpga/zynqmppl.c b/drivers/fpga/zynqmppl.c
index 0ffcff0c148..239c498f7b5 100644
--- a/drivers/fpga/zynqmppl.c
+++ b/drivers/fpga/zynqmppl.c
@@ -200,7 +200,7 @@ static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
 }
 
 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		     bitstream_type bstype)
+		     bitstream_type bstype, int flags)
 {
 	ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
 	u32 swap = 0;
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index 2de40109a81..d8ebd542abd 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -371,7 +371,7 @@ static int zynq_validate_bitstream(xilinx_desc *desc, const void *buf,
 }
 
 static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
-		     bitstream_type bstype)
+		     bitstream_type bstype, int flags)
 {
 	unsigned long ts; /* Timestamp */
 	u32 isr_status, swap;
diff --git a/include/xilinx.h b/include/xilinx.h
index a9e68138169..89a12818311 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -53,7 +53,7 @@ typedef struct {		/* typedef xilinx_desc */
 
 struct xilinx_fpga_op {
 	int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
-		    bitstream_type bstype);
+		    bitstream_type bstype, int flags);
 	int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
 		      fpga_fs_info *fpga_fsinfo);
 	int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
-- 
2.36.1


  reply	other threads:[~2022-05-31 23:10 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-31 23:08 [PATCH v8 00/14] fpga: zynqmp: Adding support of loading authenticated images Oleksandr Suvorov
2022-05-31 23:08 ` [PATCH v8 01/14] Prepare v2022.07-rc3 Oleksandr Suvorov
2022-05-31 23:08   ` [PATCH v8 02/14] fpga: add option for loading FPGA secure bitstreams Oleksandr Suvorov
2022-05-31 23:08     ` [PATCH v8 03/14] fpga: xilinx: add missed identifier names Oleksandr Suvorov
2022-05-31 23:08       ` [PATCH v8 04/14] fpga: xilinx: add bitstream flags to driver desc Oleksandr Suvorov
2022-05-31 23:08         ` [PATCH v8 05/14] fpga: zynqmp: add str2flags call Oleksandr Suvorov
2022-05-31 23:08           ` [PATCH v8 06/14] fpga: add fpga_compatible2flag Oleksandr Suvorov
2022-05-31 23:08             ` [PATCH v8 07/14] fpga: xilinx: pass compatible flags to xilinx_load() Oleksandr Suvorov
2022-05-31 23:08               ` [PATCH v8 08/14] fpga: pass compatible flags to fpga_load() Oleksandr Suvorov
2022-05-31 23:08                 ` [PATCH v8 09/14] spl: fit: pass real " Oleksandr Suvorov
2022-05-31 23:08                   ` Oleksandr Suvorov [this message]
2022-05-31 23:08                     ` [PATCH v8 11/14] fpga: zynqmp: optimize zynqmppl_load() code Oleksandr Suvorov
2022-05-31 23:08                       ` [PATCH v8 12/14] fpga: zynqmp: add bitstream compatible checking Oleksandr Suvorov
2022-05-31 23:08                         ` [PATCH v8 13/14] fpga: zynqmp: support loading authenticated images Oleksandr Suvorov
2022-05-31 23:08                           ` [PATCH v8 14/14] fpga: zynqmp: support loading encrypted bitfiles Oleksandr Suvorov

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