* [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support
@ 2022-06-01 2:22 ` William Zhang
0 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
[-- Attachment #1: Type: text/plain, Size: 1085 bytes --]
This change adds the basic support for Broadcom's ARMv7 based
Broadband SoC BCM6846. The initial support includes a bare-bone dts
for dual core ARM A7 with a Broadcom uart.
Changes in v3:
- Simplify dt-bindings patch subject line
- Fix timer PPI interrupt cpu mask for dual core cpu
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
Changes in v2:
- Add new line between entries
William Zhang (3):
dt-bindings: arm: add BCM6846 SoC
ARM: dts: add dts files for bcmbca SoC bcm6846
MAINTAINERS: add bcm6846 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 ++
MAINTAINERS | 3 +-
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm6846.dtsi | 103 ++++++++++++++++++
arch/arm/boot/dts/bcm96846.dts | 30 +++++
5 files changed, 143 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm6846.dtsi
create mode 100644 arch/arm/boot/dts/bcm96846.dts
--
2.36.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support
@ 2022-06-01 2:22 ` William Zhang
0 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
[-- Attachment #1.1: Type: text/plain, Size: 1085 bytes --]
This change adds the basic support for Broadcom's ARMv7 based
Broadband SoC BCM6846. The initial support includes a bare-bone dts
for dual core ARM A7 with a Broadcom uart.
Changes in v3:
- Simplify dt-bindings patch subject line
- Fix timer PPI interrupt cpu mask for dual core cpu
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
Changes in v2:
- Add new line between entries
William Zhang (3):
dt-bindings: arm: add BCM6846 SoC
ARM: dts: add dts files for bcmbca SoC bcm6846
MAINTAINERS: add bcm6846 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 ++
MAINTAINERS | 3 +-
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm6846.dtsi | 103 ++++++++++++++++++
arch/arm/boot/dts/bcm96846.dts | 30 +++++
5 files changed, 143 insertions(+), 3 deletions(-)
create mode 100644 arch/arm/boot/dts/bcm6846.dtsi
create mode 100644 arch/arm/boot/dts/bcm96846.dts
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v3 1/3] dt-bindings: arm: add BCM6846 SoC
2022-06-01 2:22 ` William Zhang
@ 2022-06-01 2:22 ` William Zhang
-1 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Krzysztof Kozlowski,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1035 bytes --]
Add BCM6846 SoC device tree description to bcmbca binding document.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v3:
- Simplify dt-bindings patch subject line
Changes in v2:
- Add new line between entries
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 5fb455840417..b0a96092b239 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -28,6 +28,13 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
+ - description: BCM6846 based boards
+ items:
+ - enum:
+ - brcm,bcm96846
+ - const: brcm,bcm6846
+ - const: brcm,bcmbca
+
additionalProperties: true
...
--
2.36.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 1/3] dt-bindings: arm: add BCM6846 SoC
@ 2022-06-01 2:22 ` William Zhang
0 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Krzysztof Kozlowski,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Rob Herring, devicetree, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 1035 bytes --]
Add BCM6846 SoC device tree description to bcmbca binding document.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v3:
- Simplify dt-bindings patch subject line
Changes in v2:
- Add new line between entries
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 5fb455840417..b0a96092b239 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -28,6 +28,13 @@ properties:
- const: brcm,bcm47622
- const: brcm,bcmbca
+ - description: BCM6846 based boards
+ items:
+ - enum:
+ - brcm,bcm96846
+ - const: brcm,bcm6846
+ - const: brcm,bcmbca
+
additionalProperties: true
...
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/3] ARM: dts: add dts files for bcmbca SoC bcm6846
2022-06-01 2:22 ` William Zhang
@ 2022-06-01 2:22 ` William Zhang
-1 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
[-- Attachment #1: Type: text/plain, Size: 4449 bytes --]
Add dts for ARMv7 based broadband SoC BCM6846. bcm6846.dtsi is the
SoC description dts header and bcm96846.dts is a simple dts file for
Broadcom BCM96846 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v3:
- Fix timer PPI interrupt cpu mask for dual core cpu
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm6846.dtsi | 103 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm96846.dts | 30 ++++++++++
3 files changed, 135 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/bcm6846.dtsi
create mode 100644 arch/arm/boot/dts/bcm96846.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 03f5b3a15415..2f20dcf74858 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -182,7 +182,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
dtb-$(CONFIG_ARCH_BCMBCA) += \
- bcm947622.dtb
+ bcm947622.dtb \
+ bcm96846.dtb
dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi
new file mode 100644
index 000000000000..8aa47a2583b2
--- /dev/null
+++ b/arch/arm/boot/dts/bcm6846.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ compatible = "brcm,bcm6846", "brcm,bcmbca";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CA7_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CA7_1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CA7_0>, <&CA7_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xff800000 0x800000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x1b>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts
new file mode 100644
index 000000000000..c70ebccabc19
--- /dev/null
+++ b/arch/arm/boot/dts/bcm96846.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6846.dtsi"
+
+/ {
+ model = "Broadcom BCM96846 Reference Board";
+ compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.36.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 2/3] ARM: dts: add dts files for bcmbca SoC bcm6846
@ 2022-06-01 2:22 ` William Zhang
0 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
[-- Attachment #1.1: Type: text/plain, Size: 4449 bytes --]
Add dts for ARMv7 based broadband SoC BCM6846. bcm6846.dtsi is the
SoC description dts header and bcm96846.dts is a simple dts file for
Broadcom BCM96846 Reference board that only enable the UART port.
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
Changes in v3:
- Fix timer PPI interrupt cpu mask for dual core cpu
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/bcm6846.dtsi | 103 +++++++++++++++++++++++++++++++++
arch/arm/boot/dts/bcm96846.dts | 30 ++++++++++
3 files changed, 135 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/bcm6846.dtsi
create mode 100644 arch/arm/boot/dts/bcm96846.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 03f5b3a15415..2f20dcf74858 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -182,7 +182,8 @@ dtb-$(CONFIG_ARCH_BERLIN) += \
dtb-$(CONFIG_ARCH_BRCMSTB) += \
bcm7445-bcm97445svmb.dtb
dtb-$(CONFIG_ARCH_BCMBCA) += \
- bcm947622.dtb
+ bcm947622.dtb \
+ bcm96846.dtb
dtb-$(CONFIG_ARCH_CLPS711X) += \
ep7211-edb7211.dtb
dtb-$(CONFIG_ARCH_DAVINCI) += \
diff --git a/arch/arm/boot/dts/bcm6846.dtsi b/arch/arm/boot/dts/bcm6846.dtsi
new file mode 100644
index 000000000000..8aa47a2583b2
--- /dev/null
+++ b/arch/arm/boot/dts/bcm6846.dtsi
@@ -0,0 +1,103 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/interrupt-controller/irq.h>
+
+/ {
+ compatible = "brcm,bcm6846", "brcm,bcmbca";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ CA7_0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ CA7_1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a7";
+ reg = <0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv7-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
+ arm,cpu-registers-not-fw-configured;
+ };
+
+ pmu: pmu {
+ compatible = "arm,cortex-a7-pmu";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&CA7_0>, <&CA7_1>;
+ };
+
+ clocks: clocks {
+ periph_clk: periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,cortex-a7-gic";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
+ reg = <0x1000 0x1000>,
+ <0x2000 0x2000>,
+ <0x4000 0x2000>,
+ <0x6000 0x2000>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0xff800000 0x800000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x1b>;
+ interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/bcm96846.dts b/arch/arm/boot/dts/bcm96846.dts
new file mode 100644
index 000000000000..c70ebccabc19
--- /dev/null
+++ b/arch/arm/boot/dts/bcm96846.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6846.dtsi"
+
+/ {
+ model = "Broadcom BCM96846 Reference Board";
+ compatible = "brcm,bcm96846", "brcm,bcm6846", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm6846 to bcmbca arch entry
2022-06-01 2:22 ` William Zhang
@ 2022-06-01 2:22 ` William Zhang
-1 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 775 bytes --]
Add bcm6846 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 216890b11060..db16ad2a604f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3774,10 +3774,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://github.com/broadcom/stblinux.git
F: Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
-F: arch/arm/boot/dts/bcm47622.dtsi
-F: arch/arm/boot/dts/bcm947622.dts
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?6846
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M: Nicolas Saenz Julienne <nsaenz@kernel.org>
--
2.36.1
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^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm6846 to bcmbca arch entry
@ 2022-06-01 2:22 ` William Zhang
0 siblings, 0 replies; 10+ messages in thread
From: William Zhang @ 2022-06-01 2:22 UTC (permalink / raw)
To: Linux ARM List
Cc: anand.gore, dan.beygelman, florian.fainelli, joel.peshkin,
tomer.yacoby, kursad.oney, samyon.furman, philippe.reynes,
William Zhang, linux-kernel
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Add bcm6846 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: William Zhang <william.zhang@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 216890b11060..db16ad2a604f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3774,10 +3774,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained
T: git git://github.com/broadcom/stblinux.git
F: Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
-F: arch/arm/boot/dts/bcm47622.dtsi
-F: arch/arm/boot/dts/bcm947622.dts
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?6846
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
M: Nicolas Saenz Julienne <nsaenz@kernel.org>
--
2.36.1
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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support
2022-06-01 2:22 ` William Zhang
@ 2022-06-08 9:19 ` Florian Fainelli
-1 siblings, 0 replies; 10+ messages in thread
From: Florian Fainelli @ 2022-06-08 9:19 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: anand.gore, dan.beygelman, joel.peshkin, tomer.yacoby,
kursad.oney, samyon.furman, philippe.reynes, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
On 6/1/2022 4:22 AM, William Zhang wrote:
> This change adds the basic support for Broadcom's ARMv7 based
> Broadband SoC BCM6846. The initial support includes a bare-bone dts
> for dual core ARM A7 with a Broadcom uart.
>
> Changes in v3:
> - Simplify dt-bindings patch subject line
> - Fix timer PPI interrupt cpu mask for dual core cpu
> - Remove unnecessary cpu_on and cpu_off properties from psci node
> - Add the missing gic registers and interrupts property to gic node
>
> Changes in v2:
> - Add new line between entries
Series applied, thanks William! I will comment on the VFP fixup separately.
--
Florian
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support
@ 2022-06-08 9:19 ` Florian Fainelli
0 siblings, 0 replies; 10+ messages in thread
From: Florian Fainelli @ 2022-06-08 9:19 UTC (permalink / raw)
To: William Zhang, Linux ARM List
Cc: anand.gore, dan.beygelman, joel.peshkin, tomer.yacoby,
kursad.oney, samyon.furman, philippe.reynes, Arnd Bergmann,
Broadcom internal kernel review list, Krzysztof Kozlowski,
Olof Johansson, Rob Herring, devicetree, linux-kernel, soc
On 6/1/2022 4:22 AM, William Zhang wrote:
> This change adds the basic support for Broadcom's ARMv7 based
> Broadband SoC BCM6846. The initial support includes a bare-bone dts
> for dual core ARM A7 with a Broadcom uart.
>
> Changes in v3:
> - Simplify dt-bindings patch subject line
> - Fix timer PPI interrupt cpu mask for dual core cpu
> - Remove unnecessary cpu_on and cpu_off properties from psci node
> - Add the missing gic registers and interrupts property to gic node
>
> Changes in v2:
> - Add new line between entries
Series applied, thanks William! I will comment on the VFP fixup separately.
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2022-06-08 9:51 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-01 2:22 [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support William Zhang
2022-06-01 2:22 ` William Zhang
2022-06-01 2:22 ` [PATCH v3 1/3] dt-bindings: arm: add BCM6846 SoC William Zhang
2022-06-01 2:22 ` William Zhang
2022-06-01 2:22 ` [PATCH v3 2/3] ARM: dts: add dts files for bcmbca SoC bcm6846 William Zhang
2022-06-01 2:22 ` William Zhang
2022-06-01 2:22 ` [PATCH v3 3/3] MAINTAINERS: add bcm6846 to bcmbca arch entry William Zhang
2022-06-01 2:22 ` William Zhang
2022-06-08 9:19 ` [PATCH v3 0/3] arm: bcmbca: add bcm6846 SoC support Florian Fainelli
2022-06-08 9:19 ` Florian Fainelli
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