* [PATCH] ddr:altera:soc64: Integer fix overflow that caused DDR size mismatched
@ 2022-05-10 6:15 dinesh.maniyam
2022-05-13 7:05 ` [PATCH v2] ddr: altera: soc64: " dinesh.maniyam
2022-06-01 10:49 ` [PATCH v3] " dinesh.maniyam
0 siblings, 2 replies; 5+ messages in thread
From: dinesh.maniyam @ 2022-05-10 6:15 UTC (permalink / raw)
To: u-boot
Cc: Siew Chin Lim, Tien Fong Chee, Kok Kiang, Yau Wai, Sin Hui, Raaj,
Dinesh Maniyam, Chee Hong Ang
From: Dinesh Maniyam <dinesh.maniyam@intel.com>
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com>
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
---
drivers/ddr/altera/sdram_soc64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index d6baac2410..1f479c514d 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
- phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
+ phys_size_t size = (phys_size_t)1 <<
+ (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [PATCH v2] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
2022-05-10 6:15 [PATCH] ddr:altera:soc64: Integer fix overflow that caused DDR size mismatched dinesh.maniyam
@ 2022-05-13 7:05 ` dinesh.maniyam
2022-06-01 8:36 ` Maniyam, Dinesh
2022-06-01 10:49 ` [PATCH v3] " dinesh.maniyam
1 sibling, 1 reply; 5+ messages in thread
From: dinesh.maniyam @ 2022-05-13 7:05 UTC (permalink / raw)
To: u-boot
Cc: Siew Chin Lim, Tien Fong Chee, Kok Kiang, Yau Wai, Sin Hui, Raaj,
Dinesh Maniyam
From: Dinesh Maniyam <dinesh.maniyam@intel.com>
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
---
v1->v2
- Add space in title
---
drivers/ddr/altera/sdram_soc64.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index d6baac2410..1f479c514d 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
- phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
+ phys_size_t size = (phys_size_t)1 <<
+ (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
--
2.26.2
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH v2] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
2022-05-13 7:05 ` [PATCH v2] ddr: altera: soc64: " dinesh.maniyam
@ 2022-06-01 8:36 ` Maniyam, Dinesh
0 siblings, 0 replies; 5+ messages in thread
From: Maniyam, Dinesh @ 2022-06-01 8:36 UTC (permalink / raw)
To: u-boot
Cc: Lim, Elly Siew Chin, Chee, Tien Fong, Hea, Kok Kiang, Gan,
Yau Wai, Kho, Sin Hui, Lokanathan, Raaj
> -----Original Message-----
> From: Maniyam, Dinesh <dinesh.maniyam@intel.com>
> Sent: Friday, 13 May 2022 3:05 pm
> To: u-boot@lists.denx.de
> Cc: Lim, Elly Siew Chin <elly.siew.chin.lim@intel.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Hea, Kok Kiang <kok.kiang.hea@intel.com>; Gan,
> Yau Wai <yau.wai.gan@intel.com>; Kho, Sin Hui <sin.hui.kho@intel.com>;
> Lokanathan, Raaj <raaj.lokanathan@intel.com>; Maniyam, Dinesh
> <dinesh.maniyam@intel.com>
> Subject: [PATCH v2] ddr: altera: soc64: Integer fix overflow that caused DDR size
> mismatched
>
> From: Dinesh Maniyam <dinesh.maniyam@intel.com>
>
> Convert the constant integer to 'phys_size_t' to avoid overflow when calculating
> the SDRAM size.
>
> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
>
> ---
>
> v1->v2
> - Add space in title
> ---
> drivers/ddr/altera/sdram_soc64.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/ddr/altera/sdram_soc64.c
> b/drivers/ddr/altera/sdram_soc64.c
> index d6baac2410..1f479c514d 100644
> --- a/drivers/ddr/altera/sdram_soc64.c
> +++ b/drivers/ddr/altera/sdram_soc64.c
> @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct
> altera_sdram_plat *plat) {
> u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
>
> - phys_size_t size = 1 <<
> (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
> + phys_size_t size = (phys_size_t)1 <<
> + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
>
> DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
> DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw)
> +
> DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw)
> +
> --
> 2.26.2
I will re-submit a new version of this patch to update the copyright and alignment
Regards,
Dinesh
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v3] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
2022-05-10 6:15 [PATCH] ddr:altera:soc64: Integer fix overflow that caused DDR size mismatched dinesh.maniyam
2022-05-13 7:05 ` [PATCH v2] ddr: altera: soc64: " dinesh.maniyam
@ 2022-06-01 10:49 ` dinesh.maniyam
2022-06-16 8:31 ` Chee, Tien Fong
1 sibling, 1 reply; 5+ messages in thread
From: dinesh.maniyam @ 2022-06-01 10:49 UTC (permalink / raw)
To: u-boot
Cc: Marek Vasut, Simon Goldschmidt, Siew Chin Lim, Tien Fong Chee,
Kok Kiang, Yau Wai, Sin Hui, Raaj, Dinesh Maniyam
From: Dinesh Maniyam <dinesh.maniyam@intel.com>
Convert the constant integer to 'phys_size_t' to avoid overflow
when calculating the SDRAM size.
Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
---
v3->v2
- copyright year updated and alignment updated.
v2->v1
- add space in title
---
drivers/ddr/altera/sdram_soc64.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/ddr/altera/sdram_soc64.c b/drivers/ddr/altera/sdram_soc64.c
index d6baac2410..9b1710c135 100644
--- a/drivers/ddr/altera/sdram_soc64.c
+++ b/drivers/ddr/altera/sdram_soc64.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
+ * Copyright (C) 2016-2022 Intel Corporation <www.intel.com>
*
*/
@@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct altera_sdram_plat *plat)
{
u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
- phys_size_t size = 1 << (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
+ phys_size_t size = (phys_size_t)1 <<
+ (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
--
2.25.1
^ permalink raw reply related [flat|nested] 5+ messages in thread
* RE: [PATCH v3] ddr: altera: soc64: Integer fix overflow that caused DDR size mismatched
2022-06-01 10:49 ` [PATCH v3] " dinesh.maniyam
@ 2022-06-16 8:31 ` Chee, Tien Fong
0 siblings, 0 replies; 5+ messages in thread
From: Chee, Tien Fong @ 2022-06-16 8:31 UTC (permalink / raw)
To: Maniyam, Dinesh, u-boot
Cc: Vasut, Marek, Simon Goldschmidt, Lim, Elly Siew Chin, Hea,
Kok Kiang, Gan, Yau Wai, Kho, Sin Hui, Lokanathan, Raaj
> -----Original Message-----
> From: Maniyam, Dinesh <dinesh.maniyam@intel.com>
> Sent: Wednesday, 1 June, 2022 6:49 PM
> To: u-boot@lists.denx.de
> Cc: Vasut, Marek <marex@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschmidt@gmail.com>; Lim, Elly Siew Chin
> <elly.siew.chin.lim@intel.com>; Chee, Tien Fong
> <tien.fong.chee@intel.com>; Hea, Kok Kiang <kok.kiang.hea@intel.com>;
> Gan, Yau Wai <yau.wai.gan@intel.com>; Kho, Sin Hui
> <sin.hui.kho@intel.com>; Lokanathan, Raaj <raaj.lokanathan@intel.com>;
> Maniyam, Dinesh <dinesh.maniyam@intel.com>
> Subject: [PATCH v3] ddr: altera: soc64: Integer fix overflow that caused DDR
> size mismatched
>
> From: Dinesh Maniyam <dinesh.maniyam@intel.com>
>
> Convert the constant integer to 'phys_size_t' to avoid overflow when
> calculating the SDRAM size.
>
> Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
>
> ---
>
> v3->v2
> - copyright year updated and alignment updated.
>
> v2->v1
> - add space in title
> ---
> drivers/ddr/altera/sdram_soc64.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/ddr/altera/sdram_soc64.c
> b/drivers/ddr/altera/sdram_soc64.c
> index d6baac2410..9b1710c135 100644
> --- a/drivers/ddr/altera/sdram_soc64.c
> +++ b/drivers/ddr/altera/sdram_soc64.c
> @@ -1,6 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0
> /*
> - * Copyright (C) 2016-2021 Intel Corporation <www.intel.com>
> + * Copyright (C) 2016-2022 Intel Corporation <www.intel.com>
> *
> */
>
> @@ -239,7 +239,8 @@ phys_size_t sdram_calculate_size(struct
> altera_sdram_plat *plat) {
> u32 dramaddrw = hmc_readl(plat, DRAMADDRW);
>
> - phys_size_t size = 1 <<
> (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw) +
> + phys_size_t size = (phys_size_t)1 <<
> + (DRAMADDRW_CFG_CS_ADDR_WIDTH(dramaddrw)
> +
>
> DRAMADDRW_CFG_BANK_GRP_ADDR_WIDTH(dramaddrw) +
>
> DRAMADDRW_CFG_BANK_ADDR_WIDTH(dramaddrw) +
>
> DRAMADDRW_CFG_ROW_ADDR_WIDTH(dramaddrw) +
> --
> 2.25.1
Reviewed-by: Tien Fong Chee <tien.fong.chee@intel.com>
Regards
Tien Fong
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2022-06-16 8:31 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-10 6:15 [PATCH] ddr:altera:soc64: Integer fix overflow that caused DDR size mismatched dinesh.maniyam
2022-05-13 7:05 ` [PATCH v2] ddr: altera: soc64: " dinesh.maniyam
2022-06-01 8:36 ` Maniyam, Dinesh
2022-06-01 10:49 ` [PATCH v3] " dinesh.maniyam
2022-06-16 8:31 ` Chee, Tien Fong
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.