* [PATCH v3 0/3] arm64: bcmbca: add bcm6858 soc support
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 908 bytes --]
The initial support includes a bare-bone dts
for quad core ARM v8 with a brcm6345 uart.
Changes in v3:
- bus addressing changed from 64 bit to 32 bit
Changes in v2:
- Fix psci and GIC entries in dts
- Remove extra empty lines
- Simplify subject line
Anand Gore (3):
ARM64: dts: add dts files for bcmbca SoC bcm6858
dt-bindings: arm64: add BCM6858 soc
MAINTAINERS: add bcm6858 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
5 files changed, 161 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
--
2.25.1
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 0/3] arm64: bcmbca: add bcm6858 soc support
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 908 bytes --]
The initial support includes a bare-bone dts
for quad core ARM v8 with a brcm6345 uart.
Changes in v3:
- bus addressing changed from 64 bit to 32 bit
Changes in v2:
- Fix psci and GIC entries in dts
- Remove extra empty lines
- Simplify subject line
Anand Gore (3):
ARM64: dts: add dts files for bcmbca SoC bcm6858
dt-bindings: arm64: add BCM6858 soc
MAINTAINERS: add bcm6858 to bcmbca arch entry
.../bindings/arm/bcm/brcm,bcmbca.yaml | 7 +
MAINTAINERS | 1 +
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
5 files changed, 161 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
--
2.25.1
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^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
2022-06-01 20:19 ` Anand Gore
(?)
@ 2022-06-01 20:19 ` Anand Gore
-1 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 4941 bytes --]
Add dts for ARMv8 based broadband SoC BCM6858.
bcm6858.dtsi is the SoC description dts header
and bcm96858.dts is a simple dts file for Broadcom
BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---
Changes in v3:
- bus addressing changed from 64 bit to 32 bit
Changes in v2:
- Fix psci and GIC entries in dts
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..7d98b0787b8c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm96858.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
new file mode 100644
index 000000000000..29a880c6c858
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x62000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
new file mode 100644
index 000000000000..0cbf582f5d54
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+ model = "Broadcom BCM96858 Reference Board";
+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.25.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 4941 bytes --]
Add dts for ARMv8 based broadband SoC BCM6858.
bcm6858.dtsi is the SoC description dts header
and bcm96858.dts is a simple dts file for Broadcom
BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---
Changes in v3:
- bus addressing changed from 64 bit to 32 bit
Changes in v2:
- Fix psci and GIC entries in dts
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..7d98b0787b8c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm96858.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
new file mode 100644
index 000000000000..29a880c6c858
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x62000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
new file mode 100644
index 000000000000..0cbf582f5d54
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+ model = "Broadcom BCM96858 Reference Board";
+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.25.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 1/3] ARM64: dts: add dts files for bcmbca SoC bcm6858
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 4941 bytes --]
Add dts for ARMv8 based broadband SoC BCM6858.
bcm6858.dtsi is the SoC description dts header
and bcm96858.dts is a simple dts file for Broadcom
BCM96858 Reference board that only enables the UART port.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---
Changes in v3:
- bus addressing changed from 64 bit to 32 bit
Changes in v2:
- Fix psci and GIC entries in dts
arch/arm64/boot/dts/broadcom/bcmbca/Makefile | 3 +-
.../boot/dts/broadcom/bcmbca/bcm6858.dtsi | 121 ++++++++++++++++++
.../boot/dts/broadcom/bcmbca/bcm96858.dts | 30 +++++
3 files changed, 153 insertions(+), 1 deletion(-)
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
create mode 100644 arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
index d5f89245336c..7d98b0787b8c 100644
--- a/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/Makefile
@@ -1,2 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb
+dtb-$(CONFIG_ARCH_BCMBCA) += bcm963158.dtb \
+ bcm96858.dtb
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
new file mode 100644
index 000000000000..29a880c6c858
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm6858.dtsi
@@ -0,0 +1,121 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+
+/ {
+ compatible = "brcm,bcm6858", "brcm,bcmbca";
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <2>;
+ #size-cells = <0>;
+
+ B53_0: cpu@0 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x0>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_1: cpu@1 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x1>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_2: cpu@2 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x2>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+
+ B53_3: cpu@3 {
+ compatible = "brcm,brahma-b53";
+ device_type = "cpu";
+ reg = <0x0 0x3>;
+ next-level-cache = <&L2_0>;
+ enable-method = "psci";
+ };
+ L2_0: l2-cache0 {
+ compatible = "cache";
+ };
+ };
+
+ timer {
+ compatible = "arm,armv8-timer";
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+ };
+
+ pmu: pmu {
+ compatible = "arm,armv8-pmuv3";
+ interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-affinity = <&B53_0>, <&B53_1>,
+ <&B53_2>, <&B53_3>;
+ };
+
+ clocks: clocks {
+ periph_clk:periph-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ };
+ };
+
+ psci {
+ compatible = "arm,psci-0.2";
+ method = "smc";
+ };
+
+ axi@81000000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x81000000 0x8000>;
+
+ gic: interrupt-controller@1000 {
+ compatible = "arm,gic-400";
+ #interrupt-cells = <3>;
+ interrupt-controller;
+ reg = <0x1000 0x1000>, /* GICD */
+ <0x2000 0x2000>, /* GICC */
+ <0x4000 0x2000>, /* GICH */
+ <0x6000 0x2000>; /* GICV */
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ };
+ };
+
+ bus@ff800000 {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0xff800000 0x62000>;
+
+ uart0: serial@640 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x640 0x18>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&periph_clk>;
+ clock-names = "refclk";
+ status = "disabled";
+ };
+ };
+};
diff --git a/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
new file mode 100644
index 000000000000..0cbf582f5d54
--- /dev/null
+++ b/arch/arm64/boot/dts/broadcom/bcmbca/bcm96858.dts
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright 2022 Broadcom Ltd.
+ */
+
+/dts-v1/;
+
+#include "bcm6858.dtsi"
+
+/ {
+ model = "Broadcom BCM96858 Reference Board";
+ compatible = "brcm,bcm96858", "brcm,bcm6858", "brcm,bcmbca";
+
+ aliases {
+ serial0 = &uart0;
+ };
+
+ chosen {
+ stdout-path = "serial0:115200n8";
+ };
+
+ memory@0 {
+ device_type = "memory";
+ reg = <0x0 0x0 0x0 0x08000000>;
+ };
+};
+
+&uart0 {
+ status = "okay";
+};
--
2.25.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 2/3] dt-bindings: arm64: add BCM6858 soc
2022-06-01 20:19 ` Anand Gore
(?)
@ 2022-06-01 20:19 ` Anand Gore
-1 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Krzysztof Kozlowski, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 1014 bytes --]
Add BCM6858 SOC device tree description to bcmbca binding document.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v2)
Changes in v2:
- Remove extra empty lines
- Simplify subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 24357cf09888..97e5b1c4619e 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -35,6 +35,13 @@ properties:
- const: brcm,bcm63178
- const: brcm,bcmbca
+ - description: BCM6858 based boards
+ items:
+ - enum:
+ - brcm,bcm96858
+ - const: brcm,bcm6858
+ - const: brcm,bcmbca
+
additionalProperties: true
...
--
2.25.1
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[-- Type: application/pkcs7-signature, Size: 4203 bytes --]
[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 2/3] dt-bindings: arm64: add BCM6858 soc
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Krzysztof Kozlowski, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1014 bytes --]
Add BCM6858 SOC device tree description to bcmbca binding document.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v2)
Changes in v2:
- Remove extra empty lines
- Simplify subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 24357cf09888..97e5b1c4619e 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -35,6 +35,13 @@ properties:
- const: brcm,bcm63178
- const: brcm,bcmbca
+ - description: BCM6858 based boards
+ items:
+ - enum:
+ - brcm,bcm96858
+ - const: brcm,bcm6858
+ - const: brcm,bcmbca
+
additionalProperties: true
...
--
2.25.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* [PATCH v3 2/3] dt-bindings: arm64: add BCM6858 soc
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
Krzysztof Kozlowski, Broadcom internal kernel review list,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
[-- Attachment #1: Type: text/plain, Size: 1014 bytes --]
Add BCM6858 SOC device tree description to bcmbca binding document.
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
(no changes since v2)
Changes in v2:
- Remove extra empty lines
- Simplify subject line
Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
index 24357cf09888..97e5b1c4619e 100644
--- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
+++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
@@ -35,6 +35,13 @@ properties:
- const: brcm,bcm63178
- const: brcm,bcmbca
+ - description: BCM6858 based boards
+ items:
+ - enum:
+ - brcm,bcm96858
+ - const: brcm,bcm6858
+ - const: brcm,bcmbca
+
additionalProperties: true
...
--
2.25.1
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^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [PATCH v3 2/3] dt-bindings: arm64: add BCM6858 soc
2022-06-01 20:19 ` Anand Gore
@ 2022-06-08 8:38 ` Florian Fainelli
-1 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:38 UTC (permalink / raw)
To: bcm-kernel-feedback-list, Anand Gore, Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Krzysztof Kozlowski,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
On Wed, 1 Jun 2022 13:19:57 -0700, Anand Gore <anand.gore@broadcom.com> wrote:
> Add BCM6858 SOC device tree description to bcmbca binding document.
>
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 2/3] dt-bindings: arm64: add BCM6858 soc
@ 2022-06-08 8:38 ` Florian Fainelli
0 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:38 UTC (permalink / raw)
To: bcm-kernel-feedback-list, Anand Gore, Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Krzysztof Kozlowski,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
On Wed, 1 Jun 2022 13:19:57 -0700, Anand Gore <anand.gore@broadcom.com> wrote:
> Add BCM6858 SOC device tree description to bcmbca binding document.
>
> Signed-off-by: Anand Gore <anand.gore@broadcom.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
Applied to https://github.com/Broadcom/stblinux/commits/devicetree/next, thanks!
--
Florian
^ permalink raw reply [flat|nested] 15+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry
2022-06-01 20:19 ` Anand Gore
@ 2022-06-01 20:19 ` Anand Gore
-1 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
linux-kernel
[-- Attachment #1.1: Type: text/plain, Size: 561 bytes --]
Add bcm6858 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4b263753f1f9..3ab33d0aeabf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3766,6 +3766,7 @@ T: git git://github.com/broadcom/stblinux.git
F: Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?6858
N: bcm[9]?63178
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
--
2.25.1
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[-- Attachment #2: Type: text/plain, Size: 176 bytes --]
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [PATCH v3 3/3] MAINTAINERS: add bcm6858 to bcmbca arch entry
@ 2022-06-01 20:19 ` Anand Gore
0 siblings, 0 replies; 15+ messages in thread
From: Anand Gore @ 2022-06-01 20:19 UTC (permalink / raw)
To: Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, florian.fainelli,
joel.peshkin, samyon.furman, dan.beygelman, Anand Gore,
linux-kernel
[-- Attachment #1: Type: text/plain, Size: 561 bytes --]
Add bcm6858 related files to BCMBCA ARCH maintainer list entry
Signed-off-by: Anand Gore <anand.gore@broadcom.com>
---
(no changes since v1)
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 4b263753f1f9..3ab33d0aeabf 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3766,6 +3766,7 @@ T: git git://github.com/broadcom/stblinux.git
F: Documentation/devicetree/bindings/arm/bcm/brcm,bcmbca.yaml
N: bcmbca
N: bcm[9]?47622
+N: bcm[9]?6858
N: bcm[9]?63178
BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE
--
2.25.1
[-- Attachment #2: S/MIME Cryptographic Signature --]
[-- Type: application/pkcs7-signature, Size: 4203 bytes --]
^ permalink raw reply related [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/3] arm64: bcmbca: add bcm6858 soc support
2022-06-01 20:19 ` Anand Gore
@ 2022-06-08 8:59 ` Florian Fainelli
-1 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:59 UTC (permalink / raw)
To: Anand Gore, Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, joel.peshkin,
samyon.furman, dan.beygelman,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
On 6/1/2022 10:19 PM, Anand Gore wrote:
>
> The initial support includes a bare-bone dts
> for quad core ARM v8 with a brcm6345 uart.
>
> Changes in v3:
> - bus addressing changed from 64 bit to 32 bit
>
> Changes in v2:
> - Fix psci and GIC entries in dts
> - Remove extra empty lines
> - Simplify subject line
>
> Anand Gore (3):
> ARM64: dts: add dts files for bcmbca SoC bcm6858
> dt-bindings: arm64: add BCM6858 soc
> MAINTAINERS: add bcm6858 to bcmbca arch entry
Series applied, thanks Anand.
--
Florian
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 15+ messages in thread
* Re: [PATCH v3 0/3] arm64: bcmbca: add bcm6858 soc support
@ 2022-06-08 8:59 ` Florian Fainelli
0 siblings, 0 replies; 15+ messages in thread
From: Florian Fainelli @ 2022-06-08 8:59 UTC (permalink / raw)
To: Anand Gore, Linux ARM List
Cc: kursad.oney, tomer.yacoby, William Zhang, joel.peshkin,
samyon.furman, dan.beygelman,
Broadcom internal kernel review list, Florian Fainelli,
Krzysztof Kozlowski, Rob Herring, devicetree, linux-kernel
On 6/1/2022 10:19 PM, Anand Gore wrote:
>
> The initial support includes a bare-bone dts
> for quad core ARM v8 with a brcm6345 uart.
>
> Changes in v3:
> - bus addressing changed from 64 bit to 32 bit
>
> Changes in v2:
> - Fix psci and GIC entries in dts
> - Remove extra empty lines
> - Simplify subject line
>
> Anand Gore (3):
> ARM64: dts: add dts files for bcmbca SoC bcm6858
> dt-bindings: arm64: add BCM6858 soc
> MAINTAINERS: add bcm6858 to bcmbca arch entry
Series applied, thanks Anand.
--
Florian
^ permalink raw reply [flat|nested] 15+ messages in thread