[PATCH v1 1/9] ARM: hpe: gxp: add core support

[PATCH v1 1/9] ARM: hpe: gxp: add core support

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

The GXP is the HPE BMC SoC that is used in the majority
of current generation HPE servers. Traditionally the asic will
last multiple generations of server before being replaced.

Info about SoC:

HPE GXP is the name of the HPE Soc. This SoC is used to implement many BMC
features at HPE. It supports ARMv7 architecture based on the Cortex A9
core. It is capable of using an AXI bus to whicha memory controller is
attached. It has multiple SPI interfaces to connect boot flash and BIOS
flash. It uses a 10/100/1000 MAC for network connectivity. It has multiple
i2c engines to drive connectivity with a host infrastructure. There
currently are no public specifications but this process is being worked.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 arch/arm/Kconfig               |  8 ++++++++
 arch/arm/Makefile              |  1 +
 arch/arm/mach-hpe/Makefile     |  1 +
 arch/arm/mach-hpe/gxp/Kconfig  |  9 +++++++++
 arch/arm/mach-hpe/gxp/Makefile |  1 +
 arch/arm/mach-hpe/gxp/reset.c  | 26 ++++++++++++++++++++++++++
 6 files changed, 46 insertions(+)
 create mode 100644 arch/arm/mach-hpe/Makefile
 create mode 100644 arch/arm/mach-hpe/gxp/Kconfig
 create mode 100644 arch/arm/mach-hpe/gxp/Makefile
 create mode 100644 arch/arm/mach-hpe/gxp/reset.c

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9898c7d68e..1f9fc1bb8e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -2085,6 +2085,12 @@ config TARGET_XENGUEST_ARM64
 	select SSCANF
 	imply OF_HAS_PRIOR_STAGE
 
+config ARCH_GXP
+	bool "Support HPE GXP SoCs"
+	select DM
+	select OF_CONTROL
+	imply CMD_DM
+
 endchoice
 
 config SUPPORT_PASSING_ATAGS
@@ -2193,6 +2199,8 @@ source "arch/arm/mach-davinci/Kconfig"
 
 source "arch/arm/mach-exynos/Kconfig"
 
+source "arch/arm/mach-hpe/gxp/Kconfig"
+
 source "arch/arm/mach-highbank/Kconfig"
 
 source "arch/arm/mach-integrator/Kconfig"
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 85c23bcf77..cfaa38594c 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -62,6 +62,7 @@ machine-$(CONFIG_ARCH_BCM283X)		+= bcm283x
 machine-$(CONFIG_ARCH_BCMSTB)		+= bcmstb
 machine-$(CONFIG_ARCH_DAVINCI)		+= davinci
 machine-$(CONFIG_ARCH_EXYNOS)		+= exynos
+machine-$(CONFIG_ARCH_GXP)		+= hpe
 machine-$(CONFIG_ARCH_HIGHBANK)		+= highbank
 machine-$(CONFIG_ARCH_IPQ40XX)		+= ipq40xx
 machine-$(CONFIG_ARCH_K3)		+= k3
diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile
new file mode 100644
index 0000000000..afe5f7a29e
--- /dev/null
+++ b/arch/arm/mach-hpe/Makefile
@@ -0,0 +1 @@
+obj-$(CONFIG_SOC_GXP) += gxp/
diff --git a/arch/arm/mach-hpe/gxp/Kconfig b/arch/arm/mach-hpe/gxp/Kconfig
new file mode 100644
index 0000000000..2d43133ab0
--- /dev/null
+++ b/arch/arm/mach-hpe/gxp/Kconfig
@@ -0,0 +1,9 @@
+if ARCH_GXP
+
+config SOC_GXP
+	bool
+	select CPU_V7A
+
+source "board/hpe/gxp/Kconfig"
+
+endif
diff --git a/arch/arm/mach-hpe/gxp/Makefile b/arch/arm/mach-hpe/gxp/Makefile
new file mode 100644
index 0000000000..f3cc6684b8
--- /dev/null
+++ b/arch/arm/mach-hpe/gxp/Makefile
@@ -0,0 +1 @@
+obj-y += reset.o
diff --git a/arch/arm/mach-hpe/gxp/reset.c b/arch/arm/mach-hpe/gxp/reset.c
new file mode 100644
index 0000000000..4d4d5f015f
--- /dev/null
+++ b/arch/arm/mach-hpe/gxp/reset.c
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * GXP driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <common.h>
+#include <asm/io.h>
+
+#define GXP_CCR	0xc0000000
+
+/* empty to satisfy current lowlevel_init, can be removed any time */
+void lowlevel_init(void)
+{
+}
+
+void reset_cpu(ulong ignored)
+{
+	writel(1, GXP_CCR);
+
+	while (1)
+		;	/* loop forever till reset */
+}
-- 
2.17.1

[PATCH v1 2/9] timer: gxp: Add HPE GXP timer support

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Add support for the HPE GXP SOC timer. The GXP supports several different
kinds of timers but for the purpose of this driver there is only support
for the General Timer. The timer has a 1us resolution and is 56 bits.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 drivers/timer/Kconfig     |  7 +++++
 drivers/timer/Makefile    |  1 +
 drivers/timer/gxp-timer.c | 65 +++++++++++++++++++++++++++++++++++++++
 3 files changed, 73 insertions(+)
 create mode 100644 drivers/timer/gxp-timer.c

diff --git a/drivers/timer/Kconfig b/drivers/timer/Kconfig
index 7b8ab56ed3..d592dba285 100644
--- a/drivers/timer/Kconfig
+++ b/drivers/timer/Kconfig
@@ -139,6 +139,13 @@ config DESIGNWARE_APB_TIMER
 	  Enables support for the Designware APB Timer driver. This timer is
 	  present on Altera SoCFPGA SoCs.
 
+config GXP_TIMER
+	bool "HPE GXP Timer"
+	depends on TIMER
+	help
+	  Enables support for the GXP Timer driver. This timer is
+	  present on HPE GXP SoCs.
+
 config MPC83XX_TIMER
 	bool "MPC83xx timer support"
 	depends on TIMER
diff --git a/drivers/timer/Makefile b/drivers/timer/Makefile
index b2f002d597..cc2b8516b5 100644
--- a/drivers/timer/Makefile
+++ b/drivers/timer/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_$(SPL_)ATMEL_PIT_TIMER) += atmel_pit_timer.o
 obj-$(CONFIG_$(SPL_)ATMEL_TCB_TIMER) += atmel_tcb_timer.o
 obj-$(CONFIG_CADENCE_TTC_TIMER)	+= cadence-ttc.o
 obj-$(CONFIG_DESIGNWARE_APB_TIMER)	+= dw-apb-timer.o
+obj-$(CONFIG_GXP_TIMER)		+= gxp-timer.o
 obj-$(CONFIG_MPC83XX_TIMER) += mpc83xx_timer.o
 obj-$(CONFIG_NOMADIK_MTU_TIMER)	+= nomadik-mtu-timer.o
 obj-$(CONFIG_NPCM_TIMER)        += npcm-timer.o
diff --git a/drivers/timer/gxp-timer.c b/drivers/timer/gxp-timer.c
new file mode 100644
index 0000000000..db11eddf74
--- /dev/null
+++ b/drivers/timer/gxp-timer.c
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * GXP timer driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <clk.h>
+#include <common.h>
+#include <dm.h>
+#include <timer.h>
+#include <asm/io.h>
+
+#define USTIMELO	0x18
+#define USTIMEHI	0x1C
+
+struct gxp_timer_priv {
+	void __iomem *base;
+};
+
+static u64 gxp_timer_get_count(struct udevice *dev)
+{
+	struct gxp_timer_priv *priv = dev_get_priv(dev);
+	u64 val;
+
+	val = readl(priv->base + USTIMEHI);
+	val = (val << 32) | readl(priv->base + USTIMELO);
+
+	return val;
+}
+
+static int gxp_timer_probe(struct udevice *dev)
+{
+	struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
+	struct gxp_timer_priv *priv = dev_get_priv(dev);
+
+	priv->base = dev_read_addr_ptr(dev);
+	if (!priv->base)
+		return -ENOENT;
+
+	uc_priv->clock_rate = 1000000;
+
+	return 0;
+}
+
+static const struct timer_ops gxp_timer_ops = {
+	.get_count = gxp_timer_get_count,
+};
+
+static const struct udevice_id gxp_timer_ids[] = {
+	{ .compatible = "hpe,gxp-timer" },
+	{}
+};
+
+U_BOOT_DRIVER(gxp_timer) = {
+	.name = "gxp-timer",
+	.id = UCLASS_TIMER,
+	.of_match = gxp_timer_ids,
+	.priv_auto = sizeof(struct gxp_timer_priv),
+	.probe = gxp_timer_probe,
+	.ops = &gxp_timer_ops,
+	.flags = DM_FLAG_PRE_RELOC,
+};
-- 
2.17.1

[PATCH v1 3/9] board: hpe: gxp: add HPE GXP soc support

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Add basic support for the HPE GXP SoC. Reset the EHCI controller at
boot.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 board/hpe/gxp/Kconfig     | 47 +++++++++++++++++++++++++++++++++++++++
 board/hpe/gxp/Makefile    |  1 +
 board/hpe/gxp/gxp_board.c | 33 +++++++++++++++++++++++++++
 3 files changed, 81 insertions(+)
 create mode 100644 board/hpe/gxp/Kconfig
 create mode 100644 board/hpe/gxp/Makefile
 create mode 100644 board/hpe/gxp/gxp_board.c

diff --git a/board/hpe/gxp/Kconfig b/board/hpe/gxp/Kconfig
new file mode 100644
index 0000000000..5fea1a6a0d
--- /dev/null
+++ b/board/hpe/gxp/Kconfig
@@ -0,0 +1,47 @@
+choice
+	prompt "SoC select"
+
+config TARGET_GXP
+	bool "GXP"
+	select DM
+	select SOC_GXP
+	imply CMD_DM
+
+config TARGET_GXP2
+	bool "GXP2"
+	select DM
+	select SOC_GXP
+	select GXP_ECC
+	imply CMD_DM
+
+endchoice
+
+choice
+	prompt "GXP VROM size"
+	default GXP_VROM_64MB
+	optional
+
+config GXP_VROM_64MB
+	bool "64MB"
+
+config GXP_VROM_32MB
+	bool "32MB"
+endchoice
+
+config GXP_ECC
+	default n
+	bool "Enable memory ECC protected"
+	help
+		Use half of memory to enable ECC protected
+
+config SYS_BOARD
+	default "gxp"
+
+config SYS_VENDOR
+	default "hpe"
+
+config SYS_CONFIG_NAME
+	default "gxp"
+
+config SYS_TEXT_BASE
+	default 0x50000000
diff --git a/board/hpe/gxp/Makefile b/board/hpe/gxp/Makefile
new file mode 100644
index 0000000000..775d6bf849
--- /dev/null
+++ b/board/hpe/gxp/Makefile
@@ -0,0 +1 @@
+obj-y += gxp_board.o
diff --git a/board/hpe/gxp/gxp_board.c b/board/hpe/gxp/gxp_board.c
new file mode 100644
index 0000000000..7fc1bf2fd6
--- /dev/null
+++ b/board/hpe/gxp/gxp_board.c
@@ -0,0 +1,33 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * GXP timer driver
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#include <asm/io.h>
+#include <common.h>
+#include <dm.h>
+#include <dm/uclass.h>
+#include <ram.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ECHI_CMD 0xcefe0010
+
+int board_init(void)
+{
+	writel(0x00080002, ECHI_CMD);
+
+	return 0;
+}
+
+int dram_init(void)
+{
+	gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
+
+	return 0;
+}
+
-- 
2.17.1

[PATCH v1 4/9] dt-bindings: arm: hpe: add GXP Support

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Add support for HPE GXP. The GXP is based on the cortex a9 processor and
supports arm7.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 doc/device-tree-bindings/arm/hpe,gxp.yaml | 27 +++++++++++++++++++++++
 1 file changed, 27 insertions(+)
 create mode 100644 doc/device-tree-bindings/arm/hpe,gxp.yaml

diff --git a/doc/device-tree-bindings/arm/hpe,gxp.yaml b/doc/device-tree-bindings/arm/hpe,gxp.yaml
new file mode 100644
index 0000000000..224bbcb93f
--- /dev/null
+++ b/doc/device-tree-bindings/arm/hpe,gxp.yaml
@@ -0,0 +1,27 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/arm/hpe,gxp.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HPE BMC GXP platforms
+
+maintainers:
+  - Nick Hawkins <nick.hawkins@hpe.com>
+  - Jean-Marie Verdun <verdun@hpe.com>
+
+properties:
+  compatible:
+    oneOf:
+      - description: GXP Based Boards
+        items:
+          - enum:
+              - hpe,gxp-dl360gen10
+          - const: hpe,gxp
+
+required:
+  - compatible
+
+additionalProperties: true
+
+...
-- 
2.17.1

[PATCH v1 5/9] dt-bindings: timer: Add hpe gxp timer

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Add support for the HPE GXP Timer. There are multiple
timers on the SoC but only one is enabled at this time.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 .../timer/hpe,gxp-timer.yaml                  | 47 +++++++++++++++++++
 1 file changed, 47 insertions(+)
 create mode 100644 doc/device-tree-bindings/timer/hpe,gxp-timer.yaml

diff --git a/doc/device-tree-bindings/timer/hpe,gxp-timer.yaml b/doc/device-tree-bindings/timer/hpe,gxp-timer.yaml
new file mode 100644
index 0000000000..d33d90f44d
--- /dev/null
+++ b/doc/device-tree-bindings/timer/hpe,gxp-timer.yaml
@@ -0,0 +1,47 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/timer/hpe,gxp-timer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HPE GXP Timer
+
+maintainers:
+  - Nick Hawkins <nick.hawkins@hpe.com>
+  - Jean-Marie Verdun <verdun@hpe.com>
+
+properties:
+  compatible:
+    const: hpe,gxp-timer
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  clocks:
+    maxItems: 1
+
+  clock-names:
+    const: iop
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
+additionalProperties: false
+
+examples:
+  - |
+    timer@c0000000 {
+        compatible = "hpe,gxp-timer";
+        reg = <0x80 0x16>;
+        interrupts = <0>;
+        interrupt-parent = <&vic0>;
+        clocks = <&iopclk>;
+        clock-names = "iop";
+    };
-- 
2.17.1

[PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

The HPE SoC is new to linux. A basic device tree layout with minimum
required for linux to boot including a timer and watchdog support has
been created.

The dts file is empty at this point but will be updated in subsequent
updates as board specific features are enabled.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 arch/arm/dts/Makefile               |  2 +
 arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++++
 arch/arm/dts/hpe-gxp.dtsi           | 95 +++++++++++++++++++++++++++++
 3 files changed, 123 insertions(+)
 create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts
 create mode 100644 arch/arm/dts/hpe-gxp.dtsi

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 83630af4f6..6223998eb7 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1213,6 +1213,8 @@ dtb-$(CONFIG_TARGET_POMELO) += phytium-pomelo.dtb
 
 dtb-$(CONFIG_TARGET_PRESIDIO_ASIC) += ca-presidio-engboard.dtb
 
+dtb-$(CONFIG_TARGET_GXP) += hpe-bmc-dl360gen10.dts
+
 dtb-$(CONFIG_TARGET_IMX8MM_CL_IOT_GATE) += imx8mm-cl-iot-gate.dtb \
 					imx8mm-cl-iot-gate-ied.dtbo \
 					imx8mm-cl-iot-gate-ied-adc0.dtbo \
diff --git a/arch/arm/dts/hpe-bmc-dl360gen10.dts b/arch/arm/dts/hpe-bmc-dl360gen10.dts
new file mode 100644
index 0000000000..3a7382ce40
--- /dev/null
+++ b/arch/arm/dts/hpe-bmc-dl360gen10.dts
@@ -0,0 +1,26 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for HPE DL360Gen10
+ */
+
+/include/ "hpe-gxp.dtsi"
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	compatible = "hpe,gxp-dl360gen10", "hpe,gxp";
+	model = "Hewlett Packard Enterprise ProLiant dl360 Gen10";
+
+	aliases {
+		serial0 = &uartc;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	memory@40000000 {
+		device_type = "memory";
+		reg = <0x40000000 0x20000000>;
+	};
+};
diff --git a/arch/arm/dts/hpe-gxp.dtsi b/arch/arm/dts/hpe-gxp.dtsi
new file mode 100644
index 0000000000..fbf817ee04
--- /dev/null
+++ b/arch/arm/dts/hpe-gxp.dtsi
@@ -0,0 +1,95 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Device Tree file for HPE GXP
+ */
+
+/dts-v1/;
+/ {
+	model = "Hewlett Packard Enterprise GXP BMC";
+	compatible = "hpe,gxp";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu@0 {
+			compatible = "arm,cortex-a9";
+			reg = <0>;
+			device_type = "cpu";
+			next-level-cache = <&L2>;
+		};
+	};
+
+	clocks {
+		pll: clock-0 {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <1600000000>;
+		};
+
+		iopclk: clock-1 {
+			compatible = "fixed-factor-clock";
+			#clock-cells = <0>;
+			clock-div = <4>;
+			clock-mult = <1>;
+			clocks = <&pll>;
+		};
+	};
+
+	axi {
+		compatible = "simple-bus";
+		#address-cells = <1>;
+		#size-cells = <1>;
+		ranges;
+		dma-ranges;
+
+		L2: cache-controller@b0040000 {
+			compatible = "arm,pl310-cache";
+			reg = <0xb0040000 0x1000>;
+			cache-unified;
+			cache-level = <2>;
+		};
+
+		ahb@c0000000 {
+			compatible = "simple-bus";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0x0 0xc0000000 0x30000000>;
+			dma-ranges;
+
+			vic0: interrupt-controller@eff0000 {
+				compatible = "arm,pl192-vic";
+				reg = <0xeff0000 0x1000>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+			};
+
+			vic1: interrupt-controller@80f00000 {
+				compatible = "arm,pl192-vic";
+				reg = <0x80f00000 0x1000>;
+				interrupt-controller;
+				#interrupt-cells = <1>;
+			};
+
+			uartc: serial@f0 {
+				compatible = "ns16550a";
+				reg = <0xf0 0x8>;
+				interrupts = <19>;
+				interrupt-parent = <&vic0>;
+				clock-frequency = <1846153>;
+				reg-shift = <0>;
+			};
+
+			st: timer@80 {
+				compatible = "hpe,gxp-timer";
+				reg = <0x80 0x16>;
+				interrupts = <0>;
+				interrupt-parent = <&vic0>;
+				clocks = <&iopclk>;
+				clock-names = "iop";
+			};
+		};
+	};
+};
-- 
2.17.1

[PATCH v1 7/9] configs: gxp: add core support

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Add the include file for the gxp soc.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 include/configs/gxp.h | 96 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 96 insertions(+)
 create mode 100644 include/configs/gxp.h

diff --git a/include/configs/gxp.h b/include/configs/gxp.h
new file mode 100644
index 0000000000..601d6e405d
--- /dev/null
+++ b/include/configs/gxp.h
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * GXP board
+ *
+ * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
+ * Author: Nick Hawkins <nick.hawkins@hpe.com>
+ * Author: Jean-Marie Verdun <verdun@hpe.com>
+ */
+
+#ifndef _GXP_H_
+#define _GXP_H_
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define CONFIG_SYS_MALLOC_LEN   0x4000000
+#define CONFIG_SYS_INIT_SP_ADDR 0x2000000
+
+#ifdef CONFIG_TARGET_GXP
+#ifdef CONFIG_GXP_ECC
+    #define CONFIG_SYS_SDRAM_SIZE       0x0f800000
+#else
+    #define CONFIG_SYS_SDRAM_SIZE       0x1f000000
+#endif
+
+#ifdef CONFIG_GXP_VROM_64MB
+    #undef CONFIG_SYS_SDRAM_SIZE
+    #ifdef CONFIG_GXP_ECC
+	#define CONFIG_SYS_SDRAM_SIZE   0x0c000000
+    #else
+	#define CONFIG_SYS_SDRAM_SIZE   0x18000000
+    #endif
+#endif
+
+#ifdef CONFIG_GXP_VROM_32MB
+    #undef CONFIG_SYS_SDRAM_SIZE
+    #ifdef CONFIG_GXP_ECC
+	#define CONFIG_SYS_SDRAM_SIZE   0x0e000000
+    #else
+	#define CONFIG_SYS_SDRAM_SIZE   0x1c000000
+    #endif
+#endif
+#endif
+
+#ifdef CONFIG_TARGET_GXP2
+    #define CONFIG_SYS_SDRAM_SIZE   0x1b200000
+
+#ifdef CONFIG_GXP_VROM_64MB
+    #undef CONFIG_SYS_SDRAM_SIZE
+    #define CONFIG_SYS_SDRAM_SIZE   0x14000000
+#endif
+
+#ifdef CONFIG_GXP_VROM_32MB
+    #undef CONFIG_SYS_SDRAM_SIZE
+    #define CONFIG_SYS_SDRAM_SIZE   0x18000000
+#endif
+#endif
+
+#define CONFIG_SYS_SDRAM_BASE   0x40000000
+#define CONFIG_SYS_LOAD_ADDR    0x40100000
+#define CONFIG_BOOTCOMMAND  "run spiboot"
+//#define CONFIG_SYS_BOOTM_LEN    0xC00000
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"recover_file=openbmc-hpe-recovery-image.mtd\0" \
+	"recover_cmd=usb start; " \
+	"mw.b 0xD100000D 0x40; " \
+	"if fatload usb 0 0x50000000 $recover_file 0x4C0000 0x80000; then " \
+		"setenv bootargs console=ttyS0,115200 recovery; " \
+		"setenv force_recovery; " \
+		"saveenv; " \
+		"bootm  0x50000000; " \
+	"else " \
+		"while itest 0 < 1; do " \
+		"mw.b 0xd1000005 0xc0; " \
+		"sleep .1; " \
+		"mw.b 0xd1000005 0x00; " \
+		"sleep .1; " \
+		"done; " \
+	"fi; " \
+	"reset;\0" \
+	"spiboot=if itest.b *0xD10000B2 == 6; then " \
+		"run recover_cmd;" \
+	"fi;" \
+	"if printenv force_recovery; then " \
+		"run recover_cmd; " \
+	"else " \
+		"bootm 0xfc080000; " \
+		"run recover_cmd; " \
+	"fi;\0"
+
+/*--------------------------------------------------------------------------*/
+/*              Network Configuration             */
+/*--------------------------------------------------------------------------*/
+#define CONFIG_PHY_ADDR             0
+
+#endif
-- 
2.17.1

[PATCH v1 8/9] configs: gxp: add gxp_defconfig

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

This is the initial very basic config that enables the U-Boot console on
the hpe gxp soc.

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 configs/gxp_defconfig | 48 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 48 insertions(+)
 create mode 100644 configs/gxp_defconfig

diff --git a/configs/gxp_defconfig b/configs/gxp_defconfig
new file mode 100644
index 0000000000..2d45fd694b
--- /dev/null
+++ b/configs/gxp_defconfig
@@ -0,0 +1,48 @@
+CONFIG_ARM=y
+CONFIG_SYS_THUMB_BUILD=y
+CONFIG_ARCH_GXP=y
+CONFIG_SYS_MALLOC_LEN=0x4000000
+CONFIG_GXP_VROM_64MB=y
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x10000
+CONFIG_ENV_OFFSET=0x60000
+CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_DEFAULT_DEVICE_TREE="hpe-bmc-dl360gen10"
+CONFIG_ENV_OFFSET_REDUND=0x70000
+CONFIG_SYS_LOAD_ADDR=0x40100000
+CONFIG_FIT=y
+CONFIG_FIT_SIGNATURE=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_BOOTDELAY=5
+CONFIG_AUTOBOOT_KEYED=y
+CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n"
+CONFIG_AUTOBOOT_STOP_STR=" "
+CONFIG_USE_BOOTARGS=y
+CONFIG_BOOTARGS="earlyprintk console=ttyS2,115200 user_debug=31"
+# CONFIG_DISPLAY_CPUINFO is not set
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="gxp# "
+# CONFIG_BOOTM_NETBSD is not set
+# CONFIG_BOOTM_PLAN9 is not set
+# CONFIG_BOOTM_RTEMS is not set
+# CONFIG_BOOTM_VXWORKS is not set
+CONFIG_CMD_GPT=y
+# CONFIG_RANDOM_UUID is not set
+CONFIG_CMD_MISC=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_FAT=y
+CONFIG_ENV_IS_IN_SPI_FLASH=y
+CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
+CONFIG_NETCONSOLE=y
+CONFIG_MISC=y
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0
+# CONFIG_MMC is not set
+# CONFIG_POWER is not set
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_TIMER=y
+CONFIG_GXP_TIMER=y
+CONFIG_LMB = y
-- 
2.17.1

[PATCH v1 9/9] MAINTAINERS: Introduce HPE GXP Architecture

[nick.hawkins]

From: Nick Hawkins <nick.hawkins@hpe.com>

Create a section in MAINTAINERS for the GXP HPE architecture

Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
---
 MAINTAINERS | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/MAINTAINERS b/MAINTAINERS
index 56be0bfad0..4417092f2d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -257,6 +257,18 @@ F:	arch/arm/cpu/armv8/hisilicon
 F:	arch/arm/include/asm/arch-hi6220/
 F:	arch/arm/include/asm/arch-hi3660/
 
+ARM HPE GXP ARCHITECTURE
+M:	Jean-Marie Verdun <verdun@hpe.com>
+M:	Nick Hawkins <nick.hawkins@hpe.com>
+S:	Maintained
+F:	arch/arm/dts/hpe-bmc*
+F:	arch/arm/dts/hpe-gxp*
+F:	arch/arm/mach-hpe/
+F:	board/hpe/
+F:	doc/device-tree-bindings/arm/hpe,gxp.yaml
+F:	doc/device-tree-bindings/timer/hpe,gxp-timer.yaml
+F:	drivers/timer/gxp-timer.c
+
 ARM IPQ40XX
 M:	Robert Marko <robert.marko@sartura.hr>
 M:	Luka Kovacic <luka.kovacic@sartura.hr>
-- 
2.17.1

Re: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Tom Rini]

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On Thu, May 26, 2022 at 01:55:45PM -0500, nick.hawkins@hpe.com wrote:

> From: Nick Hawkins <nick.hawkins@hpe.com>
> 
> The HPE SoC is new to linux. A basic device tree layout with minimum
> required for linux to boot including a timer and watchdog support has
> been created.
> 
> The dts file is empty at this point but will be updated in subsequent
> updates as board specific features are enabled.
> 
> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
> ---
>  arch/arm/dts/Makefile               |  2 +
>  arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++++
>  arch/arm/dts/hpe-gxp.dtsi           | 95 +++++++++++++++++++++++++++++
>  3 files changed, 123 insertions(+)
>  create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts
>  create mode 100644 arch/arm/dts/hpe-gxp.dtsi

The dts files need to be in linux-next (or similar) upstream before we
start taking them in to Linux, and then re-synced periodically.

-- 
Tom

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Re: [PATCH v1 3/9] board: hpe: gxp: add HPE GXP soc support

[Tom Rini]

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On Thu, May 26, 2022 at 01:55:42PM -0500, nick.hawkins@hpe.com wrote:

> From: Nick Hawkins <nick.hawkins@hpe.com>
> 
> Add basic support for the HPE GXP SoC. Reset the EHCI controller at
> boot.
> 
> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
> ---
>  board/hpe/gxp/Kconfig     | 47 +++++++++++++++++++++++++++++++++++++++
>  board/hpe/gxp/Makefile    |  1 +
>  board/hpe/gxp/gxp_board.c | 33 +++++++++++++++++++++++++++
>  3 files changed, 81 insertions(+)
>  create mode 100644 board/hpe/gxp/Kconfig
>  create mode 100644 board/hpe/gxp/Makefile
>  create mode 100644 board/hpe/gxp/gxp_board.c
[snip]
> +config GXP_ECC
> +	default n
> +	bool "Enable memory ECC protected"

"n" is the normal default, so you don't need to add it here.

> +	help
> +		Use half of memory to enable ECC protected

The normal indentation is "<tab><space><space>".

> diff --git a/board/hpe/gxp/gxp_board.c b/board/hpe/gxp/gxp_board.c
> new file mode 100644
> index 0000000000..7fc1bf2fd6
> --- /dev/null
> +++ b/board/hpe/gxp/gxp_board.c
> @@ -0,0 +1,33 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * GXP timer driver
> + *
> + * (C) Copyright 2022 Hewlett Packard Enterprise Development LP.
> + * Author: Nick Hawkins <nick.hawkins@hpe.com>
> + * Author: Jean-Marie Verdun <verdun@hpe.com>
> + */
> +
> +#include <asm/io.h>
> +#include <common.h>

Here and elsewhere, <common.h> really just grabs a few other header
files.  Don't use it, and include what you need directly instead.

-- 
Tom

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Re: [PATCH v1 7/9] configs: gxp: add core support

[Tom Rini]

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On Thu, May 26, 2022 at 01:55:46PM -0500, nick.hawkins@hpe.com wrote:

> From: Nick Hawkins <nick.hawkins@hpe.com>
> 
> Add the include file for the gxp soc.
> 
> Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
[snip]
> +#ifdef CONFIG_TARGET_GXP
> +#ifdef CONFIG_GXP_ECC
> +    #define CONFIG_SYS_SDRAM_SIZE       0x0f800000
> +#else
> +    #define CONFIG_SYS_SDRAM_SIZE       0x1f000000
> +#endif
> +
> +#ifdef CONFIG_GXP_VROM_64MB
> +    #undef CONFIG_SYS_SDRAM_SIZE
> +    #ifdef CONFIG_GXP_ECC
> +	#define CONFIG_SYS_SDRAM_SIZE   0x0c000000
> +    #else
> +	#define CONFIG_SYS_SDRAM_SIZE   0x18000000
> +    #endif
> +#endif

Can we figure any of that out dynamically instead?  Since
CONFIG_SYS_SDRAM_SIZE is only used (for ARM) in board code, I'd rather
see this handled in there, with SZ_xxx and not use CONFIG_SYS_SDRAM_SIZE
at all.

-- 
Tom

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RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Hawkins, Nick]

> > 
> > The HPE SoC is new to linux. A basic device tree layout with minimum 
> > required for linux to boot including a timer and watchdog support has 
> > been created.
> > 
> > The dts file is empty at this point but will be updated in subsequent 
> > updates as board specific features are enabled.
> > 
> > Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
> > ---
> >  arch/arm/dts/Makefile               |  2 +
> >  arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++++
> >  arch/arm/dts/hpe-gxp.dtsi           | 95 +++++++++++++++++++++++++++++
> >  3 files changed, 123 insertions(+)
> >  create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts
> >  create mode 100644 arch/arm/dts/hpe-gxp.dtsi

> The dts files need to be in linux-next (or similar) upstream before we start taking them in to Linux, and then re-synced periodically.

Hi Tom,

When you say taking them into Linux do you mean these files for U-Boot would go into Torvalds Linux? Ideally we would like to have the one from Torvalds Linux come into U-boot. Our DTS files are currently here at Linux-next:

https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts

Thank you for all the feedback you have provided on this and the other patches. I will start working on them.

-Nick

Re: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Tom Rini]

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On Wed, Jun 01, 2022 at 02:50:26PM +0000, Hawkins, Nick wrote:
> 
> > > 
> > > The HPE SoC is new to linux. A basic device tree layout with minimum 
> > > required for linux to boot including a timer and watchdog support has 
> > > been created.
> > > 
> > > The dts file is empty at this point but will be updated in subsequent 
> > > updates as board specific features are enabled.
> > > 
> > > Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com>
> > > ---
> > >  arch/arm/dts/Makefile               |  2 +
> > >  arch/arm/dts/hpe-bmc-dl360gen10.dts | 26 ++++++++
> > >  arch/arm/dts/hpe-gxp.dtsi           | 95 +++++++++++++++++++++++++++++
> > >  3 files changed, 123 insertions(+)
> > >  create mode 100644 arch/arm/dts/hpe-bmc-dl360gen10.dts
> > >  create mode 100644 arch/arm/dts/hpe-gxp.dtsi
> 
> > The dts files need to be in linux-next (or similar) upstream before we start taking them in to Linux, and then re-synced periodically.
> 
> Hi Tom,
> 
> When you say taking them into Linux do you mean these files for U-Boot would go into Torvalds Linux? Ideally we would like to have the one from Torvalds Linux come into U-boot. Our DTS files are currently here at Linux-next:
> 
> https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts

Correct, we want to use those files as-is, and then only append to them
via a "-u-boot.dtsi" file.

-- 
Tom

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RE: [PATCH v1 7/9] configs: gxp: add core support

[Hawkins, Nick]

> Can we figure any of that out dynamically instead?  Since CONFIG_SYS_SDRAM_SIZE is only used (for ARM) in board code, I'd rather see this handled in there, with SZ_xxx and not use CONFIG_SYS_SDRAM_SIZE at all.

Hi Tom,

Would something like this be acceptable?

int dram_init(void)
{
#ifdef CONFIG_TARGET_GXP
        #ifdef CONFIG_GXP_ECC
        gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M;
        #else
        gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M;
        #endif
#endif

#ifdef CONFIG_GXP_VROM_64MB
        #ifdef CONFIG_GXP_ECC
        gd->ram_size = SZ_128M + SZ_64M;
        #else
        gd->ram_size = SZ_256M + SZ_128M;
        #endif
#endif
        return 0;
}

Thanks for the feedback,

-Nick Hawkins

Re: [PATCH v1 7/9] configs: gxp: add core support

[Tom Rini]

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On Thu, Jun 02, 2022 at 02:46:09PM +0000, Hawkins, Nick wrote:
> 
> 
> > Can we figure any of that out dynamically instead?  Since CONFIG_SYS_SDRAM_SIZE is only used (for ARM) in board code, I'd rather see this handled in there, with SZ_xxx and not use CONFIG_SYS_SDRAM_SIZE at all.
> 
> Hi Tom,
> 
> Would something like this be acceptable?
> 
> int dram_init(void)
> {
> #ifdef CONFIG_TARGET_GXP
>         #ifdef CONFIG_GXP_ECC
>         gd->ram_size = SZ_128M + SZ_64M + SZ_32M + SZ_16M + SZ_8M;
>         #else
>         gd->ram_size = SZ_256M + SZ_128M + SZ_64M + SZ_32M + SZ_16M;
>         #endif
> #endif
> 
> #ifdef CONFIG_GXP_VROM_64MB
>         #ifdef CONFIG_GXP_ECC
>         gd->ram_size = SZ_128M + SZ_64M;
>         #else
>         gd->ram_size = SZ_256M + SZ_128M;
>         #endif
> #endif
>         return 0;
> }
> 
> Thanks for the feedback,

Without indenting the #ifdef's, yes, that's better.  Ideally you should
just call get_ram_size(base_addr, max-possible-valid-size) and that
will return the correct value.

-- 
Tom

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RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Hawkins, Nick]

> > > The dts files need to be in linux-next (or similar) upstream before we start taking them in to Linux, and then re-synced periodically.
> > 
> > Hi Tom,
> > 
> > When you say taking them into Linux do you mean these files for U-Boot would go into Torvalds Linux? Ideally we would like to have the one from Torvalds Linux come into U-boot. Our DTS files are currently here at Linux-next:
> > 
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts

> Correct, we want to use those files as-is, and then only append to them via a "-u-boot.dtsi" file.

Hi Tom,

RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Hawkins, Nick]

-----Original Message-----
From: Hawkins, Nick 
Sent: Thursday, June 2, 2022 3:56 PM
To: Tom Rini <trini@konsulko.com>
Cc: Verdun, Jean-Marie <verdun@hpe.com>; u-boot@lists.denx.de
Subject: RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

> > > The dts files need to be in linux-next (or similar) upstream before we start taking them in to Linux, and then re-synced periodically.
> > 
> > Hi Tom,
> > 
> > When you say taking them into Linux do you mean these files for U-Boot would go into Torvalds Linux? Ideally we would like to have the one from Torvalds Linux come into U-boot. Our DTS files are currently here at Linux-next:
> > 
> > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts

> Correct, we want to use those files as-is, and then only append to them via a "-u-boot.dtsi" file.

Hi Tom,

I accidently hit return. Will I need to manually merge these files from Linux or will someone else do that?

Thanks,

-Nick Hawkins

Re: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Tom Rini]

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On Thu, Jun 02, 2022 at 08:56:59PM +0000, Hawkins, Nick wrote:
> 
> 
> -----Original Message-----
> From: Hawkins, Nick 
> Sent: Thursday, June 2, 2022 3:56 PM
> To: Tom Rini <trini@konsulko.com>
> Cc: Verdun, Jean-Marie <verdun@hpe.com>; u-boot@lists.denx.de
> Subject: RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc
> 
> > > > The dts files need to be in linux-next (or similar) upstream before we start taking them in to Linux, and then re-synced periodically.
> > > 
> > > Hi Tom,
> > > 
> > > When you say taking them into Linux do you mean these files for U-Boot would go into Torvalds Linux? Ideally we would like to have the one from Torvalds Linux come into U-boot. Our DTS files are currently here at Linux-next:
> > > 
> > > https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git/tree/arch/arm/boot/dts
> 
> > Correct, we want to use those files as-is, and then only append to them via a "-u-boot.dtsi" file.
> 
> Hi Tom,
> 
> I accidently hit return. Will I need to manually merge these files from Linux or will someone else do that?

You will need to post a sync periodically.  Every Linux release (full,
not -rc) would be great, every couple is fine.

-- 
Tom

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RE: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Hawkins, Nick]

> You will need to post a sync periodically.  Every Linux release (full, not -rc) would be great, every couple is fine.

If there are changes I need in the device tree for u-boot that are not currently in Linux do they need to be in Linux first? Or is that what the usage of appending "-u-boot.dtsi" is for?

Thanks for the help,

-Nick Hawkins

Re: [PATCH v1 6/9] ARM: dts: Add device tree files for hpe gxp soc

[Tom Rini]

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On Fri, Jun 03, 2022 at 03:35:51PM +0000, Hawkins, Nick wrote:

> 
> > You will need to post a sync periodically.  Every Linux release (full, not -rc) would be great, every couple is fine.
> 
> If there are changes I need in the device tree for u-boot that are not
> currently in Linux do they need to be in Linux first? Or is that what
> the usage of appending "-u-boot.dtsi" is for?

So, we have attributes such as "u-boot,dm-spl" that are still in the
process of being upstreamed.  Those do not go in the dts that is sent to
Linux but instead a -u-boot.dtsi file.  It might be most helpful for you
to pick another ARMv7 platform you're familiar with that also has one of
those and explore.

-- 
Tom

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