All of lore.kernel.org
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: qemu-arm@nongnu.org
Subject: [PATCH 05/28] target/arm: Move get_phys_addr_pmsav5 to ptw.c
Date: Fri,  3 Jun 2022 21:05:44 -0700	[thread overview]
Message-ID: <20220604040607.269301-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20220604040607.269301-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/ptw.h    |  4 ---
 target/arm/helper.c | 85 ---------------------------------------------
 target/arm/ptw.c    | 85 +++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 85 insertions(+), 89 deletions(-)

diff --git a/target/arm/ptw.h b/target/arm/ptw.h
index 349b842d3c..324a9dde14 100644
--- a/target/arm/ptw.h
+++ b/target/arm/ptw.h
@@ -33,10 +33,6 @@ simple_ap_to_rw_prot(CPUARMState *env, ARMMMUIdx mmu_idx, int ap)
     return simple_ap_to_rw_prot_is_user(ap, regime_is_user(env, mmu_idx));
 }
 
-bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
-                          MMUAccessType access_type, ARMMMUIdx mmu_idx,
-                          hwaddr *phys_ptr, int *prot,
-                          ARMMMUFaultInfo *fi);
 bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address,
                           MMUAccessType access_type, ARMMMUIdx mmu_idx,
                           hwaddr *phys_ptr, int *prot,
diff --git a/target/arm/helper.c b/target/arm/helper.c
index fab91f823a..31abcf6fc9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -12238,91 +12238,6 @@ bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address,
     return ret;
 }
 
-bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
-                          MMUAccessType access_type, ARMMMUIdx mmu_idx,
-                          hwaddr *phys_ptr, int *prot,
-                          ARMMMUFaultInfo *fi)
-{
-    int n;
-    uint32_t mask;
-    uint32_t base;
-    bool is_user = regime_is_user(env, mmu_idx);
-
-    if (regime_translation_disabled(env, mmu_idx)) {
-        /* MPU disabled.  */
-        *phys_ptr = address;
-        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
-        return false;
-    }
-
-    *phys_ptr = address;
-    for (n = 7; n >= 0; n--) {
-        base = env->cp15.c6_region[n];
-        if ((base & 1) == 0) {
-            continue;
-        }
-        mask = 1 << ((base >> 1) & 0x1f);
-        /* Keep this shift separate from the above to avoid an
-           (undefined) << 32.  */
-        mask = (mask << 1) - 1;
-        if (((base ^ address) & ~mask) == 0) {
-            break;
-        }
-    }
-    if (n < 0) {
-        fi->type = ARMFault_Background;
-        return true;
-    }
-
-    if (access_type == MMU_INST_FETCH) {
-        mask = env->cp15.pmsav5_insn_ap;
-    } else {
-        mask = env->cp15.pmsav5_data_ap;
-    }
-    mask = (mask >> (n * 4)) & 0xf;
-    switch (mask) {
-    case 0:
-        fi->type = ARMFault_Permission;
-        fi->level = 1;
-        return true;
-    case 1:
-        if (is_user) {
-            fi->type = ARMFault_Permission;
-            fi->level = 1;
-            return true;
-        }
-        *prot = PAGE_READ | PAGE_WRITE;
-        break;
-    case 2:
-        *prot = PAGE_READ;
-        if (!is_user) {
-            *prot |= PAGE_WRITE;
-        }
-        break;
-    case 3:
-        *prot = PAGE_READ | PAGE_WRITE;
-        break;
-    case 5:
-        if (is_user) {
-            fi->type = ARMFault_Permission;
-            fi->level = 1;
-            return true;
-        }
-        *prot = PAGE_READ;
-        break;
-    case 6:
-        *prot = PAGE_READ;
-        break;
-    default:
-        /* Bad permission.  */
-        fi->type = ARMFault_Permission;
-        fi->level = 1;
-        return true;
-    }
-    *prot |= PAGE_EXEC;
-    return false;
-}
-
 /* Combine either inner or outer cacheability attributes for normal
  * memory, according to table D4-42 and pseudocode procedure
  * CombineS1S2AttrHints() of ARM DDI 0487B.b (the ARMv8 ARM).
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 6a1f4b549d..5c32648a16 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -289,6 +289,91 @@ do_fault:
     return true;
 }
 
+static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address,
+                                 MMUAccessType access_type, ARMMMUIdx mmu_idx,
+                                 hwaddr *phys_ptr, int *prot,
+                                 ARMMMUFaultInfo *fi)
+{
+    int n;
+    uint32_t mask;
+    uint32_t base;
+    bool is_user = regime_is_user(env, mmu_idx);
+
+    if (regime_translation_disabled(env, mmu_idx)) {
+        /* MPU disabled.  */
+        *phys_ptr = address;
+        *prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
+        return false;
+    }
+
+    *phys_ptr = address;
+    for (n = 7; n >= 0; n--) {
+        base = env->cp15.c6_region[n];
+        if ((base & 1) == 0) {
+            continue;
+        }
+        mask = 1 << ((base >> 1) & 0x1f);
+        /* Keep this shift separate from the above to avoid an
+           (undefined) << 32.  */
+        mask = (mask << 1) - 1;
+        if (((base ^ address) & ~mask) == 0) {
+            break;
+        }
+    }
+    if (n < 0) {
+        fi->type = ARMFault_Background;
+        return true;
+    }
+
+    if (access_type == MMU_INST_FETCH) {
+        mask = env->cp15.pmsav5_insn_ap;
+    } else {
+        mask = env->cp15.pmsav5_data_ap;
+    }
+    mask = (mask >> (n * 4)) & 0xf;
+    switch (mask) {
+    case 0:
+        fi->type = ARMFault_Permission;
+        fi->level = 1;
+        return true;
+    case 1:
+        if (is_user) {
+            fi->type = ARMFault_Permission;
+            fi->level = 1;
+            return true;
+        }
+        *prot = PAGE_READ | PAGE_WRITE;
+        break;
+    case 2:
+        *prot = PAGE_READ;
+        if (!is_user) {
+            *prot |= PAGE_WRITE;
+        }
+        break;
+    case 3:
+        *prot = PAGE_READ | PAGE_WRITE;
+        break;
+    case 5:
+        if (is_user) {
+            fi->type = ARMFault_Permission;
+            fi->level = 1;
+            return true;
+        }
+        *prot = PAGE_READ;
+        break;
+    case 6:
+        *prot = PAGE_READ;
+        break;
+    default:
+        /* Bad permission.  */
+        fi->type = ARMFault_Permission;
+        fi->level = 1;
+        return true;
+    }
+    *prot |= PAGE_EXEC;
+    return false;
+}
+
 /**
  * get_phys_addr - get the physical address for this virtual address
  *
-- 
2.34.1



  parent reply	other threads:[~2022-06-04  4:13 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-04  4:05 [PATCH 00/28] target/arm: Split out ptw.c from helper.c Richard Henderson
2022-06-04  4:05 ` [PATCH 01/28] target/arm: Move stage_1_mmu_idx decl to internals.h Richard Henderson
2022-06-04 10:40   ` Philippe Mathieu-Daudé via
2022-06-04 17:43     ` Richard Henderson
2022-06-04  4:05 ` [PATCH 02/28] target/arm: Move get_phys_addr to ptw.c Richard Henderson
2022-06-04  4:05 ` [PATCH 03/28] target/arm: Move get_phys_addr_v5 " Richard Henderson
2022-06-04  4:05 ` [PATCH 04/28] target/arm: Move get_phys_addr_v6 " Richard Henderson
2022-06-04  4:05 ` Richard Henderson [this message]
2022-06-04  4:05 ` [PATCH 06/28] target/arm: Move get_phys_addr_pmsav7_default " Richard Henderson
2022-06-04  4:05 ` [PATCH 07/28] target/arm: Move get_phys_addr_pmsav7 " Richard Henderson
2022-06-04  4:05 ` [PATCH 08/28] target/arm: Move get_phys_addr_pmsav8 " Richard Henderson
2022-06-04  4:05 ` [PATCH 09/28] target/arm: Move pmsav8_mpu_lookup " Richard Henderson
2022-06-04  4:05 ` [PATCH 10/28] target/arm: Move pmsav7_use_background_region " Richard Henderson
2022-06-04  4:05 ` [PATCH 11/28] target/arm: Move v8m_security_lookup " Richard Henderson
2022-06-04  4:05 ` [PATCH 12/28] target/arm: Move m_is_{ppb,system}_region " Richard Henderson
2022-06-04  4:05 ` [PATCH 13/28] target/arm: Move get_level1_table_address " Richard Henderson
2022-06-04  4:05 ` [PATCH 14/28] target/arm: Move combine_cacheattrs and subroutines " Richard Henderson
2022-06-04  4:05 ` [PATCH 15/28] target/arm: Move get_phys_addr_lpae " Richard Henderson
2022-06-04  4:05 ` [PATCH 16/28] target/arm: Move arm_{ldl,ldq}_ptw " Richard Henderson
2022-06-04  4:05 ` [PATCH 17/28] target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c Richard Henderson
2022-06-04  4:05 ` [PATCH 18/28] target/arm: Move arm_pamax, pamax_map into ptw.c Richard Henderson
2022-06-04  4:05 ` [PATCH 19/28] target/arm: Move get_S1prot, get_S2prot to ptw.c Richard Henderson
2022-06-04  4:05 ` [PATCH 20/28] target/arm: Move check_s2_mmu_setup " Richard Henderson
2022-06-04  4:06 ` [PATCH 21/28] target/arm: Move aa32_va_parameters " Richard Henderson
2022-06-04  4:06 ` [PATCH 22/28] target/arm: Move ap_to_tw_prot etc " Richard Henderson
2022-06-04  4:06 ` [PATCH 23/28] target/arm: Move regime_is_user " Richard Henderson
2022-06-04  4:06 ` [PATCH 24/28] target/arm: Move regime_ttbr " Richard Henderson
2022-06-04  4:06 ` [PATCH 25/28] target/arm: Move regime_translation_disabled " Richard Henderson
2022-06-04  4:06 ` [PATCH 26/28] target/arm: Move arm_cpu_get_phys_page_attrs_debug " Richard Henderson
2022-06-04  4:06 ` [PATCH 27/28] target/arm: Move stage_1_mmu_idx, arm_stage1_mmu_idx " Richard Henderson
2022-06-04  4:06 ` [PATCH 28/28] target/arm: Pass CPUARMState to arm_ld[lq]_ptw Richard Henderson
2022-06-07 15:48 ` [PATCH 00/28] target/arm: Split out ptw.c from helper.c Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20220604040607.269301-6-richard.henderson@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=qemu-arm@nongnu.org \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body. 
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.