* [PATCH] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection
@ 2022-06-04 18:38 ` Michael Trimarchi
0 siblings, 0 replies; 4+ messages in thread
From: Michael Trimarchi @ 2022-06-04 18:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Ariel D'Alessandro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
pmic clock is connected to svns_rtc using RTC_XTALI pin,
and wifi/bluetooth chipset
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
.../boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
index c11895d9d582..a21ec0d1d003 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
@@ -28,6 +28,8 @@ usdhc2_pwrseq: usdhc2-pwrseq {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
+ clocks = <&bd71847>;
+ clock-names = "ext_clock";
};
};
@@ -214,6 +216,11 @@ &i2c4 {
status = "okay";
};
+&snvs_rtc {
+ clocks = <&bd71847>;
+ clock-names = "snvs-rtc";
+};
+
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@@ -235,6 +242,8 @@ bluetooth {
shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ clocks = <&bd71847>;
+ clock-names = "lpo";
max-speed = <3000000>;
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 4+ messages in thread
* [PATCH] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection
@ 2022-06-04 18:38 ` Michael Trimarchi
0 siblings, 0 replies; 4+ messages in thread
From: Michael Trimarchi @ 2022-06-04 18:38 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Ariel D'Alessandro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Cc: open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
pmic clock is connected to svns_rtc using RTC_XTALI pin,
and wifi/bluetooth chipset
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
---
.../boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
index c11895d9d582..a21ec0d1d003 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
+++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
@@ -28,6 +28,8 @@ usdhc2_pwrseq: usdhc2-pwrseq {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
+ clocks = <&bd71847>;
+ clock-names = "ext_clock";
};
};
@@ -214,6 +216,11 @@ &i2c4 {
status = "okay";
};
+&snvs_rtc {
+ clocks = <&bd71847>;
+ clock-names = "snvs-rtc";
+};
+
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
@@ -235,6 +242,8 @@ bluetooth {
shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+ clocks = <&bd71847>;
+ clock-names = "lpo";
max-speed = <3000000>;
};
};
--
2.25.1
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection
2022-06-04 18:38 ` Michael Trimarchi
@ 2022-06-05 9:13 ` Michael Nazzareno Trimarchi
-1 siblings, 0 replies; 4+ messages in thread
From: Michael Nazzareno Trimarchi @ 2022-06-05 9:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Ariel D'Alessandro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Hi
I have some problems here. Open to suggestion:
On Sat, Jun 4, 2022 at 8:39 PM Michael Trimarchi
<michael@amarulasolutions.com> wrote:
>
> pmic clock is connected to svns_rtc using RTC_XTALI pin,
> and wifi/bluetooth chipset
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> .../boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> index c11895d9d582..a21ec0d1d003 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> @@ -28,6 +28,8 @@ usdhc2_pwrseq: usdhc2-pwrseq {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
> reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
> + clocks = <&bd71847>;
> + clock-names = "ext_clock";
> };
> };
>
> @@ -214,6 +216,11 @@ &i2c4 {
> status = "okay";
> };
>
> +&snvs_rtc {
> + clocks = <&bd71847>;
> + clock-names = "snvs-rtc";
> +};
> +
> &uart2 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart2>;
> @@ -235,6 +242,8 @@ bluetooth {
> shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
> host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
> + clocks = <&bd71847>;
> + clock-names = "lpo";
> max-speed = <3000000>;
> };
> };
I've done more testing in suspend/resume and it can not work. I have
modelled differently and extended the svns block to receive an
external clock and make it always enabled. The problem here is the cpu
takes the clock from the pmic that is enabled by default and the pmic
clock even wifi and bluetooth. If I want to register the driver I
would like to connect all of them but it seems that osc_32k is the
basic clock of the cpu and can be modelled using pmic easily. Even I
have created the ext clock on the snvs block so should be always
enabled suspend/resume. The device can not resume from suspend.
Michael
> --
> 2.25.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection
@ 2022-06-05 9:13 ` Michael Nazzareno Trimarchi
0 siblings, 0 replies; 4+ messages in thread
From: Michael Nazzareno Trimarchi @ 2022-06-05 9:13 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Shawn Guo, Sascha Hauer,
Pengutronix Kernel Team, Fabio Estevam, NXP Linux Team,
Ariel D'Alessandro,
open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS,
moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE,
open list
Hi
I have some problems here. Open to suggestion:
On Sat, Jun 4, 2022 at 8:39 PM Michael Trimarchi
<michael@amarulasolutions.com> wrote:
>
> pmic clock is connected to svns_rtc using RTC_XTALI pin,
> and wifi/bluetooth chipset
>
> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
> ---
> .../boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> index c11895d9d582..a21ec0d1d003 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-bsh-smm-s2-common.dtsi
> @@ -28,6 +28,8 @@ usdhc2_pwrseq: usdhc2-pwrseq {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_usdhc2_pwrseq>;
> reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>;
> + clocks = <&bd71847>;
> + clock-names = "ext_clock";
> };
> };
>
> @@ -214,6 +216,11 @@ &i2c4 {
> status = "okay";
> };
>
> +&snvs_rtc {
> + clocks = <&bd71847>;
> + clock-names = "snvs-rtc";
> +};
> +
> &uart2 {
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_uart2>;
> @@ -235,6 +242,8 @@ bluetooth {
> shutdown-gpios = <&gpio1 15 GPIO_ACTIVE_HIGH>;
> device-wakeup-gpios = <&gpio1 18 GPIO_ACTIVE_HIGH>;
> host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
> + clocks = <&bd71847>;
> + clock-names = "lpo";
> max-speed = <3000000>;
> };
> };
I've done more testing in suspend/resume and it can not work. I have
modelled differently and extended the svns block to receive an
external clock and make it always enabled. The problem here is the cpu
takes the clock from the pmic that is enabled by default and the pmic
clock even wifi and bluetooth. If I want to register the driver I
would like to connect all of them but it seems that osc_32k is the
basic clock of the cpu and can be modelled using pmic easily. Even I
have created the ext clock on the snvs block so should be always
enabled suspend/resume. The device can not resume from suspend.
Michael
> --
> 2.25.1
>
--
Michael Nazzareno Trimarchi
Co-Founder & Chief Executive Officer
M. +39 347 913 2170
michael@amarulasolutions.com
__________________________________
Amarula Solutions BV
Joop Geesinkweg 125, 1114 AB, Amsterdam, NL
T. +31 (0)85 111 9172
info@amarulasolutions.com
www.amarulasolutions.com
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-06-05 9:15 UTC | newest]
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2022-06-04 18:38 [PATCH] arm64: dts: imx8mn-bsh-smm-s2/pro: Add pmic clock connection Michael Trimarchi
2022-06-04 18:38 ` Michael Trimarchi
2022-06-05 9:13 ` Michael Nazzareno Trimarchi
2022-06-05 9:13 ` Michael Nazzareno Trimarchi
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