Re: [PATCH 2/3] arm64: dts: freescale: add i.MX93 11x11 EVK basic support

[Tommaso Merciai <tommaso.merciai@amarulasolutions.com>]

On Sun, Jun 05, 2022 at 10:39:06PM +0200, Tommaso Merciai wrote:
> Hi Peng,
> 
> On Mon, Apr 25, 2022 at 07:03:29PM +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> > 
> > Enable lpuart & SDHC for console and rootfs
> > 
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/Makefile        |   1 +
> >  .../boot/dts/freescale/imx93-11x11-evk.dts    | 130 ++++++++++++++++++
> >  2 files changed, 131 insertions(+)
> >  create mode 100644 arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > 
> > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile
> > index 851e6faf8c05..955706c666d8 100644
> > --- a/arch/arm64/boot/dts/freescale/Makefile
> > +++ b/arch/arm64/boot/dts/freescale/Makefile
> > @@ -105,6 +105,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8qxp-ai_ml.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-colibri-eval-v3.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8qxp-mek.dtb
> >  dtb-$(CONFIG_ARCH_MXC) += imx8ulp-evk.dtb
> > +dtb-$(CONFIG_ARCH_MXC) += imx93-11x11-evk.dtb
> >  
> >  imx8mm-venice-gw72xx-0x-imx219-dtbs	:= imx8mm-venice-gw73xx-0x.dtb imx8mm-venice-gw73xx-0x-imx219.dtbo
> >  imx8mm-venice-gw72xx-0x-rs232-rts-dtbs	:= imx8mm-venice-gw72xx-0x.dtb imx8mm-venice-gw72xx-0x-rs232-rts.dtbo
> > diff --git a/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > new file mode 100644
> > index 000000000000..5ee63e3e4759
> > --- /dev/null
> > +++ b/arch/arm64/boot/dts/freescale/imx93-11x11-evk.dts
> > @@ -0,0 +1,130 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> > +/*
> > + * Copyright 2022 NXP
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "imx93.dtsi"
> > +
> > +/ {
> > +	chosen {
> > +		stdout-path = &lpuart1;
> > +	};
> > +
> > +	reg_usdhc2_vmmc: regulator-usdhc2 {
> > +		compatible = "regulator-fixed";
> > +		pinctrl-names = "default";
> > +		pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
> > +		regulator-name = "VSD_3V3";
> > +		regulator-min-microvolt = <3300000>;
> > +		regulator-max-microvolt = <3300000>;
> > +		gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>;
> > +		enable-active-high;
> > +	};
> > +};
> > +
> > +&mu1 {
> > +	status = "okay";
> > +};
> > +
> > +&mu2 {
> > +	status = "okay";
> > +};
> > +
> > +&lpuart1 { /* console */
> > +	pinctrl-names = "default";
> > +	pinctrl-0 = <&pinctrl_uart1>;
> > +	status = "okay";
> > +};
> > +
> > +&usdhc1 {
> > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +	pinctrl-0 = <&pinctrl_usdhc1>;
> > +	pinctrl-1 = <&pinctrl_usdhc1>;
> > +	pinctrl-2 = <&pinctrl_usdhc1>;
> > +	bus-width = <8>;
> > +	non-removable;
> > +	status = "okay";
> > +};
> > +
> > +&usdhc2 {
> > +	pinctrl-names = "default", "state_100mhz", "state_200mhz";
> > +	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> > +	pinctrl-1 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> > +	pinctrl-2 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
> > +	cd-gpios = <&gpio3 00 GPIO_ACTIVE_LOW>;
> > +	vmmc-supply = <&reg_usdhc2_vmmc>;
> > +	bus-width = <4>;
> > +	status = "okay";
> > +	no-sdio;
> > +	no-mmc;
> > +};
> > +
> > +&iomuxc {
> > +	pinctrl-names = "default";
> > +	status = "okay";
> 
> I think you don't need status = "okay" here.
> dts node is enable as default.

Hi Peng,
I was wrong sorry, is the opposite. Disabled as default.
Then looks good to me.

Reviewed-by: Tommaso Merciai <tommaso.merciai@amarulasolutions.com>


> 
> > +
> > +	pinctrl_uart1: uart1grp {
> > +		fsl,pins = <
> > +			MX93_PAD_UART1_RXD__LPUART1_RX			0x31e
> > +			MX93_PAD_UART1_TXD__LPUART1_TX			0x31e
> > +		>;
> > +	};
> > +
> > +	pinctrl_uart2: uart2grp {
> > +		fsl,pins = <
> > +			MX93_PAD_UART2_TXD__LPUART2_TX			0x31e
> > +			MX93_PAD_UART2_RXD__LPUART2_RX			0x31e
> > +		>;
> > +	};
> > +
> > +	pinctrl_uart5: uart5grp {
> > +		fsl,pins = <
> > +			MX93_PAD_DAP_TDO_TRACESWO__LPUART5_TX	0x31e
> > +			MX93_PAD_DAP_TDI__LPUART5_RX		0x31e
> > +			MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B	0x31e
> > +			MX93_PAD_DAP_TCLK_SWCLK__LPUART5_CTS_B	0x31e
> > +		>;
> > +	};
> > +
> > +	pinctrl_usdhc1: usdhc1grp {
> > +		fsl,pins = <
> > +			MX93_PAD_SD1_CLK__USDHC1_CLK		0x17fe
> > +			MX93_PAD_SD1_CMD__USDHC1_CMD		0x13fe
> > +			MX93_PAD_SD1_DATA0__USDHC1_DATA0	0x13fe
> > +			MX93_PAD_SD1_DATA1__USDHC1_DATA1	0x13fe
> > +			MX93_PAD_SD1_DATA2__USDHC1_DATA2	0x13fe
> > +			MX93_PAD_SD1_DATA3__USDHC1_DATA3	0x13fe
> > +			MX93_PAD_SD1_DATA4__USDHC1_DATA4	0x13fe
> > +			MX93_PAD_SD1_DATA5__USDHC1_DATA5	0x13fe
> > +			MX93_PAD_SD1_DATA6__USDHC1_DATA6	0x13fe
> > +			MX93_PAD_SD1_DATA7__USDHC1_DATA7	0x13fe
> > +			MX93_PAD_SD1_STROBE__USDHC1_STROBE	0x17fe
> > +		>;
> > +	};
> > +
> > +	pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp {
> > +		fsl,pins = <
> > +			MX93_PAD_SD2_RESET_B__GPIO3_IO07	0x31e
> > +		>;
> > +	};
> > +
> > +	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
> > +		fsl,pins = <
> > +			MX93_PAD_SD2_CD_B__GPIO3_IO00		0x31e
> > +		>;
> > +	};
> > +
> > +	pinctrl_usdhc2: usdhc2grp {
> > +		fsl,pins = <
> > +			MX93_PAD_SD2_CLK__USDHC2_CLK		0x17fe
> > +			MX93_PAD_SD2_CMD__USDHC2_CMD		0x13fe
> > +			MX93_PAD_SD2_DATA0__USDHC2_DATA0	0x13fe
> > +			MX93_PAD_SD2_DATA1__USDHC2_DATA1	0x13fe
> > +			MX93_PAD_SD2_DATA2__USDHC2_DATA2	0x13fe
> > +			MX93_PAD_SD2_DATA3__USDHC2_DATA3	0x13fe
> > +			MX93_PAD_SD2_VSELECT__USDHC2_VSELECT	0x51e
> > +		>;
> > +	};
> > +};
> > -- 
> > 2.25.1
> > 
> 
> Regards,
> Tommaso
> 
> -- 
> Tommaso Merciai
> Embedded Linux Engineer
> tommaso.merciai@amarulasolutions.com
> __________________________________
> 
> Amarula Solutions SRL
> Via Le Canevare 30, 31100 Treviso, Veneto, IT
> T. +39 042 243 5310
> info@amarulasolutions.com
> www.amarulasolutions.com

-- 
Tommaso Merciai
Embedded Linux Engineer
tommaso.merciai@amarulasolutions.com
__________________________________

Amarula Solutions SRL
Via Le Canevare 30, 31100 Treviso, Veneto, IT
T. +39 042 243 5310
info@amarulasolutions.com
www.amarulasolutions.com