From: Nikita Shubin <nikita.shubin@maquefel.me> Cc: "Genevieve Chan" <genevieve.chan@starfivetech.com>, "João Mário Domingos" <joao.mario@tecnico.ulisboa.pt>, "Nikita Shubin" <n.shubin@yadro.com>, "Peter Zijlstra" <peterz@infradead.org>, "Ingo Molnar" <mingo@redhat.com>, "Arnaldo Carvalho de Melo" <acme@kernel.org>, "Mark Rutland" <mark.rutland@arm.com>, "Alexander Shishkin" <alexander.shishkin@linux.intel.com>, "Jiri Olsa" <jolsa@kernel.org>, "Namhyung Kim" <namhyung@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, linux-kernel@vger.kernel.org (open list), linux-perf-users@vger.kernel.org (open list:PERFORMANCE EVENTS SUBSYSTEM), linux-riscv@lists.infradead.org (open list:RISC-V ARCHITECTURE) Subject: [PATCH v3 3/4] RISC-V: Added generic pmu-events mapfile Date: Tue, 7 Jun 2022 16:16:46 +0300 [thread overview] Message-ID: <20220607131648.29439-4-nikita.shubin@maquefel.me> (raw) In-Reply-To: <20220607131648.29439-1-nikita.shubin@maquefel.me> From: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> The pmu-events now supports custom events for RISC-V, plus the cycle, time and instret events were defined. Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> Tested-by: Nikita Shubin <n.shubin@yadro.com> --- tools/perf/pmu-events/arch/riscv/mapfile.csv | 14 +++++++++++++ .../pmu-events/arch/riscv/riscv-generic.json | 20 +++++++++++++++++++ 2 files changed, 34 insertions(+) create mode 100644 tools/perf/pmu-events/arch/riscv/mapfile.csv create mode 100644 tools/perf/pmu-events/arch/riscv/riscv-generic.json diff --git a/tools/perf/pmu-events/arch/riscv/mapfile.csv b/tools/perf/pmu-events/arch/riscv/mapfile.csv new file mode 100644 index 000000000000..4f2aa199d9cb --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/mapfile.csv @@ -0,0 +1,14 @@ +# Format: +# MIDR,Version,JSON/file/pathname,Type +# +# where +# MIDR Processor version +# Variant[23:20] and Revision [3:0] should be zero. +# Version could be used to track version of JSON file +# but currently unused. +# JSON/file/pathname is the path to JSON file, relative +# to tools/perf/pmu-events/arch/riscv/. +# Type is core, uncore etc +# +# +#Family-model,Version,Filename,EventType diff --git a/tools/perf/pmu-events/arch/riscv/riscv-generic.json b/tools/perf/pmu-events/arch/riscv/riscv-generic.json new file mode 100644 index 000000000000..013e50efad99 --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/riscv-generic.json @@ -0,0 +1,20 @@ +[ + { + "PublicDescription": "CPU Cycles", + "EventCode": "0x00", + "EventName": "riscv_cycles", + "BriefDescription": "CPU cycles RISC-V generic counter" + }, + { + "PublicDescription": "CPU Time", + "EventCode": "0x01", + "EventName": "riscv_time", + "BriefDescription": "CPU time RISC-V generic counter" + }, + { + "PublicDescription": "CPU Instructions", + "EventCode": "0x02", + "EventName": "riscv_instret", + "BriefDescription": "CPU retired instructions RISC-V generic counter" + } +] \ No newline at end of file -- 2.35.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
WARNING: multiple messages have this Message-ID (diff)
From: Nikita Shubin <nikita.shubin@maquefel.me> To: unlisted-recipients:; (no To-header on input) Cc: "Genevieve Chan" <genevieve.chan@starfivetech.com>, "João Mário Domingos" <joao.mario@tecnico.ulisboa.pt>, "Nikita Shubin" <n.shubin@yadro.com>, "Peter Zijlstra" <peterz@infradead.org>, "Ingo Molnar" <mingo@redhat.com>, "Arnaldo Carvalho de Melo" <acme@kernel.org>, "Mark Rutland" <mark.rutland@arm.com>, "Alexander Shishkin" <alexander.shishkin@linux.intel.com>, "Jiri Olsa" <jolsa@kernel.org>, "Namhyung Kim" <namhyung@kernel.org>, "Paul Walmsley" <paul.walmsley@sifive.com>, "Palmer Dabbelt" <palmer@dabbelt.com>, "Albert Ou" <aou@eecs.berkeley.edu>, linux-kernel@vger.kernel.org (open list), linux-perf-users@vger.kernel.org (open list:PERFORMANCE EVENTS SUBSYSTEM), linux-riscv@lists.infradead.org (open list:RISC-V ARCHITECTURE) Subject: [PATCH v3 3/4] RISC-V: Added generic pmu-events mapfile Date: Tue, 7 Jun 2022 16:16:46 +0300 [thread overview] Message-ID: <20220607131648.29439-4-nikita.shubin@maquefel.me> (raw) In-Reply-To: <20220607131648.29439-1-nikita.shubin@maquefel.me> From: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> The pmu-events now supports custom events for RISC-V, plus the cycle, time and instret events were defined. Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt> Tested-by: Nikita Shubin <n.shubin@yadro.com> --- tools/perf/pmu-events/arch/riscv/mapfile.csv | 14 +++++++++++++ .../pmu-events/arch/riscv/riscv-generic.json | 20 +++++++++++++++++++ 2 files changed, 34 insertions(+) create mode 100644 tools/perf/pmu-events/arch/riscv/mapfile.csv create mode 100644 tools/perf/pmu-events/arch/riscv/riscv-generic.json diff --git a/tools/perf/pmu-events/arch/riscv/mapfile.csv b/tools/perf/pmu-events/arch/riscv/mapfile.csv new file mode 100644 index 000000000000..4f2aa199d9cb --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/mapfile.csv @@ -0,0 +1,14 @@ +# Format: +# MIDR,Version,JSON/file/pathname,Type +# +# where +# MIDR Processor version +# Variant[23:20] and Revision [3:0] should be zero. +# Version could be used to track version of JSON file +# but currently unused. +# JSON/file/pathname is the path to JSON file, relative +# to tools/perf/pmu-events/arch/riscv/. +# Type is core, uncore etc +# +# +#Family-model,Version,Filename,EventType diff --git a/tools/perf/pmu-events/arch/riscv/riscv-generic.json b/tools/perf/pmu-events/arch/riscv/riscv-generic.json new file mode 100644 index 000000000000..013e50efad99 --- /dev/null +++ b/tools/perf/pmu-events/arch/riscv/riscv-generic.json @@ -0,0 +1,20 @@ +[ + { + "PublicDescription": "CPU Cycles", + "EventCode": "0x00", + "EventName": "riscv_cycles", + "BriefDescription": "CPU cycles RISC-V generic counter" + }, + { + "PublicDescription": "CPU Time", + "EventCode": "0x01", + "EventName": "riscv_time", + "BriefDescription": "CPU time RISC-V generic counter" + }, + { + "PublicDescription": "CPU Instructions", + "EventCode": "0x02", + "EventName": "riscv_instret", + "BriefDescription": "CPU retired instructions RISC-V generic counter" + } +] \ No newline at end of file -- 2.35.1
next prev parent reply other threads:[~2022-06-07 13:17 UTC|newest] Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-07 13:16 [PATCH v3 0/4] Introduce pmu-events support for HiFive Unmatched Nikita Shubin 2022-06-07 13:16 ` [PATCH v3 1/4] RISC-V: Create unique identification for SoC PMU Nikita Shubin 2022-06-07 13:16 ` Nikita Shubin 2022-06-07 13:16 ` Nikita Shubin 2022-06-07 16:37 ` Atish Patra 2022-06-07 16:37 ` Atish Patra 2022-06-07 16:37 ` Atish Patra 2022-06-08 8:47 ` Nikita Shubin 2022-06-08 8:47 ` Nikita Shubin 2022-06-08 8:47 ` Nikita Shubin 2022-06-14 10:16 ` Sunil V L 2022-06-14 10:16 ` Sunil V L 2022-06-14 10:16 ` Sunil V L 2022-06-07 13:16 ` [PATCH v3 2/4] RISC-V: Support CPUID for risc-v in perf Nikita Shubin 2022-06-07 13:16 ` Nikita Shubin 2022-06-07 13:16 ` Nikita Shubin 2022-06-09 13:54 ` Will Deacon 2022-06-09 13:54 ` Will Deacon 2022-06-09 13:54 ` Will Deacon 2022-06-07 13:16 ` Nikita Shubin [this message] 2022-06-07 13:16 ` [PATCH v3 3/4] RISC-V: Added generic pmu-events mapfile Nikita Shubin 2022-06-08 10:45 ` John Garry 2022-06-08 10:45 ` John Garry 2022-06-08 14:41 ` Nikita Shubin 2022-06-08 14:41 ` Nikita Shubin 2022-06-08 15:51 ` John Garry 2022-06-08 15:51 ` John Garry 2022-06-07 13:16 ` [PATCH v3 4/4] RISC-V: Added HiFive Unmatched PMU events Nikita Shubin 2022-06-07 13:16 ` Nikita Shubin
Reply instructions: You may reply publicly to this message via plain-text email using any one of the following methods: * Save the following mbox file, import it into your mail client, and reply-to-all from there: mbox Avoid top-posting and favor interleaved quoting: https://en.wikipedia.org/wiki/Posting_style#Interleaved_style * Reply using the --to, --cc, and --in-reply-to switches of git-send-email(1): git send-email \ --in-reply-to=20220607131648.29439-4-nikita.shubin@maquefel.me \ --to=nikita.shubin@maquefel.me \ --cc=acme@kernel.org \ --cc=alexander.shishkin@linux.intel.com \ --cc=aou@eecs.berkeley.edu \ --cc=genevieve.chan@starfivetech.com \ --cc=joao.mario@tecnico.ulisboa.pt \ --cc=jolsa@kernel.org \ --cc=linux-kernel@vger.kernel.org \ --cc=linux-perf-users@vger.kernel.org \ --cc=linux-riscv@lists.infradead.org \ --cc=mark.rutland@arm.com \ --cc=mingo@redhat.com \ --cc=n.shubin@yadro.com \ --cc=namhyung@kernel.org \ --cc=palmer@dabbelt.com \ --cc=paul.walmsley@sifive.com \ --cc=peterz@infradead.org \ /path/to/YOUR_REPLY https://kernel.org/pub/software/scm/git/docs/git-send-email.html * If your mail client supports setting the In-Reply-To header via mailto: links, try the mailto: linkBe sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes, see mirroring instructions on how to clone and mirror all data and code used by this external index.