* [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 5:30 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties Joel Stanley
` (8 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher
Cc: Eddie James, u-boot, Cédric Le Goater
From: Eddie James <eajames@linux.ibm.com>
Set the pinctrl groups for each I2C bus. These are essential to
I2C operating correctly.
Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/dts/ast2600.dtsi | 33 +++++++++++++++++++++++++++++++++
1 file changed, 33 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 64074309b7b2..ef5b131ac0af 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -833,6 +833,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c1_default>;
status = "disabled";
};
@@ -846,6 +848,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c2_default>;
status = "disabled";
};
@@ -859,6 +863,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c3_default>;
};
i2c3: i2c@200 {
@@ -871,6 +877,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c4_default>;
};
i2c4: i2c@280 {
@@ -883,6 +891,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c5_default>;
};
i2c5: i2c@300 {
@@ -895,6 +905,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c6_default>;
};
i2c6: i2c@380 {
@@ -907,6 +919,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c7_default>;
};
i2c7: i2c@400 {
@@ -919,6 +933,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c8_default>;
};
i2c8: i2c@480 {
@@ -931,6 +947,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c9_default>;
};
i2c9: i2c@500 {
@@ -943,6 +961,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c10_default>;
status = "disabled";
};
@@ -956,6 +976,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c11_default>;
status = "disabled";
};
@@ -969,6 +991,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c12_default>;
status = "disabled";
};
@@ -982,6 +1006,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c13_default>;
status = "disabled";
};
@@ -995,6 +1021,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c14_default>;
status = "disabled";
};
@@ -1008,6 +1036,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c15_default>;
status = "disabled";
};
@@ -1021,6 +1051,8 @@
bus-frequency = <100000>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&scu ASPEED_CLK_APB2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_i2c16_default>;
status = "disabled";
};
@@ -1246,6 +1278,7 @@
function = "I2C1";
groups = "I2C1";
};
+
pinctrl_i2c2_default: i2c2_default {
function = "I2C2";
groups = "I2C2";
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl
2022-06-20 7:24 ` [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl Joel Stanley
@ 2022-06-21 5:30 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 5:30 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher
Cc: Eddie James, u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: Eddie James <eajames@linux.ibm.com>; u-boot@lists.denx.de; Cédric Le
> Goater <clg@kaod.org>
> Subject: [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl
>
> From: Eddie James <eajames@linux.ibm.com>
>
> Set the pinctrl groups for each I2C bus. These are essential to I2C operating
> correctly.
>
> Signed-off-by: Eddie James <eajames@linux.ibm.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Review-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm/dts/ast2600.dtsi | 33 +++++++++++++++++++++++++++++++++
> 1 file changed, 33 insertions(+)
>
> diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index
> 64074309b7b2..ef5b131ac0af 100644
> --- a/arch/arm/dts/ast2600.dtsi
> +++ b/arch/arm/dts/ast2600.dtsi
> @@ -833,6 +833,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1_default>;
> status = "disabled";
> };
>
> @@ -846,6 +848,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2_default>;
> status = "disabled";
> };
>
> @@ -859,6 +863,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3_default>;
> };
>
> i2c3: i2c@200 {
> @@ -871,6 +877,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c4_default>;
> };
>
> i2c4: i2c@280 {
> @@ -883,6 +891,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c5_default>;
> };
>
> i2c5: i2c@300 {
> @@ -895,6 +905,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c6_default>;
> };
>
> i2c6: i2c@380 {
> @@ -907,6 +919,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c7_default>;
> };
>
> i2c7: i2c@400 {
> @@ -919,6 +933,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c8_default>;
> };
>
> i2c8: i2c@480 {
> @@ -931,6 +947,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c9_default>;
> };
>
> i2c9: i2c@500 {
> @@ -943,6 +961,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c10_default>;
> status = "disabled";
> };
>
> @@ -956,6 +976,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c11_default>;
> status = "disabled";
> };
>
> @@ -969,6 +991,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c12_default>;
> status = "disabled";
> };
>
> @@ -982,6 +1006,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c13_default>;
> status = "disabled";
> };
>
> @@ -995,6 +1021,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c14_default>;
> status = "disabled";
> };
>
> @@ -1008,6 +1036,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c15_default>;
> status = "disabled";
> };
>
> @@ -1021,6 +1051,8 @@
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> clocks = <&scu ASPEED_CLK_APB2>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c16_default>;
> status = "disabled";
> };
>
> @@ -1246,6 +1278,7 @@
> function = "I2C1";
> groups = "I2C1";
> };
> +
> pinctrl_i2c2_default: i2c2_default {
> function = "I2C2";
> groups = "I2C2";
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
2022-06-20 7:24 ` [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 5:31 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default Joel Stanley
` (7 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
The same as the upstream Linux device tree, each i2c bus has a property
specifying the reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/dts/ast2600.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index ef5b131ac0af..4b23d25ede0a 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -832,6 +832,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1_default>;
@@ -847,6 +848,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2_default>;
@@ -862,6 +864,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
@@ -876,6 +879,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
@@ -890,6 +894,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
@@ -904,6 +909,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
@@ -918,6 +924,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
@@ -932,6 +939,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
@@ -946,6 +954,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
@@ -960,6 +969,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c10_default>;
@@ -975,6 +985,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c11_default>;
@@ -990,6 +1001,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c12_default>;
@@ -1005,6 +1017,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c13_default>;
@@ -1020,6 +1033,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c14_default>;
@@ -1035,6 +1049,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c15_default>;
@@ -1050,6 +1065,7 @@
compatible = "aspeed,ast2600-i2c-bus";
bus-frequency = <100000>;
interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
+ resets = <&rst ASPEED_RESET_I2C>;
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c16_default>;
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties
2022-06-20 7:24 ` [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties Joel Stanley
@ 2022-06-21 5:31 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 5:31 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties
>
> The same as the upstream Linux device tree, each i2c bus has a property
> specifying the reset line.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm/dts/ast2600.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index
> ef5b131ac0af..4b23d25ede0a 100644
> --- a/arch/arm/dts/ast2600.dtsi
> +++ b/arch/arm/dts/ast2600.dtsi
> @@ -832,6 +832,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c1_default>;
> @@ -847,6 +848,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c2_default>;
> @@ -862,6 +864,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c3_default>;
> @@ -876,6 +879,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c4_default>;
> @@ -890,6 +894,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c5_default>;
> @@ -904,6 +909,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c6_default>;
> @@ -918,6 +924,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c7_default>;
> @@ -932,6 +939,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c8_default>;
> @@ -946,6 +954,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c9_default>;
> @@ -960,6 +969,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c10_default>; @@ -975,6 +985,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c11_default>; @@ -990,6 +1001,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c12_default>; @@ -1005,6 +1017,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c13_default>; @@ -1020,6 +1033,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c14_default>; @@ -1035,6 +1049,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c15_default>; @@ -1050,6 +1065,7 @@
> compatible = "aspeed,ast2600-i2c-bus";
> bus-frequency = <100000>;
> interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
> + resets = <&rst ASPEED_RESET_I2C>;
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c16_default>;
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
2022-06-20 7:24 ` [PATCH 01/10] ARM: dts: ast2600: Add I2C pinctrl Joel Stanley
2022-06-20 7:24 ` [PATCH 02/10] ARM: dts: ast2600: Add I2C reset properties Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 5:32 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices Joel Stanley
` (6 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
Allow boards to enable the buses they use.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/dts/ast2600.dtsi | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi
index 4b23d25ede0a..a37d062bcad7 100644
--- a/arch/arm/dts/ast2600.dtsi
+++ b/arch/arm/dts/ast2600.dtsi
@@ -868,6 +868,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3_default>;
+ status = "disabled";
};
i2c3: i2c@200 {
@@ -883,6 +884,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4_default>;
+ status = "disabled";
};
i2c4: i2c@280 {
@@ -898,6 +900,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c5_default>;
+ status = "disabled";
};
i2c5: i2c@300 {
@@ -913,6 +916,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c6_default>;
+ status = "disabled";
};
i2c6: i2c@380 {
@@ -928,6 +932,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c7_default>;
+ status = "disabled";
};
i2c7: i2c@400 {
@@ -943,6 +948,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
+ status = "disabled";
};
i2c8: i2c@480 {
@@ -958,6 +964,7 @@
clocks = <&scu ASPEED_CLK_APB2>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
+ status = "disabled";
};
i2c9: i2c@500 {
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default
2022-06-20 7:24 ` [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default Joel Stanley
@ 2022-06-21 5:32 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 5:32 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default
>
> Allow boards to enable the buses they use.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm/dts/ast2600.dtsi | 7 +++++++
> 1 file changed, 7 insertions(+)
>
> diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index
> 4b23d25ede0a..a37d062bcad7 100644
> --- a/arch/arm/dts/ast2600.dtsi
> +++ b/arch/arm/dts/ast2600.dtsi
> @@ -868,6 +868,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c3_default>;
> + status = "disabled";
> };
>
> i2c3: i2c@200 {
> @@ -883,6 +884,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c4_default>;
> + status = "disabled";
> };
>
> i2c4: i2c@280 {
> @@ -898,6 +900,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c5_default>;
> + status = "disabled";
> };
>
> i2c5: i2c@300 {
> @@ -913,6 +916,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c6_default>;
> + status = "disabled";
> };
>
> i2c6: i2c@380 {
> @@ -928,6 +932,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c7_default>;
> + status = "disabled";
> };
>
> i2c7: i2c@400 {
> @@ -943,6 +948,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c8_default>;
> + status = "disabled";
> };
>
> i2c8: i2c@480 {
> @@ -958,6 +964,7 @@
> clocks = <&scu ASPEED_CLK_APB2>;
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c9_default>;
> + status = "disabled";
> };
>
> i2c9: i2c@500 {
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (2 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 03/10] ARM: dts: ast2600: Dsiable I2C nodes by default Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 5:32 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 05/10] ARM: dts: ast2600-evb: " Joel Stanley
` (5 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/dts/ast2500-evb.dts | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
index 4796ed445f57..874e042bc4cb 100644
--- a/arch/arm/dts/ast2500-evb.dts
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -73,3 +73,22 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sd2_default>;
};
+
+&i2c3 {
+ status = "okay";
+
+ eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ lm75@4d {
+ compatible = "national,lm75";
+ reg = <0x4d>;
+ };
+};
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices
2022-06-20 7:24 ` [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices Joel Stanley
@ 2022-06-21 5:32 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 5:32 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices
>
> The EVB has an EEPROM on bus 3 and a LM75 temp sensor on bus 7. Enable
> those busses we can test the I2C driver.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> arch/arm/dts/ast2500-evb.dts | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
> index 4796ed445f57..874e042bc4cb 100644
> --- a/arch/arm/dts/ast2500-evb.dts
> +++ b/arch/arm/dts/ast2500-evb.dts
> @@ -73,3 +73,22 @@
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_sd2_default>;
> };
> +
> +&i2c3 {
> + status = "okay";
> +
> + eeprom@50 {
> + compatible = "atmel,24c08";
> + reg = <0x50>;
> + pagesize = <16>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + lm75@4d {
> + compatible = "national,lm75";
> + reg = <0x4d>;
> + };
> +};
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (3 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 04/10] ARM: dts: ast2500-evb: Add I2C devices Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 5:38 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 06/10] reset/aspeed: Implement status callback Joel Stanley
` (4 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
The EVB has an EEPROM on bus 7 and a LM75 temp sensor on bus 8. Enable
those busses we can test the I2C driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/dts/ast2600-evb.dts | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
index 0d650543134a..cee787ecc0eb 100644
--- a/arch/arm/dts/ast2600-evb.dts
+++ b/arch/arm/dts/ast2600-evb.dts
@@ -174,6 +174,11 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c8_default>;
+
+ temp@2e {
+ compatible = "adi,adt7490";
+ reg = <0x2e>;
+ };
};
&i2c8 {
@@ -181,6 +186,12 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c9_default>;
+
+ eeprom@50 {
+ compatible = "atmel,24c08";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
};
&mdio0 {
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices
2022-06-20 7:24 ` [PATCH 05/10] ARM: dts: ast2600-evb: " Joel Stanley
@ 2022-06-21 5:38 ` Ryan Chen
2022-06-21 6:49 ` Joel Stanley
0 siblings, 1 reply; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 5:38 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices
>
> The EVB has an EEPROM on bus 7 and a LM75 temp sensor on bus 8. Enable
> those busses we can test the I2C driver.
>
Hello,
https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v5.15/arch/arm/boot/dts/aspeed-ast2600-evb.dts#L662-L687
The eeprom is under the same bus with bus#7. Please add in bus#7.
Bus#8 have LM75. Not have eeprom.
> Signed-off-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/dts/ast2600-evb.dts | 11 +++++++++++
> 1 file changed, 11 insertions(+)
>
> diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
> index 0d650543134a..cee787ecc0eb 100644
> --- a/arch/arm/dts/ast2600-evb.dts
> +++ b/arch/arm/dts/ast2600-evb.dts
> @@ -174,6 +174,11 @@
>
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c8_default>;
> +
> + temp@2e {
> + compatible = "adi,adt7490";
> + reg = <0x2e>;
> + };
> };
>
> &i2c8 {
> @@ -181,6 +186,12 @@
>
> pinctrl-names = "default";
> pinctrl-0 = <&pinctrl_i2c9_default>;
> +
> + eeprom@50 {
> + compatible = "atmel,24c08";
> + reg = <0x50>;
> + pagesize = <16>;
> + };
> };
>
> &mdio0 {
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread* Re: [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices
2022-06-21 5:38 ` Ryan Chen
@ 2022-06-21 6:49 ` Joel Stanley
0 siblings, 0 replies; 20+ messages in thread
From: Joel Stanley @ 2022-06-21 6:49 UTC (permalink / raw)
To: Ryan Chen; +Cc: BMC-SW, Heiko Schocher, u-boot, Cédric Le Goater
On Tue, 21 Jun 2022 at 05:38, Ryan Chen <ryan_chen@aspeedtech.com> wrote:
>
> > -----Original Message-----
> > From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> > Sent: Monday, June 20, 2022 3:25 PM
> > To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> > <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> > Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> > Subject: [PATCH 05/10] ARM: dts: ast2600-evb: Add I2C devices
> >
> > The EVB has an EEPROM on bus 7 and a LM75 temp sensor on bus 8. Enable
> > those busses we can test the I2C driver.
> >
> Hello,
> https://github.com/AspeedTech-BMC/linux/blob/aspeed-master-v5.15/arch/arm/boot/dts/aspeed-ast2600-evb.dts#L662-L687
> The eeprom is under the same bus with bus#7. Please add in bus#7.
> Bus#8 have LM75. Not have eeprom.
You're right, I've put them both one bus down.
In testing it didn't matter as the "eeprom" command doesn't use the
device tree description of the devices.
Thanks for the review, I'll send a v2.
>
> > Signed-off-by: Joel Stanley <joel@jms.id.au>
> > ---
> > arch/arm/dts/ast2600-evb.dts | 11 +++++++++++
> > 1 file changed, 11 insertions(+)
> >
> > diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts
> > index 0d650543134a..cee787ecc0eb 100644
> > --- a/arch/arm/dts/ast2600-evb.dts
> > +++ b/arch/arm/dts/ast2600-evb.dts
> > @@ -174,6 +174,11 @@
> >
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_i2c8_default>;
> > +
> > + temp@2e {
> > + compatible = "adi,adt7490";
> > + reg = <0x2e>;
> > + };
> > };
> >
> > &i2c8 {
> > @@ -181,6 +186,12 @@
> >
> > pinctrl-names = "default";
> > pinctrl-0 = <&pinctrl_i2c9_default>;
> > +
> > + eeprom@50 {
> > + compatible = "atmel,24c08";
> > + reg = <0x50>;
> > + pagesize = <16>;
> > + };
> > };
> >
> > &mdio0 {
> > --
> > 2.35.1
>
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 06/10] reset/aspeed: Implement status callback
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (4 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 05/10] ARM: dts: ast2600-evb: " Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 8:12 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 07/10] i2c/aspeed: Fix reset control Joel Stanley
` (3 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
The I2C driver shares a reset line between buses, so allow it to test
the state of the reset line before resetting it.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
drivers/reset/reset-ast2500.c | 19 +++++++++++++++++++
drivers/reset/reset-ast2600.c | 17 +++++++++++++++++
2 files changed, 36 insertions(+)
diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c
index 0a1dd236aff3..d9cecf3a72e8 100644
--- a/drivers/reset/reset-ast2500.c
+++ b/drivers/reset/reset-ast2500.c
@@ -48,6 +48,24 @@ static int ast2500_reset_deassert(struct reset_ctl *reset_ctl)
return 0;
}
+static int ast2500_reset_status(struct reset_ctl *reset_ctl)
+{
+ struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ struct ast2500_scu *scu = priv->scu;
+ int status;
+
+ debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+ if (reset_ctl->id < 32)
+ status = BIT(reset_ctl->id) & readl(&scu->sysreset_ctrl1);
+ else
+ status = BIT(reset_ctl->id - 32) & readl(&scu->sysreset_ctrl2);
+
+ return !!status;
+}
+
+
+
static int ast2500_reset_probe(struct udevice *dev)
{
int rc;
@@ -79,6 +97,7 @@ static const struct udevice_id ast2500_reset_ids[] = {
struct reset_ops ast2500_reset_ops = {
.rst_assert = ast2500_reset_assert,
.rst_deassert = ast2500_reset_deassert,
+ .rst_status = ast2500_reset_status,
};
U_BOOT_DRIVER(ast2500_reset) = {
diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c
index 985235a3ac46..1732a450efc0 100644
--- a/drivers/reset/reset-ast2600.c
+++ b/drivers/reset/reset-ast2600.c
@@ -47,6 +47,22 @@ static int ast2600_reset_deassert(struct reset_ctl *reset_ctl)
return 0;
}
+static int ast2600_reset_status(struct reset_ctl *reset_ctl)
+{
+ struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev);
+ struct ast2600_scu *scu = priv->scu;
+ int status;
+
+ debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
+
+ if (reset_ctl->id < 32)
+ status = BIT(reset_ctl->id) & readl(&scu->modrst_ctrl1);
+ else
+ status = BIT(reset_ctl->id - 32) & readl(&scu->modrst_ctrl2);
+
+ return !!status;
+}
+
static int ast2600_reset_probe(struct udevice *dev)
{
int rc;
@@ -78,6 +94,7 @@ static const struct udevice_id ast2600_reset_ids[] = {
struct reset_ops ast2600_reset_ops = {
.rst_assert = ast2600_reset_assert,
.rst_deassert = ast2600_reset_deassert,
+ .rst_status = ast2600_reset_status,
};
U_BOOT_DRIVER(ast2600_reset) = {
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 06/10] reset/aspeed: Implement status callback
2022-06-20 7:24 ` [PATCH 06/10] reset/aspeed: Implement status callback Joel Stanley
@ 2022-06-21 8:12 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 8:12 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 06/10] reset/aspeed: Implement status callback
>
> The I2C driver shares a reset line between buses, so allow it to test the state of
> the reset line before resetting it.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> drivers/reset/reset-ast2500.c | 19 +++++++++++++++++++
> drivers/reset/reset-ast2600.c | 17 +++++++++++++++++
> 2 files changed, 36 insertions(+)
>
> diff --git a/drivers/reset/reset-ast2500.c b/drivers/reset/reset-ast2500.c index
> 0a1dd236aff3..d9cecf3a72e8 100644
> --- a/drivers/reset/reset-ast2500.c
> +++ b/drivers/reset/reset-ast2500.c
> @@ -48,6 +48,24 @@ static int ast2500_reset_deassert(struct reset_ctl
> *reset_ctl)
> return 0;
> }
>
> +static int ast2500_reset_status(struct reset_ctl *reset_ctl) {
> + struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev);
> + struct ast2500_scu *scu = priv->scu;
> + int status;
> +
> + debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
> +
> + if (reset_ctl->id < 32)
> + status = BIT(reset_ctl->id) & readl(&scu->sysreset_ctrl1);
> + else
> + status = BIT(reset_ctl->id - 32) & readl(&scu->sysreset_ctrl2);
> +
> + return !!status;
> +}
> +
> +
> +
> static int ast2500_reset_probe(struct udevice *dev) {
> int rc;
> @@ -79,6 +97,7 @@ static const struct udevice_id ast2500_reset_ids[] =
> { struct reset_ops ast2500_reset_ops = {
> .rst_assert = ast2500_reset_assert,
> .rst_deassert = ast2500_reset_deassert,
> + .rst_status = ast2500_reset_status,
> };
>
> U_BOOT_DRIVER(ast2500_reset) = {
> diff --git a/drivers/reset/reset-ast2600.c b/drivers/reset/reset-ast2600.c index
> 985235a3ac46..1732a450efc0 100644
> --- a/drivers/reset/reset-ast2600.c
> +++ b/drivers/reset/reset-ast2600.c
> @@ -47,6 +47,22 @@ static int ast2600_reset_deassert(struct reset_ctl
> *reset_ctl)
> return 0;
> }
>
> +static int ast2600_reset_status(struct reset_ctl *reset_ctl) {
> + struct ast2600_reset_priv *priv = dev_get_priv(reset_ctl->dev);
> + struct ast2600_scu *scu = priv->scu;
> + int status;
> +
> + debug("%s: reset_ctl->id: %lu\n", __func__, reset_ctl->id);
> +
> + if (reset_ctl->id < 32)
> + status = BIT(reset_ctl->id) & readl(&scu->modrst_ctrl1);
> + else
> + status = BIT(reset_ctl->id - 32) & readl(&scu->modrst_ctrl2);
> +
> + return !!status;
> +}
> +
> static int ast2600_reset_probe(struct udevice *dev) {
> int rc;
> @@ -78,6 +94,7 @@ static const struct udevice_id ast2600_reset_ids[] =
> { struct reset_ops ast2600_reset_ops = {
> .rst_assert = ast2600_reset_assert,
> .rst_deassert = ast2600_reset_deassert,
> + .rst_status = ast2600_reset_status,
> };
>
> U_BOOT_DRIVER(ast2600_reset) = {
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 07/10] i2c/aspeed: Fix reset control
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (5 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 06/10] reset/aspeed: Implement status callback Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 8:14 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 08/10] i2c/aspeed: Add AST2600 compatible Joel Stanley
` (2 subsequent siblings)
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
The reset control was written for the ast2500 and directly programs the
clocking register.
So we can share the code with other SoC generations use the reset device
to deassert the I2C reset line.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
drivers/i2c/ast_i2c.c | 22 +++++++++++++++-------
1 file changed, 15 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 2d3fecaa14ea..0a93d7c82911 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -16,6 +16,7 @@
#include <asm/arch/scu_ast2500.h>
#include <linux/delay.h>
#include <linux/err.h>
+#include <reset.h>
#include "ast_i2c.h"
@@ -108,19 +109,26 @@ static int ast_i2c_of_to_plat(struct udevice *dev)
static int ast_i2c_probe(struct udevice *dev)
{
- struct ast2500_scu *scu;
+ struct reset_ctl reset_ctl;
+ int rc;
debug("Enabling I2C%u\n", dev_seq(dev));
/*
* Get all I2C devices out of Reset.
- * Only needs to be done once, but doing it for every
- * device does not hurt.
+ *
+ * Only needs to be done once so test before performing reset.
*/
- scu = ast_get_scu();
- ast_scu_unlock(scu);
- clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C);
- ast_scu_lock(scu);
+ rc = reset_get_by_index(dev, 0, &reset_ctl);
+ if (rc) {
+ printf("%s: Failed to get reset signal\n", __func__);
+ return rc;
+ }
+
+ if (reset_status(&reset_ctl) > 0) {
+ reset_assert(&reset_ctl);
+ reset_deassert(&reset_ctl);
+ }
ast_i2c_init_bus(dev);
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 07/10] i2c/aspeed: Fix reset control
2022-06-20 7:24 ` [PATCH 07/10] i2c/aspeed: Fix reset control Joel Stanley
@ 2022-06-21 8:14 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 8:14 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 07/10] i2c/aspeed: Fix reset control
>
> The reset control was written for the ast2500 and directly programs the
> clocking register.
>
> So we can share the code with other SoC generations use the reset device to
> deassert the I2C reset line.
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> drivers/i2c/ast_i2c.c | 22 +++++++++++++++-------
> 1 file changed, 15 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index
> 2d3fecaa14ea..0a93d7c82911 100644
> --- a/drivers/i2c/ast_i2c.c
> +++ b/drivers/i2c/ast_i2c.c
> @@ -16,6 +16,7 @@
> #include <asm/arch/scu_ast2500.h>
> #include <linux/delay.h>
> #include <linux/err.h>
> +#include <reset.h>
>
> #include "ast_i2c.h"
>
> @@ -108,19 +109,26 @@ static int ast_i2c_of_to_plat(struct udevice *dev)
>
> static int ast_i2c_probe(struct udevice *dev) {
> - struct ast2500_scu *scu;
> + struct reset_ctl reset_ctl;
> + int rc;
>
> debug("Enabling I2C%u\n", dev_seq(dev));
>
> /*
> * Get all I2C devices out of Reset.
> - * Only needs to be done once, but doing it for every
> - * device does not hurt.
> + *
> + * Only needs to be done once so test before performing reset.
> */
> - scu = ast_get_scu();
> - ast_scu_unlock(scu);
> - clrbits_le32(&scu->sysreset_ctrl1, SCU_SYSRESET_I2C);
> - ast_scu_lock(scu);
> + rc = reset_get_by_index(dev, 0, &reset_ctl);
> + if (rc) {
> + printf("%s: Failed to get reset signal\n", __func__);
> + return rc;
> + }
> +
> + if (reset_status(&reset_ctl) > 0) {
> + reset_assert(&reset_ctl);
> + reset_deassert(&reset_ctl);
> + }
>
> ast_i2c_init_bus(dev);
>
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 08/10] i2c/aspeed: Add AST2600 compatible
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (6 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 07/10] i2c/aspeed: Fix reset control Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-21 8:15 ` Ryan Chen
2022-06-20 7:24 ` [PATCH 09/10] config/ast2600: Enable I2C driver Joel Stanley
2022-06-20 7:24 ` [PATCH 10/10] config/aspeed: Enable EEPROM options Joel Stanley
9 siblings, 1 reply; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
drivers/i2c/ast_i2c.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c
index 0a93d7c82911..c9ffe2d62820 100644
--- a/drivers/i2c/ast_i2c.c
+++ b/drivers/i2c/ast_i2c.c
@@ -351,6 +351,7 @@ static const struct dm_i2c_ops ast_i2c_ops = {
static const struct udevice_id ast_i2c_ids[] = {
{ .compatible = "aspeed,ast2400-i2c-bus" },
{ .compatible = "aspeed,ast2500-i2c-bus" },
+ { .compatible = "aspeed,ast2600-i2c-bus" },
{ },
};
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* RE: [PATCH 08/10] i2c/aspeed: Add AST2600 compatible
2022-06-20 7:24 ` [PATCH 08/10] i2c/aspeed: Add AST2600 compatible Joel Stanley
@ 2022-06-21 8:15 ` Ryan Chen
0 siblings, 0 replies; 20+ messages in thread
From: Ryan Chen @ 2022-06-21 8:15 UTC (permalink / raw)
To: Joel Stanley, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
> -----Original Message-----
> From: joel.stan@gmail.com <joel.stan@gmail.com> On Behalf Of Joel Stanley
> Sent: Monday, June 20, 2022 3:25 PM
> To: Ryan Chen <ryan_chen@aspeedtech.com>; BMC-SW
> <BMC-SW@aspeedtech.com>; Heiko Schocher <hs@denx.de>
> Cc: u-boot@lists.denx.de; Cédric Le Goater <clg@kaod.org>
> Subject: [PATCH 08/10] i2c/aspeed: Add AST2600 compatible
>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>
> ---
> drivers/i2c/ast_i2c.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/i2c/ast_i2c.c b/drivers/i2c/ast_i2c.c index
> 0a93d7c82911..c9ffe2d62820 100644
> --- a/drivers/i2c/ast_i2c.c
> +++ b/drivers/i2c/ast_i2c.c
> @@ -351,6 +351,7 @@ static const struct dm_i2c_ops ast_i2c_ops = { static
> const struct udevice_id ast_i2c_ids[] = {
> { .compatible = "aspeed,ast2400-i2c-bus" },
> { .compatible = "aspeed,ast2500-i2c-bus" },
> + { .compatible = "aspeed,ast2600-i2c-bus" },
> { },
> };
>
> --
> 2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH 09/10] config/ast2600: Enable I2C driver
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (7 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 08/10] i2c/aspeed: Add AST2600 compatible Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
2022-06-20 7:24 ` [PATCH 10/10] config/aspeed: Enable EEPROM options Joel Stanley
9 siblings, 0 replies; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
configs/evb-ast2600_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 160bccff48e2..8f34546235a4 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -61,6 +61,7 @@ CONFIG_CLK=y
CONFIG_SPL_CLK=y
CONFIG_ASPEED_GPIO=y
CONFIG_DM_I2C=y
+CONFIG_SYS_I2C_ASPEED=y
CONFIG_MISC=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ASPEED=y
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread* [PATCH 10/10] config/aspeed: Enable EEPROM options
2022-06-20 7:24 [PATCH 00/10] i2c: Improvements for aspeed boards Joel Stanley
` (8 preceding siblings ...)
2022-06-20 7:24 ` [PATCH 09/10] config/ast2600: Enable I2C driver Joel Stanley
@ 2022-06-20 7:24 ` Joel Stanley
9 siblings, 0 replies; 20+ messages in thread
From: Joel Stanley @ 2022-06-20 7:24 UTC (permalink / raw)
To: Ryan Chen, BMC-SW, Heiko Schocher; +Cc: u-boot, Cédric Le Goater
To allow testing of the I2C driver, enable the eprom command and the
misc driver.
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
configs/evb-ast2500_defconfig | 3 +++
configs/evb-ast2600_defconfig | 2 ++
2 files changed, 5 insertions(+)
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
index 2371cc2742cf..3ae07bd4e9e1 100644
--- a/configs/evb-ast2500_defconfig
+++ b/configs/evb-ast2500_defconfig
@@ -18,6 +18,7 @@ CONFIG_PRE_CONSOLE_BUFFER=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_HUSH_PARSER=y
# CONFIG_AUTO_COMPLETE is not set
+CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -33,6 +34,8 @@ CONFIG_CLK=y
CONFIG_ASPEED_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_ASPEED=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ASPEED=y
CONFIG_PHY_REALTEK=y
diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig
index 8f34546235a4..f2ef84c90c5c 100644
--- a/configs/evb-ast2600_defconfig
+++ b/configs/evb-ast2600_defconfig
@@ -42,6 +42,7 @@ CONFIG_SPL_DM_RESET=y
CONFIG_SPL_RAM_SUPPORT=y
CONFIG_SPL_RAM_DEVICE=y
CONFIG_HUSH_PARSER=y
+CONFIG_CMD_EEPROM=y
CONFIG_CMD_GPIO=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@@ -63,6 +64,7 @@ CONFIG_ASPEED_GPIO=y
CONFIG_DM_I2C=y
CONFIG_SYS_I2C_ASPEED=y
CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_ASPEED=y
CONFIG_PHY_REALTEK=y
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread