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From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: broonie@kernel.org
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	srinivas.kandagatla@linaro.org, bgoswami@codeaurora.org,
	gregkh@linuxfoundation.org, rafael@kernel.org,
	cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org,
	b.zolnierkie@samsung.com, myungjoo.ham@samsung.com,
	michael@walle.cc, linus.walleij@linaro.org, brgl@bgdev.pl,
	tglx@linutronix.de, maz@kernel.org, lee.jones@linaro.org,
	mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org,
	tharvey@gateworks.com, rjones@gateworks.com,
	mazziesaccount@gmail.com, orsonzhai@gmail.com,
	baolin.wang7@gmail.com, zhang.lyra@gmail.com,
	jernej.skrabec@gmail.com, samuel@sholland.org,
	lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-actions@lists.infradead.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org
Subject: [PATCH 11/49] regmap-irq: Remove old type register support, refactor
Date: Mon, 20 Jun 2022 21:06:06 +0100	[thread overview]
Message-ID: <20220620200644.1961936-12-aidanmacdonald.0x0@gmail.com> (raw)
In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com>

Now that all users have been converted to use config registers
for setting IRQ types, the old type register handling code can
be removed. Also refactor the parts related to type_in_mask.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/base/regmap/regmap-irq.c | 102 +++++--------------------------
 include/linux/regmap.h           |   4 --
 2 files changed, 14 insertions(+), 92 deletions(-)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 5a3e255816fd..85d7fd4e07d7 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -36,8 +36,7 @@ struct regmap_irq_chip_data {
 	unsigned int *mask_buf;
 	unsigned int *mask_buf_def;
 	unsigned int *wake_buf;
-	unsigned int *type_buf;
-	unsigned int *type_buf_def;
+	unsigned int *mask_type_buf;
 	unsigned int **config_buf;
 
 	unsigned int irq_reg_stride;
@@ -199,24 +198,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 		}
 	}
 
-	/* Don't update the type bits if we're using mask bits for irq type. */
-	if (!d->chip->type_in_mask) {
-		for (i = 0; i < d->chip->num_type_reg; i++) {
-			if (!d->type_buf_def[i])
-				continue;
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-			if (d->chip->type_invert)
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], ~d->type_buf[i]);
-			else
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], d->type_buf[i]);
-			if (ret != 0)
-				dev_err(d->map->dev, "Failed to sync type in %x\n",
-					reg);
-		}
-	}
-
 	for (i = 0; i < d->chip->num_config_bases; i++) {
 		for (j = 0; j < d->chip->num_config_regs; j++) {
 			reg = sub_irq_reg(d, d->chip->config_base[i], j);
@@ -259,11 +240,11 @@ static void regmap_irq_enable(struct irq_data *data)
 	 *
 	 * If the interrupt we're enabling defines any supported types
 	 * then instead of using the regular mask bits for this interrupt,
-	 * use the value previously written to the type buffer at the
+	 * use the value previously written to the mask_type buffer at the
 	 * corresponding offset in regmap_irq_set_type().
 	 */
 	if (d->chip->type_in_mask && irq_data->type.types_supported)
-		mask = d->type_buf[reg] & irq_data->mask;
+		mask = d->mask_type_buf[reg] & irq_data->mask;
 	else
 		mask = irq_data->mask;
 
@@ -287,50 +268,21 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
 	struct regmap *map = d->map;
 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
-	int reg;
 	const struct regmap_irq_type *t = &irq_data->type;
+	unsigned int reg;
 
-	if ((t->types_supported & type) != type)
+	if ((irq_data->type.types_supported & type) != type)
 		return 0;
 
 	reg = t->type_reg_offset / map->reg_stride;
 
+	if (d->chip->type_in_mask)
+		return regmap_irq_set_type_config_simple(&d->mask_type_buf,
+							 type, irq_data, reg);
 	if (d->chip->set_type_config)
 		return d->chip->set_type_config(d->config_buf, type,
 						irq_data, reg);
 
-	if (t->type_reg_mask)
-		d->type_buf[reg] &= ~t->type_reg_mask;
-	else
-		d->type_buf[reg] &= ~(t->type_falling_val |
-				      t->type_rising_val |
-				      t->type_level_low_val |
-				      t->type_level_high_val);
-	switch (type) {
-	case IRQ_TYPE_EDGE_FALLING:
-		d->type_buf[reg] |= t->type_falling_val;
-		break;
-
-	case IRQ_TYPE_EDGE_RISING:
-		d->type_buf[reg] |= t->type_rising_val;
-		break;
-
-	case IRQ_TYPE_EDGE_BOTH:
-		d->type_buf[reg] |= (t->type_falling_val |
-					t->type_rising_val);
-		break;
-
-	case IRQ_TYPE_LEVEL_HIGH:
-		d->type_buf[reg] |= t->type_level_high_val;
-		break;
-
-	case IRQ_TYPE_LEVEL_LOW:
-		d->type_buf[reg] |= t->type_level_low_val;
-		break;
-	default:
-		return -EINVAL;
-	}
-
 	return 0;
 }
 
@@ -682,7 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 	struct regmap_irq_chip_data *d;
 	int i;
 	int ret = -ENOMEM;
-	int num_type_reg;
 	u32 reg;
 	u32 unmask_offset;
 
@@ -750,16 +701,10 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 			goto err_alloc;
 	}
 
-	num_type_reg = chip->type_in_mask ? chip->num_regs : chip->num_type_reg;
-	if (num_type_reg) {
-		d->type_buf_def = kcalloc(num_type_reg,
-					  sizeof(unsigned int), GFP_KERNEL);
-		if (!d->type_buf_def)
-			goto err_alloc;
-
-		d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int),
-				      GFP_KERNEL);
-		if (!d->type_buf)
+	if (chip->type_in_mask) {
+		d->mask_type_buf = kcalloc(chip->num_regs,
+					   sizeof(unsigned int), GFP_KERNEL);
+		if (!d->mask_type_buf)
 			goto err_alloc;
 	}
 
@@ -899,23 +844,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 		}
 	}
 
-	if (chip->num_type_reg && !chip->type_in_mask) {
-		for (i = 0; i < chip->num_type_reg; ++i) {
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-
-			ret = regmap_read(map, reg, &d->type_buf_def[i]);
-
-			if (d->chip->type_invert)
-				d->type_buf_def[i] = ~d->type_buf_def[i];
-
-			if (ret) {
-				dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",
-					reg, ret);
-				goto err_alloc;
-			}
-		}
-	}
-
 	if (irq_base)
 		d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,
 						     irq_base, 0,
@@ -945,8 +873,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 err_domain:
 	/* Should really dispose of the domain but... */
 err_alloc:
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
@@ -1020,8 +947,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 	}
 
 	irq_domain_remove(d->domain);
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index bb8c89a83b51..879afdc81526 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1458,7 +1458,6 @@ struct regmap_irq_sub_irq_map {
  * @ack_base:    Base ack address. If zero then the chip is clear on read.
  *               Using zero value is possible with @use_ack bit.
  * @wake_base:   Base address for wake enables.  If zero unsupported.
- * @type_base:   Base address for irq type.  If zero unsupported.
  * @config_base: Base address for IRQ type config regs. If null unsupported.
  * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
  * @init_ack_masked: Ack all masked interrupts once during initalization.
@@ -1484,7 +1483,6 @@ struct regmap_irq_sub_irq_map {
  * @irqs:        Descriptors for individual IRQs.  Interrupt numbers are
  *               assigned based on the index in the array of the interrupt.
  * @num_irqs:    Number of descriptors.
- * @num_type_reg:    Number of type registers.
  * @type_reg_stride: Stride to use for chips where type registers are not
  *			contiguous.
  * @num_config_bases:	Number of config base registers.
@@ -1514,7 +1512,6 @@ struct regmap_irq_chip {
 	unsigned int unmask_base;
 	unsigned int ack_base;
 	unsigned int wake_base;
-	unsigned int type_base;
 	const unsigned int *config_base;
 	unsigned int irq_reg_stride;
 	bool mask_writeonly:1;
@@ -1536,7 +1533,6 @@ struct regmap_irq_chip {
 	const struct regmap_irq *irqs;
 	int num_irqs;
 
-	int num_type_reg;
 	int num_config_bases;
 	int num_config_regs;
 	unsigned int type_reg_stride;
-- 
2.35.1


WARNING: multiple messages have this Message-ID (diff)
From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: broonie@kernel.org
Cc: agross@kernel.org, bjorn.andersson@linaro.org,
	srinivas.kandagatla@linaro.org, bgoswami@codeaurora.org,
	gregkh@linuxfoundation.org, rafael@kernel.org,
	cw00.choi@samsung.com, krzysztof.kozlowski@linaro.org,
	b.zolnierkie@samsung.com, myungjoo.ham@samsung.com,
	michael@walle.cc, linus.walleij@linaro.org, brgl@bgdev.pl,
	tglx@linutronix.de, maz@kernel.org, lee.jones@linaro.org,
	mani@kernel.org, cristian.ciocaltea@gmail.com, wens@csie.org,
	tharvey@gateworks.com, rjones@gateworks.com,
	mazziesaccount@gmail.com, orsonzhai@gmail.com,
	baolin.wang7@gmail.com, zhang.lyra@gmail.com,
	jernej.skrabec@gmail.com, samuel@sholland.org,
	lgirdwood@gmail.com, perex@perex.cz, tiwai@suse.com,
	linux-kernel@vger.kernel.org, linux-gpio@vger.kernel.org,
	linux-actions@lists.infradead.org, linux-arm-msm@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-sunxi@lists.linux.dev, alsa-devel@alsa-project.org
Subject: [PATCH 11/49] regmap-irq: Remove old type register support, refactor
Date: Mon, 20 Jun 2022 21:06:06 +0100	[thread overview]
Message-ID: <20220620200644.1961936-12-aidanmacdonald.0x0@gmail.com> (raw)
In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com>

Now that all users have been converted to use config registers
for setting IRQ types, the old type register handling code can
be removed. Also refactor the parts related to type_in_mask.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/base/regmap/regmap-irq.c | 102 +++++--------------------------
 include/linux/regmap.h           |   4 --
 2 files changed, 14 insertions(+), 92 deletions(-)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 5a3e255816fd..85d7fd4e07d7 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -36,8 +36,7 @@ struct regmap_irq_chip_data {
 	unsigned int *mask_buf;
 	unsigned int *mask_buf_def;
 	unsigned int *wake_buf;
-	unsigned int *type_buf;
-	unsigned int *type_buf_def;
+	unsigned int *mask_type_buf;
 	unsigned int **config_buf;
 
 	unsigned int irq_reg_stride;
@@ -199,24 +198,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 		}
 	}
 
-	/* Don't update the type bits if we're using mask bits for irq type. */
-	if (!d->chip->type_in_mask) {
-		for (i = 0; i < d->chip->num_type_reg; i++) {
-			if (!d->type_buf_def[i])
-				continue;
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-			if (d->chip->type_invert)
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], ~d->type_buf[i]);
-			else
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], d->type_buf[i]);
-			if (ret != 0)
-				dev_err(d->map->dev, "Failed to sync type in %x\n",
-					reg);
-		}
-	}
-
 	for (i = 0; i < d->chip->num_config_bases; i++) {
 		for (j = 0; j < d->chip->num_config_regs; j++) {
 			reg = sub_irq_reg(d, d->chip->config_base[i], j);
@@ -259,11 +240,11 @@ static void regmap_irq_enable(struct irq_data *data)
 	 *
 	 * If the interrupt we're enabling defines any supported types
 	 * then instead of using the regular mask bits for this interrupt,
-	 * use the value previously written to the type buffer at the
+	 * use the value previously written to the mask_type buffer at the
 	 * corresponding offset in regmap_irq_set_type().
 	 */
 	if (d->chip->type_in_mask && irq_data->type.types_supported)
-		mask = d->type_buf[reg] & irq_data->mask;
+		mask = d->mask_type_buf[reg] & irq_data->mask;
 	else
 		mask = irq_data->mask;
 
@@ -287,50 +268,21 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
 	struct regmap *map = d->map;
 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
-	int reg;
 	const struct regmap_irq_type *t = &irq_data->type;
+	unsigned int reg;
 
-	if ((t->types_supported & type) != type)
+	if ((irq_data->type.types_supported & type) != type)
 		return 0;
 
 	reg = t->type_reg_offset / map->reg_stride;
 
+	if (d->chip->type_in_mask)
+		return regmap_irq_set_type_config_simple(&d->mask_type_buf,
+							 type, irq_data, reg);
 	if (d->chip->set_type_config)
 		return d->chip->set_type_config(d->config_buf, type,
 						irq_data, reg);
 
-	if (t->type_reg_mask)
-		d->type_buf[reg] &= ~t->type_reg_mask;
-	else
-		d->type_buf[reg] &= ~(t->type_falling_val |
-				      t->type_rising_val |
-				      t->type_level_low_val |
-				      t->type_level_high_val);
-	switch (type) {
-	case IRQ_TYPE_EDGE_FALLING:
-		d->type_buf[reg] |= t->type_falling_val;
-		break;
-
-	case IRQ_TYPE_EDGE_RISING:
-		d->type_buf[reg] |= t->type_rising_val;
-		break;
-
-	case IRQ_TYPE_EDGE_BOTH:
-		d->type_buf[reg] |= (t->type_falling_val |
-					t->type_rising_val);
-		break;
-
-	case IRQ_TYPE_LEVEL_HIGH:
-		d->type_buf[reg] |= t->type_level_high_val;
-		break;
-
-	case IRQ_TYPE_LEVEL_LOW:
-		d->type_buf[reg] |= t->type_level_low_val;
-		break;
-	default:
-		return -EINVAL;
-	}
-
 	return 0;
 }
 
@@ -682,7 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 	struct regmap_irq_chip_data *d;
 	int i;
 	int ret = -ENOMEM;
-	int num_type_reg;
 	u32 reg;
 	u32 unmask_offset;
 
@@ -750,16 +701,10 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 			goto err_alloc;
 	}
 
-	num_type_reg = chip->type_in_mask ? chip->num_regs : chip->num_type_reg;
-	if (num_type_reg) {
-		d->type_buf_def = kcalloc(num_type_reg,
-					  sizeof(unsigned int), GFP_KERNEL);
-		if (!d->type_buf_def)
-			goto err_alloc;
-
-		d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int),
-				      GFP_KERNEL);
-		if (!d->type_buf)
+	if (chip->type_in_mask) {
+		d->mask_type_buf = kcalloc(chip->num_regs,
+					   sizeof(unsigned int), GFP_KERNEL);
+		if (!d->mask_type_buf)
 			goto err_alloc;
 	}
 
@@ -899,23 +844,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 		}
 	}
 
-	if (chip->num_type_reg && !chip->type_in_mask) {
-		for (i = 0; i < chip->num_type_reg; ++i) {
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-
-			ret = regmap_read(map, reg, &d->type_buf_def[i]);
-
-			if (d->chip->type_invert)
-				d->type_buf_def[i] = ~d->type_buf_def[i];
-
-			if (ret) {
-				dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",
-					reg, ret);
-				goto err_alloc;
-			}
-		}
-	}
-
 	if (irq_base)
 		d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,
 						     irq_base, 0,
@@ -945,8 +873,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 err_domain:
 	/* Should really dispose of the domain but... */
 err_alloc:
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
@@ -1020,8 +947,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 	}
 
 	irq_domain_remove(d->domain);
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index bb8c89a83b51..879afdc81526 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1458,7 +1458,6 @@ struct regmap_irq_sub_irq_map {
  * @ack_base:    Base ack address. If zero then the chip is clear on read.
  *               Using zero value is possible with @use_ack bit.
  * @wake_base:   Base address for wake enables.  If zero unsupported.
- * @type_base:   Base address for irq type.  If zero unsupported.
  * @config_base: Base address for IRQ type config regs. If null unsupported.
  * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
  * @init_ack_masked: Ack all masked interrupts once during initalization.
@@ -1484,7 +1483,6 @@ struct regmap_irq_sub_irq_map {
  * @irqs:        Descriptors for individual IRQs.  Interrupt numbers are
  *               assigned based on the index in the array of the interrupt.
  * @num_irqs:    Number of descriptors.
- * @num_type_reg:    Number of type registers.
  * @type_reg_stride: Stride to use for chips where type registers are not
  *			contiguous.
  * @num_config_bases:	Number of config base registers.
@@ -1514,7 +1512,6 @@ struct regmap_irq_chip {
 	unsigned int unmask_base;
 	unsigned int ack_base;
 	unsigned int wake_base;
-	unsigned int type_base;
 	const unsigned int *config_base;
 	unsigned int irq_reg_stride;
 	bool mask_writeonly:1;
@@ -1536,7 +1533,6 @@ struct regmap_irq_chip {
 	const struct regmap_irq *irqs;
 	int num_irqs;
 
-	int num_type_reg;
 	int num_config_bases;
 	int num_config_regs;
 	unsigned int type_reg_stride;
-- 
2.35.1


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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
To: broonie@kernel.org
Cc: alsa-devel@alsa-project.org, bgoswami@codeaurora.org,
	rafael@kernel.org, linus.walleij@linaro.org,
	bjorn.andersson@linaro.org, srinivas.kandagatla@linaro.org,
	myungjoo.ham@samsung.com, lee.jones@linaro.org,
	samuel@sholland.org, maz@kernel.org, brgl@bgdev.pl,
	mani@kernel.org, krzysztof.kozlowski@linaro.org,
	jernej.skrabec@gmail.com, cw00.choi@samsung.com, wens@csie.org,
	agross@kernel.org, orsonzhai@gmail.com,
	linux-sunxi@lists.linux.dev, b.zolnierkie@samsung.com,
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Subject: [PATCH 11/49] regmap-irq: Remove old type register support, refactor
Date: Mon, 20 Jun 2022 21:06:06 +0100	[thread overview]
Message-ID: <20220620200644.1961936-12-aidanmacdonald.0x0@gmail.com> (raw)
In-Reply-To: <20220620200644.1961936-1-aidanmacdonald.0x0@gmail.com>

Now that all users have been converted to use config registers
for setting IRQ types, the old type register handling code can
be removed. Also refactor the parts related to type_in_mask.

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
---
 drivers/base/regmap/regmap-irq.c | 102 +++++--------------------------
 include/linux/regmap.h           |   4 --
 2 files changed, 14 insertions(+), 92 deletions(-)

diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 5a3e255816fd..85d7fd4e07d7 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -36,8 +36,7 @@ struct regmap_irq_chip_data {
 	unsigned int *mask_buf;
 	unsigned int *mask_buf_def;
 	unsigned int *wake_buf;
-	unsigned int *type_buf;
-	unsigned int *type_buf_def;
+	unsigned int *mask_type_buf;
 	unsigned int **config_buf;
 
 	unsigned int irq_reg_stride;
@@ -199,24 +198,6 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
 		}
 	}
 
-	/* Don't update the type bits if we're using mask bits for irq type. */
-	if (!d->chip->type_in_mask) {
-		for (i = 0; i < d->chip->num_type_reg; i++) {
-			if (!d->type_buf_def[i])
-				continue;
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-			if (d->chip->type_invert)
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], ~d->type_buf[i]);
-			else
-				ret = regmap_irq_update_bits(d, reg,
-					d->type_buf_def[i], d->type_buf[i]);
-			if (ret != 0)
-				dev_err(d->map->dev, "Failed to sync type in %x\n",
-					reg);
-		}
-	}
-
 	for (i = 0; i < d->chip->num_config_bases; i++) {
 		for (j = 0; j < d->chip->num_config_regs; j++) {
 			reg = sub_irq_reg(d, d->chip->config_base[i], j);
@@ -259,11 +240,11 @@ static void regmap_irq_enable(struct irq_data *data)
 	 *
 	 * If the interrupt we're enabling defines any supported types
 	 * then instead of using the regular mask bits for this interrupt,
-	 * use the value previously written to the type buffer at the
+	 * use the value previously written to the mask_type buffer at the
 	 * corresponding offset in regmap_irq_set_type().
 	 */
 	if (d->chip->type_in_mask && irq_data->type.types_supported)
-		mask = d->type_buf[reg] & irq_data->mask;
+		mask = d->mask_type_buf[reg] & irq_data->mask;
 	else
 		mask = irq_data->mask;
 
@@ -287,50 +268,21 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
 	struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
 	struct regmap *map = d->map;
 	const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
-	int reg;
 	const struct regmap_irq_type *t = &irq_data->type;
+	unsigned int reg;
 
-	if ((t->types_supported & type) != type)
+	if ((irq_data->type.types_supported & type) != type)
 		return 0;
 
 	reg = t->type_reg_offset / map->reg_stride;
 
+	if (d->chip->type_in_mask)
+		return regmap_irq_set_type_config_simple(&d->mask_type_buf,
+							 type, irq_data, reg);
 	if (d->chip->set_type_config)
 		return d->chip->set_type_config(d->config_buf, type,
 						irq_data, reg);
 
-	if (t->type_reg_mask)
-		d->type_buf[reg] &= ~t->type_reg_mask;
-	else
-		d->type_buf[reg] &= ~(t->type_falling_val |
-				      t->type_rising_val |
-				      t->type_level_low_val |
-				      t->type_level_high_val);
-	switch (type) {
-	case IRQ_TYPE_EDGE_FALLING:
-		d->type_buf[reg] |= t->type_falling_val;
-		break;
-
-	case IRQ_TYPE_EDGE_RISING:
-		d->type_buf[reg] |= t->type_rising_val;
-		break;
-
-	case IRQ_TYPE_EDGE_BOTH:
-		d->type_buf[reg] |= (t->type_falling_val |
-					t->type_rising_val);
-		break;
-
-	case IRQ_TYPE_LEVEL_HIGH:
-		d->type_buf[reg] |= t->type_level_high_val;
-		break;
-
-	case IRQ_TYPE_LEVEL_LOW:
-		d->type_buf[reg] |= t->type_level_low_val;
-		break;
-	default:
-		return -EINVAL;
-	}
-
 	return 0;
 }
 
@@ -682,7 +634,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 	struct regmap_irq_chip_data *d;
 	int i;
 	int ret = -ENOMEM;
-	int num_type_reg;
 	u32 reg;
 	u32 unmask_offset;
 
@@ -750,16 +701,10 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 			goto err_alloc;
 	}
 
-	num_type_reg = chip->type_in_mask ? chip->num_regs : chip->num_type_reg;
-	if (num_type_reg) {
-		d->type_buf_def = kcalloc(num_type_reg,
-					  sizeof(unsigned int), GFP_KERNEL);
-		if (!d->type_buf_def)
-			goto err_alloc;
-
-		d->type_buf = kcalloc(num_type_reg, sizeof(unsigned int),
-				      GFP_KERNEL);
-		if (!d->type_buf)
+	if (chip->type_in_mask) {
+		d->mask_type_buf = kcalloc(chip->num_regs,
+					   sizeof(unsigned int), GFP_KERNEL);
+		if (!d->mask_type_buf)
 			goto err_alloc;
 	}
 
@@ -899,23 +844,6 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 		}
 	}
 
-	if (chip->num_type_reg && !chip->type_in_mask) {
-		for (i = 0; i < chip->num_type_reg; ++i) {
-			reg = sub_irq_reg(d, d->chip->type_base, i);
-
-			ret = regmap_read(map, reg, &d->type_buf_def[i]);
-
-			if (d->chip->type_invert)
-				d->type_buf_def[i] = ~d->type_buf_def[i];
-
-			if (ret) {
-				dev_err(map->dev, "Failed to get type defaults at 0x%x: %d\n",
-					reg, ret);
-				goto err_alloc;
-			}
-		}
-	}
-
 	if (irq_base)
 		d->domain = irq_domain_create_legacy(fwnode, chip->num_irqs,
 						     irq_base, 0,
@@ -945,8 +873,7 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
 err_domain:
 	/* Should really dispose of the domain but... */
 err_alloc:
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
@@ -1020,8 +947,7 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
 	}
 
 	irq_domain_remove(d->domain);
-	kfree(d->type_buf);
-	kfree(d->type_buf_def);
+	kfree(d->mask_type_buf);
 	kfree(d->wake_buf);
 	kfree(d->mask_buf_def);
 	kfree(d->mask_buf);
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index bb8c89a83b51..879afdc81526 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1458,7 +1458,6 @@ struct regmap_irq_sub_irq_map {
  * @ack_base:    Base ack address. If zero then the chip is clear on read.
  *               Using zero value is possible with @use_ack bit.
  * @wake_base:   Base address for wake enables.  If zero unsupported.
- * @type_base:   Base address for irq type.  If zero unsupported.
  * @config_base: Base address for IRQ type config regs. If null unsupported.
  * @irq_reg_stride:  Stride to use for chips where registers are not contiguous.
  * @init_ack_masked: Ack all masked interrupts once during initalization.
@@ -1484,7 +1483,6 @@ struct regmap_irq_sub_irq_map {
  * @irqs:        Descriptors for individual IRQs.  Interrupt numbers are
  *               assigned based on the index in the array of the interrupt.
  * @num_irqs:    Number of descriptors.
- * @num_type_reg:    Number of type registers.
  * @type_reg_stride: Stride to use for chips where type registers are not
  *			contiguous.
  * @num_config_bases:	Number of config base registers.
@@ -1514,7 +1512,6 @@ struct regmap_irq_chip {
 	unsigned int unmask_base;
 	unsigned int ack_base;
 	unsigned int wake_base;
-	unsigned int type_base;
 	const unsigned int *config_base;
 	unsigned int irq_reg_stride;
 	bool mask_writeonly:1;
@@ -1536,7 +1533,6 @@ struct regmap_irq_chip {
 	const struct regmap_irq *irqs;
 	int num_irqs;
 
-	int num_type_reg;
 	int num_config_bases;
 	int num_config_regs;
 	unsigned int type_reg_stride;
-- 
2.35.1


  parent reply	other threads:[~2022-06-20 20:06 UTC|newest]

Thread overview: 215+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-20 20:05 [PATCH 00/49] regmap-irq cleanups and refactoring Aidan MacDonald
2022-06-20 20:05 ` Aidan MacDonald
2022-06-20 20:05 ` Aidan MacDonald
2022-06-20 20:05 ` [PATCH 01/49] regmap-irq: Fix a bug in regmap_irq_enable() for type_in_mask chips Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05 ` [PATCH 02/49] regmap-irq: Fix offset/index mismatch in read_sub_irq_data() Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-23  9:03   ` Matti Vaittinen
2022-06-23  9:03     ` Matti Vaittinen
2022-06-23  9:03     ` Matti Vaittinen
2022-06-23 23:29   ` Guru Das Srinagesh
2022-06-23 23:29     ` Guru Das Srinagesh
2022-06-20 20:05 ` [PATCH 03/49] regmap-irq: Remove an unnecessary restriction on type_in_mask Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05 ` [PATCH 04/49] regmap-irq: Introduce config registers for irq types Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-20 20:05   ` Aidan MacDonald
2022-06-21  9:22   ` Andy Shevchenko
2022-06-21  9:22     ` Andy Shevchenko
2022-06-21  9:22     ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 05/49] mfd: qcom-pm8008: Convert irq chip to config regs Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 06/49] mfd: wcd934x: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 07/49] sound: soc: codecs: wcd9335: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 08/49] sound: soc: codecs: wcd938x: Remove spurious type_base from irq chip Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 09/49] mfd: max77650: Remove useless type_invert flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 10/49] regmap-irq: Remove virtual registers support Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` Aidan MacDonald [this message]
2022-06-20 20:06   ` [PATCH 11/49] regmap-irq: Remove old type register support, refactor Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 12/49] regmap-irq: Remove unused type_reg_stride field Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 13/49] regmap-irq: Remove unused type_invert flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 14/49] regmap-irq: Do not use regmap_irq_update_bits() for wake regs Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 15/49] regmap-irq: Change the behavior of mask_writeonly Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:29   ` Andy Shevchenko
2022-06-21  9:29     ` Andy Shevchenko
2022-06-21  9:29     ` Andy Shevchenko
2022-06-21 21:13     ` Aidan MacDonald
2022-06-21 21:13       ` Aidan MacDonald
2022-06-21 21:13       ` Aidan MacDonald
2022-06-21 22:42       ` Andy Shevchenko
2022-06-23 20:54         ` Aidan MacDonald
2022-06-23 20:54           ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 16/49] regmap-irq: Rename regmap_irq_update_bits() Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 17/49] regmap-irq: Add broken_mask_unmask flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:33   ` Andy Shevchenko
2022-06-21  9:33     ` Andy Shevchenko
2022-06-21  9:33     ` Andy Shevchenko
2022-06-21 21:07     ` Aidan MacDonald
2022-06-21 21:07       ` Aidan MacDonald
2022-06-21 21:07       ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 18/49] mfd: qcom-pm8008: Add broken_mask_unmask irq chip flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:35   ` Andy Shevchenko
2022-06-21  9:35     ` Andy Shevchenko
2022-06-21  9:35     ` Andy Shevchenko
2022-06-24  0:03     ` Guru Das Srinagesh
2022-06-24  0:03       ` Guru Das Srinagesh
2022-06-20 20:06 ` [PATCH 19/49] mfd: stpmic1: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:35   ` Andy Shevchenko
2022-06-21  9:35     ` Andy Shevchenko
2022-06-21  9:35     ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 20/49] regmap-irq: Fix inverted handling of unmask registers Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:40   ` Andy Shevchenko
2022-06-21  9:40     ` Andy Shevchenko
2022-06-21  9:40     ` Andy Shevchenko
2022-06-24  0:21   ` Guru Das Srinagesh
2022-06-24  0:21     ` Guru Das Srinagesh
2022-06-20 20:06 ` [PATCH 21/49] mfd: tps65090: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 22/49] mfd: sun4i-gpadc: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 23/49] mfd: sprd-sc27xx-spi: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 24/49] mfd: rt5033: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 25/49] mfd: rohm-bd71828: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 26/49] mfd: rn5t618: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 27/49] mfd: gateworks-gsc: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 28/49] mfd: axp20x: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 29/49] mfd: atc260x: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 30/49] mfd: 88pm800: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 31/49] mfd: max14577: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 32/49] mfd: max77693: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 33/49] mfd: rohm-bd718x7: drop useless mask_invert flag on irqchip Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-23  9:09   ` Vaittinen, Matti
2022-06-23  9:09     ` Vaittinen, Matti
2022-06-23  9:09     ` Vaittinen, Matti
2022-06-20 20:06 ` [PATCH 34/49] mfd: max77843: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 35/49] extcon: max77843: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 36/49] extcon: sm5502: drop useless mask_invert flag on irqchip Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 37/49] extcon: rt8973a: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 38/49] irqchip: sl28cpld: replace irqchip mask_invert with unmask_base Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 39/49] gpio: " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:42   ` Andy Shevchenko
2022-06-21  9:42     ` Andy Shevchenko
2022-06-21  9:42     ` Andy Shevchenko
2022-06-23  6:33   ` Michael Walle
2022-06-23  6:33     ` Michael Walle
2022-06-23  6:33     ` Michael Walle
2022-06-20 20:06 ` [PATCH 40/49] mfd: stpmic1: Fix broken mask/unmask in irq chip Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 41/49] mfd: stpmic1: Enable mask_writeonly flag for " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 42/49] mfd: qcom-pm8008: Fix broken mask/unmask in " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 43/49] mfd: qcom-pm8008: Enable mask_writeonly flag for " Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 44/49] regmap-irq: Remove broken_mask_unmask flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 45/49] regmap-irq: Remove mask_invert flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 46/49] regmap-irq: Refactor checks for status bulk read support Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:45   ` Andy Shevchenko
2022-06-21  9:45     ` Andy Shevchenko
2022-06-21  9:45     ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 47/49] regmap-irq: Add get_irq_reg() callback Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:51   ` Andy Shevchenko
2022-06-21  9:51     ` Andy Shevchenko
2022-06-21  9:51     ` Andy Shevchenko
2022-06-20 20:06 ` [PATCH 48/49] mfd: qcom-pm8008: Use get_irq_reg() for irq chip Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06 ` [PATCH 49/49] regmap-irq: Remove not_fixed_stride flag Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-20 20:06   ` Aidan MacDonald
2022-06-21  9:25 ` [PATCH 00/49] regmap-irq cleanups and refactoring Andy Shevchenko
2022-06-21  9:25   ` Andy Shevchenko
2022-06-21  9:25   ` Andy Shevchenko
2022-06-21 17:08 ` Mark Brown
2022-06-21 17:08   ` Mark Brown
2022-06-21 17:08   ` Mark Brown
2022-06-21 21:04   ` Aidan MacDonald
2022-06-21 21:04     ` Aidan MacDonald
2022-06-21 21:04     ` Aidan MacDonald
2022-06-23 13:18     ` Mark Brown
2022-06-23 13:18       ` Mark Brown
2022-06-22 15:16 ` (subset) " Mark Brown
2022-06-22 15:16   ` Mark Brown
2022-06-22 15:16   ` Mark Brown

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