From: Neal Liu <neal_liu@aspeedtech.com> To: Corentin Labbe <clabbe.montjoie@gmail.com>, Christophe JAILLET <christophe.jaillet@wanadoo.fr>, Randy Dunlap <rdunlap@infradead.org>, Herbert Xu <herbert@gondor.apana.org.au>, "David S . Miller" <davem@davemloft.net>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Joel Stanley <joel@jms.id.au>, "Andrew Jeffery" <andrew@aj.id.au>, Dhananjay Phadke <dhphadke@microsoft.com>, "Johnny Huang" <johnny_huang@aspeedtech.com> Cc: <linux-aspeed@lists.ozlabs.org>, <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <BMC-SW@aspeedtech.com> Subject: [PATCH v3 0/5] Add Aspeed crypto driver for hardware acceleration Date: Tue, 21 Jun 2022 14:37:47 +0800 [thread overview] Message-ID: <20220621063752.1005781-1-neal_liu@aspeedtech.com> (raw) Aspeed Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, encryption and decryption. These patches aim to add Aspeed hash & crypto driver support. The hash & crypto driver also pass the run-time self tests that take place at algorithm registration. Tested-by below configs: - CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set - CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y - CONFIG_DMA_API_DEBUG=y - CONFIG_DMA_API_DEBUG_SG=y - CONFIG_CPU_BIG_ENDIAN=y Change since v2: - Fix endianness issue. Tested on both little endian & big endian system. - Use common crypto hardware engine for enqueue & dequeue requests. - Use pre-defined IVs for SHA-family. - Revise error handler flow. - Fix sorts of coding style problems. Change since v1: - Add more error handlers, including DMA memory allocate/free, DMA map/unmap, clock enable/disable, etc. - Fix check dma_map error for config DMA_API_DEBUG. - Fix dt-binding doc & dts node naming. Neal Liu (5): crypto: aspeed: Add HACE hash driver dt-bindings: clock: Add AST2600 HACE reset definition ARM: dts: aspeed: Add HACE device controller node dt-bindings: crypto: add documentation for aspeed hace crypto: aspeed: add HACE crypto driver .../bindings/crypto/aspeed,ast2500-hace.yaml | 53 + MAINTAINERS | 7 + arch/arm/boot/dts/aspeed-g6.dtsi | 8 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 40 + drivers/crypto/aspeed/Makefile | 8 + drivers/crypto/aspeed/aspeed-hace-crypto.c | 1041 ++++++++++++ drivers/crypto/aspeed/aspeed-hace-hash.c | 1423 +++++++++++++++++ drivers/crypto/aspeed/aspeed-hace.c | 320 ++++ drivers/crypto/aspeed/aspeed-hace.h | 289 ++++ include/dt-bindings/clock/ast2600-clock.h | 1 + 12 files changed, 3192 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed-hace-crypto.c create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.h -- 2.25.1
WARNING: multiple messages have this Message-ID (diff)
From: Neal Liu <neal_liu@aspeedtech.com> To: Corentin Labbe <clabbe.montjoie@gmail.com>, Christophe JAILLET <christophe.jaillet@wanadoo.fr>, Randy Dunlap <rdunlap@infradead.org>, Herbert Xu <herbert@gondor.apana.org.au>, "David S . Miller" <davem@davemloft.net>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Joel Stanley <joel@jms.id.au>, "Andrew Jeffery" <andrew@aj.id.au>, Dhananjay Phadke <dhphadke@microsoft.com>, "Johnny Huang" <johnny_huang@aspeedtech.com> Cc: <linux-aspeed@lists.ozlabs.org>, <linux-crypto@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, <BMC-SW@aspeedtech.com> Subject: [PATCH v3 0/5] Add Aspeed crypto driver for hardware acceleration Date: Tue, 21 Jun 2022 14:37:47 +0800 [thread overview] Message-ID: <20220621063752.1005781-1-neal_liu@aspeedtech.com> (raw) Aspeed Hash and Crypto Engine (HACE) is designed to accelerate the throughput of hash data digest, encryption and decryption. These patches aim to add Aspeed hash & crypto driver support. The hash & crypto driver also pass the run-time self tests that take place at algorithm registration. Tested-by below configs: - CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set - CONFIG_CRYPTO_MANAGER_EXTRA_TESTS=y - CONFIG_DMA_API_DEBUG=y - CONFIG_DMA_API_DEBUG_SG=y - CONFIG_CPU_BIG_ENDIAN=y Change since v2: - Fix endianness issue. Tested on both little endian & big endian system. - Use common crypto hardware engine for enqueue & dequeue requests. - Use pre-defined IVs for SHA-family. - Revise error handler flow. - Fix sorts of coding style problems. Change since v1: - Add more error handlers, including DMA memory allocate/free, DMA map/unmap, clock enable/disable, etc. - Fix check dma_map error for config DMA_API_DEBUG. - Fix dt-binding doc & dts node naming. Neal Liu (5): crypto: aspeed: Add HACE hash driver dt-bindings: clock: Add AST2600 HACE reset definition ARM: dts: aspeed: Add HACE device controller node dt-bindings: crypto: add documentation for aspeed hace crypto: aspeed: add HACE crypto driver .../bindings/crypto/aspeed,ast2500-hace.yaml | 53 + MAINTAINERS | 7 + arch/arm/boot/dts/aspeed-g6.dtsi | 8 + drivers/crypto/Kconfig | 1 + drivers/crypto/Makefile | 1 + drivers/crypto/aspeed/Kconfig | 40 + drivers/crypto/aspeed/Makefile | 8 + drivers/crypto/aspeed/aspeed-hace-crypto.c | 1041 ++++++++++++ drivers/crypto/aspeed/aspeed-hace-hash.c | 1423 +++++++++++++++++ drivers/crypto/aspeed/aspeed-hace.c | 320 ++++ drivers/crypto/aspeed/aspeed-hace.h | 289 ++++ include/dt-bindings/clock/ast2600-clock.h | 1 + 12 files changed, 3192 insertions(+) create mode 100644 Documentation/devicetree/bindings/crypto/aspeed,ast2500-hace.yaml create mode 100644 drivers/crypto/aspeed/Kconfig create mode 100644 drivers/crypto/aspeed/Makefile create mode 100644 drivers/crypto/aspeed/aspeed-hace-crypto.c create mode 100644 drivers/crypto/aspeed/aspeed-hace-hash.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.c create mode 100644 drivers/crypto/aspeed/aspeed-hace.h -- 2.25.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next reply other threads:[~2022-06-21 6:40 UTC|newest] Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-06-21 6:37 Neal Liu [this message] 2022-06-21 6:37 ` [PATCH v3 0/5] Add Aspeed crypto driver for hardware acceleration Neal Liu 2022-06-21 6:37 ` [PATCH v3 1/5] crypto: aspeed: Add HACE hash driver Neal Liu 2022-06-21 6:37 ` Neal Liu 2022-06-23 7:13 ` Christophe JAILLET 2022-06-23 7:13 ` Christophe JAILLET 2022-06-24 5:25 ` Neal Liu 2022-06-24 5:25 ` Neal Liu 2022-06-21 6:37 ` [PATCH v3 2/5] dt-bindings: clock: Add AST2600 HACE reset definition Neal Liu 2022-06-21 6:37 ` Neal Liu 2022-06-21 6:37 ` [PATCH v3 3/5] ARM: dts: aspeed: Add HACE device controller node Neal Liu 2022-06-21 6:37 ` Neal Liu 2022-06-21 6:37 ` [PATCH v3 4/5] dt-bindings: crypto: add documentation for aspeed hace Neal Liu 2022-06-21 6:37 ` Neal Liu 2022-06-21 6:37 ` [PATCH v3 5/5] crypto: aspeed: add HACE crypto driver Neal Liu 2022-06-21 6:37 ` Neal Liu
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