All of lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v4 0/1] RISC-V: Create unique identification for SoC PMU
@ 2022-06-19 11:11 ` Nikita Shubin
  0 siblings, 0 replies; 30+ messages in thread
From: Nikita Shubin @ 2022-06-19 11:11 UTC (permalink / raw)
  To: Atish Patra, Will Deacon, Sunil V L
  Cc: João Mário Domingos, linux, Nikita Shubin,
	Paul Walmsley, Palmer Dabbelt, Albert Ou, Anup Patel,
	Mark Rutland, Geert Uytterhoeven, linux-riscv, linux-kernel,
	linux-arm-kernel

From: Nikita Shubin <n.shubin@yadro.com>

Provide RISC-V SBI PMU id to distinguish different cores or SoCs via
"devices/platform/riscv-pmu/id" sysfs entry.

As per Will Deacon recomendation i am splitting the original series in parts,
first one is to provide a reasonable id for RISC-V SBI PMU. Events for Unmatched,
general RISCV and SBI Firmware bindings will be added later.

We can provide the PMU id as is marchid, mimpid, mvendorid as string, separated by a coma:

cat /sys/devices/platform/riscv-pmu/id 
0x70032,0x70032,0x0

In this case we are providing them as is as given by SBI extension.

Also i've added a string allocated on probe with pmuid, to avoid excess ecalls.

Atish would do you think about this ?

Sunil, thank you for reporting issue with 32-bit, i decided to make another approuch to problem.

Link: https://patchwork.kernel.org/project/linux-riscv/list/?series=648017
---
v3->v4:
- split series
- fix DEVICE_ATTR to use octal permissions
- use string for pmuid, instead of incoding some magical numbers
---
Nikita Shubin (1):
  RISC-V: Create unique identification for SoC PMU

 drivers/perf/riscv_pmu_sbi.c   | 41 ++++++++++++++++++++++++++++++++++
 include/linux/perf/riscv_pmu.h |  1 +
 2 files changed, 42 insertions(+)

-- 
2.35.1


^ permalink raw reply	[flat|nested] 30+ messages in thread

end of thread, other threads:[~2022-06-21  8:07 UTC | newest]

Thread overview: 30+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-19 11:11 [PATCH v4 0/1] RISC-V: Create unique identification for SoC PMU Nikita Shubin
2022-06-19 11:11 ` Nikita Shubin
2022-06-19 11:11 ` Nikita Shubin
2022-06-19 11:11 ` [PATCH v4 1/1] " Nikita Shubin
2022-06-19 11:11   ` Nikita Shubin
2022-06-19 11:11   ` Nikita Shubin
2022-06-20  7:50   ` Geert Uytterhoeven
2022-06-20  7:50     ` Geert Uytterhoeven
2022-06-20  7:50     ` Geert Uytterhoeven
2022-06-20 14:44     ` Nikita Shubin
2022-06-20 14:44       ` Nikita Shubin
2022-06-20 14:44       ` Nikita Shubin
2022-06-20 12:00   ` Anup Patel
2022-06-20 12:00     ` Anup Patel
2022-06-20 12:00     ` Anup Patel
2022-06-20 14:40     ` Nikita Shubin
2022-06-20 14:40       ` Nikita Shubin
2022-06-20 14:40       ` Nikita Shubin
2022-06-20 19:40       ` Atish Patra
2022-06-20 19:40         ` Atish Patra
2022-06-20 19:40         ` Atish Patra
2022-06-21  7:41         ` Nikita Shubin
2022-06-21  7:41           ` Nikita Shubin
2022-06-21  7:41           ` Nikita Shubin
2022-06-21  7:51           ` Anup Patel
2022-06-21  7:51             ` Anup Patel
2022-06-21  7:51             ` Anup Patel
2022-06-21  7:59             ` Nikita Shubin
2022-06-21  7:59               ` Nikita Shubin
2022-06-21  7:59               ` Nikita Shubin

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.