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* [PATCH 1/2] drm/amdgpu: update GFX11 cs settings
@ 2022-06-22  2:25 Evan Quan
  2022-06-22  2:25 ` [PATCH 2/2] drm/amd/pm: enable VR0 HOT support for SMU 13.0.0 Evan Quan
  0 siblings, 1 reply; 2+ messages in thread
From: Evan Quan @ 2022-06-22  2:25 UTC (permalink / raw)
  To: amd-gfx; +Cc: Alex Deucher, Evan Quan

Update GFX11 cs related settings.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Change-Id: If99a46ef4178fb4cd686008038923d3b15efa452
---
 drivers/gpu/drm/amd/amdgpu/clearstate_gfx11.h | 307 +++++++++---------
 1 file changed, 158 insertions(+), 149 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx11.h b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx11.h
index f3852b59b1d6..a8b29d33c464 100644
--- a/drivers/gpu/drm/amd/amdgpu/clearstate_gfx11.h
+++ b/drivers/gpu/drm/amd/amdgpu/clearstate_gfx11.h
@@ -39,7 +39,7 @@ static const unsigned int gfx11_SECT_CONTEXT_def_1[] =
     0x00000000, // DB_DEPTH_CLEAR
     0x00000000, // PA_SC_SCREEN_SCISSOR_TL
     0x40004000, // PA_SC_SCREEN_SCISSOR_BR
-    0x00000000, // DB_DFSM_CONTROL
+    0, // HOLE
     0x00000000, // DB_RESERVED_REG_2
     0x00000000, // DB_Z_INFO
     0x00000000, // DB_STENCIL_INFO
@@ -50,7 +50,7 @@ static const unsigned int gfx11_SECT_CONTEXT_def_1[] =
     0x00000000, // DB_RESERVED_REG_1
     0x00000000, // DB_RESERVED_REG_3
     0x00000000, // DB_SPI_VRS_CENTER_LOCATION
-    0x00000000, // DB_VRS_OVERRIDE_CNTL
+    0, // HOLE
     0x00000000, // DB_Z_READ_BASE_HI
     0x00000000, // DB_STENCIL_READ_BASE_HI
     0x00000000, // DB_Z_WRITE_BASE_HI
@@ -270,29 +270,29 @@ static const unsigned int gfx11_SECT_CONTEXT_def_2[] =
     0x00000000, // PA_SC_FSR_EN
     0x00000000, // PA_SC_FSR_FBW_RECURSIONS_X
     0x00000000, // PA_SC_FSR_FBW_RECURSIONS_Y
-    0x00000000, // PA_SC_VRS_RATE_FEEDBACK_VIEW
+    0, // HOLE
     0x00000000, // PA_SC_VRS_OVERRIDE_CNTL
     0x00000000, // PA_SC_VRS_RATE_FEEDBACK_BASE
     0x00000000, // PA_SC_VRS_RATE_FEEDBACK_BASE_EXT
     0x00000000, // PA_SC_VRS_RATE_FEEDBACK_SIZE_XY
     0x00000000, // PA_SC_BINNER_OUTPUT_TIMEOUT_CNTL
-    0, // HOLE
+    0x00000000, // PA_SC_VRS_RATE_CACHE_CNTL
     0, // HOLE
     0, // HOLE
     0x00000000, // PA_SC_VRS_RATE_BASE
     0x00000000, // PA_SC_VRS_RATE_BASE_EXT
     0x00000000, // PA_SC_VRS_RATE_SIZE_XY
-    0x00000000, // PA_SC_VRS_RATE_VIEW
-    0xffffffff, // VGT_MAX_VTX_INDX
-    0x00000000, // VGT_MIN_VTX_INDX
-    0x00000000, // VGT_INDX_OFFSET
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // VGT_MULTI_PRIM_IB_RESET_INDX
     0x00550055, // CB_RMI_GL2_CACHE_CONTROL
     0x00000000, // CB_BLEND_RED
     0x00000000, // CB_BLEND_GREEN
     0x00000000, // CB_BLEND_BLUE
     0x00000000, // CB_BLEND_ALPHA
-    0x00000000, // CB_DCC_CONTROL
+    0x00000000, // CB_FDCC_CONTROL
     0x00000000, // CB_COVERAGE_OUT_CONTROL
     0x00000000, // DB_STENCIL_CONTROL
     0x01000000, // DB_STENCILREFMASK
@@ -470,8 +470,8 @@ static const unsigned int gfx11_SECT_CONTEXT_def_2[] =
     0x00000000, // SPI_BARYC_CNTL
     0, // HOLE
     0x00000000, // SPI_TMPRING_SIZE
-    0, // HOLE
-    0, // HOLE
+    0x00000000, // SPI_GFX_SCRATCH_BASE_LO
+    0x00000000, // SPI_GFX_SCRATCH_BASE_HI
     0, // HOLE
     0, // HOLE
     0, // HOLE
@@ -545,7 +545,7 @@ static const unsigned int gfx11_SECT_CONTEXT_def_4[] =
     0x00000000, // PA_STEREO_CNTL
     0x00000000, // PA_STATE_STEREO_X
     0x00000000, // PA_CL_VRS_CNTL
-    0x00000000, // PA_SIDEBAND_REQUEST_DELAYS
+    0, // HOLE
     0, // HOLE
     0, // HOLE
     0, // HOLE
@@ -658,30 +658,30 @@ static const unsigned int gfx11_SECT_CONTEXT_def_4[] =
     0x00000000, // PA_SU_POINT_MINMAX
     0x00000000, // PA_SU_LINE_CNTL
     0x00000000, // PA_SC_LINE_STIPPLE
-    0x00000000, // VGT_OUTPUT_PATH_CNTL
-    0x00000000, // VGT_HOS_CNTL
+    0, // HOLE
+    0, // HOLE
     0x00000000, // VGT_HOS_MAX_TESS_LEVEL
     0x00000000, // VGT_HOS_MIN_TESS_LEVEL
-    0x00000000, // VGT_HOS_REUSE_DEPTH
-    0x00000000, // VGT_GROUP_PRIM_TYPE
-    0x00000000, // VGT_GROUP_FIRST_DECR
-    0x00000000, // VGT_GROUP_DECR
-    0x00000000, // VGT_GROUP_VECT_0_CNTL
-    0x00000000, // VGT_GROUP_VECT_1_CNTL
-    0x00000000, // VGT_GROUP_VECT_0_FMT_CNTL
-    0x00000000, // VGT_GROUP_VECT_1_FMT_CNTL
-    0x00000000, // VGT_GS_MODE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // VGT_GS_ONCHIP_CNTL
     0x00000000, // PA_SC_MODE_CNTL_0
     0x00000000, // PA_SC_MODE_CNTL_1
     0x00000000, // VGT_ENHANCE
-    0x00000100, // VGT_GS_PER_ES
-    0x00000080, // VGT_ES_PER_GS
-    0x00000002, // VGT_GS_PER_VS
-    0x00000000, // VGT_GSVS_RING_OFFSET_1
-    0x00000000, // VGT_GSVS_RING_OFFSET_2
-    0x00000000, // VGT_GSVS_RING_OFFSET_3
-    0x00000000, // VGT_GS_OUT_PRIM_TYPE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // IA_ENHANCE
 };
 static const unsigned int gfx11_SECT_CONTEXT_def_5[] =
@@ -695,37 +695,36 @@ static const unsigned int gfx11_SECT_CONTEXT_def_6[] =
 };
 static const unsigned int gfx11_SECT_CONTEXT_def_7[] =
 {
-    0x00000000, // VGT_MULTI_PRIM_IB_RESET_EN
     0x00000000, // VGT_DRAW_PAYLOAD_CNTL
     0, // HOLE
-    0x00000000, // VGT_INSTANCE_STEP_RATE_0
-    0x00000000, // VGT_INSTANCE_STEP_RATE_1
-    0x000000ff, // IA_MULTI_VGT_PARAM
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // VGT_ESGS_RING_ITEMSIZE
-    0x00000000, // VGT_GSVS_RING_ITEMSIZE
+    0, // HOLE
     0x00000000, // VGT_REUSE_OFF
-    0x00000000, // VGT_VTX_CNT_EN
+    0, // HOLE
     0x00000000, // DB_HTILE_SURFACE
     0x00000000, // DB_SRESULTS_COMPARE_STATE0
     0x00000000, // DB_SRESULTS_COMPARE_STATE1
     0x00000000, // DB_PRELOAD_CONTROL
     0, // HOLE
-    0x00000000, // VGT_STRMOUT_BUFFER_SIZE_0
-    0x00000000, // VGT_STRMOUT_VTX_STRIDE_0
     0, // HOLE
-    0x00000000, // VGT_STRMOUT_BUFFER_OFFSET_0
-    0x00000000, // VGT_STRMOUT_BUFFER_SIZE_1
-    0x00000000, // VGT_STRMOUT_VTX_STRIDE_1
     0, // HOLE
-    0x00000000, // VGT_STRMOUT_BUFFER_OFFSET_1
-    0x00000000, // VGT_STRMOUT_BUFFER_SIZE_2
-    0x00000000, // VGT_STRMOUT_VTX_STRIDE_2
     0, // HOLE
-    0x00000000, // VGT_STRMOUT_BUFFER_OFFSET_2
-    0x00000000, // VGT_STRMOUT_BUFFER_SIZE_3
-    0x00000000, // VGT_STRMOUT_VTX_STRIDE_3
     0, // HOLE
-    0x00000000, // VGT_STRMOUT_BUFFER_OFFSET_3
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0, // HOLE
     0, // HOLE
     0, // HOLE
@@ -745,10 +744,10 @@ static const unsigned int gfx11_SECT_CONTEXT_def_7[] =
     0x00000000, // VGT_TESS_DISTRIBUTION
     0x00000000, // VGT_SHADER_STAGES_EN
     0x00000000, // VGT_LS_HS_CONFIG
-    0x00000000, // VGT_GS_VERT_ITEMSIZE
-    0x00000000, // VGT_GS_VERT_ITEMSIZE_1
-    0x00000000, // VGT_GS_VERT_ITEMSIZE_2
-    0x00000000, // VGT_GS_VERT_ITEMSIZE_3
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // VGT_TF_PARAM
     0x00000000, // DB_ALPHA_TO_MASK
     0, // HOLE
@@ -759,11 +758,22 @@ static const unsigned int gfx11_SECT_CONTEXT_def_7[] =
     0x00000000, // PA_SU_POLY_OFFSET_BACK_SCALE
     0x00000000, // PA_SU_POLY_OFFSET_BACK_OFFSET
     0x00000000, // VGT_GS_INSTANCE_CNT
-    0x00000000, // VGT_STRMOUT_CONFIG
-    0x00000000, // VGT_STRMOUT_BUFFER_CONFIG
-};
-static const unsigned int gfx11_SECT_CONTEXT_def_8[] =
-{
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // PA_SC_CENTROID_PRIORITY_0
     0x00000000, // PA_SC_CENTROID_PRIORITY_1
     0x00001000, // PA_SC_LINE_CNTL
@@ -797,126 +807,126 @@ static const unsigned int gfx11_SECT_CONTEXT_def_8[] =
     0x00100000, // PA_SC_CONSERVATIVE_RASTERIZATION_CNTL
     0x00000000, // PA_SC_NGG_MODE_CNTL
     0x00000000, // PA_SC_BINNER_CNTL_2
-    0x0000001e, // VGT_VERTEX_REUSE_BLOCK_CNTL
-    0x00000020, // VGT_OUT_DEALLOC_CNTL
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR0_BASE
-    0x00000000, // CB_COLOR0_PITCH
-    0x00000000, // CB_COLOR0_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR0_VIEW
     0x00000000, // CB_COLOR0_INFO
     0x00000000, // CB_COLOR0_ATTRIB
-    0x00000000, // CB_COLOR0_DCC_CONTROL
-    0x00000000, // CB_COLOR0_CMASK
-    0x00000000, // CB_COLOR0_CMASK_SLICE
-    0x00000000, // CB_COLOR0_FMASK
-    0x00000000, // CB_COLOR0_FMASK_SLICE
-    0x00000000, // CB_COLOR0_CLEAR_WORD0
-    0x00000000, // CB_COLOR0_CLEAR_WORD1
+    0x00000000, // CB_COLOR0_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR0_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR1_BASE
-    0x00000000, // CB_COLOR1_PITCH
-    0x00000000, // CB_COLOR1_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR1_VIEW
     0x00000000, // CB_COLOR1_INFO
     0x00000000, // CB_COLOR1_ATTRIB
-    0x00000000, // CB_COLOR1_DCC_CONTROL
-    0x00000000, // CB_COLOR1_CMASK
-    0x00000000, // CB_COLOR1_CMASK_SLICE
-    0x00000000, // CB_COLOR1_FMASK
-    0x00000000, // CB_COLOR1_FMASK_SLICE
-    0x00000000, // CB_COLOR1_CLEAR_WORD0
-    0x00000000, // CB_COLOR1_CLEAR_WORD1
+    0x00000000, // CB_COLOR1_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR1_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR2_BASE
-    0x00000000, // CB_COLOR2_PITCH
-    0x00000000, // CB_COLOR2_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR2_VIEW
     0x00000000, // CB_COLOR2_INFO
     0x00000000, // CB_COLOR2_ATTRIB
-    0x00000000, // CB_COLOR2_DCC_CONTROL
-    0x00000000, // CB_COLOR2_CMASK
-    0x00000000, // CB_COLOR2_CMASK_SLICE
-    0x00000000, // CB_COLOR2_FMASK
-    0x00000000, // CB_COLOR2_FMASK_SLICE
-    0x00000000, // CB_COLOR2_CLEAR_WORD0
-    0x00000000, // CB_COLOR2_CLEAR_WORD1
+    0x00000000, // CB_COLOR2_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR2_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR3_BASE
-    0x00000000, // CB_COLOR3_PITCH
-    0x00000000, // CB_COLOR3_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR3_VIEW
     0x00000000, // CB_COLOR3_INFO
     0x00000000, // CB_COLOR3_ATTRIB
-    0x00000000, // CB_COLOR3_DCC_CONTROL
-    0x00000000, // CB_COLOR3_CMASK
-    0x00000000, // CB_COLOR3_CMASK_SLICE
-    0x00000000, // CB_COLOR3_FMASK
-    0x00000000, // CB_COLOR3_FMASK_SLICE
-    0x00000000, // CB_COLOR3_CLEAR_WORD0
-    0x00000000, // CB_COLOR3_CLEAR_WORD1
+    0x00000000, // CB_COLOR3_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR3_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR4_BASE
-    0x00000000, // CB_COLOR4_PITCH
-    0x00000000, // CB_COLOR4_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR4_VIEW
     0x00000000, // CB_COLOR4_INFO
     0x00000000, // CB_COLOR4_ATTRIB
-    0x00000000, // CB_COLOR4_DCC_CONTROL
-    0x00000000, // CB_COLOR4_CMASK
-    0x00000000, // CB_COLOR4_CMASK_SLICE
-    0x00000000, // CB_COLOR4_FMASK
-    0x00000000, // CB_COLOR4_FMASK_SLICE
-    0x00000000, // CB_COLOR4_CLEAR_WORD0
-    0x00000000, // CB_COLOR4_CLEAR_WORD1
+    0x00000000, // CB_COLOR4_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR4_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR5_BASE
-    0x00000000, // CB_COLOR5_PITCH
-    0x00000000, // CB_COLOR5_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR5_VIEW
     0x00000000, // CB_COLOR5_INFO
     0x00000000, // CB_COLOR5_ATTRIB
-    0x00000000, // CB_COLOR5_DCC_CONTROL
-    0x00000000, // CB_COLOR5_CMASK
-    0x00000000, // CB_COLOR5_CMASK_SLICE
-    0x00000000, // CB_COLOR5_FMASK
-    0x00000000, // CB_COLOR5_FMASK_SLICE
-    0x00000000, // CB_COLOR5_CLEAR_WORD0
-    0x00000000, // CB_COLOR5_CLEAR_WORD1
+    0x00000000, // CB_COLOR5_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR5_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR6_BASE
-    0x00000000, // CB_COLOR6_PITCH
-    0x00000000, // CB_COLOR6_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR6_VIEW
     0x00000000, // CB_COLOR6_INFO
     0x00000000, // CB_COLOR6_ATTRIB
-    0x00000000, // CB_COLOR6_DCC_CONTROL
-    0x00000000, // CB_COLOR6_CMASK
-    0x00000000, // CB_COLOR6_CMASK_SLICE
-    0x00000000, // CB_COLOR6_FMASK
-    0x00000000, // CB_COLOR6_FMASK_SLICE
-    0x00000000, // CB_COLOR6_CLEAR_WORD0
-    0x00000000, // CB_COLOR6_CLEAR_WORD1
+    0x00000000, // CB_COLOR6_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR6_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR7_BASE
-    0x00000000, // CB_COLOR7_PITCH
-    0x00000000, // CB_COLOR7_SLICE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR7_VIEW
     0x00000000, // CB_COLOR7_INFO
     0x00000000, // CB_COLOR7_ATTRIB
-    0x00000000, // CB_COLOR7_DCC_CONTROL
-    0x00000000, // CB_COLOR7_CMASK
-    0x00000000, // CB_COLOR7_CMASK_SLICE
-    0x00000000, // CB_COLOR7_FMASK
-    0x00000000, // CB_COLOR7_FMASK_SLICE
-    0x00000000, // CB_COLOR7_CLEAR_WORD0
-    0x00000000, // CB_COLOR7_CLEAR_WORD1
+    0x00000000, // CB_COLOR7_FDCC_CONTROL
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR7_DCC_BASE
     0, // HOLE
     0x00000000, // CB_COLOR0_BASE_EXT
@@ -927,22 +937,22 @@ static const unsigned int gfx11_SECT_CONTEXT_def_8[] =
     0x00000000, // CB_COLOR5_BASE_EXT
     0x00000000, // CB_COLOR6_BASE_EXT
     0x00000000, // CB_COLOR7_BASE_EXT
-    0x00000000, // CB_COLOR0_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR1_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR2_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR3_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR4_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR5_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR6_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR7_CMASK_BASE_EXT
-    0x00000000, // CB_COLOR0_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR1_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR2_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR3_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR4_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR5_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR6_FMASK_BASE_EXT
-    0x00000000, // CB_COLOR7_FMASK_BASE_EXT
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
+    0, // HOLE
     0x00000000, // CB_COLOR0_DCC_BASE_EXT
     0x00000000, // CB_COLOR1_DCC_BASE_EXT
     0x00000000, // CB_COLOR2_DCC_BASE_EXT
@@ -976,8 +986,7 @@ static const struct cs_extent_def gfx11_SECT_CONTEXT_defs[] =
     {gfx11_SECT_CONTEXT_def_4, 0x0000a1ff, 158 },
     {gfx11_SECT_CONTEXT_def_5, 0x0000a2a0, 2 },
     {gfx11_SECT_CONTEXT_def_6, 0x0000a2a3, 1 },
-    {gfx11_SECT_CONTEXT_def_7, 0x0000a2a5, 66 },
-    {gfx11_SECT_CONTEXT_def_8, 0x0000a2f5, 203 },
+    {gfx11_SECT_CONTEXT_def_7, 0x0000a2a6, 282 },
     { 0, 0, 0 }
 };
 static const struct cs_section_def gfx11_cs_data[] = {
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* [PATCH 2/2] drm/amd/pm: enable VR0 HOT support for SMU 13.0.0
  2022-06-22  2:25 [PATCH 1/2] drm/amdgpu: update GFX11 cs settings Evan Quan
@ 2022-06-22  2:25 ` Evan Quan
  0 siblings, 0 replies; 2+ messages in thread
From: Evan Quan @ 2022-06-22  2:25 UTC (permalink / raw)
  To: amd-gfx; +Cc: Alex Deucher, Evan Quan

Enable VR0 Hot support for SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Change-Id: I11a642033d6e0885877cf48c1f1e07f30de4622e
---
 drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index 6fb2b072a730..ce2fa04e3926 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -308,6 +308,8 @@ smu_v13_0_0_get_allowed_feature_mask(struct smu_context *smu,
 
 	*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_UCLK_BIT);
 
+	*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VR0HOT_BIT);
+
 	return 0;
 }
 
-- 
2.29.0


^ permalink raw reply related	[flat|nested] 2+ messages in thread

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2022-06-22  2:25 [PATCH 1/2] drm/amdgpu: update GFX11 cs settings Evan Quan
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