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From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 0/2] Add PLIC support for Renesas RZ/Five SoC
Date: Fri, 24 Jun 2022 19:03:09 +0100	[thread overview]
Message-ID: <20220624180311.3007-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)

Hi All,

This patch series adds PLIC support for Renesas RZ/Five SoC.

Sending this as an RFC based on the discussion [0].

This patches have been tested with I2C and DMAC interface as these
blocks have EDGE interrupts.

[0] https://lore.kernel.org/linux-arm-kernel/87o80a7t2z.wl-maz@kernel.org/T/

RFC-->v1:
* Fixed review comments pointed by Rob and Geert.
* Changed implementation for EDGE interrupt handling on Renesas RZ/Five SoC.

RFC: https://lore.kernel.org/linux-renesas-soc/
20220524172214.5104-2-prabhakar.mahadev-lad.rj@bp.renesas.com/T/

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: interrupt-controller: sifive,plic: Document Renesas
    RZ/Five SoC
  irqchip/sifive-plic: Add support for Renesas RZ/Five SoC

 .../sifive,plic-1.0.0.yaml                    | 40 +++++++-
 drivers/irqchip/irq-sifive-plic.c             | 95 ++++++++++++++++++-
 2 files changed, 127 insertions(+), 8 deletions(-)

-- 
2.25.1


WARNING: multiple messages have this Message-ID (diff)
From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
To: Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org, devicetree@vger.kernel.org
Cc: Geert Uytterhoeven <geert+renesas@glider.be>,
	linux-renesas-soc@vger.kernel.org, linux-kernel@vger.kernel.org,
	Prabhakar <prabhakar.csengg@gmail.com>,
	Biju Das <biju.das.jz@bp.renesas.com>,
	Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Subject: [PATCH 0/2] Add PLIC support for Renesas RZ/Five SoC
Date: Fri, 24 Jun 2022 19:03:09 +0100	[thread overview]
Message-ID: <20220624180311.3007-1-prabhakar.mahadev-lad.rj@bp.renesas.com> (raw)

Hi All,

This patch series adds PLIC support for Renesas RZ/Five SoC.

Sending this as an RFC based on the discussion [0].

This patches have been tested with I2C and DMAC interface as these
blocks have EDGE interrupts.

[0] https://lore.kernel.org/linux-arm-kernel/87o80a7t2z.wl-maz@kernel.org/T/

RFC-->v1:
* Fixed review comments pointed by Rob and Geert.
* Changed implementation for EDGE interrupt handling on Renesas RZ/Five SoC.

RFC: https://lore.kernel.org/linux-renesas-soc/
20220524172214.5104-2-prabhakar.mahadev-lad.rj@bp.renesas.com/T/

Cheers,
Prabhakar

Lad Prabhakar (2):
  dt-bindings: interrupt-controller: sifive,plic: Document Renesas
    RZ/Five SoC
  irqchip/sifive-plic: Add support for Renesas RZ/Five SoC

 .../sifive,plic-1.0.0.yaml                    | 40 +++++++-
 drivers/irqchip/irq-sifive-plic.c             | 95 ++++++++++++++++++-
 2 files changed, 127 insertions(+), 8 deletions(-)

-- 
2.25.1


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             reply	other threads:[~2022-06-24 18:03 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-24 18:03 Lad Prabhakar [this message]
2022-06-24 18:03 ` [PATCH 0/2] Add PLIC support for Renesas RZ/Five SoC Lad Prabhakar
2022-06-24 18:03 ` [PATCH 1/2] dt-bindings: interrupt-controller: sifive,plic: Document " Lad Prabhakar
2022-06-24 18:03   ` Lad Prabhakar
2022-06-25 20:01   ` Krzysztof Kozlowski
2022-06-25 20:01     ` Krzysztof Kozlowski
2022-06-26  0:31     ` Lad, Prabhakar
2022-06-26  0:31       ` Lad, Prabhakar
2022-06-24 18:03 ` [PATCH 2/2] irqchip/sifive-plic: Add support for " Lad Prabhakar
2022-06-24 18:03   ` Lad Prabhakar
2022-06-25  9:03   ` Marc Zyngier
2022-06-25  9:03     ` Marc Zyngier
2022-06-25  9:54     ` Lad, Prabhakar
2022-06-25  9:54       ` Lad, Prabhakar
2022-06-25 11:52       ` Marc Zyngier
2022-06-25 11:52         ` Marc Zyngier
2022-06-25 13:03         ` Lad, Prabhakar
2022-06-25 13:03           ` Lad, Prabhakar
2022-06-25 16:05           ` Marc Zyngier
2022-06-25 16:05             ` Marc Zyngier
2022-06-26  0:34             ` Lad, Prabhakar
2022-06-26  0:34               ` Lad, Prabhakar

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