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* [PATCH] drm/bridge: tc358767: Do not cache dsi_lanes twice
@ 2022-06-24 18:19 Marek Vasut
  2022-06-27 12:20 ` Neil Armstrong
  0 siblings, 1 reply; 3+ messages in thread
From: Marek Vasut @ 2022-06-24 18:19 UTC (permalink / raw)
  To: dri-devel
  Cc: Marek Vasut, Laurent Pinchart, robert.foss, Maxime Ripard,
	Andrzej Hajda, Sam Ravnborg

The DSI lane count can be accessed via the dsi device pointer,
make use of that. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
---
 drivers/gpu/drm/bridge/tc358767.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index e4dd4f05f94b3..44f32bf483c51 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -288,7 +288,6 @@ struct tc_data {
 	struct drm_connector	connector;
 
 	struct mipi_dsi_device	*dsi;
-	u8			dsi_lanes;
 
 	/* link settings */
 	struct tc_edp_link	link;
@@ -1261,7 +1260,7 @@ static int tc_dsi_rx_enable(struct tc_data *tc)
 	regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
 	regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD);
 
-	value = ((LANEENABLE_L0EN << tc->dsi_lanes) - LANEENABLE_L0EN) |
+	value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) |
 		LANEENABLE_CLEN;
 	regmap_write(tc->regmap, PPI_LANEENABLE, value);
 	regmap_write(tc->regmap, DSI_LANEENABLE, value);
@@ -1909,8 +1908,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
 
 	tc->dsi = dsi;
 
-	tc->dsi_lanes = dsi_lanes;
-	dsi->lanes = tc->dsi_lanes;
+	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread
* Re: [PATCH] drm/bridge: tc358767: Do not cache dsi_lanes twice
  2022-06-24 18:19 [PATCH] drm/bridge: tc358767: Do not cache dsi_lanes twice Marek Vasut
@ 2022-06-27 12:20 ` Neil Armstrong
  0 siblings, 0 replies; 3+ messages in thread
From: Neil Armstrong @ 2022-06-27 12:20 UTC (permalink / raw)
  To: Marek Vasut, dri-devel
  Cc: Andrzej Hajda, Sam Ravnborg, Laurent Pinchart, robert.foss,
	Maxime Ripard

On 24/06/2022 20:19, Marek Vasut wrote:
> The DSI lane count can be accessed via the dsi device pointer,
> make use of that. No functional change.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Andrzej Hajda <andrzej.hajda@intel.com>
> Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> Cc: Lucas Stach <l.stach@pengutronix.de>
> Cc: Maxime Ripard <maxime@cerno.tech>
> Cc: Robert Foss <robert.foss@linaro.org>
> Cc: Sam Ravnborg <sam@ravnborg.org>
> ---
>   drivers/gpu/drm/bridge/tc358767.c | 6 ++----
>   1 file changed, 2 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
> index e4dd4f05f94b3..44f32bf483c51 100644
> --- a/drivers/gpu/drm/bridge/tc358767.c
> +++ b/drivers/gpu/drm/bridge/tc358767.c
> @@ -288,7 +288,6 @@ struct tc_data {
>   	struct drm_connector	connector;
>   
>   	struct mipi_dsi_device	*dsi;
> -	u8			dsi_lanes;
>   
>   	/* link settings */
>   	struct tc_edp_link	link;
> @@ -1261,7 +1260,7 @@ static int tc_dsi_rx_enable(struct tc_data *tc)
>   	regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
>   	regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD);
>   
> -	value = ((LANEENABLE_L0EN << tc->dsi_lanes) - LANEENABLE_L0EN) |
> +	value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) |
>   		LANEENABLE_CLEN;
>   	regmap_write(tc->regmap, PPI_LANEENABLE, value);
>   	regmap_write(tc->regmap, DSI_LANEENABLE, value);
> @@ -1909,8 +1908,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
>   
>   	tc->dsi = dsi;
>   
> -	tc->dsi_lanes = dsi_lanes;
> -	dsi->lanes = tc->dsi_lanes;
> +	dsi->lanes = dsi_lanes;
>   	dsi->format = MIPI_DSI_FMT_RGB888;
>   	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
>   


Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>

^ permalink raw reply	[flat|nested] 3+ messages in thread
* [PATCH] drm/bridge: tc358767: Do not cache dsi_lanes twice
@ 2022-05-19 11:24 Marek Vasut
  0 siblings, 0 replies; 3+ messages in thread
From: Marek Vasut @ 2022-05-19 11:24 UTC (permalink / raw)
  To: dri-devel
  Cc: Marek Vasut, Laurent Pinchart, robert.foss, Maxime Ripard,
	Andrzej Hajda, Sam Ravnborg

The DSI lane count can be accessed via the dsi device pointer,
make use of that. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Andrzej Hajda <andrzej.hajda@intel.com>
Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
---
 drivers/gpu/drm/bridge/tc358767.c | 6 ++----
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/bridge/tc358767.c b/drivers/gpu/drm/bridge/tc358767.c
index 5e0de9974143c..8e210b1176906 100644
--- a/drivers/gpu/drm/bridge/tc358767.c
+++ b/drivers/gpu/drm/bridge/tc358767.c
@@ -288,7 +288,6 @@ struct tc_data {
 	struct drm_connector	connector;
 
 	struct mipi_dsi_device	*dsi;
-	u8			dsi_lanes;
 
 	/* link settings */
 	struct tc_edp_link	link;
@@ -1264,7 +1263,7 @@ static int tc_dsi_rx_enable(struct tc_data *tc)
 	regmap_write(tc->regmap, PPI_TX_RX_TA, TTA_GET | TTA_SURE);
 	regmap_write(tc->regmap, PPI_LPTXTIMECNT, LPX_PERIOD);
 
-	value = ((LANEENABLE_L0EN << tc->dsi_lanes) - LANEENABLE_L0EN) |
+	value = ((LANEENABLE_L0EN << tc->dsi->lanes) - LANEENABLE_L0EN) |
 		LANEENABLE_CLEN;
 	regmap_write(tc->regmap, PPI_LANEENABLE, value);
 	regmap_write(tc->regmap, DSI_LANEENABLE, value);
@@ -1912,8 +1911,7 @@ static int tc_mipi_dsi_host_attach(struct tc_data *tc)
 
 	tc->dsi = dsi;
 
-	tc->dsi_lanes = dsi_lanes;
-	dsi->lanes = tc->dsi_lanes;
+	dsi->lanes = dsi_lanes;
 	dsi->format = MIPI_DSI_FMT_RGB888;
 	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
 
-- 
2.35.1


^ permalink raw reply related	[flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-06-27 12:20 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-06-24 18:19 [PATCH] drm/bridge: tc358767: Do not cache dsi_lanes twice Marek Vasut
2022-06-27 12:20 ` Neil Armstrong
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2022-05-19 11:24 Marek Vasut

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