* [xilinx-xlnx:xlnx_rebase_v5.15_LTS 605/1197] drivers/media/platform/xilinx/xilinx-vpss-scaler.c:1236: warning: expecting prototype for xv_hscaler_coeff_select(). Prototype was for xv_hscaler_select_coeff() instead
@ 2022-06-26 10:30 kernel test robot
0 siblings, 0 replies; only message in thread
From: kernel test robot @ 2022-06-26 10:30 UTC (permalink / raw)
To: Rohit Athavale
Cc: kbuild-all, linux-arm-kernel, Michal Simek, Radhey Shyam Pandey,
Hyun Kwon
Hi Rohit,
FYI, the error/warning still remains.
tree: https://github.com/Xilinx/linux-xlnx xlnx_rebase_v5.15_LTS
head: 1e67f149fb5eb4f5eb4e0d4f69194eac6d2497d7
commit: d8be7a7886999efaf54a37071ffde6c37f1e1de2 [605/1197] v4l: xilinx-vpss-scaler: driver support for xilinx vpss scaler
config: mips-allmodconfig
compiler: mips-linux-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/Xilinx/linux-xlnx/commit/d8be7a7886999efaf54a37071ffde6c37f1e1de2
git remote add xilinx-xlnx https://github.com/Xilinx/linux-xlnx
git fetch --no-tags xilinx-xlnx xlnx_rebase_v5.15_LTS
git checkout d8be7a7886999efaf54a37071ffde6c37f1e1de2
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=mips SHELL=/bin/bash drivers/gpu/drm/xlnx/ drivers/media/platform/xilinx/ drivers/phy/xilinx/ drivers/staging/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/media/platform/xilinx/xilinx-vpss-scaler.c:1236: warning: expecting prototype for xv_hscaler_coeff_select(). Prototype was for xv_hscaler_select_coeff() instead
>> drivers/media/platform/xilinx/xilinx-vpss-scaler.c:1354: warning: expecting prototype for xv_vscaler_coeff_select(). Prototype was for xv_vscaler_select_coeff() instead
vim +1236 drivers/media/platform/xilinx/xilinx-vpss-scaler.c
1209
1210 /**
1211 * xv_hscaler_coeff_select - Selection of H-Scaler coefficients of operation
1212 * @xscaler: VPSS Scaler device information
1213 * @width_in: Width of input video
1214 * @width_out: Width of desired output video
1215 *
1216 * There are instances when a N-tap filter might operate in an M-tap
1217 * configuration where N > M.
1218 *
1219 * For example :
1220 * Depending on the ratio of scaling (while downscaling), a 12-tap
1221 * filter may operate with 10 tap coefficients and zero-pads the remaining
1222 * coefficients.
1223 *
1224 * While upscaling the driver will program 6-tap filter coefficients
1225 * in any N-tap configurations (for N >= 6).
1226 *
1227 * This selection is adopted by the as it gives optimal
1228 * video output determined by repeated testing of the IP
1229 *
1230 * Return: Will return 0 if successful. Returns -EINVAL on an unsupported
1231 * H-scaler number of taps.
1232 */
1233 static int
1234 xv_hscaler_select_coeff(struct xscaler_device *xscaler,
1235 u32 width_in, u32 width_out)
> 1236 {
1237 const short *coeff;
1238 u32 ntaps = xscaler->num_hori_taps;
1239
1240 coeff = xv_select_coeff(xscaler, width_in, width_out, &ntaps);
1241 if (!coeff)
1242 return -EINVAL;
1243
1244 xv_hscaler_load_ext_coeff(xscaler, coeff, ntaps);
1245 return 0;
1246 }
1247
1248 static void xv_hscaler_set_coeff(struct xscaler_device *xscaler)
1249 {
1250 int val, i, j, offset, rd_indx;
1251 u32 ntaps = xscaler->num_hori_taps;
1252 u32 nphases = xscaler->max_num_phases;
1253 u32 base_addr;
1254
1255 offset = (XV_HSCALER_MAX_H_TAPS - ntaps) / 2;
1256 base_addr = V_HSCALER_OFF + XV_HSCALER_CTRL_ADDR_HWREG_HFLTCOEFF_BASE;
1257 for (i = 0; i < nphases; i++) {
1258 for (j = 0; j < ntaps / 2; j++) {
1259 rd_indx = j * 2 + offset;
1260 val = (xscaler->hscaler_coeff[i][rd_indx + 1] <<
1261 XSCALER_BITSHIFT_16) |
1262 (xscaler->hscaler_coeff[i][rd_indx] &
1263 XHSC_MASK_LOW_16BITS);
1264 xvip_write(&xscaler->xvip, base_addr +
1265 ((i * ntaps / 2 + j) * 4), val);
1266 }
1267 }
1268 }
1269
1270 static void
1271 xv_vscaler_load_ext_coeff(struct xscaler_device *xscaler,
1272 const short *coeff, u32 ntaps)
1273 {
1274 int i, j, pad, offset;
1275 u32 nphases = xscaler->max_num_phases;
1276
1277 /* Determine if coefficient needs padding (effective vs. max taps) */
1278 pad = XV_VSCALER_MAX_V_TAPS - ntaps;
1279 offset = pad ? (pad >> 1) : 0;
1280
1281 dev_dbg(xscaler->xvip.dev,
1282 "%s : Pad = %d Offset = %d Nphases = %d ntaps = %d",
1283 __func__, pad, offset, nphases, ntaps);
1284
1285 /* Load User defined coefficients into scaler coefficient table */
1286 for (i = 0; i < nphases; i++) {
1287 for (j = 0; j < ntaps; ++j)
1288 xscaler->vscaler_coeff[i][j + offset] =
1289 coeff[i * ntaps + j];
1290 }
1291
1292 if (pad) { /* effective taps < max_taps */
1293 for (i = 0; i < nphases; i++) {
1294 /* pad left */
1295 for (j = 0; j < offset; j++)
1296 xscaler->vscaler_coeff[i][j] = 0;
1297 /* pad right */
1298 j = ntaps + offset;
1299 for (; j < XV_VSCALER_MAX_V_TAPS; j++)
1300 xscaler->vscaler_coeff[i][j] = 0;
1301 }
1302 }
1303 }
1304
1305 static void xv_vscaler_set_coeff(struct xscaler_device *xscaler)
1306 {
1307 u32 nphases = xscaler->max_num_phases;
1308 u32 ntaps = xscaler->num_vert_taps;
1309 int val, i, j, offset, rd_indx;
1310 u32 base_addr;
1311
1312 offset = (XV_VSCALER_MAX_V_TAPS - ntaps) / 2;
1313 base_addr = V_VSCALER_OFF + XV_VSCALER_CTRL_ADDR_HWREG_VFLTCOEFF_BASE;
1314
1315 for (i = 0; i < nphases; i++) {
1316 for (j = 0; j < ntaps / 2; j++) {
1317 rd_indx = j * 2 + offset;
1318 val = (xscaler->vscaler_coeff[i][rd_indx + 1] <<
1319 XSCALER_BITSHIFT_16) |
1320 (xscaler->vscaler_coeff[i][rd_indx] &
1321 XVSC_MASK_LOW_16BITS);
1322 xvip_write(&xscaler->xvip,
1323 base_addr + ((i * ntaps / 2 + j) * 4), val);
1324 }
1325 }
1326 }
1327
1328 /**
1329 * xv_vscaler_coeff_select - Selection of V-Scaler coefficients of operation
1330 * @xscaler: VPSS Scaler device information
1331 * @height_in: Height of input video
1332 * @height_out: Height of desired output video
1333 *
1334 * There are instances when a N-tap filter might operate in an M-tap
1335 * configuration where N > M.
1336 *
1337 * For example :
1338 * Depending on the ratio of scaling (while downscaling), a 10-tap
1339 * filter may operate with 6 tap coefficients and zero-pads the remaining
1340 * coefficients.
1341 *
1342 * While upscaling the driver will program 6-tap filter coefficients
1343 * in any N-tap configurations (for N >= 6).
1344 *
1345 * This selection is adopted by the as it gives optimal
1346 * video output determined by repeated testing of the IP
1347 *
1348 * Return: Will return 0 if successful. Returns -EINVAL on an unsupported
1349 * V-scaler number of taps.
1350 */
1351 static int
1352 xv_vscaler_select_coeff(struct xscaler_device *xscaler,
1353 u32 height_in, u32 height_out)
> 1354 {
1355 const short *coeff;
1356 u32 ntaps = xscaler->num_vert_taps;
1357
1358 coeff = xv_select_coeff(xscaler, height_in, height_out, &ntaps);
1359 if (!coeff)
1360 return -EINVAL;
1361
1362 xv_vscaler_load_ext_coeff(xscaler, coeff, ntaps);
1363 return 0;
1364 }
1365
--
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2022-06-26 10:30 [xilinx-xlnx:xlnx_rebase_v5.15_LTS 605/1197] drivers/media/platform/xilinx/xilinx-vpss-scaler.c:1236: warning: expecting prototype for xv_hscaler_coeff_select(). Prototype was for xv_hscaler_select_coeff() instead kernel test robot
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