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* [PATCH V7 0/4] arm64: binman: use binman symbols for imx
@ 2022-06-27  3:41 Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 1/4] arm: dts: imx8m: update binman ddr firmware node name Peng Fan (OSS)
                   ` (4 more replies)
  0 siblings, 5 replies; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-06-27  3:41 UTC (permalink / raw)
  To: sbabic, festevam; +Cc: u-boot, Peng Fan

From: Peng Fan <peng.fan@nxp.com>

V7:
 Rebased with follwoing patchset applied.
 [1] i.MX93 patchset: https://patchwork.ozlabs.org/project/uboot/cover/20220627032455.28280-1-peng.fan@oss.nxp.com/
 [2] binman symbols fix: https://patchwork.ozlabs.org/project/uboot/cover/20220618121316.12061-1-alpernebiyasak@gmail.com/ 

V6:
 Drop no-u-boot-any introduced in V5
 Drop binman symbol replacement with @ to _, which is not needed
 Update imx8m config to not select RAM IMAGE and RAM DEVICE
 Update ddr firmware node name
 Introduce autoconf.h for binman test

V5:
 Introduce no-u-boot-any property to drop the X86 guard patch 1
 Add blob-ext type for ddr firmware node
 Include a missing dts change

V4:
 Fix three boards build failure

V3:
 Add R-b/T-b
 Fix build warning

V2:
 resolve some CI failure
 include patch 7

binman symbol is a good feature, but only used on X86 for now. This patchset
is to use it for i.MX8M platform.

The current imx8m ddr phy firmware consumes lots of space, because we pad
them to the largest 32KB and 16KB for IMEM and DMEM.

With this patchset we use binman symbols to get firmware location and size,
we could save near 36KB with i.MX8MP-EVK.

Please help check and test



Peng Fan (4):
  arm: dts: imx8m: update binman ddr firmware node name
  ddr: imx8m: helper: load ddr firmware according to binman symbols
  arm: dts: imx8m: shrink ddr firmware size to actual file size
  imx: imx8mm-icore: migrate to use BINMAN

 arch/arm/dts/imx8mm-u-boot.dtsi               | 16 +++----
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi    | 20 ++++----
 .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi  |  8 ++--
 arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi      | 20 ++++----
 arch/arm/dts/imx8mn-evk-u-boot.dtsi           | 20 ++++----
 .../dts/imx8mn-var-som-symphony-u-boot.dtsi   | 16 +++----
 arch/arm/dts/imx8mn-venice-u-boot.dtsi        | 16 +++----
 arch/arm/dts/imx8mp-u-boot.dtsi               | 20 ++++----
 arch/arm/dts/imx8mq-cm-u-boot.dtsi            | 20 ++++----
 arch/arm/dts/imx8mq-u-boot.dtsi               | 16 +++----
 arch/arm/mach-imx/imx8m/Kconfig               |  1 +
 .../mach-imx/imx8m/imximage-8mm-lpddr4.cfg    | 10 +---
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig  |  2 +-
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig |  2 +-
 drivers/ddr/imx/phy/helper.c                  | 47 ++++++++++++++++---
 15 files changed, 141 insertions(+), 93 deletions(-)

-- 
2.36.0


^ permalink raw reply	[flat|nested] 9+ messages in thread

* [PATCH V7 1/4] arm: dts: imx8m: update binman ddr firmware node name
  2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
@ 2022-06-27  3:41 ` Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols Peng Fan (OSS)
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-06-27  3:41 UTC (permalink / raw)
  To: sbabic, festevam, NXP i.MX U-Boot Team, Ariel D'Alessandro,
	Michael Trimarchi, Tim Harvey
  Cc: u-boot, Peng Fan, Alper Nebi Yasak

From: Peng Fan <peng.fan@nxp.com>

We are migrating to use binman symbols, the current names are
inconsistent across different boards, so unify them.

Also add `type = "blob-ext";`, since the new names are not valid binman
types.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Edit commit message]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 arch/arm/dts/imx8mm-u-boot.dtsi                   |  8 ++++----
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi        | 12 ++++++++----
 arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi |  4 ++--
 arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi          | 12 ++++++++----
 arch/arm/dts/imx8mn-evk-u-boot.dtsi               | 12 ++++++++----
 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi  |  8 ++++----
 arch/arm/dts/imx8mn-venice-u-boot.dtsi            |  8 ++++----
 arch/arm/dts/imx8mp-u-boot.dtsi                   | 12 ++++++++----
 arch/arm/dts/imx8mq-cm-u-boot.dtsi                | 12 ++++++++----
 arch/arm/dts/imx8mq-u-boot.dtsi                   |  8 ++++----
 10 files changed, 58 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 9f66cdb65a9..86f8e1a284b 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -39,25 +39,25 @@
 			filename = "u-boot-spl.bin";
 		};
 
-		1d-imem {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		1d-dmem {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
 		};
 
-		2d-imem {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		2d-dmem {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index eb1dd8debba..d28bb2b2ffe 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -147,24 +147,28 @@
 			align-end = <4>;
 		};
 
-		blob_1: blob-ext@1 {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_2: blob-ext@2 {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 
-		blob_3: blob-ext@3 {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_4: blob-ext@4 {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index 46a9d7fd78b..dc4cec250ef 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -111,13 +111,13 @@
 			filename = "u-boot-spl.bin";
 		};
 
-		1d-imem {
+		ddr-1d-imem-fw {
 			filename = "ddr3_imem_1d.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		1d_dmem {
+		ddr-1d-dmem-fw {
 			filename = "ddr3_dmem_1d.bin";
 			size = <0x4000>;
 			type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 4d0ecb07d4f..30ef8bc47d9 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -155,24 +155,28 @@
 			align-end = <4>;
 		};
 
-		blob_1: blob-ext@1 {
+		ddr-1d-imem-fw {
 			filename = "ddr4_imem_1d_201810.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_2: blob-ext@2 {
+		ddr-1d-dmem-fw {
 			filename = "ddr4_dmem_1d_201810.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 
-		blob_3: blob-ext@3 {
+		ddr-2d-imem-fw {
 			filename = "ddr4_imem_2d_201810.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_4: blob-ext@4 {
+		ddr-2d-dmem-fw {
 			filename = "ddr4_dmem_2d_201810.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 593cf06eb95..31c05e45cfb 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -36,24 +36,28 @@
 			align-end = <4>;
 		};
 
-		blob_1: blob-ext@1 {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_2: blob-ext@2 {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 
-		blob_3: blob-ext@3 {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_4: blob-ext@4 {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index 6e37622cca7..b8df6f749b0 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -130,25 +130,25 @@
 			filename = "u-boot-spl.bin";
 		};
 
-		1d-imem {
+		ddr-1d-imem-fw {
 			filename = "ddr4_imem_1d.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		1d_dmem {
+		ddr-1d-dmem-fw {
 			filename = "ddr4_dmem_1d.bin";
 			size = <0x4000>;
 			type = "blob-ext";
 		};
 
-		2d_imem {
+		ddr-2d-imem-fw {
 			filename = "ddr4_imem_2d.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		2d_dmem {
+		ddr-2d-dmem-fw {
 			filename = "ddr4_dmem_2d.bin";
 			size = <0x4000>;
 			type = "blob-ext";
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index 35819553879..bcf2abd0676 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -126,25 +126,25 @@
 			filename = "u-boot-spl.bin";
 		};
 
-		1d-imem {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		1d_dmem {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
 		};
 
-		2d_imem {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		2d_dmem {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index 20edd90cfad..dc57ee20411 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -61,24 +61,28 @@
 			align-end = <4>;
 		};
 
-		blob_1: blob-ext@1 {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem_202006.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_2: blob-ext@2 {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 
-		blob_3: blob-ext@3 {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem_202006.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_4: blob-ext@4 {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
index e2f4b0e740d..bc7e9756c23 100644
--- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
@@ -28,24 +28,28 @@
 			align-end = <4>;
 		};
 
-		blob_1: blob-ext@1 {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_2: blob-ext@2 {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 
-		blob_3: blob-ext@3 {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
+			type = "blob-ext";
 		};
 
-		blob_4: blob-ext@4 {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
+			type = "blob-ext";
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 912a3d4a356..462c470091a 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -46,25 +46,25 @@
 			filename = "u-boot-spl.bin";
 		};
 
-		1d-imem {
+		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		1d-dmem {
+		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
 		};
 
-		2d-imem {
+		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
 			size = <0x8000>;
 			type = "blob-ext";
 		};
 
-		2d-dmem {
+		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
 			size = <0x4000>;
 			type = "blob-ext";
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols
  2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 1/4] arm: dts: imx8m: update binman ddr firmware node name Peng Fan (OSS)
@ 2022-06-27  3:41 ` Peng Fan (OSS)
  2022-06-28 14:08   ` Alper Nebi Yasak
  2022-06-27  3:41 ` [PATCH V7 3/4] arm: dts: imx8m: shrink ddr firmware size to actual file size Peng Fan (OSS)
                   ` (2 subsequent siblings)
  4 siblings, 1 reply; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-06-27  3:41 UTC (permalink / raw)
  To: sbabic, festevam; +Cc: u-boot, Peng Fan, Tim Harvey, Alper Nebi Yasak

From: Peng Fan <peng.fan@nxp.com>

By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.

And that could save binary size for many KBs.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
[Alper: Check BINMAN_SYMS_OK instead]
Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 drivers/ddr/imx/phy/helper.c | 47 +++++++++++++++++++++++++++++++-----
 1 file changed, 41 insertions(+), 6 deletions(-)

diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
index 60d650e3089..e9e0294f87d 100644
--- a/drivers/ddr/imx/phy/helper.c
+++ b/drivers/ddr/imx/phy/helper.c
@@ -4,6 +4,7 @@
  */
 
 #include <common.h>
+#include <binman_sym.h>
 #include <log.h>
 #include <spl.h>
 #include <asm/global_data.h>
@@ -24,15 +25,30 @@ DECLARE_GLOBAL_DATA_PTR;
 #define DMEM_OFFSET_ADDR 0x00054000
 #define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
 
+binman_sym_declare(ulong, ddr_1d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_imem_fw, size);
+
+binman_sym_declare(ulong, ddr_1d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_1d_dmem_fw, size);
+
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+binman_sym_declare(ulong, ddr_2d_imem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_imem_fw, size);
+
+binman_sym_declare(ulong, ddr_2d_dmem_fw, image_pos);
+binman_sym_declare(ulong, ddr_2d_dmem_fw, size);
+#endif
+
 /* We need PHY iMEM PHY is 32KB padded */
 void ddr_load_train_firmware(enum fw_type type)
 {
 	u32 tmp32, i;
 	u32 error = 0;
 	unsigned long pr_to32, pr_from32;
-	unsigned long fw_offset = type ? IMEM_2D_OFFSET : 0;
+	uint32_t fw_offset = type ? IMEM_2D_OFFSET : 0;
 	unsigned long imem_start = (unsigned long)&_end + fw_offset;
 	unsigned long dmem_start;
+	unsigned long imem_len = IMEM_LEN, dmem_len = DMEM_LEN;
 
 #ifdef CONFIG_SPL_OF_CONTROL
 	if (gd->fdt_blob && !fdt_check_header(gd->fdt_blob)) {
@@ -42,11 +58,30 @@ void ddr_load_train_firmware(enum fw_type type)
 	}
 #endif
 
-	dmem_start = imem_start + IMEM_LEN;
+	dmem_start = imem_start + imem_len;
+
+	if (BINMAN_SYMS_OK) {
+		switch (type) {
+		case FW_1D_IMAGE:
+			imem_start = binman_sym(ulong, ddr_1d_imem_fw, image_pos);
+			imem_len = binman_sym(ulong, ddr_1d_imem_fw, size);
+			dmem_start = binman_sym(ulong, ddr_1d_dmem_fw, image_pos);
+			dmem_len = binman_sym(ulong, ddr_1d_dmem_fw, size);
+			break;
+		case FW_2D_IMAGE:
+#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
+			imem_start = binman_sym(ulong, ddr_2d_imem_fw, image_pos);
+			imem_len = binman_sym(ulong, ddr_2d_imem_fw, size);
+			dmem_start = binman_sym(ulong, ddr_2d_dmem_fw, image_pos);
+			dmem_len = binman_sym(ulong, ddr_2d_dmem_fw, size);
+#endif
+			break;
+		}
+	}
 
 	pr_from32 = imem_start;
 	pr_to32 = IMEM_OFFSET_ADDR;
-	for (i = 0x0; i < IMEM_LEN; ) {
+	for (i = 0x0; i < imem_len; ) {
 		tmp32 = readl(pr_from32);
 		writew(tmp32 & 0x0000ffff, DDR_TRAIN_CODE_BASE_ADDR + ddrphy_addr_remap(pr_to32));
 		pr_to32 += 1;
@@ -59,7 +94,7 @@ void ddr_load_train_firmware(enum fw_type type)
 
 	pr_from32 = dmem_start;
 	pr_to32 = DMEM_OFFSET_ADDR;
-	for (i = 0x0; i < DMEM_LEN; ) {
+	for (i = 0x0; i < dmem_len; ) {
 		tmp32 = readl(pr_from32);
 		writew(tmp32 & 0x0000ffff, DDR_TRAIN_CODE_BASE_ADDR + ddrphy_addr_remap(pr_to32));
 		pr_to32 += 1;
@@ -73,7 +108,7 @@ void ddr_load_train_firmware(enum fw_type type)
 	debug("check ddr_pmu_train_imem code\n");
 	pr_from32 = imem_start;
 	pr_to32 = IMEM_OFFSET_ADDR;
-	for (i = 0x0; i < IMEM_LEN; ) {
+	for (i = 0x0; i < imem_len; ) {
 		tmp32 = (readw(DDR_TRAIN_CODE_BASE_ADDR + ddrphy_addr_remap(pr_to32)) & 0x0000ffff);
 		pr_to32 += 1;
 		tmp32 += ((readw(DDR_TRAIN_CODE_BASE_ADDR +
@@ -95,7 +130,7 @@ void ddr_load_train_firmware(enum fw_type type)
 	debug("check ddr4_pmu_train_dmem code\n");
 	pr_from32 = dmem_start;
 	pr_to32 = DMEM_OFFSET_ADDR;
-	for (i = 0x0; i < DMEM_LEN;) {
+	for (i = 0x0; i < dmem_len;) {
 		tmp32 = (readw(DDR_TRAIN_CODE_BASE_ADDR + ddrphy_addr_remap(pr_to32)) & 0x0000ffff);
 		pr_to32 += 1;
 		tmp32 += ((readw(DDR_TRAIN_CODE_BASE_ADDR +
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [PATCH V7 3/4] arm: dts: imx8m: shrink ddr firmware size to actual file size
  2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 1/4] arm: dts: imx8m: update binman ddr firmware node name Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols Peng Fan (OSS)
@ 2022-06-27  3:41 ` Peng Fan (OSS)
  2022-06-27  3:41 ` [PATCH V7 4/4] imx: imx8mm-icore: migrate to use BINMAN Peng Fan (OSS)
  2022-06-27  9:01 ` [PATCH V7 0/4] arm64: binman: use binman symbols for imx Frieder Schrempf
  4 siblings, 0 replies; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-06-27  3:41 UTC (permalink / raw)
  To: sbabic, festevam, NXP i.MX U-Boot Team, Ariel D'Alessandro,
	Michael Trimarchi, Tim Harvey
  Cc: u-boot, Peng Fan, Alper Nebi Yasak

From: Peng Fan <peng.fan@nxp.com>

After we switch to use BINMAN_SYMBOLS, there is no need to pad
the file size to 0x8000 and 0x4000. After we use BINMAN_SYMBOLS,
the u-boot-spl-ddr.bin shrink about 36KB with i.MX8MP-EVK.

Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 arch/arm/dts/imx8mm-u-boot.dtsi                   | 8 ++++----
 arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi        | 8 ++++----
 arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi | 4 ++--
 arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi          | 8 ++++----
 arch/arm/dts/imx8mn-evk-u-boot.dtsi               | 8 ++++----
 arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi  | 8 ++++----
 arch/arm/dts/imx8mn-venice-u-boot.dtsi            | 8 ++++----
 arch/arm/dts/imx8mp-u-boot.dtsi                   | 8 ++++----
 arch/arm/dts/imx8mq-cm-u-boot.dtsi                | 8 ++++----
 arch/arm/dts/imx8mq-u-boot.dtsi                   | 8 ++++----
 10 files changed, 38 insertions(+), 38 deletions(-)

diff --git a/arch/arm/dts/imx8mm-u-boot.dtsi b/arch/arm/dts/imx8mm-u-boot.dtsi
index 86f8e1a284b..8c48678625d 100644
--- a/arch/arm/dts/imx8mm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mm-u-boot.dtsi
@@ -41,25 +41,25 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 	};
diff --git a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
index d28bb2b2ffe..5f839524028 100644
--- a/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi
@@ -149,26 +149,26 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
index dc4cec250ef..c4ae7ca4f31 100644
--- a/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
+++ b/arch/arm/dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi
@@ -113,13 +113,13 @@
 
 		ddr-1d-imem-fw {
 			filename = "ddr3_imem_1d.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "ddr3_dmem_1d.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 	};
diff --git a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
index 30ef8bc47d9..78773c198e4 100644
--- a/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi
@@ -157,26 +157,26 @@
 
 		ddr-1d-imem-fw {
 			filename = "ddr4_imem_1d_201810.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "ddr4_dmem_1d_201810.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-imem-fw {
 			filename = "ddr4_imem_2d_201810.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "ddr4_dmem_2d_201810.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-evk-u-boot.dtsi b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
index 31c05e45cfb..e15a41f1190 100644
--- a/arch/arm/dts/imx8mn-evk-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-evk-u-boot.dtsi
@@ -38,26 +38,26 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
index b8df6f749b0..ed1ab10ded3 100644
--- a/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-var-som-symphony-u-boot.dtsi
@@ -132,25 +132,25 @@
 
 		ddr-1d-imem-fw {
 			filename = "ddr4_imem_1d.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "ddr4_dmem_1d.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-imem-fw {
 			filename = "ddr4_imem_2d.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "ddr4_dmem_2d.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 	};
diff --git a/arch/arm/dts/imx8mn-venice-u-boot.dtsi b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
index bcf2abd0676..9fb38714523 100644
--- a/arch/arm/dts/imx8mn-venice-u-boot.dtsi
+++ b/arch/arm/dts/imx8mn-venice-u-boot.dtsi
@@ -128,25 +128,25 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 	};
diff --git a/arch/arm/dts/imx8mp-u-boot.dtsi b/arch/arm/dts/imx8mp-u-boot.dtsi
index dc57ee20411..adb24cccc3b 100644
--- a/arch/arm/dts/imx8mp-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-u-boot.dtsi
@@ -63,26 +63,26 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem_202006.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem_202006.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem_202006.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem_202006.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mq-cm-u-boot.dtsi b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
index bc7e9756c23..cb4e36c387d 100644
--- a/arch/arm/dts/imx8mq-cm-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-cm-u-boot.dtsi
@@ -30,26 +30,26 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
 			type = "blob-ext";
+			align-end = <4>;
 		};
 	};
 
diff --git a/arch/arm/dts/imx8mq-u-boot.dtsi b/arch/arm/dts/imx8mq-u-boot.dtsi
index 462c470091a..e8b5f83706e 100644
--- a/arch/arm/dts/imx8mq-u-boot.dtsi
+++ b/arch/arm/dts/imx8mq-u-boot.dtsi
@@ -48,25 +48,25 @@
 
 		ddr-1d-imem-fw {
 			filename = "lpddr4_pmu_train_1d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-1d-dmem-fw {
 			filename = "lpddr4_pmu_train_1d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-imem-fw {
 			filename = "lpddr4_pmu_train_2d_imem.bin";
-			size = <0x8000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 
 		ddr-2d-dmem-fw {
 			filename = "lpddr4_pmu_train_2d_dmem.bin";
-			size = <0x4000>;
+			align-end = <4>;
 			type = "blob-ext";
 		};
 	};
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* [PATCH V7 4/4] imx: imx8mm-icore: migrate to use BINMAN
  2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
                   ` (2 preceding siblings ...)
  2022-06-27  3:41 ` [PATCH V7 3/4] arm: dts: imx8m: shrink ddr firmware size to actual file size Peng Fan (OSS)
@ 2022-06-27  3:41 ` Peng Fan (OSS)
  2022-06-27  9:01 ` [PATCH V7 0/4] arm64: binman: use binman symbols for imx Frieder Schrempf
  4 siblings, 0 replies; 9+ messages in thread
From: Peng Fan (OSS) @ 2022-06-27  3:41 UTC (permalink / raw)
  To: sbabic, festevam, NXP i.MX U-Boot Team, Jagan Teki, Matteo Lisi
  Cc: u-boot, Peng Fan, Alper Nebi Yasak

From: Peng Fan <peng.fan@nxp.com>

Use BINMAN instead of imx specific packing method.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
---
 arch/arm/mach-imx/imx8m/Kconfig                 |  1 +
 arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 10 +---------
 configs/imx8mm-icore-mx8mm-ctouch2_defconfig    |  2 +-
 configs/imx8mm-icore-mx8mm-edimm2.2_defconfig   |  2 +-
 4 files changed, 4 insertions(+), 11 deletions(-)

diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index ef8518c06bd..e01e9e8a96e 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/mach-imx/imx8m/Kconfig
@@ -69,6 +69,7 @@ config TARGET_IMX8MM_EVK
 
 config TARGET_IMX8MM_ICORE_MX8MM
 	bool "Engicam i.Core MX8M Mini SOM"
+	select BINMAN
 	select IMX8MM
 	select SUPPORT_SPL
 	select IMX8M_LPDDR4
diff --git a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
index e06d53ef417..5dcb8ae72f0 100644
--- a/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
+++ b/arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg
@@ -3,13 +3,5 @@
  * Copyright 2019 NXP
  */
 
-
-FIT
 BOOT_FROM	sd
-LOADER		spl/u-boot-spl-ddr.bin	0x7E1000
-SECOND_LOADER	u-boot.itb		0x40200000 0x60000
-
-DDR_FW lpddr4_pmu_train_1d_imem.bin
-DDR_FW lpddr4_pmu_train_1d_dmem.bin
-DDR_FW lpddr4_pmu_train_2d_imem.bin
-DDR_FW lpddr4_pmu_train_2d_dmem.bin
+LOADER		u-boot-spl-ddr.bin	0x7E1000
diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
index 7d08b244f2c..30f842aef3b 100644
--- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig
@@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb"
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
index acc5d34659b..721c72c719c 100644
--- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
+++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig
@@ -20,7 +20,7 @@ CONFIG_DISTRO_DEFAULTS=y
 CONFIG_FIT=y
 CONFIG_FIT_EXTERNAL_OFFSET=0x3000
 CONFIG_SPL_LOAD_FIT=y
-CONFIG_SPL_FIT_GENERATOR="arch/arm/mach-imx/mkimage_fit_atf.sh"
+# CONFIG_USE_SPL_FIT_GENERATOR is not set
 CONFIG_OF_SYSTEM_SETUP=y
 CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb"
 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y
-- 
2.36.0


^ permalink raw reply related	[flat|nested] 9+ messages in thread

* Re: [PATCH V7 0/4] arm64: binman: use binman symbols for imx
  2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
                   ` (3 preceding siblings ...)
  2022-06-27  3:41 ` [PATCH V7 4/4] imx: imx8mm-icore: migrate to use BINMAN Peng Fan (OSS)
@ 2022-06-27  9:01 ` Frieder Schrempf
  2022-06-27  9:02   ` Peng Fan
  4 siblings, 1 reply; 9+ messages in thread
From: Frieder Schrempf @ 2022-06-27  9:01 UTC (permalink / raw)
  To: Peng Fan (OSS), sbabic, festevam; +Cc: u-boot, Peng Fan

Hi Peng,

Am 27.06.22 um 05:41 schrieb Peng Fan (OSS):
> From: Peng Fan <peng.fan@nxp.com>
> 
> V7:
>  Rebased with follwoing patchset applied.
>  [1] i.MX93 patchset: https://patchwork.ozlabs.org/project/uboot/cover/20220627032455.28280-1-peng.fan@oss.nxp.com/
>  [2] binman symbols fix: https://patchwork.ozlabs.org/project/uboot/cover/20220618121316.12061-1-alpernebiyasak@gmail.com/ 

I tested this on next with the two patchsets mentioned above applied on
a kontron-sl-mx8mm board. I get around 38 KiB of SPL size reduction,
which is great!

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Thanks!
Frieder

> 
> V6:
>  Drop no-u-boot-any introduced in V5
>  Drop binman symbol replacement with @ to _, which is not needed
>  Update imx8m config to not select RAM IMAGE and RAM DEVICE
>  Update ddr firmware node name
>  Introduce autoconf.h for binman test
> 
> V5:
>  Introduce no-u-boot-any property to drop the X86 guard patch 1
>  Add blob-ext type for ddr firmware node
>  Include a missing dts change
> 
> V4:
>  Fix three boards build failure
> 
> V3:
>  Add R-b/T-b
>  Fix build warning
> 
> V2:
>  resolve some CI failure
>  include patch 7
> 
> binman symbol is a good feature, but only used on X86 for now. This patchset
> is to use it for i.MX8M platform.
> 
> The current imx8m ddr phy firmware consumes lots of space, because we pad
> them to the largest 32KB and 16KB for IMEM and DMEM.
> 
> With this patchset we use binman symbols to get firmware location and size,
> we could save near 36KB with i.MX8MP-EVK.
> 
> Please help check and test
> 
> 
> 
> Peng Fan (4):
>   arm: dts: imx8m: update binman ddr firmware node name
>   ddr: imx8m: helper: load ddr firmware according to binman symbols
>   arm: dts: imx8m: shrink ddr firmware size to actual file size
>   imx: imx8mm-icore: migrate to use BINMAN
> 
>  arch/arm/dts/imx8mm-u-boot.dtsi               | 16 +++----
>  arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi    | 20 ++++----
>  .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi  |  8 ++--
>  arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi      | 20 ++++----
>  arch/arm/dts/imx8mn-evk-u-boot.dtsi           | 20 ++++----
>  .../dts/imx8mn-var-som-symphony-u-boot.dtsi   | 16 +++----
>  arch/arm/dts/imx8mn-venice-u-boot.dtsi        | 16 +++----
>  arch/arm/dts/imx8mp-u-boot.dtsi               | 20 ++++----
>  arch/arm/dts/imx8mq-cm-u-boot.dtsi            | 20 ++++----
>  arch/arm/dts/imx8mq-u-boot.dtsi               | 16 +++----
>  arch/arm/mach-imx/imx8m/Kconfig               |  1 +
>  .../mach-imx/imx8m/imximage-8mm-lpddr4.cfg    | 10 +---
>  configs/imx8mm-icore-mx8mm-ctouch2_defconfig  |  2 +-
>  configs/imx8mm-icore-mx8mm-edimm2.2_defconfig |  2 +-
>  drivers/ddr/imx/phy/helper.c                  | 47 ++++++++++++++++---
>  15 files changed, 141 insertions(+), 93 deletions(-)
> 

^ permalink raw reply	[flat|nested] 9+ messages in thread

* RE: [PATCH V7 0/4] arm64: binman: use binman symbols for imx
  2022-06-27  9:01 ` [PATCH V7 0/4] arm64: binman: use binman symbols for imx Frieder Schrempf
@ 2022-06-27  9:02   ` Peng Fan
  0 siblings, 0 replies; 9+ messages in thread
From: Peng Fan @ 2022-06-27  9:02 UTC (permalink / raw)
  To: Frieder Schrempf, Peng Fan (OSS), sbabic, festevam; +Cc: u-boot

> Subject: Re: [PATCH V7 0/4] arm64: binman: use binman symbols for imx
> 
> Hi Peng,
> 
> Am 27.06.22 um 05:41 schrieb Peng Fan (OSS):
> > From: Peng Fan <peng.fan@nxp.com>
> >
> > V7:
> >  Rebased with follwoing patchset applied.
> >  [1] i.MX93 patchset:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Fcover%2F20220627032455.28280-
> 1-pe
> >
> ng.fan%40oss.nxp.com%2F&amp;data=05%7C01%7Cpeng.fan%40nxp.com%7
> C4d84e7
> >
> f4d2a64aa0c42608da581ba444%7C686ea1d3bc2b4c6fa92cd99c5c301635%
> 7C0%7C0%
> >
> 7C637919173000954346%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC4wLjA
> wMDAiLCJQI
> >
> joiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&amp;s
> data=95
> >
> jEtkvfpG3HVgqTpeodf%2BQXjw5DBnYVpZ7%2BCBaKfp0%3D&amp;reserved=
> 0
> >  [2] binman symbols fix:
> > https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpatc
> >
> hwork.ozlabs.org%2Fproject%2Fuboot%2Fcover%2F20220618121316.12061-
> 1-al
> >
> pernebiyasak%40gmail.com%2F&amp;data=05%7C01%7Cpeng.fan%40nxp.co
> m%7C4d
> >
> 84e7f4d2a64aa0c42608da581ba444%7C686ea1d3bc2b4c6fa92cd99c5c3016
> 35%7C0%
> >
> 7C0%7C637919173000954346%7CUnknown%7CTWFpbGZsb3d8eyJWIjoiMC
> 4wLjAwMDAiL
> >
> CJQIjoiV2luMzIiLCJBTiI6Ik1haWwiLCJXVCI6Mn0%3D%7C3000%7C%7C%7C&a
> mp;sdat
> > a=jdsYVWoijLk0cGEA2xyVtF6AKNj7ajNxSILFLXkypZE%3D&amp;reserved=0
> 
> I tested this on next with the two patchsets mentioned above applied on a
> kontron-sl-mx8mm board. I get around 38 KiB of SPL size reduction, which is
> great!
> 
> Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>

Thanks for testing this patchset.

Thanks,
Peng.

> 
> Thanks!
> Frieder
> 
> >
> > V6:
> >  Drop no-u-boot-any introduced in V5
> >  Drop binman symbol replacement with @ to _, which is not needed
> > Update imx8m config to not select RAM IMAGE and RAM DEVICE  Update
> ddr
> > firmware node name  Introduce autoconf.h for binman test
> >
> > V5:
> >  Introduce no-u-boot-any property to drop the X86 guard patch 1  Add
> > blob-ext type for ddr firmware node  Include a missing dts change
> >
> > V4:
> >  Fix three boards build failure
> >
> > V3:
> >  Add R-b/T-b
> >  Fix build warning
> >
> > V2:
> >  resolve some CI failure
> >  include patch 7
> >
> > binman symbol is a good feature, but only used on X86 for now. This
> > patchset is to use it for i.MX8M platform.
> >
> > The current imx8m ddr phy firmware consumes lots of space, because we
> > pad them to the largest 32KB and 16KB for IMEM and DMEM.
> >
> > With this patchset we use binman symbols to get firmware location and
> > size, we could save near 36KB with i.MX8MP-EVK.
> >
> > Please help check and test
> >
> >
> >
> > Peng Fan (4):
> >   arm: dts: imx8m: update binman ddr firmware node name
> >   ddr: imx8m: helper: load ddr firmware according to binman symbols
> >   arm: dts: imx8m: shrink ddr firmware size to actual file size
> >   imx: imx8mm-icore: migrate to use BINMAN
> >
> >  arch/arm/dts/imx8mm-u-boot.dtsi               | 16 +++----
> >  arch/arm/dts/imx8mn-beacon-kit-u-boot.dtsi    | 20 ++++----
> >  .../dts/imx8mn-bsh-smm-s2-u-boot-common.dtsi  |  8 ++--
> >  arch/arm/dts/imx8mn-ddr4-evk-u-boot.dtsi      | 20 ++++----
> >  arch/arm/dts/imx8mn-evk-u-boot.dtsi           | 20 ++++----
> >  .../dts/imx8mn-var-som-symphony-u-boot.dtsi   | 16 +++----
> >  arch/arm/dts/imx8mn-venice-u-boot.dtsi        | 16 +++----
> >  arch/arm/dts/imx8mp-u-boot.dtsi               | 20 ++++----
> >  arch/arm/dts/imx8mq-cm-u-boot.dtsi            | 20 ++++----
> >  arch/arm/dts/imx8mq-u-boot.dtsi               | 16 +++----
> >  arch/arm/mach-imx/imx8m/Kconfig               |  1 +
> >  .../mach-imx/imx8m/imximage-8mm-lpddr4.cfg    | 10 +---
> >  configs/imx8mm-icore-mx8mm-ctouch2_defconfig  |  2 +-
> > configs/imx8mm-icore-mx8mm-edimm2.2_defconfig |  2 +-
> >  drivers/ddr/imx/phy/helper.c                  | 47
> ++++++++++++++++---
> >  15 files changed, 141 insertions(+), 93 deletions(-)
> >

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols
  2022-06-27  3:41 ` [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols Peng Fan (OSS)
@ 2022-06-28 14:08   ` Alper Nebi Yasak
  2022-06-28 15:09     ` Tom Rini
  0 siblings, 1 reply; 9+ messages in thread
From: Alper Nebi Yasak @ 2022-06-28 14:08 UTC (permalink / raw)
  To: Tom Rini, Simon Glass, Peng Fan (OSS)
  Cc: u-boot, Peng Fan, Tim Harvey, sbabic, festevam

Hi Tom, Simon, Peng,

On 27/06/2022 06:41, Peng Fan (OSS) wrote:
> From: Peng Fan <peng.fan@nxp.com>
> 
> By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
> we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
> 
> And that could save binary size for many KBs.
> 
> Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
> Signed-off-by: Peng Fan <peng.fan@nxp.com>
> Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> [Alper: Check BINMAN_SYMS_OK instead]
> Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> ---
>  drivers/ddr/imx/phy/helper.c | 47 +++++++++++++++++++++++++++++++-----
>  1 file changed, 41 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
> index 60d650e3089..e9e0294f87d 100644
> --- a/drivers/ddr/imx/phy/helper.c
> +++ b/drivers/ddr/imx/phy/helper.c
> @@ -4,6 +4,7 @@
>   */
>  
>  #include <common.h>
> +#include <binman_sym.h>
>  #include <log.h>
>  #include <spl.h>
>  #include <asm/global_data.h>
> @@ -24,15 +25,30 @@ DECLARE_GLOBAL_DATA_PTR;
>  #define DMEM_OFFSET_ADDR 0x00054000
>  #define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
>  
> +binman_sym_declare(ulong, ddr_1d_imem_fw, image_pos);
> +binman_sym_declare(ulong, ddr_1d_imem_fw, size);
> +
> +binman_sym_declare(ulong, ddr_1d_dmem_fw, image_pos);
> +binman_sym_declare(ulong, ddr_1d_dmem_fw, size);
> +
> +#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
> +binman_sym_declare(ulong, ddr_2d_imem_fw, image_pos);
> +binman_sym_declare(ulong, ddr_2d_imem_fw, size);
> +
> +binman_sym_declare(ulong, ddr_2d_dmem_fw, image_pos);
> +binman_sym_declare(ulong, ddr_2d_dmem_fw, size);
> +#endif
> +
> [...]

A terrible question popped into my head while thinking about binman
symbols, and I feel obliged to ask. Would this be considered 'linking'
these proprietary blobs to a GPL-licensed U-Boot SPL binary?

^ permalink raw reply	[flat|nested] 9+ messages in thread

* Re: [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols
  2022-06-28 14:08   ` Alper Nebi Yasak
@ 2022-06-28 15:09     ` Tom Rini
  0 siblings, 0 replies; 9+ messages in thread
From: Tom Rini @ 2022-06-28 15:09 UTC (permalink / raw)
  To: Alper Nebi Yasak
  Cc: Simon Glass, Peng Fan (OSS),
	u-boot, Peng Fan, Tim Harvey, sbabic, festevam

[-- Attachment #1: Type: text/plain, Size: 2364 bytes --]

On Tue, Jun 28, 2022 at 05:08:26PM +0300, Alper Nebi Yasak wrote:
> Hi Tom, Simon, Peng,
> 
> On 27/06/2022 06:41, Peng Fan (OSS) wrote:
> > From: Peng Fan <peng.fan@nxp.com>
> > 
> > By reading binman symbols, we no need hard coded IMEM_LEN/DMEM_LEN after
> > we update the binman dtsi to drop 0x8000/0x4000 length for the firmware.
> > 
> > And that could save binary size for many KBs.
> > 
> > Tested-by: Tim Harvey <tharvey@gateworks.com> #imx8m[m,n,p]-venice
> > Signed-off-by: Peng Fan <peng.fan@nxp.com>
> > Reviewed-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> > [Alper: Check BINMAN_SYMS_OK instead]
> > Signed-off-by: Alper Nebi Yasak <alpernebiyasak@gmail.com>
> > ---
> >  drivers/ddr/imx/phy/helper.c | 47 +++++++++++++++++++++++++++++++-----
> >  1 file changed, 41 insertions(+), 6 deletions(-)
> > 
> > diff --git a/drivers/ddr/imx/phy/helper.c b/drivers/ddr/imx/phy/helper.c
> > index 60d650e3089..e9e0294f87d 100644
> > --- a/drivers/ddr/imx/phy/helper.c
> > +++ b/drivers/ddr/imx/phy/helper.c
> > @@ -4,6 +4,7 @@
> >   */
> >  
> >  #include <common.h>
> > +#include <binman_sym.h>
> >  #include <log.h>
> >  #include <spl.h>
> >  #include <asm/global_data.h>
> > @@ -24,15 +25,30 @@ DECLARE_GLOBAL_DATA_PTR;
> >  #define DMEM_OFFSET_ADDR 0x00054000
> >  #define DDR_TRAIN_CODE_BASE_ADDR IP2APB_DDRPHY_IPS_BASE_ADDR(0)
> >  
> > +binman_sym_declare(ulong, ddr_1d_imem_fw, image_pos);
> > +binman_sym_declare(ulong, ddr_1d_imem_fw, size);
> > +
> > +binman_sym_declare(ulong, ddr_1d_dmem_fw, image_pos);
> > +binman_sym_declare(ulong, ddr_1d_dmem_fw, size);
> > +
> > +#if !IS_ENABLED(CONFIG_IMX8M_DDR3L)
> > +binman_sym_declare(ulong, ddr_2d_imem_fw, image_pos);
> > +binman_sym_declare(ulong, ddr_2d_imem_fw, size);
> > +
> > +binman_sym_declare(ulong, ddr_2d_dmem_fw, image_pos);
> > +binman_sym_declare(ulong, ddr_2d_dmem_fw, size);
> > +#endif
> > +
> > [...]
> 
> A terrible question popped into my head while thinking about binman
> symbols, and I feel obliged to ask. Would this be considered 'linking'
> these proprietary blobs to a GPL-licensed U-Boot SPL binary?

No, I don't think so.  This isn't any different than the other types of
technical implementations done to allow for GPL things to start / find /
load / get information back from non-GPL things.

-- 
Tom

[-- Attachment #2: signature.asc --]
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^ permalink raw reply	[flat|nested] 9+ messages in thread

end of thread, other threads:[~2022-06-28 15:09 UTC | newest]

Thread overview: 9+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-27  3:41 [PATCH V7 0/4] arm64: binman: use binman symbols for imx Peng Fan (OSS)
2022-06-27  3:41 ` [PATCH V7 1/4] arm: dts: imx8m: update binman ddr firmware node name Peng Fan (OSS)
2022-06-27  3:41 ` [PATCH V7 2/4] ddr: imx8m: helper: load ddr firmware according to binman symbols Peng Fan (OSS)
2022-06-28 14:08   ` Alper Nebi Yasak
2022-06-28 15:09     ` Tom Rini
2022-06-27  3:41 ` [PATCH V7 3/4] arm: dts: imx8m: shrink ddr firmware size to actual file size Peng Fan (OSS)
2022-06-27  3:41 ` [PATCH V7 4/4] imx: imx8mm-icore: migrate to use BINMAN Peng Fan (OSS)
2022-06-27  9:01 ` [PATCH V7 0/4] arm64: binman: use binman symbols for imx Frieder Schrempf
2022-06-27  9:02   ` Peng Fan

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