* [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
@ 2022-06-30 10:14 Abel Vesa
2022-06-30 10:15 ` Krzysztof Kozlowski
` (2 more replies)
0 siblings, 3 replies; 4+ messages in thread
From: Abel Vesa @ 2022-06-30 10:14 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Konrad Dybcio, Krzysztof Kozlowski,
Rob Herring
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List, Abel Vesa
Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
states. The exceptions are the cheza plaftorms, which need to remain with
PC idle states. So in order allow all the other platforms to switch,
while cheza platforms to remain the same, replace the PC idle states with
the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
states with PC ones, delete inherited psci cpus nodes, domain idle states
and power domain properties.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
---
Changes since v1:
* fixed the commit message as suggested by Krzysztof
* dropped blank line sdm845 dtsi
* renamed sdm845 dtsi psci subnodes to power domain cpus and cluster
* fixed indentation for idle states in cheza dtsi
arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 132 ++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 135 ++++++++++++---------
2 files changed, 213 insertions(+), 54 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
index e7e4cc5936aa..13d3d7328210 100644
--- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
@@ -145,6 +145,138 @@ panel_in_edp: endpoint {
};
};
+&psci {
+ /delete-node/ cpu0;
+ /delete-node/ cpu1;
+ /delete-node/ cpu2;
+ /delete-node/ cpu3;
+ /delete-node/ cpu4;
+ /delete-node/ cpu5;
+ /delete-node/ cpu6;
+ /delete-node/ cpu7;
+ /delete-node/ cpu-cluster0;
+};
+
+&cpus {
+ /delete-node/ domain-idle-states;
+};
+
+&cpu_idle_states {
+ LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "little-power-down";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <350>;
+ exit-latency-us = <461>;
+ min-residency-us = <1890>;
+ local-timer-stop;
+ };
+
+ LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
+ compatible = "arm,idle-state";
+ idle-state-name = "little-rail-power-down";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <360>;
+ exit-latency-us = <531>;
+ min-residency-us = <3934>;
+ local-timer-stop;
+ };
+
+ BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "big-power-down";
+ arm,psci-suspend-param = <0x40000003>;
+ entry-latency-us = <264>;
+ exit-latency-us = <621>;
+ min-residency-us = <952>;
+ local-timer-stop;
+ };
+
+ BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
+ compatible = "arm,idle-state";
+ idle-state-name = "big-rail-power-down";
+ arm,psci-suspend-param = <0x40000004>;
+ entry-latency-us = <702>;
+ exit-latency-us = <1061>;
+ min-residency-us = <4488>;
+ local-timer-stop;
+ };
+
+ CLUSTER_SLEEP_0: cluster-sleep-0 {
+ compatible = "arm,idle-state";
+ idle-state-name = "cluster-power-down";
+ arm,psci-suspend-param = <0x400000F4>;
+ entry-latency-us = <3263>;
+ exit-latency-us = <6562>;
+ min-residency-us = <9987>;
+ local-timer-stop;
+ };
+};
+
+&CPU0 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&LITTLE_CPU_SLEEP_0
+ &LITTLE_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU1 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&LITTLE_CPU_SLEEP_0
+ &LITTLE_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU2 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&LITTLE_CPU_SLEEP_0
+ &LITTLE_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU3 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&LITTLE_CPU_SLEEP_0
+ &LITTLE_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU4 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&BIG_CPU_SLEEP_0
+ &BIG_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU5 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&BIG_CPU_SLEEP_0
+ &BIG_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU6 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&BIG_CPU_SLEEP_0
+ &BIG_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
+&CPU7 {
+ /delete-property/ power-domains;
+ /delete-property/ power-domain-names;
+ cpu-idle-states = <&BIG_CPU_SLEEP_0
+ &BIG_CPU_SLEEP_1
+ &CLUSTER_SLEEP_0>;
+};
+
/*
* Reserved memory changes
*
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 83439739de37..491b3d66ffc0 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -188,7 +188,7 @@ spss_mem: spss@97b00000 {
};
};
- cpus {
+ cpus: cpus {
#address-cells = <2>;
#size-cells = <0>;
@@ -197,15 +197,14 @@ CPU0: cpu@0 {
compatible = "qcom,kryo385";
reg = <0x0 0x0>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD0>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_0>;
L2_0: l2-cache {
@@ -222,15 +221,14 @@ CPU1: cpu@100 {
compatible = "qcom,kryo385";
reg = <0x0 0x100>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD1>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_100>;
L2_100: l2-cache {
@@ -244,15 +242,14 @@ CPU2: cpu@200 {
compatible = "qcom,kryo385";
reg = <0x0 0x200>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
operating-points-v2 = <&cpu0_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD2>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_200>;
L2_200: l2-cache {
@@ -266,9 +263,6 @@ CPU3: cpu@300 {
compatible = "qcom,kryo385";
reg = <0x0 0x300>;
enable-method = "psci";
- cpu-idle-states = <&LITTLE_CPU_SLEEP_0
- &LITTLE_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <611>;
dynamic-power-coefficient = <290>;
qcom,freq-domain = <&cpufreq_hw 0>;
@@ -276,6 +270,8 @@ &LITTLE_CPU_SLEEP_1
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
#cooling-cells = <2>;
+ power-domains = <&CPU_PD3>;
+ power-domain-names = "psci";
next-level-cache = <&L2_300>;
L2_300: l2-cache {
compatible = "cache";
@@ -289,14 +285,13 @@ CPU4: cpu@400 {
reg = <0x0 0x400>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD4>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_400>;
L2_400: l2-cache {
@@ -311,14 +306,13 @@ CPU5: cpu@500 {
reg = <0x0 0x500>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD5>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_500>;
L2_500: l2-cache {
@@ -333,14 +327,13 @@ CPU6: cpu@600 {
reg = <0x0 0x600>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD6>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_600>;
L2_600: l2-cache {
@@ -355,14 +348,13 @@ CPU7: cpu@700 {
reg = <0x0 0x700>;
enable-method = "psci";
capacity-dmips-mhz = <1024>;
- cpu-idle-states = <&BIG_CPU_SLEEP_0
- &BIG_CPU_SLEEP_1
- &CLUSTER_SLEEP_0>;
dynamic-power-coefficient = <442>;
qcom,freq-domain = <&cpufreq_hw 1>;
operating-points-v2 = <&cpu4_opp_table>;
interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
<&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
+ power-domains = <&CPU_PD7>;
+ power-domain-names = "psci";
#cooling-cells = <2>;
next-level-cache = <&L2_700>;
L2_700: l2-cache {
@@ -407,53 +399,35 @@ core7 {
};
};
- idle-states {
+ cpu_idle_states: idle-states {
entry-method = "psci";
LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
compatible = "arm,idle-state";
- idle-state-name = "little-power-down";
- arm,psci-suspend-param = <0x40000003>;
+ idle-state-name = "little-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <350>;
exit-latency-us = <461>;
min-residency-us = <1890>;
local-timer-stop;
};
- LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
- compatible = "arm,idle-state";
- idle-state-name = "little-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <360>;
- exit-latency-us = <531>;
- min-residency-us = <3934>;
- local-timer-stop;
- };
-
BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
compatible = "arm,idle-state";
- idle-state-name = "big-power-down";
- arm,psci-suspend-param = <0x40000003>;
+ idle-state-name = "big-rail-power-collapse";
+ arm,psci-suspend-param = <0x40000004>;
entry-latency-us = <264>;
exit-latency-us = <621>;
min-residency-us = <952>;
local-timer-stop;
};
+ };
- BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
- compatible = "arm,idle-state";
- idle-state-name = "big-rail-power-down";
- arm,psci-suspend-param = <0x40000004>;
- entry-latency-us = <702>;
- exit-latency-us = <1061>;
- min-residency-us = <4488>;
- local-timer-stop;
- };
-
+ domain-idle-states {
CLUSTER_SLEEP_0: cluster-sleep-0 {
- compatible = "arm,idle-state";
- idle-state-name = "cluster-power-down";
- arm,psci-suspend-param = <0x400000F4>;
+ compatible = "domain-idle-state";
+ idle-state-name = "cluster-power-collapse";
+ arm,psci-suspend-param = <0x4100c244>;
entry-latency-us = <3263>;
exit-latency-us = <6562>;
min-residency-us = <9987>;
@@ -1050,9 +1024,62 @@ slpi_smp2p_in: slave-kernel {
};
};
- psci {
+ psci: psci {
compatible = "arm,psci-1.0";
method = "smc";
+
+ CPU_PD0: power-domain-cpu0 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD1: power-domain-cpu1 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD2: power-domain-cpu2 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD3: power-domain-cpu3 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
+ };
+
+ CPU_PD4: power-domain-cpu4 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD5: power-domain-cpu5 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD6: power-domain-cpu6 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CPU_PD7: power-domain-cpu7 {
+ #power-domain-cells = <0>;
+ power-domains = <&CLUSTER_PD>;
+ domain-idle-states = <&BIG_CPU_SLEEP_0>;
+ };
+
+ CLUSTER_PD: power-domain-cluster {
+ #power-domain-cells = <0>;
+ domain-idle-states = <&CLUSTER_SLEEP_0>;
+ };
};
soc: soc@0 {
--
2.34.3
^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
2022-06-30 10:14 [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI Abel Vesa
@ 2022-06-30 10:15 ` Krzysztof Kozlowski
2022-07-01 20:02 ` Steev Klimaszewski
2022-07-07 2:31 ` (subset) " Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Krzysztof Kozlowski @ 2022-06-30 10:15 UTC (permalink / raw)
To: Abel Vesa, Bjorn Andersson, Andy Gross, Konrad Dybcio, Rob Herring
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 30/06/2022 12:14, Abel Vesa wrote:
> Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
> states. The exceptions are the cheza plaftorms, which need to remain with
> PC idle states. So in order allow all the other platforms to switch,
> while cheza platforms to remain the same, replace the PC idle states with
> the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
> states with PC ones, delete inherited psci cpus nodes, domain idle states
> and power domain properties.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> Changes since v1:
> * fixed the commit message as suggested by Krzysztof
> * dropped blank line sdm845 dtsi
> * renamed sdm845 dtsi psci subnodes to power domain cpus and cluster
> * fixed indentation for idle states in cheza dtsi
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
2022-06-30 10:14 [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI Abel Vesa
2022-06-30 10:15 ` Krzysztof Kozlowski
@ 2022-07-01 20:02 ` Steev Klimaszewski
2022-07-07 2:31 ` (subset) " Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Steev Klimaszewski @ 2022-07-01 20:02 UTC (permalink / raw)
To: Abel Vesa, Bjorn Andersson, Andy Gross, Konrad Dybcio,
Krzysztof Kozlowski, Rob Herring
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On 6/30/22 5:14 AM, Abel Vesa wrote:
> Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
> states. The exceptions are the cheza plaftorms, which need to remain with
> PC idle states. So in order allow all the other platforms to switch,
> while cheza platforms to remain the same, replace the PC idle states with
> the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
> states with PC ones, delete inherited psci cpus nodes, domain idle states
> and power domain properties.
>
> Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
> ---
>
> Changes since v1:
> * fixed the commit message as suggested by Krzysztof
> * dropped blank line sdm845 dtsi
> * renamed sdm845 dtsi psci subnodes to power domain cpus and cluster
> * fixed indentation for idle states in cheza dtsi
>
> arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi | 132 ++++++++++++++++++++
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 135 ++++++++++++---------
> 2 files changed, 213 insertions(+), 54 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> index e7e4cc5936aa..13d3d7328210 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi
> @@ -145,6 +145,138 @@ panel_in_edp: endpoint {
> };
> };
>
> +&psci {
> + /delete-node/ cpu0;
> + /delete-node/ cpu1;
> + /delete-node/ cpu2;
> + /delete-node/ cpu3;
> + /delete-node/ cpu4;
> + /delete-node/ cpu5;
> + /delete-node/ cpu6;
> + /delete-node/ cpu7;
> + /delete-node/ cpu-cluster0;
> +};
> +
> +&cpus {
> + /delete-node/ domain-idle-states;
> +};
> +
> +&cpu_idle_states {
> + LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "little-power-down";
> + arm,psci-suspend-param = <0x40000003>;
> + entry-latency-us = <350>;
> + exit-latency-us = <461>;
> + min-residency-us = <1890>;
> + local-timer-stop;
> + };
> +
> + LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "little-rail-power-down";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <360>;
> + exit-latency-us = <531>;
> + min-residency-us = <3934>;
> + local-timer-stop;
> + };
> +
> + BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "big-power-down";
> + arm,psci-suspend-param = <0x40000003>;
> + entry-latency-us = <264>;
> + exit-latency-us = <621>;
> + min-residency-us = <952>;
> + local-timer-stop;
> + };
> +
> + BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
> + compatible = "arm,idle-state";
> + idle-state-name = "big-rail-power-down";
> + arm,psci-suspend-param = <0x40000004>;
> + entry-latency-us = <702>;
> + exit-latency-us = <1061>;
> + min-residency-us = <4488>;
> + local-timer-stop;
> + };
> +
> + CLUSTER_SLEEP_0: cluster-sleep-0 {
> + compatible = "arm,idle-state";
> + idle-state-name = "cluster-power-down";
> + arm,psci-suspend-param = <0x400000F4>;
> + entry-latency-us = <3263>;
> + exit-latency-us = <6562>;
> + min-residency-us = <9987>;
> + local-timer-stop;
> + };
> +};
> +
> +&CPU0 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU1 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU2 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU3 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> + &LITTLE_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU4 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU5 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU6 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> +&CPU7 {
> + /delete-property/ power-domains;
> + /delete-property/ power-domain-names;
> + cpu-idle-states = <&BIG_CPU_SLEEP_0
> + &BIG_CPU_SLEEP_1
> + &CLUSTER_SLEEP_0>;
> +};
> +
> /*
> * Reserved memory changes
> *
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 83439739de37..491b3d66ffc0 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -188,7 +188,7 @@ spss_mem: spss@97b00000 {
> };
> };
>
> - cpus {
> + cpus: cpus {
> #address-cells = <2>;
> #size-cells = <0>;
>
> @@ -197,15 +197,14 @@ CPU0: cpu@0 {
> compatible = "qcom,kryo385";
> reg = <0x0 0x0>;
> enable-method = "psci";
> - cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> - &LITTLE_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> capacity-dmips-mhz = <611>;
> dynamic-power-coefficient = <290>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD0>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_0>;
> L2_0: l2-cache {
> @@ -222,15 +221,14 @@ CPU1: cpu@100 {
> compatible = "qcom,kryo385";
> reg = <0x0 0x100>;
> enable-method = "psci";
> - cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> - &LITTLE_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> capacity-dmips-mhz = <611>;
> dynamic-power-coefficient = <290>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD1>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_100>;
> L2_100: l2-cache {
> @@ -244,15 +242,14 @@ CPU2: cpu@200 {
> compatible = "qcom,kryo385";
> reg = <0x0 0x200>;
> enable-method = "psci";
> - cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> - &LITTLE_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> capacity-dmips-mhz = <611>;
> dynamic-power-coefficient = <290>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> operating-points-v2 = <&cpu0_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD2>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_200>;
> L2_200: l2-cache {
> @@ -266,9 +263,6 @@ CPU3: cpu@300 {
> compatible = "qcom,kryo385";
> reg = <0x0 0x300>;
> enable-method = "psci";
> - cpu-idle-states = <&LITTLE_CPU_SLEEP_0
> - &LITTLE_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> capacity-dmips-mhz = <611>;
> dynamic-power-coefficient = <290>;
> qcom,freq-domain = <&cpufreq_hw 0>;
> @@ -276,6 +270,8 @@ &LITTLE_CPU_SLEEP_1
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> #cooling-cells = <2>;
> + power-domains = <&CPU_PD3>;
> + power-domain-names = "psci";
> next-level-cache = <&L2_300>;
> L2_300: l2-cache {
> compatible = "cache";
> @@ -289,14 +285,13 @@ CPU4: cpu@400 {
> reg = <0x0 0x400>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> - cpu-idle-states = <&BIG_CPU_SLEEP_0
> - &BIG_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> dynamic-power-coefficient = <442>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD4>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_400>;
> L2_400: l2-cache {
> @@ -311,14 +306,13 @@ CPU5: cpu@500 {
> reg = <0x0 0x500>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> - cpu-idle-states = <&BIG_CPU_SLEEP_0
> - &BIG_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> dynamic-power-coefficient = <442>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD5>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_500>;
> L2_500: l2-cache {
> @@ -333,14 +327,13 @@ CPU6: cpu@600 {
> reg = <0x0 0x600>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> - cpu-idle-states = <&BIG_CPU_SLEEP_0
> - &BIG_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> dynamic-power-coefficient = <442>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD6>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_600>;
> L2_600: l2-cache {
> @@ -355,14 +348,13 @@ CPU7: cpu@700 {
> reg = <0x0 0x700>;
> enable-method = "psci";
> capacity-dmips-mhz = <1024>;
> - cpu-idle-states = <&BIG_CPU_SLEEP_0
> - &BIG_CPU_SLEEP_1
> - &CLUSTER_SLEEP_0>;
> dynamic-power-coefficient = <442>;
> qcom,freq-domain = <&cpufreq_hw 1>;
> operating-points-v2 = <&cpu4_opp_table>;
> interconnects = <&gladiator_noc MASTER_APPSS_PROC 3 &mem_noc SLAVE_EBI1 3>,
> <&osm_l3 MASTER_OSM_L3_APPS &osm_l3 SLAVE_OSM_L3>;
> + power-domains = <&CPU_PD7>;
> + power-domain-names = "psci";
> #cooling-cells = <2>;
> next-level-cache = <&L2_700>;
> L2_700: l2-cache {
> @@ -407,53 +399,35 @@ core7 {
> };
> };
>
> - idle-states {
> + cpu_idle_states: idle-states {
> entry-method = "psci";
>
> LITTLE_CPU_SLEEP_0: cpu-sleep-0-0 {
> compatible = "arm,idle-state";
> - idle-state-name = "little-power-down";
> - arm,psci-suspend-param = <0x40000003>;
> + idle-state-name = "little-rail-power-collapse";
> + arm,psci-suspend-param = <0x40000004>;
> entry-latency-us = <350>;
> exit-latency-us = <461>;
> min-residency-us = <1890>;
> local-timer-stop;
> };
>
> - LITTLE_CPU_SLEEP_1: cpu-sleep-0-1 {
> - compatible = "arm,idle-state";
> - idle-state-name = "little-rail-power-down";
> - arm,psci-suspend-param = <0x40000004>;
> - entry-latency-us = <360>;
> - exit-latency-us = <531>;
> - min-residency-us = <3934>;
> - local-timer-stop;
> - };
> -
> BIG_CPU_SLEEP_0: cpu-sleep-1-0 {
> compatible = "arm,idle-state";
> - idle-state-name = "big-power-down";
> - arm,psci-suspend-param = <0x40000003>;
> + idle-state-name = "big-rail-power-collapse";
> + arm,psci-suspend-param = <0x40000004>;
> entry-latency-us = <264>;
> exit-latency-us = <621>;
> min-residency-us = <952>;
> local-timer-stop;
> };
> + };
>
> - BIG_CPU_SLEEP_1: cpu-sleep-1-1 {
> - compatible = "arm,idle-state";
> - idle-state-name = "big-rail-power-down";
> - arm,psci-suspend-param = <0x40000004>;
> - entry-latency-us = <702>;
> - exit-latency-us = <1061>;
> - min-residency-us = <4488>;
> - local-timer-stop;
> - };
> -
> + domain-idle-states {
> CLUSTER_SLEEP_0: cluster-sleep-0 {
> - compatible = "arm,idle-state";
> - idle-state-name = "cluster-power-down";
> - arm,psci-suspend-param = <0x400000F4>;
> + compatible = "domain-idle-state";
> + idle-state-name = "cluster-power-collapse";
> + arm,psci-suspend-param = <0x4100c244>;
> entry-latency-us = <3263>;
> exit-latency-us = <6562>;
> min-residency-us = <9987>;
> @@ -1050,9 +1024,62 @@ slpi_smp2p_in: slave-kernel {
> };
> };
>
> - psci {
> + psci: psci {
> compatible = "arm,psci-1.0";
> method = "smc";
> +
> + CPU_PD0: power-domain-cpu0 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD1: power-domain-cpu1 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD2: power-domain-cpu2 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD3: power-domain-cpu3 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&LITTLE_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD4: power-domain-cpu4 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD5: power-domain-cpu5 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD6: power-domain-cpu6 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CPU_PD7: power-domain-cpu7 {
> + #power-domain-cells = <0>;
> + power-domains = <&CLUSTER_PD>;
> + domain-idle-states = <&BIG_CPU_SLEEP_0>;
> + };
> +
> + CLUSTER_PD: power-domain-cluster {
> + #power-domain-cells = <0>;
> + domain-idle-states = <&CLUSTER_SLEEP_0>;
> + };
> };
>
> soc: soc@0 {
> --
> 2.34.3
>
Tested on the Lenovo Yoga C630
Tested-by: Steev Klimaszewski <steev@kali.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: (subset) [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
2022-06-30 10:14 [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI Abel Vesa
2022-06-30 10:15 ` Krzysztof Kozlowski
2022-07-01 20:02 ` Steev Klimaszewski
@ 2022-07-07 2:31 ` Bjorn Andersson
2 siblings, 0 replies; 4+ messages in thread
From: Bjorn Andersson @ 2022-07-07 2:31 UTC (permalink / raw)
To: Abel Vesa, Rob Herring, Konrad Dybcio, Andy Gross, Krzysztof Kozlowski
Cc: linux-arm-msm, devicetree, Linux Kernel Mailing List
On Thu, 30 Jun 2022 13:14:03 +0300, Abel Vesa wrote:
> Switch from the flat PC idle states of sdm845 to OSI hierarchical idle
> states. The exceptions are the cheza plaftorms, which need to remain with
> PC idle states. So in order allow all the other platforms to switch,
> while cheza platforms to remain the same, replace the PC idle states with
> the OSI ones in the main SDM845 dtsi, and then override the inherited OSI
> states with PC ones, delete inherited psci cpus nodes, domain idle states
> and power domain properties.
>
> [...]
Applied, thanks!
[1/1] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI
commit: a1ade6cac5a2adc87099fc040074305804684cf0
Best regards,
--
Bjorn Andersson <bjorn.andersson@linaro.org>
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2022-07-07 2:31 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-06-30 10:14 [PATCH v2] arm64: dts: qcom: sdm845: Switch PSCI cpu idle states from PC to OSI Abel Vesa
2022-06-30 10:15 ` Krzysztof Kozlowski
2022-07-01 20:02 ` Steev Klimaszewski
2022-07-07 2:31 ` (subset) " Bjorn Andersson
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