* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr}
@ 2022-07-06 21:25 kernel test robot
2022-07-07 5:22 ` kernel test robot
0 siblings, 1 reply; 12+ messages in thread
From: kernel test robot @ 2022-07-06 21:25 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 11196 bytes --]
::::::
:::::: Manual check reason: "commit no functional change"
::::::
CC: kbuild-all(a)lists.01.org
BCC: lkp(a)intel.com
In-Reply-To: <20220706124352.874528-4-dakr@redhat.com>
References: <20220706124352.874528-4-dakr@redhat.com>
TO: Danilo Krummrich <dakr@redhat.com>
TO: daniel(a)ffwll.ch
TO: laurent.pinchart(a)ideasonboard.com
TO: airlied(a)linux.ie
TO: tzimmermann(a)suse.de
CC: dri-devel(a)lists.freedesktop.org
CC: linux-kernel(a)vger.kernel.org
CC: Danilo Krummrich <dakr@redhat.com>
Hi Danilo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on v5.19-rc5]
[also build test ERROR on linus/master]
[cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716
base: 88084a3df1672e131ddc1b4e39eeacfd39864acf
:::::: branch date: 9 hours ago
:::::: commit date: 9 hours ago
config: arm-defconfig (https://download.01.org/0day-ci/archive/20220707/202207070526.dLjM1DgB-lkp(a)intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716
git checkout 54853a66aeea45ecb99d39dec51a7018803174e6
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/atmel-hlcdc/ drivers/gpu/drm/fsl-dcu/ drivers/gpu/drm/rcar-du/ drivers/gpu/drm/sti/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c: In function 'atmel_hlcdc_plane_update_buffers':
>> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c:452:46: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
452 | state->dscrs[i]->addr = gem->paddr + state->offsets[i];
| ^~~~~
| vaddr
--
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c: In function 'fsl_dcu_drm_plane_atomic_update':
>> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c:138:53: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
138 | DCU_CTRLDESCLN(index, 3), gem->paddr);
| ^~~~~
| vaddr
--
drivers/gpu/drm/rcar-du/rcar_du_kms.c: In function 'rcar_du_gem_prime_import_sg_table':
>> drivers/gpu/drm/rcar-du/rcar_du_kms.c:368:18: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
368 | dma_obj->paddr = 0;
| ^~~~~
| vaddr
--
drivers/gpu/drm/rcar-du/rcar_du_plane.c: In function 'rcar_du_plane_setup_scanout':
>> drivers/gpu/drm/rcar-du/rcar_du_plane.c:353:39: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
353 | dma[i] = gem->paddr + fb->offsets[i];
| ^~~~~
| vaddr
--
In file included from include/drm/drm_mm.h:51,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from include/drm/drm_gem_dma_helper.h:7,
from drivers/gpu/drm/sti/sti_gdp.c:16:
drivers/gpu/drm/sti/sti_gdp.c: In function 'sti_gdp_atomic_update':
>> drivers/gpu/drm/sti/sti_gdp.c:783:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
783 | (unsigned long)dma_obj->paddr);
| ^~~~~
include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER'
530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__)
| ^~~~~~~~~~~
drivers/gpu/drm/sti/sti_gdp.c:787:48: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
787 | top_field->gam_gdp_pml = (u32)dma_obj->paddr + fb->offsets[0];
| ^~~~~
| vaddr
In file included from include/linux/device.h:15,
from include/linux/dma-mapping.h:7,
from drivers/gpu/drm/sti/sti_gdp.c:9:
drivers/gpu/drm/sti/sti_gdp.c:832:41: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
832 | (unsigned long)dma_obj->paddr,
| ^~~~~
include/linux/dev_printk.h:129:48: note: in definition of macro 'dev_printk'
129 | _dev_printk(level, dev, fmt, ##__VA_ARGS__); \
| ^~~~~~~~~~~
drivers/gpu/drm/sti/sti_gdp.c:831:9: note: in expansion of macro 'dev_dbg'
831 | dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n",
| ^~~~~~~
--
In file included from include/drm/drm_mm.h:51,
from include/drm/drm_vma_manager.h:26,
from include/drm/drm_gem.h:40,
from include/drm/drm_gem_dma_helper.h:7,
from drivers/gpu/drm/sti/sti_hqvdp.c:20:
drivers/gpu/drm/sti/sti_hqvdp.c: In function 'sti_hqvdp_atomic_update':
>> drivers/gpu/drm/sti/sti_hqvdp.c:1183:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
1183 | (unsigned long)dma_obj->paddr);
| ^~~~~
include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER'
530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__)
| ^~~~~~~~~~~
drivers/gpu/drm/sti/sti_hqvdp.c:1186:47: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
1186 | cmd->top.current_luma = (u32)dma_obj->paddr + fb->offsets[0];
| ^~~~~
| vaddr
drivers/gpu/drm/sti/sti_hqvdp.c:1187:49: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
1187 | cmd->top.current_chroma = (u32)dma_obj->paddr + fb->offsets[1];
| ^~~~~
| vaddr
vim +452 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c
364a7bf574ebbd Peter Rosin 2017-06-22 438
1a396789f65a22 Boris Brezillon 2015-01-06 439 static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane,
2389fc1305fc1e Boris Brezillon 2015-02-05 440 struct atmel_hlcdc_plane_state *state)
1a396789f65a22 Boris Brezillon 2015-01-06 441 {
9a45d33cdf82f1 Boris Brezillon 2017-02-06 442 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc;
9a45d33cdf82f1 Boris Brezillon 2017-02-06 443 struct drm_framebuffer *fb = state->base.fb;
9a45d33cdf82f1 Boris Brezillon 2017-02-06 444 u32 sr;
1a396789f65a22 Boris Brezillon 2015-01-06 445 int i;
1a396789f65a22 Boris Brezillon 2015-01-06 446
9a45d33cdf82f1 Boris Brezillon 2017-02-06 447 sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR);
1a396789f65a22 Boris Brezillon 2015-01-06 448
2389fc1305fc1e Boris Brezillon 2015-02-05 449 for (i = 0; i < state->nplanes; i++) {
efb5bf503f38a8 Danilo Krummrich 2022-07-06 450 struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i);
9a45d33cdf82f1 Boris Brezillon 2017-02-06 451
9a45d33cdf82f1 Boris Brezillon 2017-02-06 @452 state->dscrs[i]->addr = gem->paddr + state->offsets[i];
9a45d33cdf82f1 Boris Brezillon 2017-02-06 453
9a45d33cdf82f1 Boris Brezillon 2017-02-06 454 atmel_hlcdc_layer_write_reg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 455 ATMEL_HLCDC_LAYER_PLANE_HEAD(i),
9a45d33cdf82f1 Boris Brezillon 2017-02-06 456 state->dscrs[i]->self);
9a45d33cdf82f1 Boris Brezillon 2017-02-06 457
9a45d33cdf82f1 Boris Brezillon 2017-02-06 458 if (!(sr & ATMEL_HLCDC_LAYER_EN)) {
9a45d33cdf82f1 Boris Brezillon 2017-02-06 459 atmel_hlcdc_layer_write_reg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 460 ATMEL_HLCDC_LAYER_PLANE_ADDR(i),
9a45d33cdf82f1 Boris Brezillon 2017-02-06 461 state->dscrs[i]->addr);
9a45d33cdf82f1 Boris Brezillon 2017-02-06 462 atmel_hlcdc_layer_write_reg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 463 ATMEL_HLCDC_LAYER_PLANE_CTRL(i),
9a45d33cdf82f1 Boris Brezillon 2017-02-06 464 state->dscrs[i]->ctrl);
9a45d33cdf82f1 Boris Brezillon 2017-02-06 465 atmel_hlcdc_layer_write_reg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 466 ATMEL_HLCDC_LAYER_PLANE_NEXT(i),
9a45d33cdf82f1 Boris Brezillon 2017-02-06 467 state->dscrs[i]->self);
1a396789f65a22 Boris Brezillon 2015-01-06 468 }
1a396789f65a22 Boris Brezillon 2015-01-06 469
9a45d33cdf82f1 Boris Brezillon 2017-02-06 470 if (desc->layout.xstride[i])
9a45d33cdf82f1 Boris Brezillon 2017-02-06 471 atmel_hlcdc_layer_write_cfg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 472 desc->layout.xstride[i],
9a45d33cdf82f1 Boris Brezillon 2017-02-06 473 state->xstride[i]);
9a45d33cdf82f1 Boris Brezillon 2017-02-06 474
9a45d33cdf82f1 Boris Brezillon 2017-02-06 475 if (desc->layout.pstride[i])
9a45d33cdf82f1 Boris Brezillon 2017-02-06 476 atmel_hlcdc_layer_write_cfg(&plane->layer,
9a45d33cdf82f1 Boris Brezillon 2017-02-06 477 desc->layout.pstride[i],
2389fc1305fc1e Boris Brezillon 2015-02-05 478 state->pstride[i]);
1a396789f65a22 Boris Brezillon 2015-01-06 479 }
1a396789f65a22 Boris Brezillon 2015-01-06 480 }
1a396789f65a22 Boris Brezillon 2015-01-06 481
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} 2022-07-06 21:25 [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} kernel test robot @ 2022-07-07 5:22 ` kernel test robot 0 siblings, 0 replies; 12+ messages in thread From: kernel test robot @ 2022-07-07 5:22 UTC (permalink / raw) To: Danilo Krummrich, daniel, laurent.pinchart, airlied, tzimmermann Cc: dri-devel, linux-kernel, Danilo Krummrich, kbuild-all Hi Danilo, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.19-rc5] [also build test ERROR on linus/master] [cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 base: 88084a3df1672e131ddc1b4e39eeacfd39864acf config: arm-defconfig (https://download.01.org/0day-ci/archive/20220707/202207070526.dLjM1DgB-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 git checkout 54853a66aeea45ecb99d39dec51a7018803174e6 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/atmel-hlcdc/ drivers/gpu/drm/fsl-dcu/ drivers/gpu/drm/rcar-du/ drivers/gpu/drm/sti/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c: In function 'atmel_hlcdc_plane_update_buffers': >> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c:452:46: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 452 | state->dscrs[i]->addr = gem->paddr + state->offsets[i]; | ^~~~~ | vaddr -- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c: In function 'fsl_dcu_drm_plane_atomic_update': >> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c:138:53: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 138 | DCU_CTRLDESCLN(index, 3), gem->paddr); | ^~~~~ | vaddr -- drivers/gpu/drm/rcar-du/rcar_du_kms.c: In function 'rcar_du_gem_prime_import_sg_table': >> drivers/gpu/drm/rcar-du/rcar_du_kms.c:368:18: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 368 | dma_obj->paddr = 0; | ^~~~~ | vaddr -- drivers/gpu/drm/rcar-du/rcar_du_plane.c: In function 'rcar_du_plane_setup_scanout': >> drivers/gpu/drm/rcar-du/rcar_du_plane.c:353:39: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 353 | dma[i] = gem->paddr + fb->offsets[i]; | ^~~~~ | vaddr -- In file included from include/drm/drm_mm.h:51, from include/drm/drm_vma_manager.h:26, from include/drm/drm_gem.h:40, from include/drm/drm_gem_dma_helper.h:7, from drivers/gpu/drm/sti/sti_gdp.c:16: drivers/gpu/drm/sti/sti_gdp.c: In function 'sti_gdp_atomic_update': >> drivers/gpu/drm/sti/sti_gdp.c:783:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 783 | (unsigned long)dma_obj->paddr); | ^~~~~ include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER' 530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__) | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_gdp.c:787:48: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 787 | top_field->gam_gdp_pml = (u32)dma_obj->paddr + fb->offsets[0]; | ^~~~~ | vaddr In file included from include/linux/device.h:15, from include/linux/dma-mapping.h:7, from drivers/gpu/drm/sti/sti_gdp.c:9: drivers/gpu/drm/sti/sti_gdp.c:832:41: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 832 | (unsigned long)dma_obj->paddr, | ^~~~~ include/linux/dev_printk.h:129:48: note: in definition of macro 'dev_printk' 129 | _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_gdp.c:831:9: note: in expansion of macro 'dev_dbg' 831 | dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n", | ^~~~~~~ -- In file included from include/drm/drm_mm.h:51, from include/drm/drm_vma_manager.h:26, from include/drm/drm_gem.h:40, from include/drm/drm_gem_dma_helper.h:7, from drivers/gpu/drm/sti/sti_hqvdp.c:20: drivers/gpu/drm/sti/sti_hqvdp.c: In function 'sti_hqvdp_atomic_update': >> drivers/gpu/drm/sti/sti_hqvdp.c:1183:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1183 | (unsigned long)dma_obj->paddr); | ^~~~~ include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER' 530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__) | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_hqvdp.c:1186:47: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1186 | cmd->top.current_luma = (u32)dma_obj->paddr + fb->offsets[0]; | ^~~~~ | vaddr drivers/gpu/drm/sti/sti_hqvdp.c:1187:49: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1187 | cmd->top.current_chroma = (u32)dma_obj->paddr + fb->offsets[1]; | ^~~~~ | vaddr vim +452 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 364a7bf574ebbd Peter Rosin 2017-06-22 438 1a396789f65a22 Boris Brezillon 2015-01-06 439 static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane, 2389fc1305fc1e Boris Brezillon 2015-02-05 440 struct atmel_hlcdc_plane_state *state) 1a396789f65a22 Boris Brezillon 2015-01-06 441 { 9a45d33cdf82f1 Boris Brezillon 2017-02-06 442 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 443 struct drm_framebuffer *fb = state->base.fb; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 444 u32 sr; 1a396789f65a22 Boris Brezillon 2015-01-06 445 int i; 1a396789f65a22 Boris Brezillon 2015-01-06 446 9a45d33cdf82f1 Boris Brezillon 2017-02-06 447 sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); 1a396789f65a22 Boris Brezillon 2015-01-06 448 2389fc1305fc1e Boris Brezillon 2015-02-05 449 for (i = 0; i < state->nplanes; i++) { efb5bf503f38a8 Danilo Krummrich 2022-07-06 450 struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 451 9a45d33cdf82f1 Boris Brezillon 2017-02-06 @452 state->dscrs[i]->addr = gem->paddr + state->offsets[i]; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 453 9a45d33cdf82f1 Boris Brezillon 2017-02-06 454 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 455 ATMEL_HLCDC_LAYER_PLANE_HEAD(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 456 state->dscrs[i]->self); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 457 9a45d33cdf82f1 Boris Brezillon 2017-02-06 458 if (!(sr & ATMEL_HLCDC_LAYER_EN)) { 9a45d33cdf82f1 Boris Brezillon 2017-02-06 459 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 460 ATMEL_HLCDC_LAYER_PLANE_ADDR(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 461 state->dscrs[i]->addr); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 462 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 463 ATMEL_HLCDC_LAYER_PLANE_CTRL(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 464 state->dscrs[i]->ctrl); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 465 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 466 ATMEL_HLCDC_LAYER_PLANE_NEXT(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 467 state->dscrs[i]->self); 1a396789f65a22 Boris Brezillon 2015-01-06 468 } 1a396789f65a22 Boris Brezillon 2015-01-06 469 9a45d33cdf82f1 Boris Brezillon 2017-02-06 470 if (desc->layout.xstride[i]) 9a45d33cdf82f1 Boris Brezillon 2017-02-06 471 atmel_hlcdc_layer_write_cfg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 472 desc->layout.xstride[i], 9a45d33cdf82f1 Boris Brezillon 2017-02-06 473 state->xstride[i]); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 474 9a45d33cdf82f1 Boris Brezillon 2017-02-06 475 if (desc->layout.pstride[i]) 9a45d33cdf82f1 Boris Brezillon 2017-02-06 476 atmel_hlcdc_layer_write_cfg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 477 desc->layout.pstride[i], 2389fc1305fc1e Boris Brezillon 2015-02-05 478 state->pstride[i]); 1a396789f65a22 Boris Brezillon 2015-01-06 479 } 1a396789f65a22 Boris Brezillon 2015-01-06 480 } 1a396789f65a22 Boris Brezillon 2015-01-06 481 -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} @ 2022-07-07 5:22 ` kernel test robot 0 siblings, 0 replies; 12+ messages in thread From: kernel test robot @ 2022-07-07 5:22 UTC (permalink / raw) To: Danilo Krummrich, daniel, laurent.pinchart, airlied, tzimmermann Cc: kbuild-all, Danilo Krummrich, linux-kernel, dri-devel Hi Danilo, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.19-rc5] [also build test ERROR on linus/master] [cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 base: 88084a3df1672e131ddc1b4e39eeacfd39864acf config: arm-defconfig (https://download.01.org/0day-ci/archive/20220707/202207070526.dLjM1DgB-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 git checkout 54853a66aeea45ecb99d39dec51a7018803174e6 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/atmel-hlcdc/ drivers/gpu/drm/fsl-dcu/ drivers/gpu/drm/rcar-du/ drivers/gpu/drm/sti/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c: In function 'atmel_hlcdc_plane_update_buffers': >> drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c:452:46: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 452 | state->dscrs[i]->addr = gem->paddr + state->offsets[i]; | ^~~~~ | vaddr -- drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c: In function 'fsl_dcu_drm_plane_atomic_update': >> drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c:138:53: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 138 | DCU_CTRLDESCLN(index, 3), gem->paddr); | ^~~~~ | vaddr -- drivers/gpu/drm/rcar-du/rcar_du_kms.c: In function 'rcar_du_gem_prime_import_sg_table': >> drivers/gpu/drm/rcar-du/rcar_du_kms.c:368:18: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 368 | dma_obj->paddr = 0; | ^~~~~ | vaddr -- drivers/gpu/drm/rcar-du/rcar_du_plane.c: In function 'rcar_du_plane_setup_scanout': >> drivers/gpu/drm/rcar-du/rcar_du_plane.c:353:39: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 353 | dma[i] = gem->paddr + fb->offsets[i]; | ^~~~~ | vaddr -- In file included from include/drm/drm_mm.h:51, from include/drm/drm_vma_manager.h:26, from include/drm/drm_gem.h:40, from include/drm/drm_gem_dma_helper.h:7, from drivers/gpu/drm/sti/sti_gdp.c:16: drivers/gpu/drm/sti/sti_gdp.c: In function 'sti_gdp_atomic_update': >> drivers/gpu/drm/sti/sti_gdp.c:783:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 783 | (unsigned long)dma_obj->paddr); | ^~~~~ include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER' 530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__) | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_gdp.c:787:48: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 787 | top_field->gam_gdp_pml = (u32)dma_obj->paddr + fb->offsets[0]; | ^~~~~ | vaddr In file included from include/linux/device.h:15, from include/linux/dma-mapping.h:7, from drivers/gpu/drm/sti/sti_gdp.c:9: drivers/gpu/drm/sti/sti_gdp.c:832:41: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 832 | (unsigned long)dma_obj->paddr, | ^~~~~ include/linux/dev_printk.h:129:48: note: in definition of macro 'dev_printk' 129 | _dev_printk(level, dev, fmt, ##__VA_ARGS__); \ | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_gdp.c:831:9: note: in expansion of macro 'dev_dbg' 831 | dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n", | ^~~~~~~ -- In file included from include/drm/drm_mm.h:51, from include/drm/drm_vma_manager.h:26, from include/drm/drm_gem.h:40, from include/drm/drm_gem_dma_helper.h:7, from drivers/gpu/drm/sti/sti_hqvdp.c:20: drivers/gpu/drm/sti/sti_hqvdp.c: In function 'sti_hqvdp_atomic_update': >> drivers/gpu/drm/sti/sti_hqvdp.c:1183:50: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1183 | (unsigned long)dma_obj->paddr); | ^~~~~ include/drm/drm_print.h:530:41: note: in definition of macro 'DRM_DEBUG_DRIVER' 530 | __drm_dbg(DRM_UT_DRIVER, fmt, ##__VA_ARGS__) | ^~~~~~~~~~~ drivers/gpu/drm/sti/sti_hqvdp.c:1186:47: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1186 | cmd->top.current_luma = (u32)dma_obj->paddr + fb->offsets[0]; | ^~~~~ | vaddr drivers/gpu/drm/sti/sti_hqvdp.c:1187:49: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 1187 | cmd->top.current_chroma = (u32)dma_obj->paddr + fb->offsets[1]; | ^~~~~ | vaddr vim +452 drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c 364a7bf574ebbd Peter Rosin 2017-06-22 438 1a396789f65a22 Boris Brezillon 2015-01-06 439 static void atmel_hlcdc_plane_update_buffers(struct atmel_hlcdc_plane *plane, 2389fc1305fc1e Boris Brezillon 2015-02-05 440 struct atmel_hlcdc_plane_state *state) 1a396789f65a22 Boris Brezillon 2015-01-06 441 { 9a45d33cdf82f1 Boris Brezillon 2017-02-06 442 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 443 struct drm_framebuffer *fb = state->base.fb; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 444 u32 sr; 1a396789f65a22 Boris Brezillon 2015-01-06 445 int i; 1a396789f65a22 Boris Brezillon 2015-01-06 446 9a45d33cdf82f1 Boris Brezillon 2017-02-06 447 sr = atmel_hlcdc_layer_read_reg(&plane->layer, ATMEL_HLCDC_LAYER_CHSR); 1a396789f65a22 Boris Brezillon 2015-01-06 448 2389fc1305fc1e Boris Brezillon 2015-02-05 449 for (i = 0; i < state->nplanes; i++) { efb5bf503f38a8 Danilo Krummrich 2022-07-06 450 struct drm_gem_dma_object *gem = drm_fb_dma_get_gem_obj(fb, i); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 451 9a45d33cdf82f1 Boris Brezillon 2017-02-06 @452 state->dscrs[i]->addr = gem->paddr + state->offsets[i]; 9a45d33cdf82f1 Boris Brezillon 2017-02-06 453 9a45d33cdf82f1 Boris Brezillon 2017-02-06 454 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 455 ATMEL_HLCDC_LAYER_PLANE_HEAD(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 456 state->dscrs[i]->self); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 457 9a45d33cdf82f1 Boris Brezillon 2017-02-06 458 if (!(sr & ATMEL_HLCDC_LAYER_EN)) { 9a45d33cdf82f1 Boris Brezillon 2017-02-06 459 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 460 ATMEL_HLCDC_LAYER_PLANE_ADDR(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 461 state->dscrs[i]->addr); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 462 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 463 ATMEL_HLCDC_LAYER_PLANE_CTRL(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 464 state->dscrs[i]->ctrl); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 465 atmel_hlcdc_layer_write_reg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 466 ATMEL_HLCDC_LAYER_PLANE_NEXT(i), 9a45d33cdf82f1 Boris Brezillon 2017-02-06 467 state->dscrs[i]->self); 1a396789f65a22 Boris Brezillon 2015-01-06 468 } 1a396789f65a22 Boris Brezillon 2015-01-06 469 9a45d33cdf82f1 Boris Brezillon 2017-02-06 470 if (desc->layout.xstride[i]) 9a45d33cdf82f1 Boris Brezillon 2017-02-06 471 atmel_hlcdc_layer_write_cfg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 472 desc->layout.xstride[i], 9a45d33cdf82f1 Boris Brezillon 2017-02-06 473 state->xstride[i]); 9a45d33cdf82f1 Boris Brezillon 2017-02-06 474 9a45d33cdf82f1 Boris Brezillon 2017-02-06 475 if (desc->layout.pstride[i]) 9a45d33cdf82f1 Boris Brezillon 2017-02-06 476 atmel_hlcdc_layer_write_cfg(&plane->layer, 9a45d33cdf82f1 Boris Brezillon 2017-02-06 477 desc->layout.pstride[i], 2389fc1305fc1e Boris Brezillon 2015-02-05 478 state->pstride[i]); 1a396789f65a22 Boris Brezillon 2015-01-06 479 } 1a396789f65a22 Boris Brezillon 2015-01-06 480 } 1a396789f65a22 Boris Brezillon 2015-01-06 481 -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr}
@ 2022-07-06 21:04 kernel test robot
2022-07-07 5:19 ` kernel test robot
0 siblings, 1 reply; 12+ messages in thread
From: kernel test robot @ 2022-07-06 21:04 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 5057 bytes --]
::::::
:::::: Manual check reason: "commit no functional change"
::::::
CC: kbuild-all(a)lists.01.org
BCC: lkp(a)intel.com
In-Reply-To: <20220706124352.874528-4-dakr@redhat.com>
References: <20220706124352.874528-4-dakr@redhat.com>
TO: Danilo Krummrich <dakr@redhat.com>
TO: daniel(a)ffwll.ch
TO: laurent.pinchart(a)ideasonboard.com
TO: airlied(a)linux.ie
TO: tzimmermann(a)suse.de
CC: dri-devel(a)lists.freedesktop.org
CC: linux-kernel(a)vger.kernel.org
CC: Danilo Krummrich <dakr@redhat.com>
Hi Danilo,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on v5.19-rc5]
[also build test ERROR on linus/master]
[cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716
base: 88084a3df1672e131ddc1b4e39eeacfd39864acf
:::::: branch date: 8 hours ago
:::::: commit date: 8 hours ago
config: arm-buildonly-randconfig-r003-20220706 (https://download.01.org/0day-ci/archive/20220707/202207070426.Bj47lRp2-lkp(a)intel.com/config)
compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0
reproduce (this is a W=1 build):
wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross
chmod +x ~/bin/make.cross
# https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6
git remote add linux-review https://github.com/intel-lab-lkp/linux
git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716
git checkout 54853a66aeea45ecb99d39dec51a7018803174e6
# save the config file
mkdir build_dir && cp config build_dir/.config
COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/tilcdc/
If you fix the issue, kindly add following tag where applicable
Reported-by: kernel test robot <lkp@intel.com>
All errors (new ones prefixed by >>):
drivers/gpu/drm/tilcdc/tilcdc_crtc.c: In function 'set_scanout':
>> drivers/gpu/drm/tilcdc/tilcdc_crtc.c:72:22: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'?
72 | start = gem->paddr + fb->offsets[0] +
| ^~~~~
| vaddr
vim +72 drivers/gpu/drm/tilcdc/tilcdc_crtc.c
16ea975eac671fa Rob Clark 2013-01-08 61
2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 62 static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb)
16ea975eac671fa Rob Clark 2013-01-08 63 {
16ea975eac671fa Rob Clark 2013-01-08 64 struct drm_device *dev = crtc->dev;
4c268d635f8d4f5 Daniel Schultz 2016-10-28 65 struct tilcdc_drm_private *priv = dev->dev_private;
efb5bf503f38a8d Danilo Krummrich 2022-07-06 66 struct drm_gem_dma_object *gem;
2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 67 dma_addr_t start, end;
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 68 u64 dma_base_and_ceiling;
16ea975eac671fa Rob Clark 2013-01-08 69
d47caa3aaf3da1e Danilo Krummrich 2022-07-06 70 gem = drm_fb_dma_get_gem_obj(fb, 0);
16ea975eac671fa Rob Clark 2013-01-08 71
2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 @72 start = gem->paddr + fb->offsets[0] +
2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 73 crtc->y * fb->pitches[0] +
353c859899635ea Ville Syrjälä 2016-12-14 74 crtc->x * fb->format->cpp[0];
16ea975eac671fa Rob Clark 2013-01-08 75
2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 76 end = start + (crtc->mode.vdisplay * fb->pitches[0]);
16ea975eac671fa Rob Clark 2013-01-08 77
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 78 /* Write LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 79 * with a single insruction, if available. This should make it more
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 80 * unlikely that LCDC would fetch the DMA addresses in the middle of
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 81 * an update.
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 82 */
4c268d635f8d4f5 Daniel Schultz 2016-10-28 83 if (priv->rev == 1)
4c268d635f8d4f5 Daniel Schultz 2016-10-28 84 end -= 1;
4c268d635f8d4f5 Daniel Schultz 2016-10-28 85
4c268d635f8d4f5 Daniel Schultz 2016-10-28 86 dma_base_and_ceiling = (u64)end << 32 | start;
7eb9f069ff5dd39 Jyri Sarha 2016-08-26 87 tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling);
16ea975eac671fa Rob Clark 2013-01-08 88 }
16ea975eac671fa Rob Clark 2013-01-08 89
--
0-DAY CI Kernel Test Service
https://01.org/lkp
^ permalink raw reply [flat|nested] 12+ messages in thread* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} 2022-07-06 21:04 kernel test robot @ 2022-07-07 5:19 ` kernel test robot 0 siblings, 0 replies; 12+ messages in thread From: kernel test robot @ 2022-07-07 5:19 UTC (permalink / raw) To: Danilo Krummrich, daniel, laurent.pinchart, airlied, tzimmermann Cc: kbuild-all, dri-devel, linux-kernel, Danilo Krummrich Hi Danilo, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.19-rc5] [also build test ERROR on linus/master] [cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 base: 88084a3df1672e131ddc1b4e39eeacfd39864acf config: arm-buildonly-randconfig-r003-20220706 (https://download.01.org/0day-ci/archive/20220707/202207070426.Bj47lRp2-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 git checkout 54853a66aeea45ecb99d39dec51a7018803174e6 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/tilcdc/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/tilcdc/tilcdc_crtc.c: In function 'set_scanout': >> drivers/gpu/drm/tilcdc/tilcdc_crtc.c:72:22: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 72 | start = gem->paddr + fb->offsets[0] + | ^~~~~ | vaddr vim +72 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 16ea975eac671fa Rob Clark 2013-01-08 61 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 62 static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) 16ea975eac671fa Rob Clark 2013-01-08 63 { 16ea975eac671fa Rob Clark 2013-01-08 64 struct drm_device *dev = crtc->dev; 4c268d635f8d4f5 Daniel Schultz 2016-10-28 65 struct tilcdc_drm_private *priv = dev->dev_private; efb5bf503f38a8d Danilo Krummrich 2022-07-06 66 struct drm_gem_dma_object *gem; 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 67 dma_addr_t start, end; 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 68 u64 dma_base_and_ceiling; 16ea975eac671fa Rob Clark 2013-01-08 69 d47caa3aaf3da1e Danilo Krummrich 2022-07-06 70 gem = drm_fb_dma_get_gem_obj(fb, 0); 16ea975eac671fa Rob Clark 2013-01-08 71 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 @72 start = gem->paddr + fb->offsets[0] + 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 73 crtc->y * fb->pitches[0] + 353c859899635ea Ville Syrjälä 2016-12-14 74 crtc->x * fb->format->cpp[0]; 16ea975eac671fa Rob Clark 2013-01-08 75 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 76 end = start + (crtc->mode.vdisplay * fb->pitches[0]); 16ea975eac671fa Rob Clark 2013-01-08 77 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 78 /* Write LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 79 * with a single insruction, if available. This should make it more 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 80 * unlikely that LCDC would fetch the DMA addresses in the middle of 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 81 * an update. 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 82 */ 4c268d635f8d4f5 Daniel Schultz 2016-10-28 83 if (priv->rev == 1) 4c268d635f8d4f5 Daniel Schultz 2016-10-28 84 end -= 1; 4c268d635f8d4f5 Daniel Schultz 2016-10-28 85 4c268d635f8d4f5 Daniel Schultz 2016-10-28 86 dma_base_and_ceiling = (u64)end << 32 | start; 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 87 tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling); 16ea975eac671fa Rob Clark 2013-01-08 88 } 16ea975eac671fa Rob Clark 2013-01-08 89 -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} @ 2022-07-07 5:19 ` kernel test robot 0 siblings, 0 replies; 12+ messages in thread From: kernel test robot @ 2022-07-07 5:19 UTC (permalink / raw) To: Danilo Krummrich, daniel, laurent.pinchart, airlied, tzimmermann Cc: Danilo Krummrich, kbuild-all, linux-kernel, dri-devel Hi Danilo, Thank you for the patch! Yet something to improve: [auto build test ERROR on v5.19-rc5] [also build test ERROR on linus/master] [cannot apply to drm-misc/drm-misc-next anholt/for-next pinchartl-media/drm/du/next next-20220706] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch#_base_tree_information] url: https://github.com/intel-lab-lkp/linux/commits/Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 base: 88084a3df1672e131ddc1b4e39eeacfd39864acf config: arm-buildonly-randconfig-r003-20220706 (https://download.01.org/0day-ci/archive/20220707/202207070426.Bj47lRp2-lkp@intel.com/config) compiler: arm-linux-gnueabi-gcc (GCC) 11.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # https://github.com/intel-lab-lkp/linux/commit/54853a66aeea45ecb99d39dec51a7018803174e6 git remote add linux-review https://github.com/intel-lab-lkp/linux git fetch --no-tags linux-review Danilo-Krummrich/drm-rename-CMA-helpers-to-DMA-helpers/20220706-204716 git checkout 54853a66aeea45ecb99d39dec51a7018803174e6 # save the config file mkdir build_dir && cp config build_dir/.config COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-11.3.0 make.cross W=1 O=build_dir ARCH=arm SHELL=/bin/bash drivers/gpu/drm/tilcdc/ If you fix the issue, kindly add following tag where applicable Reported-by: kernel test robot <lkp@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/tilcdc/tilcdc_crtc.c: In function 'set_scanout': >> drivers/gpu/drm/tilcdc/tilcdc_crtc.c:72:22: error: 'struct drm_gem_dma_object' has no member named 'paddr'; did you mean 'vaddr'? 72 | start = gem->paddr + fb->offsets[0] + | ^~~~~ | vaddr vim +72 drivers/gpu/drm/tilcdc/tilcdc_crtc.c 16ea975eac671fa Rob Clark 2013-01-08 61 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 62 static void set_scanout(struct drm_crtc *crtc, struct drm_framebuffer *fb) 16ea975eac671fa Rob Clark 2013-01-08 63 { 16ea975eac671fa Rob Clark 2013-01-08 64 struct drm_device *dev = crtc->dev; 4c268d635f8d4f5 Daniel Schultz 2016-10-28 65 struct tilcdc_drm_private *priv = dev->dev_private; efb5bf503f38a8d Danilo Krummrich 2022-07-06 66 struct drm_gem_dma_object *gem; 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 67 dma_addr_t start, end; 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 68 u64 dma_base_and_ceiling; 16ea975eac671fa Rob Clark 2013-01-08 69 d47caa3aaf3da1e Danilo Krummrich 2022-07-06 70 gem = drm_fb_dma_get_gem_obj(fb, 0); 16ea975eac671fa Rob Clark 2013-01-08 71 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 @72 start = gem->paddr + fb->offsets[0] + 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 73 crtc->y * fb->pitches[0] + 353c859899635ea Ville Syrjälä 2016-12-14 74 crtc->x * fb->format->cpp[0]; 16ea975eac671fa Rob Clark 2013-01-08 75 2b2080d7e9ae246 Tomi Valkeinen 2015-10-20 76 end = start + (crtc->mode.vdisplay * fb->pitches[0]); 16ea975eac671fa Rob Clark 2013-01-08 77 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 78 /* Write LCDC_DMA_FB_BASE_ADDR_0_REG and LCDC_DMA_FB_CEILING_ADDR_0_REG 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 79 * with a single insruction, if available. This should make it more 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 80 * unlikely that LCDC would fetch the DMA addresses in the middle of 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 81 * an update. 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 82 */ 4c268d635f8d4f5 Daniel Schultz 2016-10-28 83 if (priv->rev == 1) 4c268d635f8d4f5 Daniel Schultz 2016-10-28 84 end -= 1; 4c268d635f8d4f5 Daniel Schultz 2016-10-28 85 4c268d635f8d4f5 Daniel Schultz 2016-10-28 86 dma_base_and_ceiling = (u64)end << 32 | start; 7eb9f069ff5dd39 Jyri Sarha 2016-08-26 87 tilcdc_write64(dev, LCDC_DMA_FB_BASE_ADDR_0_REG, dma_base_and_ceiling); 16ea975eac671fa Rob Clark 2013-01-08 88 } 16ea975eac671fa Rob Clark 2013-01-08 89 -- 0-DAY CI Kernel Test Service https://01.org/lkp ^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH v2 0/4] drm: rename CMA helpers to DMA helpers
@ 2022-07-06 12:43 Danilo Krummrich
2022-07-06 12:43 ` Danilo Krummrich
0 siblings, 1 reply; 12+ messages in thread
From: Danilo Krummrich @ 2022-07-06 12:43 UTC (permalink / raw)
To: daniel, laurent.pinchart, airlied, tzimmermann
Cc: dri-devel, linux-kernel, Danilo Krummrich
This patch series renames all CMA helpers to DMA helpers - considering the
hierarchy of APIs (mm/cma -> dma -> gem/fb dma helpers) calling them DMA
helpers seems to be more applicable.
Additionally, commit e57924d4ae80 ("drm/doc: Task to rename CMA helpers")
requests to rename the CMA helpers and implies that people seem to be confused
about the naming.
The patches are compile-time tested building a x86_64 kernel with
`make allyesconfig && make drivers/gpu/drm`.
Changes in v2:
- Fixed up comments for consistent memory/address classification
(DMA-contiguous)
- Added a patch to rename struct drm_gem_dma_object.{paddr => dma_addr}
Danilo Krummrich (4):
drm/fb: rename FB CMA helpers to FB DMA helpers
drm/gem: rename GEM CMA helpers to GEM DMA helpers
drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr}
drm/todo: remove task to rename CMA helpers
Documentation/gpu/drm-kms-helpers.rst | 8 +-
Documentation/gpu/drm-mm.rst | 16 +-
Documentation/gpu/todo.rst | 13 -
drivers/gpu/drm/Kconfig | 4 +-
drivers/gpu/drm/Makefile | 6 +-
drivers/gpu/drm/arm/Kconfig | 4 +-
drivers/gpu/drm/arm/display/Kconfig | 2 +-
.../arm/display/komeda/komeda_framebuffer.c | 12 +-
.../gpu/drm/arm/display/komeda/komeda_kms.c | 10 +-
drivers/gpu/drm/arm/hdlcd_crtc.c | 6 +-
drivers/gpu/drm/arm/hdlcd_drv.c | 8 +-
drivers/gpu/drm/arm/malidp_drv.c | 10 +-
drivers/gpu/drm/arm/malidp_mw.c | 8 +-
drivers/gpu/drm/arm/malidp_planes.c | 34 +-
drivers/gpu/drm/armada/armada_gem.c | 6 +-
drivers/gpu/drm/aspeed/Kconfig | 2 +-
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 10 +-
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 8 +-
drivers/gpu/drm/atmel-hlcdc/Kconfig | 2 +-
drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c | 6 +-
.../gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c | 6 +-
...rm_fb_cma_helper.c => drm_fb_dma_helper.c} | 67 ++--
drivers/gpu/drm/drm_file.c | 2 +-
drivers/gpu/drm/drm_format_helper.c | 4 +-
..._gem_cma_helper.c => drm_gem_dma_helper.c} | 314 +++++++++---------
drivers/gpu/drm/drm_mipi_dbi.c | 2 +-
drivers/gpu/drm/fsl-dcu/Kconfig | 2 +-
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_drv.c | 8 +-
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_kms.c | 2 +-
drivers/gpu/drm/fsl-dcu/fsl_dcu_drm_plane.c | 8 +-
drivers/gpu/drm/hisilicon/kirin/Kconfig | 2 +-
.../gpu/drm/hisilicon/kirin/kirin_drm_ade.c | 10 +-
.../gpu/drm/hisilicon/kirin/kirin_drm_drv.c | 4 +-
drivers/gpu/drm/imx/Kconfig | 2 +-
drivers/gpu/drm/imx/dcss/Kconfig | 2 +-
drivers/gpu/drm/imx/dcss/dcss-kms.c | 6 +-
drivers/gpu/drm/imx/dcss/dcss-plane.c | 18 +-
drivers/gpu/drm/imx/imx-drm-core.c | 10 +-
drivers/gpu/drm/imx/imx-drm.h | 2 +-
drivers/gpu/drm/imx/ipuv3-crtc.c | 4 +-
drivers/gpu/drm/imx/ipuv3-plane.c | 28 +-
drivers/gpu/drm/ingenic/Kconfig | 2 +-
drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 14 +-
drivers/gpu/drm/ingenic/ingenic-ipu.c | 12 +-
drivers/gpu/drm/kmb/Kconfig | 2 +-
drivers/gpu/drm/kmb/kmb_drv.c | 6 +-
drivers/gpu/drm/kmb/kmb_plane.c | 10 +-
drivers/gpu/drm/mcde/Kconfig | 2 +-
drivers/gpu/drm/mcde/mcde_display.c | 8 +-
drivers/gpu/drm/mcde/mcde_drv.c | 10 +-
drivers/gpu/drm/mediatek/Kconfig | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_drv.c | 2 +-
drivers/gpu/drm/mediatek/mtk_drm_gem.c | 4 +-
drivers/gpu/drm/meson/Kconfig | 2 +-
drivers/gpu/drm/meson/meson_drv.c | 10 +-
drivers/gpu/drm/meson/meson_overlay.c | 12 +-
drivers/gpu/drm/meson/meson_plane.c | 8 +-
drivers/gpu/drm/msm/msm_drv.c | 2 +-
drivers/gpu/drm/mxsfb/Kconfig | 2 +-
drivers/gpu/drm/mxsfb/mxsfb_drv.c | 6 +-
drivers/gpu/drm/mxsfb/mxsfb_kms.c | 10 +-
drivers/gpu/drm/panel/Kconfig | 2 +-
drivers/gpu/drm/panel/panel-ilitek-ili9341.c | 6 +-
drivers/gpu/drm/pl111/Kconfig | 2 +-
drivers/gpu/drm/pl111/pl111_display.c | 8 +-
drivers/gpu/drm/pl111/pl111_drv.c | 10 +-
drivers/gpu/drm/rcar-du/Kconfig | 2 +-
drivers/gpu/drm/rcar-du/rcar_du_crtc.c | 4 +-
drivers/gpu/drm/rcar-du/rcar_du_drv.c | 6 +-
drivers/gpu/drm/rcar-du/rcar_du_kms.c | 38 +--
drivers/gpu/drm/rcar-du/rcar_du_plane.c | 8 +-
drivers/gpu/drm/rcar-du/rcar_du_vsp.c | 6 +-
drivers/gpu/drm/rockchip/Kconfig | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_drv.c | 2 +-
drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 4 +-
drivers/gpu/drm/shmobile/Kconfig | 2 +-
drivers/gpu/drm/shmobile/shmob_drm_crtc.c | 10 +-
drivers/gpu/drm/shmobile/shmob_drm_drv.c | 6 +-
drivers/gpu/drm/shmobile/shmob_drm_kms.c | 4 +-
drivers/gpu/drm/shmobile/shmob_drm_kms.h | 2 +-
drivers/gpu/drm/shmobile/shmob_drm_plane.c | 10 +-
drivers/gpu/drm/solomon/ssd130x.c | 2 +-
drivers/gpu/drm/sprd/Kconfig | 2 +-
drivers/gpu/drm/sprd/sprd_dpu.c | 10 +-
drivers/gpu/drm/sprd/sprd_drm.c | 6 +-
drivers/gpu/drm/sti/Kconfig | 2 +-
drivers/gpu/drm/sti/sti_cursor.c | 14 +-
drivers/gpu/drm/sti/sti_drv.c | 8 +-
drivers/gpu/drm/sti/sti_gdp.c | 18 +-
drivers/gpu/drm/sti/sti_hqvdp.c | 18 +-
drivers/gpu/drm/sti/sti_plane.c | 4 +-
drivers/gpu/drm/stm/Kconfig | 2 +-
drivers/gpu/drm/stm/drv.c | 12 +-
drivers/gpu/drm/stm/ltdc.c | 16 +-
drivers/gpu/drm/sun4i/Kconfig | 2 +-
drivers/gpu/drm/sun4i/sun4i_backend.c | 6 +-
drivers/gpu/drm/sun4i/sun4i_drv.c | 10 +-
drivers/gpu/drm/sun4i/sun4i_frontend.c | 10 +-
drivers/gpu/drm/sun4i/sun8i_mixer.c | 4 +-
drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 22 +-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 22 +-
drivers/gpu/drm/tegra/fb.c | 2 +-
drivers/gpu/drm/tidss/Kconfig | 2 +-
drivers/gpu/drm/tidss/tidss_crtc.c | 4 +-
drivers/gpu/drm/tidss/tidss_dispc.c | 28 +-
drivers/gpu/drm/tidss/tidss_drv.c | 6 +-
drivers/gpu/drm/tidss/tidss_kms.c | 2 +-
drivers/gpu/drm/tidss/tidss_plane.c | 2 +-
drivers/gpu/drm/tilcdc/Kconfig | 2 +-
drivers/gpu/drm/tilcdc/tilcdc_crtc.c | 8 +-
drivers/gpu/drm/tilcdc/tilcdc_drv.c | 6 +-
drivers/gpu/drm/tiny/Kconfig | 22 +-
drivers/gpu/drm/tiny/arcpgu.c | 14 +-
drivers/gpu/drm/tiny/hx8357d.c | 6 +-
drivers/gpu/drm/tiny/ili9163.c | 6 +-
drivers/gpu/drm/tiny/ili9225.c | 12 +-
drivers/gpu/drm/tiny/ili9341.c | 6 +-
drivers/gpu/drm/tiny/ili9486.c | 6 +-
drivers/gpu/drm/tiny/mi0283qt.c | 6 +-
drivers/gpu/drm/tiny/panel-mipi-dbi.c | 6 +-
drivers/gpu/drm/tiny/repaper.c | 12 +-
drivers/gpu/drm/tiny/st7586.c | 12 +-
drivers/gpu/drm/tiny/st7735r.c | 6 +-
drivers/gpu/drm/tve200/Kconfig | 2 +-
drivers/gpu/drm/tve200/tve200_display.c | 12 +-
drivers/gpu/drm/tve200/tve200_drv.c | 8 +-
drivers/gpu/drm/v3d/v3d_drv.c | 2 +-
drivers/gpu/drm/v3d/v3d_gem.c | 4 +-
drivers/gpu/drm/vc4/Kconfig | 2 +-
drivers/gpu/drm/vc4/vc4_bo.c | 46 +--
drivers/gpu/drm/vc4/vc4_crtc.c | 10 +-
drivers/gpu/drm/vc4/vc4_drv.c | 8 +-
drivers/gpu/drm/vc4/vc4_drv.h | 18 +-
drivers/gpu/drm/vc4/vc4_gem.c | 12 +-
drivers/gpu/drm/vc4/vc4_irq.c | 2 +-
drivers/gpu/drm/vc4/vc4_plane.c | 14 +-
drivers/gpu/drm/vc4/vc4_render_cl.c | 40 +--
drivers/gpu/drm/vc4/vc4_txp.c | 8 +-
drivers/gpu/drm/vc4/vc4_v3d.c | 8 +-
drivers/gpu/drm/vc4/vc4_validate.c | 28 +-
drivers/gpu/drm/vc4/vc4_validate_shaders.c | 2 +-
drivers/gpu/drm/xlnx/Kconfig | 2 +-
drivers/gpu/drm/xlnx/zynqmp_disp.c | 4 +-
drivers/gpu/drm/xlnx/zynqmp_dpsub.c | 8 +-
...rm_fb_cma_helper.h => drm_fb_dma_helper.h} | 10 +-
include/drm/drm_gem.h | 2 +-
..._gem_cma_helper.h => drm_gem_dma_helper.h} | 158 ++++-----
147 files changed, 856 insertions(+), 858 deletions(-)
rename drivers/gpu/drm/{drm_fb_cma_helper.c => drm_fb_dma_helper.c} (60%)
rename drivers/gpu/drm/{drm_gem_cma_helper.c => drm_gem_dma_helper.c} (56%)
rename include/drm/{drm_fb_cma_helper.h => drm_fb_dma_helper.h} (56%)
rename include/drm/{drm_gem_cma_helper.h => drm_gem_dma_helper.h} (53%)
--
2.36.1
^ permalink raw reply [flat|nested] 12+ messages in thread* [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} 2022-07-06 12:43 [PATCH v2 0/4] drm: rename CMA helpers to DMA helpers Danilo Krummrich @ 2022-07-06 12:43 ` Danilo Krummrich 0 siblings, 0 replies; 12+ messages in thread From: Danilo Krummrich @ 2022-07-06 12:43 UTC (permalink / raw) To: daniel, laurent.pinchart, airlied, tzimmermann Cc: dri-devel, linux-kernel, Danilo Krummrich The field paddr of struct drm_gem_dma_object holds a DMA address, which might actually be a physical address. However, depending on the platform, it can also be a bus address or a virtual address managed by an IOMMU. Hence, rename the field to dma_addr, which is more applicable. Since 'paddr' is a very commonly used term and symbol name a simple regex does not do the trick. Instead, users of the struct were fixed up iteratively with a trial and error approach building with `make allyesconfig && make drivers/gpu/drm`. Signed-off-by: Danilo Krummrich <dakr@redhat.com> --- .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- drivers/gpu/drm/arm/malidp_mw.c | 2 +- drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- drivers/gpu/drm/tiny/arcpgu.c | 2 +- drivers/gpu/drm/vc4/vc4_bo.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- drivers/gpu/drm/vc4/vc4_irq.c | 2 +- drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ drivers/gpu/drm/vc4/vc4_txp.c | 2 +- drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- include/drm/drm_gem_dma_helper.h | 4 ++-- 21 files changed, 81 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c index f1b27db5dad5..df5da5a44755 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c @@ -137,7 +137,7 @@ komeda_fb_none_afbc_size_check(struct komeda_dev *mdev, struct komeda_fb *kfb, } min_size = komeda_fb_get_pixel_addr(kfb, 0, fb->height, i) - - to_drm_gem_dma_obj(obj)->paddr; + - to_drm_gem_dma_obj(obj)->dma_addr; if (obj->size < min_size) { DRM_DEBUG_KMS("The fb->obj[%d] size: 0x%zx lower than the minimum requirement: 0x%llx.\n", i, obj->size, min_size); @@ -260,7 +260,7 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) + plane_y * fb->pitches[plane]; } - return obj->paddr + offset; + return obj->dma_addr + offset; } /* if the fb can be supported by a specific layer */ diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c index 0fc6c5069e00..a9a5dc40dba6 100644 --- a/drivers/gpu/drm/arm/malidp_mw.c +++ b/drivers/gpu/drm/arm/malidp_mw.c @@ -168,7 +168,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, return -EINVAL; } mw_state->pitches[i] = fb->pitches[i]; - mw_state->addrs[i] = obj->paddr + fb->offsets[i]; + mw_state->addrs[i] = obj->dma_addr + fb->offsets[i]; } mw_state->n_planes = n_planes; diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 75be194d4f13..a0fd03c428ad 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -713,7 +713,7 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, struct malidp_plane *mp, int plane_index) { - dma_addr_t paddr; + dma_addr_t dma_addr; u16 ptr; struct drm_plane *plane = &mp->base; bool afbc = fb->modifier ? true : false; @@ -728,8 +728,8 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, * and _AD_CROP_V registers. */ if (!afbc) { - paddr = drm_fb_dma_get_gem_addr(fb, plane->state, - plane_index); + dma_addr = drm_fb_dma_get_gem_addr(fb, plane->state, + plane_index); } else { struct drm_gem_dma_object *obj; @@ -737,11 +737,11 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, if (WARN_ON(!obj)) return; - paddr = obj->paddr; + dma_addr = obj->dma_addr; } - malidp_hw_write(mp->hwdev, lower_32_bits(paddr), ptr); - malidp_hw_write(mp->hwdev, upper_32_bits(paddr), ptr + 4); + malidp_hw_write(mp->hwdev, lower_32_bits(dma_addr), ptr); + malidp_hw_write(mp->hwdev, upper_32_bits(dma_addr), ptr + 4); } static void malidp_de_set_plane_afbc(struct drm_plane *plane) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c index a6259b7d9c1f..a0cd3757f912 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c @@ -187,7 +187,7 @@ static void aspeed_gfx_pipe_update(struct drm_simple_display_pipe *pipe, gem = drm_fb_dma_get_gem_obj(fb, 0); if (!gem) return; - writel(gem->paddr, priv->base + CRT_ADDR); + writel(gem->dma_addr, priv->base + CRT_ADDR); } static int aspeed_gfx_enable_vblank(struct drm_simple_display_pipe *pipe) diff --git a/drivers/gpu/drm/drm_fb_dma_helper.c b/drivers/gpu/drm/drm_fb_dma_helper.c index b601073c22de..3b535ad1b07c 100644 --- a/drivers/gpu/drm/drm_fb_dma_helper.c +++ b/drivers/gpu/drm/drm_fb_dma_helper.c @@ -72,7 +72,7 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, unsigned int plane) { struct drm_gem_dma_object *obj; - dma_addr_t paddr; + dma_addr_t dma_addr; u8 h_div = 1, v_div = 1; u32 block_w = drm_format_info_block_width(fb->format, plane); u32 block_h = drm_format_info_block_height(fb->format, plane); @@ -86,7 +86,7 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, if (!obj) return 0; - paddr = obj->paddr + fb->offsets[plane]; + dma_addr = obj->dma_addr + fb->offsets[plane]; if (plane > 0) { h_div = fb->format->hsub; @@ -98,10 +98,10 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, block_start_y = (sample_y / block_h) * block_h; num_hblocks = sample_x / block_w; - paddr += fb->pitches[plane] * block_start_y; - paddr += block_size * num_hblocks; + dma_addr += fb->pitches[plane] * block_start_y; + dma_addr += block_size * num_hblocks; - return paddr; + return dma_addr; } EXPORT_SYMBOL_GPL(drm_fb_dma_get_gem_addr); diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c index 56fc1a1e7f87..8851d294bb53 100644 --- a/drivers/gpu/drm/drm_gem_dma_helper.c +++ b/drivers/gpu/drm/drm_gem_dma_helper.c @@ -135,11 +135,12 @@ struct drm_gem_dma_object *drm_gem_dma_create(struct drm_device *drm, if (dma_obj->map_noncoherent) { dma_obj->vaddr = dma_alloc_noncoherent(drm->dev, size, - &dma_obj->paddr, + &dma_obj->dma_addr, DMA_TO_DEVICE, GFP_KERNEL | __GFP_NOWARN); } else { - dma_obj->vaddr = dma_alloc_wc(drm->dev, size, &dma_obj->paddr, + dma_obj->vaddr = dma_alloc_wc(drm->dev, size, + &dma_obj->dma_addr, GFP_KERNEL | __GFP_NOWARN); } if (!dma_obj->vaddr) { @@ -221,11 +222,11 @@ void drm_gem_dma_free(struct drm_gem_dma_object *dma_obj) } else if (dma_obj->vaddr) { if (dma_obj->map_noncoherent) dma_free_noncoherent(gem_obj->dev->dev, dma_obj->base.size, - dma_obj->vaddr, dma_obj->paddr, + dma_obj->vaddr, dma_obj->dma_addr, DMA_TO_DEVICE); else dma_free_wc(gem_obj->dev->dev, dma_obj->base.size, - dma_obj->vaddr, dma_obj->paddr); + dma_obj->vaddr, dma_obj->dma_addr); } drm_gem_object_release(gem_obj); @@ -383,12 +384,12 @@ EXPORT_SYMBOL_GPL(drm_gem_dma_get_unmapped_area); * @p: DRM printer * @indent: Tab indentation level * - * This function prints paddr and vaddr for use in e.g. debugfs output. + * This function prints dma_addr and vaddr for use in e.g. debugfs output. */ void drm_gem_dma_print_info(const struct drm_gem_dma_object *dma_obj, struct drm_printer *p, unsigned int indent) { - drm_printf_indent(p, indent, "paddr=%pad\n", &dma_obj->paddr); + drm_printf_indent(p, indent, "dma_addr=%pad\n", &dma_obj->dma_addr); drm_printf_indent(p, indent, "vaddr=%p\n", dma_obj->vaddr); } EXPORT_SYMBOL(drm_gem_dma_print_info); @@ -415,7 +416,7 @@ struct sg_table *drm_gem_dma_get_sg_table(struct drm_gem_dma_object *dma_obj) return ERR_PTR(-ENOMEM); ret = dma_get_sgtable(obj->dev->dev, sgt, dma_obj->vaddr, - dma_obj->paddr, obj->size); + dma_obj->dma_addr, obj->size); if (ret < 0) goto out; @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, if (IS_ERR(dma_obj)) return ERR_CAST(dma_obj); - dma_obj->paddr = sg_dma_address(sgt->sgl); + dma_obj->dma_addr = sg_dma_address(sgt->sgl); dma_obj->sgt = sgt; - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, + attach->dmabuf->size); return &dma_obj->base; } @@ -526,7 +528,8 @@ int drm_gem_dma_mmap(struct drm_gem_dma_object *dma_obj, struct vm_area_struct * virt_to_page(dma_obj->vaddr)); } else { ret = dma_mmap_wc(dma_obj->base.dev->dev, vma, dma_obj->vaddr, - dma_obj->paddr, vma->vm_end - vma->vm_start); + dma_obj->dma_addr, + vma->vm_end - vma->vm_start); } if (ret) drm_gem_vm_close(vma); diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index bad63e2e11b3..7bbd4b8208fa 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -131,7 +131,7 @@ drm_plane_state_to_eba(struct drm_plane_state *state, int plane) dma_obj = drm_fb_dma_get_gem_obj(fb, plane); BUG_ON(!dma_obj); - return dma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y + + return dma_obj->dma_addr + fb->offsets[plane] + fb->pitches[plane] * y + fb->format->cpp[plane] * x; } @@ -150,7 +150,7 @@ drm_plane_state_to_ubo(struct drm_plane_state *state) x /= fb->format->hsub; y /= fb->format->vsub; - return dma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y + + return dma_obj->dma_addr + fb->offsets[1] + fb->pitches[1] * y + fb->format->cpp[1] * x - eba; } @@ -169,7 +169,7 @@ drm_plane_state_to_vbo(struct drm_plane_state *state) x /= fb->format->hsub; y /= fb->format->vsub; - return dma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y + + return dma_obj->dma_addr + fb->offsets[2] + fb->pitches[2] * y + fb->format->cpp[2] * x - eba; } diff --git a/drivers/gpu/drm/sprd/sprd_dpu.c b/drivers/gpu/drm/sprd/sprd_dpu.c index 5cbbf86dd509..a5700262b94e 100644 --- a/drivers/gpu/drm/sprd/sprd_dpu.c +++ b/drivers/gpu/drm/sprd/sprd_dpu.c @@ -340,7 +340,7 @@ static void sprd_dpu_layer(struct sprd_dpu *dpu, struct drm_plane_state *state) for (i = 0; i < fb->format->num_planes; i++) { dma_obj = drm_fb_dma_get_gem_obj(fb, i); - addr = dma_obj->paddr + fb->offsets[i]; + addr = dma_obj->dma_addr + fb->offsets[i]; if (i == 0) layer_reg_wr(ctx, REG_LAY_BASE_ADDR0, addr, index); diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 8de9a59198e3..0f93c3aec917 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -192,7 +192,7 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; struct drm_gem_dma_object *gem; - dma_addr_t paddr; + dma_addr_t dma_addr; u32 ch_base; int bpp; @@ -201,15 +201,15 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, /* Get the physical address of the buffer in memory */ gem = drm_fb_dma_get_gem_obj(fb, 0); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ bpp = fb->format->cpp[0]; - paddr = gem->paddr + fb->offsets[0]; + dma_addr = gem->dma_addr + fb->offsets[0]; /* Fixup framebuffer address for src coordinates */ - paddr += (state->src.x1 >> 16) * bpp; - paddr += (state->src.y1 >> 16) * fb->pitches[0]; + dma_addr += (state->src.x1 >> 16) * bpp; + dma_addr += (state->src.y1 >> 16) * fb->pitches[0]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); @@ -217,11 +217,11 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay), fb->pitches[0]); - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); return 0; } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index a0a2ee9f0a47..3df15d25c3df 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -309,7 +309,7 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, const struct drm_format_info *format = fb->format; struct drm_gem_dma_object *gem; u32 dx, dy, src_x, src_y; - dma_addr_t paddr; + dma_addr_t dma_addr; u32 ch_base; int i; @@ -323,10 +323,10 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, /* Get the physical address of the buffer in memory */ gem = drm_fb_dma_get_gem_obj(fb, i); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ - paddr = gem->paddr + fb->offsets[i]; + dma_addr = gem->dma_addr + fb->offsets[i]; dx = src_x; dy = src_y; @@ -337,8 +337,8 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, } /* Fixup framebuffer address for src coordinates */ - paddr += dx * format->cpp[i]; - paddr += dy * fb->pitches[i]; + dma_addr += dx * format->cpp[i]; + dma_addr += dy * fb->pitches[i]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n", @@ -349,12 +349,12 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, fb->pitches[i]); DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n", - i + 1, &paddr); + i + 1, &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base, overlay, i), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); } return 0; diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 962d37aeb2b1..98bbf00e3dbf 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1951,7 +1951,7 @@ int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane, } static -dma_addr_t dispc_plane_state_paddr(const struct drm_plane_state *state) +dma_addr_t dispc_plane_state_dma_addr(const struct drm_plane_state *state) { struct drm_framebuffer *fb = state->fb; struct drm_gem_dma_object *gem; @@ -1960,7 +1960,7 @@ dma_addr_t dispc_plane_state_paddr(const struct drm_plane_state *state) gem = drm_fb_dma_get_gem_obj(state->fb, 0); - return gem->paddr + fb->offsets[0] + x * fb->format->cpp[0] + + return gem->dma_addr + fb->offsets[0] + x * fb->format->cpp[0] + y * fb->pitches[0]; } @@ -1977,7 +1977,7 @@ dma_addr_t dispc_plane_state_p_uv_addr(const struct drm_plane_state *state) gem = drm_fb_dma_get_gem_obj(fb, 1); - return gem->paddr + fb->offsets[1] + + return gem->dma_addr + fb->offsets[1] + (x * fb->format->cpp[1] / fb->format->hsub) + (y * fb->pitches[1] / fb->format->vsub); } @@ -1990,17 +1990,17 @@ int dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane, u32 fourcc = state->fb->format->format; u16 cpp = state->fb->format->cpp[0]; u32 fb_width = state->fb->pitches[0] / cpp; - dma_addr_t paddr = dispc_plane_state_paddr(state); + dma_addr_t dma_addr = dispc_plane_state_dma_addr(state); struct dispc_scaling_params scale; dispc_vid_calc_scaling(dispc, state, &scale, lite); dispc_plane_set_pixel_format(dispc, hw_plane, fourcc); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_0, paddr & 0xffffffff); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_0, (u64)paddr >> 32); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_1, paddr & 0xffffffff); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_1, (u64)paddr >> 32); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_0, dma_addr & 0xffffffff); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_0, (u64)dma_addr >> 32); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_1, dma_addr & 0xffffffff); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_1, (u64)dma_addr >> 32); dispc_vid_write(dispc, hw_plane, DISPC_VID_PICTURE_SIZE, (scale.in_w - 1) | ((scale.in_h - 1) << 16)); diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c index e9ebd22bf0c2..98d829813c0a 100644 --- a/drivers/gpu/drm/tiny/arcpgu.c +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -225,7 +225,7 @@ static void arc_pgu_update(struct drm_simple_display_pipe *pipe, arcpgu = pipe_to_arcpgu_priv(pipe); gem = drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0); - arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->paddr); + arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->dma_addr); } static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs = { diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c index da22e1de35bc..cdbe6e7432ac 100644 --- a/drivers/gpu/drm/vc4/vc4_bo.c +++ b/drivers/gpu/drm/vc4/vc4_bo.c @@ -301,7 +301,7 @@ static void vc4_bo_purge(struct drm_gem_object *obj) drm_vma_node_unmap(&obj->vma_node, dev->anon_inode->i_mapping); - dma_free_wc(dev->dev, obj->size, bo->base.vaddr, bo->base.paddr); + dma_free_wc(dev->dev, obj->size, bo->base.vaddr, bo->base.dma_addr); bo->base.vaddr = NULL; bo->madv = __VC4_MADV_PURGED; } diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c index dbd375c89733..b7c85e47c4ed 100644 --- a/drivers/gpu/drm/vc4/vc4_gem.c +++ b/drivers/gpu/drm/vc4/vc4_gem.c @@ -126,7 +126,7 @@ vc4_get_hang_state_ioctl(struct drm_device *dev, void *data, goto err_delete_handle; } bo_state[i].handle = handle; - bo_state[i].paddr = vc4_bo->base.paddr; + bo_state[i].paddr = vc4_bo->base.dma_addr; bo_state[i].size = vc4_bo->base.base.size; } @@ -917,16 +917,16 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) list_add_tail(&to_vc4_bo(&exec->exec_bo->base)->unref_head, &exec->unref_list); - exec->ct0ca = exec->exec_bo->paddr + bin_offset; + exec->ct0ca = exec->exec_bo->dma_addr + bin_offset; exec->bin_u = bin; exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset; - exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset; + exec->shader_rec_p = exec->exec_bo->dma_addr + shader_rec_offset; exec->shader_rec_size = args->shader_rec_size; exec->uniforms_v = exec->exec_bo->vaddr + uniforms_offset; - exec->uniforms_p = exec->exec_bo->paddr + uniforms_offset; + exec->uniforms_p = exec->exec_bo->dma_addr + uniforms_offset; exec->uniforms_size = args->uniforms_size; ret = vc4_validate_bin_cl(dev, diff --git a/drivers/gpu/drm/vc4/vc4_irq.c b/drivers/gpu/drm/vc4/vc4_irq.c index 2eacfb6773d2..8cdc26b66259 100644 --- a/drivers/gpu/drm/vc4/vc4_irq.c +++ b/drivers/gpu/drm/vc4/vc4_irq.c @@ -105,7 +105,7 @@ vc4_overflow_mem_work(struct work_struct *work) } vc4->bin_alloc_overflow = BIT(bin_bo_slot); - V3D_WRITE(V3D_BPOA, bo->base.paddr + bin_bo_slot * vc4->bin_alloc_size); + V3D_WRITE(V3D_BPOA, bo->base.dma_addr + bin_bo_slot * vc4->bin_alloc_size); V3D_WRITE(V3D_BPOS, bo->base.base.size); V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM); V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM); diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index afb4547b48a8..8f2983a665d2 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -359,7 +359,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) return ret; for (i = 0; i < num_planes; i++) - vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; + vc4_state->offsets[i] = bo->dma_addr + fb->offsets[i]; /* We don't support subpixel source positioning for scaling. */ if ((state->src.x1 & subpixel_src_mask) || @@ -1221,7 +1221,7 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb) * because this is only called on the primary plane. */ WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0); - addr = bo->paddr + fb->offsets[0]; + addr = bo->dma_addr + fb->offsets[0]; /* Write the new address into the hardware immediately. The * scanout will start from this address as soon as the FIFO diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c index c8a92023238c..1bda5010f15a 100644 --- a/drivers/gpu/drm/vc4/vc4_render_cl.c +++ b/drivers/gpu/drm/vc4/vc4_render_cl.c @@ -101,7 +101,7 @@ static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec, struct drm_vc4_submit_rcl_surface *surf, uint8_t x, uint8_t y) { - return bo->paddr + surf->offset + VC4_TILE_BUFFER_SIZE * + return bo->dma_addr + surf->offset + VC4_TILE_BUFFER_SIZE * (DIV_ROUND_UP(exec->args->width, 32) * y + x); } @@ -142,7 +142,7 @@ static void emit_tile(struct vc4_exec_info *exec, } else { rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL); rcl_u16(setup, args->color_read.bits); - rcl_u32(setup, setup->color_read->paddr + + rcl_u32(setup, setup->color_read->dma_addr + args->color_read.offset); } } @@ -164,7 +164,7 @@ static void emit_tile(struct vc4_exec_info *exec, } else { rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL); rcl_u16(setup, args->zs_read.bits); - rcl_u32(setup, setup->zs_read->paddr + + rcl_u32(setup, setup->zs_read->dma_addr + args->zs_read.offset); } } @@ -232,7 +232,7 @@ static void emit_tile(struct vc4_exec_info *exec, (last_tile_write ? 0 : VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR)); rcl_u32(setup, - (setup->zs_write->paddr + args->zs_write.offset) | + (setup->zs_write->dma_addr + args->zs_write.offset) | ((last && last_tile_write) ? VC4_LOADSTORE_TILE_BUFFER_EOF : 0)); } @@ -355,7 +355,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG); rcl_u32(setup, - (setup->color_write ? (setup->color_write->paddr + + (setup->color_write ? (setup->color_write->dma_addr + args->color_write.offset) : 0)); rcl_u16(setup, args->width); @@ -374,8 +374,8 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, } BUG_ON(setup->next_offset != size); - exec->ct1ca = setup->rcl->paddr; - exec->ct1ea = setup->rcl->paddr + setup->next_offset; + exec->ct1ca = setup->rcl->dma_addr; + exec->ct1ea = setup->rcl->dma_addr + setup->next_offset; return 0; } diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c index 03d191d3b18c..4a26f722c2a2 100644 --- a/drivers/gpu/drm/vc4/vc4_txp.c +++ b/drivers/gpu/drm/vc4/vc4_txp.c @@ -312,7 +312,7 @@ static void vc4_txp_connector_atomic_commit(struct drm_connector *conn, ctrl |= TXP_ALPHA_INVERT; gem = drm_fb_dma_get_gem_obj(fb, 0); - TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]); + TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]); TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]); TXP_WRITE(TXP_DIM, VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) | diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index d42fea5c0e63..c6c7c4910e2d 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -268,8 +268,8 @@ static int bin_bo_alloc(struct vc4_dev *vc4) } /* Check if this BO won't trigger the addressing bug. */ - if ((bo->base.paddr & 0xf0000000) == - ((bo->base.paddr + bo->base.base.size - 1) & 0xf0000000)) { + if ((bo->base.dma_addr & 0xf0000000) == + ((bo->base.dma_addr + bo->base.base.size - 1) & 0xf0000000)) { vc4->bin_bo = bo; /* Set up for allocating 512KB chunks of diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index d5dc6b51ec69..520231af4df9 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -294,7 +294,7 @@ validate_indexed_prim_list(VALIDATE_ARGS) return -EINVAL; } - *(uint32_t *)(validated + 5) = ib->paddr + offset; + *(uint32_t *)(validated + 5) = ib->dma_addr + offset; return 0; } @@ -400,7 +400,7 @@ validate_tile_binning_config(VALIDATE_ARGS) * free when the job completes rendering. */ exec->bin_slots |= BIT(bin_slot); - bin_addr = vc4->bin_bo->base.paddr + bin_slot * vc4->bin_alloc_size; + bin_addr = vc4->bin_bo->base.dma_addr + bin_slot * vc4->bin_alloc_size; /* The tile state data array is 48 bytes per tile, and we put it at * the start of a BO containing both it and the tile alloc. @@ -608,7 +608,7 @@ reloc_tex(struct vc4_exec_info *exec, "outside of UBO\n"); goto fail; } - *validated_p0 = tex->paddr + p0; + *validated_p0 = tex->dma_addr + p0; return true; } @@ -736,7 +736,7 @@ reloc_tex(struct vc4_exec_info *exec, offset -= level_size; } - *validated_p0 = tex->paddr + p0; + *validated_p0 = tex->dma_addr + p0; if (is_cs) { exec->bin_dep_seqno = max(exec->bin_dep_seqno, @@ -840,7 +840,7 @@ validate_gl_shader_rec(struct drm_device *dev, void *uniform_data_u; uint32_t tex, uni; - *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset; + *(uint32_t *)(pkt_v + o) = bo[i]->dma_addr + src_offset; if (src_offset != 0) { DRM_DEBUG("Shaders must be at offset 0 of " @@ -928,7 +928,7 @@ validate_gl_shader_rec(struct drm_device *dev, } } - *(uint32_t *)(pkt_v + o) = vbo->paddr + offset; + *(uint32_t *)(pkt_v + o) = vbo->dma_addr + offset; } return 0; diff --git a/include/drm/drm_gem_dma_helper.h b/include/drm/drm_gem_dma_helper.h index 82805069b37a..8a043235dad8 100644 --- a/include/drm/drm_gem_dma_helper.h +++ b/include/drm/drm_gem_dma_helper.h @@ -11,7 +11,7 @@ struct drm_mode_create_dumb; /** * struct drm_gem_dma_object - GEM object backed by DMA memory allocations * @base: base GEM object - * @paddr: DMA address of the backing memory + * @dma_addr: DMA address of the backing memory * @sgt: scatter/gather table for imported PRIME buffers. The table can have * more than one entry but they are guaranteed to have contiguous * DMA addresses. @@ -20,7 +20,7 @@ struct drm_mode_create_dumb; */ struct drm_gem_dma_object { struct drm_gem_object base; - dma_addr_t paddr; + dma_addr_t dma_addr; struct sg_table *sgt; /* For objects with DMA memory allocated by GEM DMA */ -- 2.36.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} @ 2022-07-06 12:43 ` Danilo Krummrich 0 siblings, 0 replies; 12+ messages in thread From: Danilo Krummrich @ 2022-07-06 12:43 UTC (permalink / raw) To: daniel, laurent.pinchart, airlied, tzimmermann Cc: Danilo Krummrich, linux-kernel, dri-devel The field paddr of struct drm_gem_dma_object holds a DMA address, which might actually be a physical address. However, depending on the platform, it can also be a bus address or a virtual address managed by an IOMMU. Hence, rename the field to dma_addr, which is more applicable. Since 'paddr' is a very commonly used term and symbol name a simple regex does not do the trick. Instead, users of the struct were fixed up iteratively with a trial and error approach building with `make allyesconfig && make drivers/gpu/drm`. Signed-off-by: Danilo Krummrich <dakr@redhat.com> --- .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- drivers/gpu/drm/arm/malidp_mw.c | 2 +- drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- drivers/gpu/drm/tiny/arcpgu.c | 2 +- drivers/gpu/drm/vc4/vc4_bo.c | 2 +- drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- drivers/gpu/drm/vc4/vc4_irq.c | 2 +- drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ drivers/gpu/drm/vc4/vc4_txp.c | 2 +- drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- include/drm/drm_gem_dma_helper.h | 4 ++-- 21 files changed, 81 insertions(+), 78 deletions(-) diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c index f1b27db5dad5..df5da5a44755 100644 --- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c +++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c @@ -137,7 +137,7 @@ komeda_fb_none_afbc_size_check(struct komeda_dev *mdev, struct komeda_fb *kfb, } min_size = komeda_fb_get_pixel_addr(kfb, 0, fb->height, i) - - to_drm_gem_dma_obj(obj)->paddr; + - to_drm_gem_dma_obj(obj)->dma_addr; if (obj->size < min_size) { DRM_DEBUG_KMS("The fb->obj[%d] size: 0x%zx lower than the minimum requirement: 0x%llx.\n", i, obj->size, min_size); @@ -260,7 +260,7 @@ komeda_fb_get_pixel_addr(struct komeda_fb *kfb, int x, int y, int plane) + plane_y * fb->pitches[plane]; } - return obj->paddr + offset; + return obj->dma_addr + offset; } /* if the fb can be supported by a specific layer */ diff --git a/drivers/gpu/drm/arm/malidp_mw.c b/drivers/gpu/drm/arm/malidp_mw.c index 0fc6c5069e00..a9a5dc40dba6 100644 --- a/drivers/gpu/drm/arm/malidp_mw.c +++ b/drivers/gpu/drm/arm/malidp_mw.c @@ -168,7 +168,7 @@ malidp_mw_encoder_atomic_check(struct drm_encoder *encoder, return -EINVAL; } mw_state->pitches[i] = fb->pitches[i]; - mw_state->addrs[i] = obj->paddr + fb->offsets[i]; + mw_state->addrs[i] = obj->dma_addr + fb->offsets[i]; } mw_state->n_planes = n_planes; diff --git a/drivers/gpu/drm/arm/malidp_planes.c b/drivers/gpu/drm/arm/malidp_planes.c index 75be194d4f13..a0fd03c428ad 100644 --- a/drivers/gpu/drm/arm/malidp_planes.c +++ b/drivers/gpu/drm/arm/malidp_planes.c @@ -713,7 +713,7 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, struct malidp_plane *mp, int plane_index) { - dma_addr_t paddr; + dma_addr_t dma_addr; u16 ptr; struct drm_plane *plane = &mp->base; bool afbc = fb->modifier ? true : false; @@ -728,8 +728,8 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, * and _AD_CROP_V registers. */ if (!afbc) { - paddr = drm_fb_dma_get_gem_addr(fb, plane->state, - plane_index); + dma_addr = drm_fb_dma_get_gem_addr(fb, plane->state, + plane_index); } else { struct drm_gem_dma_object *obj; @@ -737,11 +737,11 @@ static void malidp_set_plane_base_addr(struct drm_framebuffer *fb, if (WARN_ON(!obj)) return; - paddr = obj->paddr; + dma_addr = obj->dma_addr; } - malidp_hw_write(mp->hwdev, lower_32_bits(paddr), ptr); - malidp_hw_write(mp->hwdev, upper_32_bits(paddr), ptr + 4); + malidp_hw_write(mp->hwdev, lower_32_bits(dma_addr), ptr); + malidp_hw_write(mp->hwdev, upper_32_bits(dma_addr), ptr + 4); } static void malidp_de_set_plane_afbc(struct drm_plane *plane) diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c index a6259b7d9c1f..a0cd3757f912 100644 --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c @@ -187,7 +187,7 @@ static void aspeed_gfx_pipe_update(struct drm_simple_display_pipe *pipe, gem = drm_fb_dma_get_gem_obj(fb, 0); if (!gem) return; - writel(gem->paddr, priv->base + CRT_ADDR); + writel(gem->dma_addr, priv->base + CRT_ADDR); } static int aspeed_gfx_enable_vblank(struct drm_simple_display_pipe *pipe) diff --git a/drivers/gpu/drm/drm_fb_dma_helper.c b/drivers/gpu/drm/drm_fb_dma_helper.c index b601073c22de..3b535ad1b07c 100644 --- a/drivers/gpu/drm/drm_fb_dma_helper.c +++ b/drivers/gpu/drm/drm_fb_dma_helper.c @@ -72,7 +72,7 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, unsigned int plane) { struct drm_gem_dma_object *obj; - dma_addr_t paddr; + dma_addr_t dma_addr; u8 h_div = 1, v_div = 1; u32 block_w = drm_format_info_block_width(fb->format, plane); u32 block_h = drm_format_info_block_height(fb->format, plane); @@ -86,7 +86,7 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, if (!obj) return 0; - paddr = obj->paddr + fb->offsets[plane]; + dma_addr = obj->dma_addr + fb->offsets[plane]; if (plane > 0) { h_div = fb->format->hsub; @@ -98,10 +98,10 @@ dma_addr_t drm_fb_dma_get_gem_addr(struct drm_framebuffer *fb, block_start_y = (sample_y / block_h) * block_h; num_hblocks = sample_x / block_w; - paddr += fb->pitches[plane] * block_start_y; - paddr += block_size * num_hblocks; + dma_addr += fb->pitches[plane] * block_start_y; + dma_addr += block_size * num_hblocks; - return paddr; + return dma_addr; } EXPORT_SYMBOL_GPL(drm_fb_dma_get_gem_addr); diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c index 56fc1a1e7f87..8851d294bb53 100644 --- a/drivers/gpu/drm/drm_gem_dma_helper.c +++ b/drivers/gpu/drm/drm_gem_dma_helper.c @@ -135,11 +135,12 @@ struct drm_gem_dma_object *drm_gem_dma_create(struct drm_device *drm, if (dma_obj->map_noncoherent) { dma_obj->vaddr = dma_alloc_noncoherent(drm->dev, size, - &dma_obj->paddr, + &dma_obj->dma_addr, DMA_TO_DEVICE, GFP_KERNEL | __GFP_NOWARN); } else { - dma_obj->vaddr = dma_alloc_wc(drm->dev, size, &dma_obj->paddr, + dma_obj->vaddr = dma_alloc_wc(drm->dev, size, + &dma_obj->dma_addr, GFP_KERNEL | __GFP_NOWARN); } if (!dma_obj->vaddr) { @@ -221,11 +222,11 @@ void drm_gem_dma_free(struct drm_gem_dma_object *dma_obj) } else if (dma_obj->vaddr) { if (dma_obj->map_noncoherent) dma_free_noncoherent(gem_obj->dev->dev, dma_obj->base.size, - dma_obj->vaddr, dma_obj->paddr, + dma_obj->vaddr, dma_obj->dma_addr, DMA_TO_DEVICE); else dma_free_wc(gem_obj->dev->dev, dma_obj->base.size, - dma_obj->vaddr, dma_obj->paddr); + dma_obj->vaddr, dma_obj->dma_addr); } drm_gem_object_release(gem_obj); @@ -383,12 +384,12 @@ EXPORT_SYMBOL_GPL(drm_gem_dma_get_unmapped_area); * @p: DRM printer * @indent: Tab indentation level * - * This function prints paddr and vaddr for use in e.g. debugfs output. + * This function prints dma_addr and vaddr for use in e.g. debugfs output. */ void drm_gem_dma_print_info(const struct drm_gem_dma_object *dma_obj, struct drm_printer *p, unsigned int indent) { - drm_printf_indent(p, indent, "paddr=%pad\n", &dma_obj->paddr); + drm_printf_indent(p, indent, "dma_addr=%pad\n", &dma_obj->dma_addr); drm_printf_indent(p, indent, "vaddr=%p\n", dma_obj->vaddr); } EXPORT_SYMBOL(drm_gem_dma_print_info); @@ -415,7 +416,7 @@ struct sg_table *drm_gem_dma_get_sg_table(struct drm_gem_dma_object *dma_obj) return ERR_PTR(-ENOMEM); ret = dma_get_sgtable(obj->dev->dev, sgt, dma_obj->vaddr, - dma_obj->paddr, obj->size); + dma_obj->dma_addr, obj->size); if (ret < 0) goto out; @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, if (IS_ERR(dma_obj)) return ERR_CAST(dma_obj); - dma_obj->paddr = sg_dma_address(sgt->sgl); + dma_obj->dma_addr = sg_dma_address(sgt->sgl); dma_obj->sgt = sgt; - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, + attach->dmabuf->size); return &dma_obj->base; } @@ -526,7 +528,8 @@ int drm_gem_dma_mmap(struct drm_gem_dma_object *dma_obj, struct vm_area_struct * virt_to_page(dma_obj->vaddr)); } else { ret = dma_mmap_wc(dma_obj->base.dev->dev, vma, dma_obj->vaddr, - dma_obj->paddr, vma->vm_end - vma->vm_start); + dma_obj->dma_addr, + vma->vm_end - vma->vm_start); } if (ret) drm_gem_vm_close(vma); diff --git a/drivers/gpu/drm/imx/ipuv3-plane.c b/drivers/gpu/drm/imx/ipuv3-plane.c index bad63e2e11b3..7bbd4b8208fa 100644 --- a/drivers/gpu/drm/imx/ipuv3-plane.c +++ b/drivers/gpu/drm/imx/ipuv3-plane.c @@ -131,7 +131,7 @@ drm_plane_state_to_eba(struct drm_plane_state *state, int plane) dma_obj = drm_fb_dma_get_gem_obj(fb, plane); BUG_ON(!dma_obj); - return dma_obj->paddr + fb->offsets[plane] + fb->pitches[plane] * y + + return dma_obj->dma_addr + fb->offsets[plane] + fb->pitches[plane] * y + fb->format->cpp[plane] * x; } @@ -150,7 +150,7 @@ drm_plane_state_to_ubo(struct drm_plane_state *state) x /= fb->format->hsub; y /= fb->format->vsub; - return dma_obj->paddr + fb->offsets[1] + fb->pitches[1] * y + + return dma_obj->dma_addr + fb->offsets[1] + fb->pitches[1] * y + fb->format->cpp[1] * x - eba; } @@ -169,7 +169,7 @@ drm_plane_state_to_vbo(struct drm_plane_state *state) x /= fb->format->hsub; y /= fb->format->vsub; - return dma_obj->paddr + fb->offsets[2] + fb->pitches[2] * y + + return dma_obj->dma_addr + fb->offsets[2] + fb->pitches[2] * y + fb->format->cpp[2] * x - eba; } diff --git a/drivers/gpu/drm/sprd/sprd_dpu.c b/drivers/gpu/drm/sprd/sprd_dpu.c index 5cbbf86dd509..a5700262b94e 100644 --- a/drivers/gpu/drm/sprd/sprd_dpu.c +++ b/drivers/gpu/drm/sprd/sprd_dpu.c @@ -340,7 +340,7 @@ static void sprd_dpu_layer(struct sprd_dpu *dpu, struct drm_plane_state *state) for (i = 0; i < fb->format->num_planes; i++) { dma_obj = drm_fb_dma_get_gem_obj(fb, i); - addr = dma_obj->paddr + fb->offsets[i]; + addr = dma_obj->dma_addr + fb->offsets[i]; if (i == 0) layer_reg_wr(ctx, REG_LAY_BASE_ADDR0, addr, index); diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c index 8de9a59198e3..0f93c3aec917 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -192,7 +192,7 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, struct drm_plane_state *state = plane->state; struct drm_framebuffer *fb = state->fb; struct drm_gem_dma_object *gem; - dma_addr_t paddr; + dma_addr_t dma_addr; u32 ch_base; int bpp; @@ -201,15 +201,15 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, /* Get the physical address of the buffer in memory */ gem = drm_fb_dma_get_gem_obj(fb, 0); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ bpp = fb->format->cpp[0]; - paddr = gem->paddr + fb->offsets[0]; + dma_addr = gem->dma_addr + fb->offsets[0]; /* Fixup framebuffer address for src coordinates */ - paddr += (state->src.x1 >> 16) * bpp; - paddr += (state->src.y1 >> 16) * fb->pitches[0]; + dma_addr += (state->src.x1 >> 16) * bpp; + dma_addr += (state->src.y1 >> 16) * fb->pitches[0]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer line width: %d bytes\n", fb->pitches[0]); @@ -217,11 +217,11 @@ static int sun8i_ui_layer_update_buffer(struct sun8i_mixer *mixer, int channel, SUN8I_MIXER_CHAN_UI_LAYER_PITCH(ch_base, overlay), fb->pitches[0]); - DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &paddr); + DRM_DEBUG_DRIVER("Setting buffer address to %pad\n", &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(ch_base, overlay), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); return 0; } diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c index a0a2ee9f0a47..3df15d25c3df 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -309,7 +309,7 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, const struct drm_format_info *format = fb->format; struct drm_gem_dma_object *gem; u32 dx, dy, src_x, src_y; - dma_addr_t paddr; + dma_addr_t dma_addr; u32 ch_base; int i; @@ -323,10 +323,10 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, /* Get the physical address of the buffer in memory */ gem = drm_fb_dma_get_gem_obj(fb, i); - DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->paddr); + DRM_DEBUG_DRIVER("Using GEM @ %pad\n", &gem->dma_addr); /* Compute the start of the displayed memory */ - paddr = gem->paddr + fb->offsets[i]; + dma_addr = gem->dma_addr + fb->offsets[i]; dx = src_x; dy = src_y; @@ -337,8 +337,8 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, } /* Fixup framebuffer address for src coordinates */ - paddr += dx * format->cpp[i]; - paddr += dy * fb->pitches[i]; + dma_addr += dx * format->cpp[i]; + dma_addr += dy * fb->pitches[i]; /* Set the line width */ DRM_DEBUG_DRIVER("Layer %d. line width: %d bytes\n", @@ -349,12 +349,12 @@ static int sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, fb->pitches[i]); DRM_DEBUG_DRIVER("Setting %d. buffer address to %pad\n", - i + 1, &paddr); + i + 1, &dma_addr); regmap_write(mixer->engine.regs, SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(ch_base, overlay, i), - lower_32_bits(paddr)); + lower_32_bits(dma_addr)); } return 0; diff --git a/drivers/gpu/drm/tidss/tidss_dispc.c b/drivers/gpu/drm/tidss/tidss_dispc.c index 962d37aeb2b1..98bbf00e3dbf 100644 --- a/drivers/gpu/drm/tidss/tidss_dispc.c +++ b/drivers/gpu/drm/tidss/tidss_dispc.c @@ -1951,7 +1951,7 @@ int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane, } static -dma_addr_t dispc_plane_state_paddr(const struct drm_plane_state *state) +dma_addr_t dispc_plane_state_dma_addr(const struct drm_plane_state *state) { struct drm_framebuffer *fb = state->fb; struct drm_gem_dma_object *gem; @@ -1960,7 +1960,7 @@ dma_addr_t dispc_plane_state_paddr(const struct drm_plane_state *state) gem = drm_fb_dma_get_gem_obj(state->fb, 0); - return gem->paddr + fb->offsets[0] + x * fb->format->cpp[0] + + return gem->dma_addr + fb->offsets[0] + x * fb->format->cpp[0] + y * fb->pitches[0]; } @@ -1977,7 +1977,7 @@ dma_addr_t dispc_plane_state_p_uv_addr(const struct drm_plane_state *state) gem = drm_fb_dma_get_gem_obj(fb, 1); - return gem->paddr + fb->offsets[1] + + return gem->dma_addr + fb->offsets[1] + (x * fb->format->cpp[1] / fb->format->hsub) + (y * fb->pitches[1] / fb->format->vsub); } @@ -1990,17 +1990,17 @@ int dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane, u32 fourcc = state->fb->format->format; u16 cpp = state->fb->format->cpp[0]; u32 fb_width = state->fb->pitches[0] / cpp; - dma_addr_t paddr = dispc_plane_state_paddr(state); + dma_addr_t dma_addr = dispc_plane_state_dma_addr(state); struct dispc_scaling_params scale; dispc_vid_calc_scaling(dispc, state, &scale, lite); dispc_plane_set_pixel_format(dispc, hw_plane, fourcc); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_0, paddr & 0xffffffff); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_0, (u64)paddr >> 32); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_1, paddr & 0xffffffff); - dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_1, (u64)paddr >> 32); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_0, dma_addr & 0xffffffff); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_0, (u64)dma_addr >> 32); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_1, dma_addr & 0xffffffff); + dispc_vid_write(dispc, hw_plane, DISPC_VID_BA_EXT_1, (u64)dma_addr >> 32); dispc_vid_write(dispc, hw_plane, DISPC_VID_PICTURE_SIZE, (scale.in_w - 1) | ((scale.in_h - 1) << 16)); diff --git a/drivers/gpu/drm/tiny/arcpgu.c b/drivers/gpu/drm/tiny/arcpgu.c index e9ebd22bf0c2..98d829813c0a 100644 --- a/drivers/gpu/drm/tiny/arcpgu.c +++ b/drivers/gpu/drm/tiny/arcpgu.c @@ -225,7 +225,7 @@ static void arc_pgu_update(struct drm_simple_display_pipe *pipe, arcpgu = pipe_to_arcpgu_priv(pipe); gem = drm_fb_dma_get_gem_obj(pipe->plane.state->fb, 0); - arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->paddr); + arc_pgu_write(arcpgu, ARCPGU_REG_BUF0_ADDR, gem->dma_addr); } static const struct drm_simple_display_pipe_funcs arc_pgu_pipe_funcs = { diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4/vc4_bo.c index da22e1de35bc..cdbe6e7432ac 100644 --- a/drivers/gpu/drm/vc4/vc4_bo.c +++ b/drivers/gpu/drm/vc4/vc4_bo.c @@ -301,7 +301,7 @@ static void vc4_bo_purge(struct drm_gem_object *obj) drm_vma_node_unmap(&obj->vma_node, dev->anon_inode->i_mapping); - dma_free_wc(dev->dev, obj->size, bo->base.vaddr, bo->base.paddr); + dma_free_wc(dev->dev, obj->size, bo->base.vaddr, bo->base.dma_addr); bo->base.vaddr = NULL; bo->madv = __VC4_MADV_PURGED; } diff --git a/drivers/gpu/drm/vc4/vc4_gem.c b/drivers/gpu/drm/vc4/vc4_gem.c index dbd375c89733..b7c85e47c4ed 100644 --- a/drivers/gpu/drm/vc4/vc4_gem.c +++ b/drivers/gpu/drm/vc4/vc4_gem.c @@ -126,7 +126,7 @@ vc4_get_hang_state_ioctl(struct drm_device *dev, void *data, goto err_delete_handle; } bo_state[i].handle = handle; - bo_state[i].paddr = vc4_bo->base.paddr; + bo_state[i].paddr = vc4_bo->base.dma_addr; bo_state[i].size = vc4_bo->base.base.size; } @@ -917,16 +917,16 @@ vc4_get_bcl(struct drm_device *dev, struct vc4_exec_info *exec) list_add_tail(&to_vc4_bo(&exec->exec_bo->base)->unref_head, &exec->unref_list); - exec->ct0ca = exec->exec_bo->paddr + bin_offset; + exec->ct0ca = exec->exec_bo->dma_addr + bin_offset; exec->bin_u = bin; exec->shader_rec_v = exec->exec_bo->vaddr + shader_rec_offset; - exec->shader_rec_p = exec->exec_bo->paddr + shader_rec_offset; + exec->shader_rec_p = exec->exec_bo->dma_addr + shader_rec_offset; exec->shader_rec_size = args->shader_rec_size; exec->uniforms_v = exec->exec_bo->vaddr + uniforms_offset; - exec->uniforms_p = exec->exec_bo->paddr + uniforms_offset; + exec->uniforms_p = exec->exec_bo->dma_addr + uniforms_offset; exec->uniforms_size = args->uniforms_size; ret = vc4_validate_bin_cl(dev, diff --git a/drivers/gpu/drm/vc4/vc4_irq.c b/drivers/gpu/drm/vc4/vc4_irq.c index 2eacfb6773d2..8cdc26b66259 100644 --- a/drivers/gpu/drm/vc4/vc4_irq.c +++ b/drivers/gpu/drm/vc4/vc4_irq.c @@ -105,7 +105,7 @@ vc4_overflow_mem_work(struct work_struct *work) } vc4->bin_alloc_overflow = BIT(bin_bo_slot); - V3D_WRITE(V3D_BPOA, bo->base.paddr + bin_bo_slot * vc4->bin_alloc_size); + V3D_WRITE(V3D_BPOA, bo->base.dma_addr + bin_bo_slot * vc4->bin_alloc_size); V3D_WRITE(V3D_BPOS, bo->base.base.size); V3D_WRITE(V3D_INTCTL, V3D_INT_OUTOMEM); V3D_WRITE(V3D_INTENA, V3D_INT_OUTOMEM); diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c index afb4547b48a8..8f2983a665d2 100644 --- a/drivers/gpu/drm/vc4/vc4_plane.c +++ b/drivers/gpu/drm/vc4/vc4_plane.c @@ -359,7 +359,7 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state) return ret; for (i = 0; i < num_planes; i++) - vc4_state->offsets[i] = bo->paddr + fb->offsets[i]; + vc4_state->offsets[i] = bo->dma_addr + fb->offsets[i]; /* We don't support subpixel source positioning for scaling. */ if ((state->src.x1 & subpixel_src_mask) || @@ -1221,7 +1221,7 @@ void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb) * because this is only called on the primary plane. */ WARN_ON_ONCE(plane->state->crtc_x < 0 || plane->state->crtc_y < 0); - addr = bo->paddr + fb->offsets[0]; + addr = bo->dma_addr + fb->offsets[0]; /* Write the new address into the hardware immediately. The * scanout will start from this address as soon as the FIFO diff --git a/drivers/gpu/drm/vc4/vc4_render_cl.c b/drivers/gpu/drm/vc4/vc4_render_cl.c index c8a92023238c..1bda5010f15a 100644 --- a/drivers/gpu/drm/vc4/vc4_render_cl.c +++ b/drivers/gpu/drm/vc4/vc4_render_cl.c @@ -101,7 +101,7 @@ static uint32_t vc4_full_res_offset(struct vc4_exec_info *exec, struct drm_vc4_submit_rcl_surface *surf, uint8_t x, uint8_t y) { - return bo->paddr + surf->offset + VC4_TILE_BUFFER_SIZE * + return bo->dma_addr + surf->offset + VC4_TILE_BUFFER_SIZE * (DIV_ROUND_UP(exec->args->width, 32) * y + x); } @@ -142,7 +142,7 @@ static void emit_tile(struct vc4_exec_info *exec, } else { rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL); rcl_u16(setup, args->color_read.bits); - rcl_u32(setup, setup->color_read->paddr + + rcl_u32(setup, setup->color_read->dma_addr + args->color_read.offset); } } @@ -164,7 +164,7 @@ static void emit_tile(struct vc4_exec_info *exec, } else { rcl_u8(setup, VC4_PACKET_LOAD_TILE_BUFFER_GENERAL); rcl_u16(setup, args->zs_read.bits); - rcl_u32(setup, setup->zs_read->paddr + + rcl_u32(setup, setup->zs_read->dma_addr + args->zs_read.offset); } } @@ -232,7 +232,7 @@ static void emit_tile(struct vc4_exec_info *exec, (last_tile_write ? 0 : VC4_STORE_TILE_BUFFER_DISABLE_COLOR_CLEAR)); rcl_u32(setup, - (setup->zs_write->paddr + args->zs_write.offset) | + (setup->zs_write->dma_addr + args->zs_write.offset) | ((last && last_tile_write) ? VC4_LOADSTORE_TILE_BUFFER_EOF : 0)); } @@ -355,7 +355,7 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, rcl_u8(setup, VC4_PACKET_TILE_RENDERING_MODE_CONFIG); rcl_u32(setup, - (setup->color_write ? (setup->color_write->paddr + + (setup->color_write ? (setup->color_write->dma_addr + args->color_write.offset) : 0)); rcl_u16(setup, args->width); @@ -374,8 +374,8 @@ static int vc4_create_rcl_bo(struct drm_device *dev, struct vc4_exec_info *exec, } BUG_ON(setup->next_offset != size); - exec->ct1ca = setup->rcl->paddr; - exec->ct1ea = setup->rcl->paddr + setup->next_offset; + exec->ct1ca = setup->rcl->dma_addr; + exec->ct1ea = setup->rcl->dma_addr + setup->next_offset; return 0; } diff --git a/drivers/gpu/drm/vc4/vc4_txp.c b/drivers/gpu/drm/vc4/vc4_txp.c index 03d191d3b18c..4a26f722c2a2 100644 --- a/drivers/gpu/drm/vc4/vc4_txp.c +++ b/drivers/gpu/drm/vc4/vc4_txp.c @@ -312,7 +312,7 @@ static void vc4_txp_connector_atomic_commit(struct drm_connector *conn, ctrl |= TXP_ALPHA_INVERT; gem = drm_fb_dma_get_gem_obj(fb, 0); - TXP_WRITE(TXP_DST_PTR, gem->paddr + fb->offsets[0]); + TXP_WRITE(TXP_DST_PTR, gem->dma_addr + fb->offsets[0]); TXP_WRITE(TXP_DST_PITCH, fb->pitches[0]); TXP_WRITE(TXP_DIM, VC4_SET_FIELD(mode->hdisplay, TXP_WIDTH) | diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index d42fea5c0e63..c6c7c4910e2d 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -268,8 +268,8 @@ static int bin_bo_alloc(struct vc4_dev *vc4) } /* Check if this BO won't trigger the addressing bug. */ - if ((bo->base.paddr & 0xf0000000) == - ((bo->base.paddr + bo->base.base.size - 1) & 0xf0000000)) { + if ((bo->base.dma_addr & 0xf0000000) == + ((bo->base.dma_addr + bo->base.base.size - 1) & 0xf0000000)) { vc4->bin_bo = bo; /* Set up for allocating 512KB chunks of diff --git a/drivers/gpu/drm/vc4/vc4_validate.c b/drivers/gpu/drm/vc4/vc4_validate.c index d5dc6b51ec69..520231af4df9 100644 --- a/drivers/gpu/drm/vc4/vc4_validate.c +++ b/drivers/gpu/drm/vc4/vc4_validate.c @@ -294,7 +294,7 @@ validate_indexed_prim_list(VALIDATE_ARGS) return -EINVAL; } - *(uint32_t *)(validated + 5) = ib->paddr + offset; + *(uint32_t *)(validated + 5) = ib->dma_addr + offset; return 0; } @@ -400,7 +400,7 @@ validate_tile_binning_config(VALIDATE_ARGS) * free when the job completes rendering. */ exec->bin_slots |= BIT(bin_slot); - bin_addr = vc4->bin_bo->base.paddr + bin_slot * vc4->bin_alloc_size; + bin_addr = vc4->bin_bo->base.dma_addr + bin_slot * vc4->bin_alloc_size; /* The tile state data array is 48 bytes per tile, and we put it at * the start of a BO containing both it and the tile alloc. @@ -608,7 +608,7 @@ reloc_tex(struct vc4_exec_info *exec, "outside of UBO\n"); goto fail; } - *validated_p0 = tex->paddr + p0; + *validated_p0 = tex->dma_addr + p0; return true; } @@ -736,7 +736,7 @@ reloc_tex(struct vc4_exec_info *exec, offset -= level_size; } - *validated_p0 = tex->paddr + p0; + *validated_p0 = tex->dma_addr + p0; if (is_cs) { exec->bin_dep_seqno = max(exec->bin_dep_seqno, @@ -840,7 +840,7 @@ validate_gl_shader_rec(struct drm_device *dev, void *uniform_data_u; uint32_t tex, uni; - *(uint32_t *)(pkt_v + o) = bo[i]->paddr + src_offset; + *(uint32_t *)(pkt_v + o) = bo[i]->dma_addr + src_offset; if (src_offset != 0) { DRM_DEBUG("Shaders must be at offset 0 of " @@ -928,7 +928,7 @@ validate_gl_shader_rec(struct drm_device *dev, } } - *(uint32_t *)(pkt_v + o) = vbo->paddr + offset; + *(uint32_t *)(pkt_v + o) = vbo->dma_addr + offset; } return 0; diff --git a/include/drm/drm_gem_dma_helper.h b/include/drm/drm_gem_dma_helper.h index 82805069b37a..8a043235dad8 100644 --- a/include/drm/drm_gem_dma_helper.h +++ b/include/drm/drm_gem_dma_helper.h @@ -11,7 +11,7 @@ struct drm_mode_create_dumb; /** * struct drm_gem_dma_object - GEM object backed by DMA memory allocations * @base: base GEM object - * @paddr: DMA address of the backing memory + * @dma_addr: DMA address of the backing memory * @sgt: scatter/gather table for imported PRIME buffers. The table can have * more than one entry but they are guaranteed to have contiguous * DMA addresses. @@ -20,7 +20,7 @@ struct drm_mode_create_dumb; */ struct drm_gem_dma_object { struct drm_gem_object base; - dma_addr_t paddr; + dma_addr_t dma_addr; struct sg_table *sgt; /* For objects with DMA memory allocated by GEM DMA */ -- 2.36.1 ^ permalink raw reply related [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} 2022-07-06 12:43 ` Danilo Krummrich @ 2022-07-06 17:28 ` Laurent Pinchart -1 siblings, 0 replies; 12+ messages in thread From: Laurent Pinchart @ 2022-07-06 17:28 UTC (permalink / raw) To: Danilo Krummrich; +Cc: daniel, airlied, tzimmermann, dri-devel, linux-kernel Hi Danilo, Thank you for the patch. On Wed, Jul 06, 2022 at 02:43:51PM +0200, Danilo Krummrich wrote: > The field paddr of struct drm_gem_dma_object holds a DMA address, which > might actually be a physical address. However, depending on the platform, > it can also be a bus address or a virtual address managed by an IOMMU. > > Hence, rename the field to dma_addr, which is more applicable. > > Since 'paddr' is a very commonly used term and symbol name a simple regex > does not do the trick. Instead, users of the struct were fixed up > iteratively with a trial and error approach building with > `make allyesconfig && make drivers/gpu/drm`. Not for this patch as you've already done the work manually, but can I recommend the excellent coccinelle tool ? Its semantic patches can very easily rename structure members. > Signed-off-by: Danilo Krummrich <dakr@redhat.com> > --- > .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- > drivers/gpu/drm/arm/malidp_mw.c | 2 +- > drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- > drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- > drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- > drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- > drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- > drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- > drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ > drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ > drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- > drivers/gpu/drm/tiny/arcpgu.c | 2 +- > drivers/gpu/drm/vc4/vc4_bo.c | 2 +- > drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- > drivers/gpu/drm/vc4/vc4_irq.c | 2 +- > drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- > drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ > drivers/gpu/drm/vc4/vc4_txp.c | 2 +- > drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- > drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- > include/drm/drm_gem_dma_helper.h | 4 ++-- > 21 files changed, 81 insertions(+), 78 deletions(-) [snip] > diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c > index 56fc1a1e7f87..8851d294bb53 100644 > --- a/drivers/gpu/drm/drm_gem_dma_helper.c > +++ b/drivers/gpu/drm/drm_gem_dma_helper.c [snip] > @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, > if (IS_ERR(dma_obj)) > return ERR_CAST(dma_obj); > > - dma_obj->paddr = sg_dma_address(sgt->sgl); > + dma_obj->dma_addr = sg_dma_address(sgt->sgl); > dma_obj->sgt = sgt; > > - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); > + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, > + attach->dmabuf->size); The second line should be aligned left, just right of the opening parenthesis. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > return &dma_obj->base; > } [snip] -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} @ 2022-07-06 17:28 ` Laurent Pinchart 0 siblings, 0 replies; 12+ messages in thread From: Laurent Pinchart @ 2022-07-06 17:28 UTC (permalink / raw) To: Danilo Krummrich; +Cc: airlied, dri-devel, tzimmermann, linux-kernel Hi Danilo, Thank you for the patch. On Wed, Jul 06, 2022 at 02:43:51PM +0200, Danilo Krummrich wrote: > The field paddr of struct drm_gem_dma_object holds a DMA address, which > might actually be a physical address. However, depending on the platform, > it can also be a bus address or a virtual address managed by an IOMMU. > > Hence, rename the field to dma_addr, which is more applicable. > > Since 'paddr' is a very commonly used term and symbol name a simple regex > does not do the trick. Instead, users of the struct were fixed up > iteratively with a trial and error approach building with > `make allyesconfig && make drivers/gpu/drm`. Not for this patch as you've already done the work manually, but can I recommend the excellent coccinelle tool ? Its semantic patches can very easily rename structure members. > Signed-off-by: Danilo Krummrich <dakr@redhat.com> > --- > .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- > drivers/gpu/drm/arm/malidp_mw.c | 2 +- > drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- > drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- > drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- > drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- > drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- > drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- > drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ > drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ > drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- > drivers/gpu/drm/tiny/arcpgu.c | 2 +- > drivers/gpu/drm/vc4/vc4_bo.c | 2 +- > drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- > drivers/gpu/drm/vc4/vc4_irq.c | 2 +- > drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- > drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ > drivers/gpu/drm/vc4/vc4_txp.c | 2 +- > drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- > drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- > include/drm/drm_gem_dma_helper.h | 4 ++-- > 21 files changed, 81 insertions(+), 78 deletions(-) [snip] > diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c > index 56fc1a1e7f87..8851d294bb53 100644 > --- a/drivers/gpu/drm/drm_gem_dma_helper.c > +++ b/drivers/gpu/drm/drm_gem_dma_helper.c [snip] > @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, > if (IS_ERR(dma_obj)) > return ERR_CAST(dma_obj); > > - dma_obj->paddr = sg_dma_address(sgt->sgl); > + dma_obj->dma_addr = sg_dma_address(sgt->sgl); > dma_obj->sgt = sgt; > > - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); > + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, > + attach->dmabuf->size); The second line should be aligned left, just right of the opening parenthesis. Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > > return &dma_obj->base; > } [snip] -- Regards, Laurent Pinchart ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} 2022-07-06 17:28 ` Laurent Pinchart @ 2022-07-07 10:00 ` Danilo Krummrich -1 siblings, 0 replies; 12+ messages in thread From: Danilo Krummrich @ 2022-07-07 10:00 UTC (permalink / raw) To: Laurent Pinchart; +Cc: daniel, airlied, tzimmermann, dri-devel, linux-kernel Hi Laurent, On 7/6/22 19:28, Laurent Pinchart wrote: > Hi Danilo, > > Thank you for the patch. > > On Wed, Jul 06, 2022 at 02:43:51PM +0200, Danilo Krummrich wrote: >> The field paddr of struct drm_gem_dma_object holds a DMA address, which >> might actually be a physical address. However, depending on the platform, >> it can also be a bus address or a virtual address managed by an IOMMU. >> >> Hence, rename the field to dma_addr, which is more applicable. >> >> Since 'paddr' is a very commonly used term and symbol name a simple regex >> does not do the trick. Instead, users of the struct were fixed up >> iteratively with a trial and error approach building with >> `make allyesconfig && make drivers/gpu/drm`. > > Not for this patch as you've already done the work manually, but can I > recommend the excellent coccinelle tool ? Its semantic patches can very > easily rename structure members. Actually, I should have and I will. It seems like there are a few drivers I missed with that - the ones not using CONFIG_COMPILE_TEST. Additionally, I will also test cross-compiling for ARM and ARM64. - Danilo > >> Signed-off-by: Danilo Krummrich <dakr@redhat.com> >> --- >> .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- >> drivers/gpu/drm/arm/malidp_mw.c | 2 +- >> drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- >> drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- >> drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- >> drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- >> drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- >> drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- >> drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ >> drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ >> drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- >> drivers/gpu/drm/tiny/arcpgu.c | 2 +- >> drivers/gpu/drm/vc4/vc4_bo.c | 2 +- >> drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- >> drivers/gpu/drm/vc4/vc4_irq.c | 2 +- >> drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- >> drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ >> drivers/gpu/drm/vc4/vc4_txp.c | 2 +- >> drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- >> drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- >> include/drm/drm_gem_dma_helper.h | 4 ++-- >> 21 files changed, 81 insertions(+), 78 deletions(-) > > [snip] > >> diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c >> index 56fc1a1e7f87..8851d294bb53 100644 >> --- a/drivers/gpu/drm/drm_gem_dma_helper.c >> +++ b/drivers/gpu/drm/drm_gem_dma_helper.c > > [snip] > >> @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, >> if (IS_ERR(dma_obj)) >> return ERR_CAST(dma_obj); >> >> - dma_obj->paddr = sg_dma_address(sgt->sgl); >> + dma_obj->dma_addr = sg_dma_address(sgt->sgl); >> dma_obj->sgt = sgt; >> >> - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); >> + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, >> + attach->dmabuf->size); > > The second line should be aligned left, just right of the opening > parenthesis. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > >> >> return &dma_obj->base; >> } > > [snip] > ^ permalink raw reply [flat|nested] 12+ messages in thread
* Re: [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} @ 2022-07-07 10:00 ` Danilo Krummrich 0 siblings, 0 replies; 12+ messages in thread From: Danilo Krummrich @ 2022-07-07 10:00 UTC (permalink / raw) To: Laurent Pinchart; +Cc: airlied, dri-devel, tzimmermann, linux-kernel Hi Laurent, On 7/6/22 19:28, Laurent Pinchart wrote: > Hi Danilo, > > Thank you for the patch. > > On Wed, Jul 06, 2022 at 02:43:51PM +0200, Danilo Krummrich wrote: >> The field paddr of struct drm_gem_dma_object holds a DMA address, which >> might actually be a physical address. However, depending on the platform, >> it can also be a bus address or a virtual address managed by an IOMMU. >> >> Hence, rename the field to dma_addr, which is more applicable. >> >> Since 'paddr' is a very commonly used term and symbol name a simple regex >> does not do the trick. Instead, users of the struct were fixed up >> iteratively with a trial and error approach building with >> `make allyesconfig && make drivers/gpu/drm`. > > Not for this patch as you've already done the work manually, but can I > recommend the excellent coccinelle tool ? Its semantic patches can very > easily rename structure members. Actually, I should have and I will. It seems like there are a few drivers I missed with that - the ones not using CONFIG_COMPILE_TEST. Additionally, I will also test cross-compiling for ARM and ARM64. - Danilo > >> Signed-off-by: Danilo Krummrich <dakr@redhat.com> >> --- >> .../arm/display/komeda/komeda_framebuffer.c | 4 ++-- >> drivers/gpu/drm/arm/malidp_mw.c | 2 +- >> drivers/gpu/drm/arm/malidp_planes.c | 12 +++++----- >> drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 2 +- >> drivers/gpu/drm/drm_fb_dma_helper.c | 10 ++++---- >> drivers/gpu/drm/drm_gem_dma_helper.c | 23 +++++++++++-------- >> drivers/gpu/drm/imx/ipuv3-plane.c | 6 ++--- >> drivers/gpu/drm/sprd/sprd_dpu.c | 2 +- >> drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 14 +++++------ >> drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 14 +++++------ >> drivers/gpu/drm/tidss/tidss_dispc.c | 16 ++++++------- >> drivers/gpu/drm/tiny/arcpgu.c | 2 +- >> drivers/gpu/drm/vc4/vc4_bo.c | 2 +- >> drivers/gpu/drm/vc4/vc4_gem.c | 8 +++---- >> drivers/gpu/drm/vc4/vc4_irq.c | 2 +- >> drivers/gpu/drm/vc4/vc4_plane.c | 4 ++-- >> drivers/gpu/drm/vc4/vc4_render_cl.c | 14 +++++------ >> drivers/gpu/drm/vc4/vc4_txp.c | 2 +- >> drivers/gpu/drm/vc4/vc4_v3d.c | 4 ++-- >> drivers/gpu/drm/vc4/vc4_validate.c | 12 +++++----- >> include/drm/drm_gem_dma_helper.h | 4 ++-- >> 21 files changed, 81 insertions(+), 78 deletions(-) > > [snip] > >> diff --git a/drivers/gpu/drm/drm_gem_dma_helper.c b/drivers/gpu/drm/drm_gem_dma_helper.c >> index 56fc1a1e7f87..8851d294bb53 100644 >> --- a/drivers/gpu/drm/drm_gem_dma_helper.c >> +++ b/drivers/gpu/drm/drm_gem_dma_helper.c > > [snip] > >> @@ -460,10 +461,11 @@ drm_gem_dma_prime_import_sg_table(struct drm_device *dev, >> if (IS_ERR(dma_obj)) >> return ERR_CAST(dma_obj); >> >> - dma_obj->paddr = sg_dma_address(sgt->sgl); >> + dma_obj->dma_addr = sg_dma_address(sgt->sgl); >> dma_obj->sgt = sgt; >> >> - DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->paddr, attach->dmabuf->size); >> + DRM_DEBUG_PRIME("dma_addr = %pad, size = %zu\n", &dma_obj->dma_addr, >> + attach->dmabuf->size); > > The second line should be aligned left, just right of the opening > parenthesis. > > Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> > >> >> return &dma_obj->base; >> } > > [snip] > ^ permalink raw reply [flat|nested] 12+ messages in thread
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2022-07-06 12:43 [PATCH v2 0/4] drm: rename CMA helpers to DMA helpers Danilo Krummrich
2022-07-06 12:43 ` [PATCH v2 3/4] drm/gem: rename struct drm_gem_dma_object.{paddr => dma_addr} Danilo Krummrich
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