From: Sudeep Holla <sudeep.holla@arm.com> To: Conor Dooley <mail@conchuod.ie> Cc: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Palmer Dabbelt <palmer@rivosinc.com>, Albert Ou <aou@eecs.berkeley.edu>, Daire McNamara <daire.mcnamara@microchip.com>, Sudeep Holla <sudeep.holla@arm.com>, Conor Dooley <conor.dooley@microchip.com>, Niklas Cassel <niklas.cassel@wdc.com>, Damien Le Moal <damien.lemoal@opensource.wdc.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Zong Li <zong.li@sifive.com>, Emil Renner Berthing <kernel@esmil.dk>, Jonas Hahnfeld <hahnjo@hahnjo.de>, Guo Ren <guoren@kernel.org>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Changbin Du <changbin.du@intel.com>, Heiko Stuebner <heiko@sntech.de>, Philipp Tomsich <philipp.tomsich@vrull.eu>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Brice Goglin <Brice.Goglin@inria.fr> Subject: Re: [PATCH] riscv: arch-topology: fix default topology reporting Date: Thu, 7 Jul 2022 10:50:37 +0100 [thread overview] Message-ID: <20220707095037.i2pjcc7zcf4pi3ht@bogus> (raw) In-Reply-To: <20220706184558.2557301-1-mail@conchuod.ie> On Wed, Jul 06, 2022 at 07:45:59PM +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > RISC-V has no sane defaults to fall back on where there is no cpu-map > in the devicetree. > Without sane defaults, the package, core and thread IDs are all set to > -1. This causes user-visible inaccuracies for tools like hwloc/lstopo > which rely on the sysfs cpu topology files to detect a system's > topology. > > Add sane defaults in ~the exact same way as ARM64. > > CC: stable@vger.kernel.org > Fixes: 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.") > Reported-by: Brice Goglin <Brice.Goglin@inria.fr> > Link: https://github.com/open-mpi/hwloc/issues/536 > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > > Sudeep suggested that this be backported rather than the changes to > the devicetrees adding cpu-map since that property is optional. > That patchset is still valid in it's own right. > > arch/riscv/include/asm/topology.h | 13 +++++++++++++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/smpboot.c | 4 ++++ > arch/riscv/kernel/topology.c | 32 +++++++++++++++++++++++++++++++ > 4 files changed, 50 insertions(+) > create mode 100644 arch/riscv/include/asm/topology.h > create mode 100644 arch/riscv/kernel/topology.c > [...] > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > index f1e4948a4b52..d551c7f452d4 100644 > --- a/arch/riscv/kernel/smpboot.c > +++ b/arch/riscv/kernel/smpboot.c > @@ -32,6 +32,7 @@ > #include <asm/sections.h> > #include <asm/sbi.h> > #include <asm/smp.h> > +#include <asm/topology.h> > > #include "head.h" > [...] > void __init smp_prepare_cpus(unsigned int max_cpus) > @@ -161,6 +164,7 @@ asmlinkage __visible void smp_callin(void) > mmgrab(mm); > current->active_mm = mm; > > + store_cpu_topology(curr_cpuid); > notify_cpu_starting(curr_cpuid); > numa_add_cpu(curr_cpuid); > update_siblings_masks(curr_cpuid); If the above store_cpu_topology calls update_siblings_masks if required, probably you can drop this explicit call here. -- Regards, Sudeep
WARNING: multiple messages have this Message-ID (diff)
From: Sudeep Holla <sudeep.holla@arm.com> To: Conor Dooley <mail@conchuod.ie> Cc: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Palmer Dabbelt <palmer@rivosinc.com>, Albert Ou <aou@eecs.berkeley.edu>, Daire McNamara <daire.mcnamara@microchip.com>, Sudeep Holla <sudeep.holla@arm.com>, Conor Dooley <conor.dooley@microchip.com>, Niklas Cassel <niklas.cassel@wdc.com>, Damien Le Moal <damien.lemoal@opensource.wdc.com>, Geert Uytterhoeven <geert@linux-m68k.org>, Zong Li <zong.li@sifive.com>, Emil Renner Berthing <kernel@esmil.dk>, Jonas Hahnfeld <hahnjo@hahnjo.de>, Guo Ren <guoren@kernel.org>, Anup Patel <anup@brainfault.org>, Atish Patra <atishp@atishpatra.org>, Changbin Du <changbin.du@intel.com>, Heiko Stuebner <heiko@sntech.de>, Philipp Tomsich <philipp.tomsich@vrull.eu>, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, Brice Goglin <Brice.Goglin@inria.fr> Subject: Re: [PATCH] riscv: arch-topology: fix default topology reporting Date: Thu, 7 Jul 2022 10:50:37 +0100 [thread overview] Message-ID: <20220707095037.i2pjcc7zcf4pi3ht@bogus> (raw) In-Reply-To: <20220706184558.2557301-1-mail@conchuod.ie> On Wed, Jul 06, 2022 at 07:45:59PM +0100, Conor Dooley wrote: > From: Conor Dooley <conor.dooley@microchip.com> > > RISC-V has no sane defaults to fall back on where there is no cpu-map > in the devicetree. > Without sane defaults, the package, core and thread IDs are all set to > -1. This causes user-visible inaccuracies for tools like hwloc/lstopo > which rely on the sysfs cpu topology files to detect a system's > topology. > > Add sane defaults in ~the exact same way as ARM64. > > CC: stable@vger.kernel.org > Fixes: 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.") > Reported-by: Brice Goglin <Brice.Goglin@inria.fr> > Link: https://github.com/open-mpi/hwloc/issues/536 > Signed-off-by: Conor Dooley <conor.dooley@microchip.com> > --- > > Sudeep suggested that this be backported rather than the changes to > the devicetrees adding cpu-map since that property is optional. > That patchset is still valid in it's own right. > > arch/riscv/include/asm/topology.h | 13 +++++++++++++ > arch/riscv/kernel/Makefile | 1 + > arch/riscv/kernel/smpboot.c | 4 ++++ > arch/riscv/kernel/topology.c | 32 +++++++++++++++++++++++++++++++ > 4 files changed, 50 insertions(+) > create mode 100644 arch/riscv/include/asm/topology.h > create mode 100644 arch/riscv/kernel/topology.c > [...] > diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c > index f1e4948a4b52..d551c7f452d4 100644 > --- a/arch/riscv/kernel/smpboot.c > +++ b/arch/riscv/kernel/smpboot.c > @@ -32,6 +32,7 @@ > #include <asm/sections.h> > #include <asm/sbi.h> > #include <asm/smp.h> > +#include <asm/topology.h> > > #include "head.h" > [...] > void __init smp_prepare_cpus(unsigned int max_cpus) > @@ -161,6 +164,7 @@ asmlinkage __visible void smp_callin(void) > mmgrab(mm); > current->active_mm = mm; > > + store_cpu_topology(curr_cpuid); > notify_cpu_starting(curr_cpuid); > numa_add_cpu(curr_cpuid); > update_siblings_masks(curr_cpuid); If the above store_cpu_topology calls update_siblings_masks if required, probably you can drop this explicit call here. -- Regards, Sudeep _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2022-07-07 9:51 UTC|newest] Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-06 18:45 [PATCH] riscv: arch-topology: fix default topology reporting Conor Dooley 2022-07-06 18:45 ` Conor Dooley 2022-07-06 21:38 ` Atish Patra 2022-07-06 21:38 ` Atish Patra 2022-07-07 9:47 ` Sudeep Holla 2022-07-07 9:47 ` Sudeep Holla 2022-07-07 10:12 ` Conor.Dooley 2022-07-07 10:12 ` Conor.Dooley 2022-07-06 23:38 ` kernel test robot 2022-07-06 23:38 ` kernel test robot 2022-07-07 9:50 ` Sudeep Holla [this message] 2022-07-07 9:50 ` Sudeep Holla 2022-07-07 10:15 ` Conor.Dooley 2022-07-07 10:15 ` Conor.Dooley
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