[PATCH 04/12] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()

* [PATCH 04/12] cpufreq: amd-pstate: prefetch cppc_req_cached value in amd_pstate_cpu_init()
@ 2022-07-07 16:59 Perry Yuan
  0 siblings, 0 replies; only message in thread
From: Perry Yuan @ 2022-07-07 16:59 UTC (permalink / raw)
  To: rafael.j.wysocki, viresh.kumar, Ray.Huang, Huang Rui,
	Rafael J. Wysocki, linux-pm, linux-kernel
  Cc: Deepak.Sharma, Mario.Limonciello, Nathan.Fontenot,
	Alexander.Deucher, Jinzhou.Su, Xinmei.Huang, Xiaojian.Du,
	Li.Meng, Perry Yuan

This cppc_req_cached valued should be prefetched during
amd_pstate_cpu_init call period, then the amd_pstate_update() will get
correct cached value before updating the perf to change the cpu perf
level.

Signed-off-by: Perry Yuan <Perry.Yuan@amd.com>
---
 drivers/cpufreq/amd-pstate.c | 15 ++++++++++-----
 1 file changed, 10 insertions(+), 5 deletions(-)

diff --git a/drivers/cpufreq/amd-pstate.c b/drivers/cpufreq/amd-pstate.c
index 43e6df9f67f6..e4904da54541 100644
--- a/drivers/cpufreq/amd-pstate.c
+++ b/drivers/cpufreq/amd-pstate.c
@@ -547,12 +547,17 @@ static int amd_pstate_cpu_init(struct cpufreq_policy *policy)
 	cpudata->lowest_nonlinear_freq = lowest_nonlinear_freq;
 
 	policy->driver_data = cpudata;
+	if (!shared_mem) {
+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
 
-	ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_HW_CTL, &value);
-	if (ret)
-		return ret;
-	WRITE_ONCE(cpudata->cppc_hw_conf_cached, value);
-
+		ret = rdmsrl_on_cpu(cpudata->cpu, MSR_AMD_CPPC_REQ, &value);
+		if (ret)
+			return ret;
+		WRITE_ONCE(cpudata->cppc_req_cached, value);
+	}
 	amd_pstate_boost_init(cpudata);
 
 	return 0;
-- 
2.25.1


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