* [PATCH V3 0/2] arm64: dts: mt8173: Fix nor flash node
@ 2022-07-08 2:15 ` Xiangsheng Hou
0 siblings, 0 replies; 10+ messages in thread
From: Xiangsheng Hou @ 2022-07-08 2:15 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
Add axi clock since the driver change to DMA mode which need
to enable axi clock in dtsi and dt-binding example for mt8173.
And change spi clock to 26MHz as default.
Changes from v2:
- remove assigned clocks and parents in binding file
Changes from v1:
- Modify nor binding file
Xiangsheng Hou (2):
arm64: dts: mt8173: Fix nor_flash node
dt-bindings: mediatek: Add axi clock in mt8173 dts example
.../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++--
2 files changed, 7 insertions(+), 4 deletions(-)
--
2.25.1
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^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 1/2] arm64: dts: mt8173: Fix nor_flash node
2022-07-08 2:15 ` Xiangsheng Hou
@ 2022-07-08 2:15 ` Xiangsheng Hou
-1 siblings, 0 replies; 10+ messages in thread
From: Xiangsheng Hou @ 2022-07-08 2:15 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
Add axi clock since the driver change to DMA mode which need
to enable axi clock. And change spi clock to 26MHz as default.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 40d7b47fc52e..e603170100af 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -790,9 +790,12 @@ thermal: thermal@1100b000 {
nor_flash: spi@1100d000 {
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
+ assigned-clocks = <&topckgen CLK_TOP_SPI_SEL>;
+ assigned-clock-parents = <&clk26m>;
clocks = <&pericfg CLK_PERI_SPI>,
- <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
- clock-names = "spi", "sf";
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>,
+ <&pericfg CLK_PERI_NFI>;
+ clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH V3 1/2] arm64: dts: mt8173: Fix nor_flash node
@ 2022-07-08 2:15 ` Xiangsheng Hou
0 siblings, 0 replies; 10+ messages in thread
From: Xiangsheng Hou @ 2022-07-08 2:15 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
Add axi clock since the driver change to DMA mode which need
to enable axi clock. And change spi clock to 26MHz as default.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
arch/arm64/boot/dts/mediatek/mt8173.dtsi | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 40d7b47fc52e..e603170100af 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -790,9 +790,12 @@ thermal: thermal@1100b000 {
nor_flash: spi@1100d000 {
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
+ assigned-clocks = <&topckgen CLK_TOP_SPI_SEL>;
+ assigned-clock-parents = <&clk26m>;
clocks = <&pericfg CLK_PERI_SPI>,
- <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
- clock-names = "spi", "sf";
+ <&topckgen CLK_TOP_SPINFI_IFR_SEL>,
+ <&pericfg CLK_PERI_NFI>;
+ clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
--
2.25.1
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH V3 1/2] arm64: dts: mt8173: Fix nor_flash node
2022-07-08 2:15 ` Xiangsheng Hou
@ 2022-07-11 10:22 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-11 10:22 UTC (permalink / raw)
To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek
Il 08/07/22 04:15, Xiangsheng Hou ha scritto:
> Add axi clock since the driver change to DMA mode which need
> to enable axi clock. And change spi clock to 26MHz as default.
>
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 1/2] arm64: dts: mt8173: Fix nor_flash node
@ 2022-07-11 10:22 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-11 10:22 UTC (permalink / raw)
To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek
Il 08/07/22 04:15, Xiangsheng Hou ha scritto:
> Add axi clock since the driver change to DMA mode which need
> to enable axi clock. And change spi clock to 26MHz as default.
>
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example
2022-07-08 2:15 ` Xiangsheng Hou
@ 2022-07-08 2:15 ` Xiangsheng Hou
-1 siblings, 0 replies; 10+ messages in thread
From: Xiangsheng Hou @ 2022-07-08 2:15 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
For mt8173, it is needed to add the axi clock for dma mode.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
.../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b09f..413b907eecf5 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -82,8 +82,8 @@ examples:
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
interrupts = <1>;
- clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
- clock-names = "spi", "sf";
+ clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
+ clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
--
2.25.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example
@ 2022-07-08 2:15 ` Xiangsheng Hou
0 siblings, 0 replies; 10+ messages in thread
From: Xiangsheng Hou @ 2022-07-08 2:15 UTC (permalink / raw)
To: robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek, Xiangsheng Hou
For mt8173, it is needed to add the axi clock for dma mode.
Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
---
.../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b09f..413b907eecf5 100644
--- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -82,8 +82,8 @@ examples:
compatible = "mediatek,mt8173-nor";
reg = <0 0x1100d000 0 0xe0>;
interrupts = <1>;
- clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
- clock-names = "spi", "sf";
+ clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
+ clock-names = "spi", "sf", "axi";
#address-cells = <1>;
#size-cells = <0>;
--
2.25.1
_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example
2022-07-08 2:15 ` Xiangsheng Hou
@ 2022-07-11 10:22 ` AngeloGioacchino Del Regno
-1 siblings, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-11 10:22 UTC (permalink / raw)
To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek
Il 08/07/22 04:15, Xiangsheng Hou ha scritto:
> For mt8173, it is needed to add the axi clock for dma mode.
>
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> ---
> .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> index 41e60fe4b09f..413b907eecf5 100644
> --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> @@ -82,8 +82,8 @@ examples:
> compatible = "mediatek,mt8173-nor";
> reg = <0 0x1100d000 0 0xe0>;
> interrupts = <1>;
> - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
> - clock-names = "spi", "sf";
> + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
This is going over 100 columns, which is too many.
Please fix.
> + clock-names = "spi", "sf", "axi";
> #address-cells = <1>;
> #size-cells = <0>;
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH V3 2/2] dt-bindings: mediatek: Add axi clock in mt8173 dts example
@ 2022-07-11 10:22 ` AngeloGioacchino Del Regno
0 siblings, 0 replies; 10+ messages in thread
From: AngeloGioacchino Del Regno @ 2022-07-11 10:22 UTC (permalink / raw)
To: Xiangsheng Hou, robh+dt, krzysztof.kozlowski+dt, matthias.bgg
Cc: devicetree, linux-arm-kernel, linux-kernel, bin.zhang,
benliang.zhao, linux-mediatek
Il 08/07/22 04:15, Xiangsheng Hou ha scritto:
> For mt8173, it is needed to add the axi clock for dma mode.
>
> Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com>
> ---
> .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> index 41e60fe4b09f..413b907eecf5 100644
> --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml
> @@ -82,8 +82,8 @@ examples:
> compatible = "mediatek,mt8173-nor";
> reg = <0 0x1100d000 0 0xe0>;
> interrupts = <1>;
> - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>;
> - clock-names = "spi", "sf";
> + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>;
This is going over 100 columns, which is too many.
Please fix.
> + clock-names = "spi", "sf", "axi";
> #address-cells = <1>;
> #size-cells = <0>;
>
>
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linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply [flat|nested] 10+ messages in thread