* [PULL 00/21] loongarch patch queue
@ 2022-07-19 17:59 Richard Henderson
2022-07-19 17:59 ` [PULL 01/21] tests/docker/dockerfiles: Add debian-loongarch-cross.docker Richard Henderson
` (21 more replies)
0 siblings, 22 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel
The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into staging (2022-07-19 13:05:06 +0100)
are available in the Git repository at:
https://gitlab.com/rth7680/qemu.git tags/pull-la-20220719
for you to fetch changes up to fda3f15b0079d4bba76791502a7e00b8b747f509:
hw/loongarch: Add fdt support (2022-07-19 22:55:10 +0530)
----------------------------------------------------------------
LoongArch64 patch queue:
Add dockerfile for loongarch cross compile
Add reference files for float tests.
Add simple tests for div, mod, clo, fclass, fcmp, pcadd
Add bios and kernel boot support.
Add smbios, acpi, and fdt support.
Fix pch-pic update-irq.
Fix some errors identified by coverity.
----------------------------------------------------------------
Philippe Mathieu-Daudé (1):
tests/tcg/loongarch64: Add float reference files
Richard Henderson (1):
tests/docker/dockerfiles: Add debian-loongarch-cross.docker
Song Gao (7):
fpu/softfloat: Add LoongArch specializations for pickNaN*
target/loongarch: Fix float_convd/float_convs test failing
tests/tcg/loongarch64: Add clo related instructions test
tests/tcg/loongarch64: Add div and mod related instructions test
tests/tcg/loongarch64: Add fclass test
tests/tcg/loongarch64: Add fp comparison instructions test
tests/tcg/loongarch64: Add pcadd related instructions test
Xiaojuan Yang (12):
target/loongarch: Fix loongarch_cpu_class_by_name
hw/intc/loongarch_pch_pic: Fix bugs for update_irq function
target/loongarch/cpu: Fix coverity errors about excp_names
target/loongarch/tlb_helper: Fix coverity integer overflow error
target/loongarch/op_helper: Fix coverity cond_at_most error
target/loongarch/cpu: Fix cpucfg default value
hw/loongarch: Add fw_cfg table support
hw/loongarch: Add uefi bios loading support
hw/loongarch: Add linux kernel booting support
hw/loongarch: Add smbios support
hw/loongarch: Add acpi ged support
hw/loongarch: Add fdt support
configure | 5 +
configs/targets/loongarch64-softmmu.mak | 1 +
hw/loongarch/fw_cfg.h | 15 +
include/hw/loongarch/virt.h | 25 +
include/hw/pci-host/ls7a.h | 4 +
target/loongarch/cpu.h | 3 +
hw/intc/loongarch_pch_pic.c | 10 +-
hw/loongarch/acpi-build.c | 609 +++++++++++++
hw/loongarch/fw_cfg.c | 33 +
hw/loongarch/loongson3.c | 433 ++++++++-
target/loongarch/cpu.c | 29 +-
target/loongarch/fpu_helper.c | 143 +--
target/loongarch/op_helper.c | 2 +-
target/loongarch/tlb_helper.c | 4 +-
tests/tcg/loongarch64/test_bit.c | 88 ++
tests/tcg/loongarch64/test_div.c | 54 ++
tests/tcg/loongarch64/test_fclass.c | 130 +++
tests/tcg/loongarch64/test_fpcom.c | 37 +
tests/tcg/loongarch64/test_pcadd.c | 38 +
fpu/softfloat-specialize.c.inc | 26 +-
hw/loongarch/Kconfig | 3 +
hw/loongarch/meson.build | 6 +-
tests/docker/Makefile.include | 2 +
.../dockerfiles/debian-loongarch-cross.docker | 25 +
tests/tcg/loongarch64/Makefile.target | 19 +
tests/tcg/loongarch64/float_convd.ref | 988 +++++++++++++++++++++
tests/tcg/loongarch64/float_convs.ref | 748 ++++++++++++++++
tests/tcg/loongarch64/float_madds.ref | 768 ++++++++++++++++
28 files changed, 4147 insertions(+), 101 deletions(-)
create mode 100644 hw/loongarch/fw_cfg.h
create mode 100644 hw/loongarch/acpi-build.c
create mode 100644 hw/loongarch/fw_cfg.c
create mode 100644 tests/tcg/loongarch64/test_bit.c
create mode 100644 tests/tcg/loongarch64/test_div.c
create mode 100644 tests/tcg/loongarch64/test_fclass.c
create mode 100644 tests/tcg/loongarch64/test_fpcom.c
create mode 100644 tests/tcg/loongarch64/test_pcadd.c
create mode 100644 tests/docker/dockerfiles/debian-loongarch-cross.docker
create mode 100644 tests/tcg/loongarch64/Makefile.target
create mode 100644 tests/tcg/loongarch64/float_convd.ref
create mode 100644 tests/tcg/loongarch64/float_convs.ref
create mode 100644 tests/tcg/loongarch64/float_madds.ref
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PULL 01/21] tests/docker/dockerfiles: Add debian-loongarch-cross.docker
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 02/21] target/loongarch: Fix loongarch_cpu_class_by_name Richard Henderson
` (20 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao, Philippe Mathieu-Daudé
Use the pre-packaged toolchain provided by Loongson via github.
Tested-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220704070824.965429-1-richard.henderson@linaro.org>
---
configure | 5 ++++
tests/docker/Makefile.include | 2 ++
.../dockerfiles/debian-loongarch-cross.docker | 25 +++++++++++++++++++
3 files changed, 32 insertions(+)
create mode 100644 tests/docker/dockerfiles/debian-loongarch-cross.docker
diff --git a/configure b/configure
index 4f12481765..35e0b28198 100755
--- a/configure
+++ b/configure
@@ -1933,6 +1933,7 @@ probe_target_compiler() {
hexagon) container_hosts=x86_64 ;;
hppa) container_hosts=x86_64 ;;
i386) container_hosts=x86_64 ;;
+ loongarch64) container_hosts=x86_64 ;;
m68k) container_hosts=x86_64 ;;
microblaze) container_hosts=x86_64 ;;
mips64el) container_hosts=x86_64 ;;
@@ -1987,6 +1988,10 @@ probe_target_compiler() {
container_image=fedora-i386-cross
container_cross_prefix=
;;
+ loongarch64)
+ container_image=debian-loongarch-cross
+ container_cross_prefix=loongarch64-unknown-linux-gnu-
+ ;;
m68k)
container_image=debian-m68k-cross
container_cross_prefix=m68k-linux-gnu-
diff --git a/tests/docker/Makefile.include b/tests/docker/Makefile.include
index ef4518d9eb..9a45e8890b 100644
--- a/tests/docker/Makefile.include
+++ b/tests/docker/Makefile.include
@@ -140,6 +140,7 @@ docker-image-debian-nios2-cross: $(DOCKER_FILES_DIR)/debian-toolchain.docker \
# Specialist build images, sometimes very limited tools
docker-image-debian-tricore-cross: docker-image-debian10
docker-image-debian-all-test-cross: docker-image-debian10
+docker-image-debian-loongarch-cross: docker-image-debian11
docker-image-debian-microblaze-cross: docker-image-debian10
docker-image-debian-nios2-cross: docker-image-debian10
docker-image-debian-powerpc-test-cross: docker-image-debian11
@@ -149,6 +150,7 @@ docker-image-debian-riscv64-test-cross: docker-image-debian11
DOCKER_PARTIAL_IMAGES += debian-alpha-cross
DOCKER_PARTIAL_IMAGES += debian-powerpc-test-cross
DOCKER_PARTIAL_IMAGES += debian-hppa-cross
+DOCKER_PARTIAL_IMAGES += debian-loongarch-cross
DOCKER_PARTIAL_IMAGES += debian-m68k-cross debian-mips64-cross
DOCKER_PARTIAL_IMAGES += debian-microblaze-cross
DOCKER_PARTIAL_IMAGES += debian-nios2-cross
diff --git a/tests/docker/dockerfiles/debian-loongarch-cross.docker b/tests/docker/dockerfiles/debian-loongarch-cross.docker
new file mode 100644
index 0000000000..ca2469d2a8
--- /dev/null
+++ b/tests/docker/dockerfiles/debian-loongarch-cross.docker
@@ -0,0 +1,25 @@
+#
+# Docker cross-compiler target
+#
+# This docker target builds on the debian11 base image,
+# using a prebuilt toolchains for LoongArch64 from:
+# https://github.com/loongson/build-tools/releases
+#
+FROM qemu/debian11
+
+RUN apt-get update && \
+ DEBIAN_FRONTEND=noninteractive apt install -yy eatmydata && \
+ DEBIAN_FRONTEND=noninteractive eatmydata \
+ apt-get install -y --no-install-recommends \
+ build-essential \
+ ca-certificates \
+ curl \
+ gettext \
+ git \
+ python3-minimal
+
+RUN curl -#SL https://github.com/loongson/build-tools/releases/download/2022.05.29/loongarch64-clfs-5.0-cross-tools-gcc-glibc.tar.xz \
+ | tar -xJC /opt
+
+ENV PATH $PATH:/opt/cross-tools/bin
+ENV LD_LIBRARY_PATH /opt/cross-tools/lib:/opt/cross-tools/loongarch64-unknown-linux-gnu/lib:$LD_LIBRARY_PATH
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 02/21] target/loongarch: Fix loongarch_cpu_class_by_name
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
2022-07-19 17:59 ` [PULL 01/21] tests/docker/dockerfiles: Add debian-loongarch-cross.docker Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 03/21] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function Richard Henderson
` (19 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
The cpu_model argument may already have the '-loongarch-cpu' suffix,
e.g. when using the default for the LS7A1000 machine. If that fails,
try again with the suffix. Validate that the object created by the
function is derived from the proper base class.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-2-yangxiaojuan@loongson.cn>
[rth: Try without and then with the suffix, to avoid testsuite breakage.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/cpu.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index e21715592a..5573468a7d 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -571,12 +571,22 @@ static void loongarch_cpu_init(Object *obj)
static ObjectClass *loongarch_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
- char *typename;
- typename = g_strdup_printf(LOONGARCH_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
+ oc = object_class_by_name(cpu_model);
+ if (!oc) {
+ g_autofree char *typename
+ = g_strdup_printf(LOONGARCH_CPU_TYPE_NAME("%s"), cpu_model);
+ oc = object_class_by_name(typename);
+ if (!oc) {
+ return NULL;
+ }
+ }
+
+ if (object_class_dynamic_cast(oc, TYPE_LOONGARCH_CPU)
+ && !object_class_is_abstract(oc)) {
+ return oc;
+ }
+ return NULL;
}
void loongarch_cpu_dump_state(CPUState *cs, FILE *f, int flags)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 03/21] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
2022-07-19 17:59 ` [PULL 01/21] tests/docker/dockerfiles: Add debian-loongarch-cross.docker Richard Henderson
2022-07-19 17:59 ` [PULL 02/21] target/loongarch: Fix loongarch_cpu_class_by_name Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 04/21] target/loongarch/cpu: Fix coverity errors about excp_names Richard Henderson
` (18 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Fix such errors:
1. We should not use 'unsigned long' type as argument when we use
find_first_bit(), and we use ctz64() to replace find_first_bit()
to fix this bug.
2. It is not standard to use '1ULL << irq' to generate a irq mask.
So, we replace it with 'MAKE_64BIT_MASK(irq, 1)'.
Fix coverity CID: 1489761 1489764 1489765
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220715060740.1500628-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/intc/loongarch_pch_pic.c | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index 3c9814a3b4..3380b09807 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -15,21 +15,21 @@
static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
{
- unsigned long val;
+ uint64_t val;
int irq;
if (level) {
val = mask & s->intirr & ~s->int_mask;
if (val) {
- irq = find_first_bit(&val, 64);
- s->intisr |= 0x1ULL << irq;
+ irq = ctz64(val);
+ s->intisr |= MAKE_64BIT_MASK(irq, 1);
qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 1);
}
} else {
val = mask & s->intisr;
if (val) {
- irq = find_first_bit(&val, 64);
- s->intisr &= ~(0x1ULL << irq);
+ irq = ctz64(val);
+ s->intisr &= ~MAKE_64BIT_MASK(irq, 1);
qemu_set_irq(s->parent_irq[s->htmsi_vector[irq]], 0);
}
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 04/21] target/loongarch/cpu: Fix coverity errors about excp_names
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (2 preceding siblings ...)
2022-07-19 17:59 ` [PULL 03/21] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 05/21] target/loongarch/tlb_helper: Fix coverity integer overflow error Richard Henderson
` (17 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Fix out-of-bounds errors when access excp_names[] array. the valid
boundary size of excp_names should be 0 to ARRAY_SIZE(excp_names)-1.
However, the general code do not consider the max boundary.
Fix coverity CID: 1489758
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/cpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 5573468a7d..0d49ce68e4 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -140,7 +140,7 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
if (cs->exception_index != EXCCODE_INT) {
if (cs->exception_index < 0 ||
- cs->exception_index > ARRAY_SIZE(excp_names)) {
+ cs->exception_index >= ARRAY_SIZE(excp_names)) {
name = "unknown";
} else {
name = excp_names[cs->exception_index];
@@ -190,8 +190,8 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
cause = cs->exception_index;
break;
default:
- qemu_log("Error: exception(%d) '%s' has not been supported\n",
- cs->exception_index, excp_names[cs->exception_index]);
+ qemu_log("Error: exception(%d) has not been supported\n",
+ cs->exception_index);
abort();
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 05/21] target/loongarch/tlb_helper: Fix coverity integer overflow error
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (3 preceding siblings ...)
2022-07-19 17:59 ` [PULL 04/21] target/loongarch/cpu: Fix coverity errors about excp_names Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 06/21] target/loongarch/op_helper: Fix coverity cond_at_most error Richard Henderson
` (16 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Replace '1 << shift' with 'MAKE_64BIT_MASK(shift, 1)' to fix
unintentional integer overflow errors in tlb_helper file.
Fix coverity CID: 1489759 1489762
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/tlb_helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/loongarch/tlb_helper.c b/target/loongarch/tlb_helper.c
index bab19c7e05..610b6d123c 100644
--- a/target/loongarch/tlb_helper.c
+++ b/target/loongarch/tlb_helper.c
@@ -298,7 +298,7 @@ static void invalidate_tlb_entry(CPULoongArchState *env, int index)
} else {
tlb_ps = FIELD_EX64(env->CSR_STLBPS, CSR_STLBPS, PS);
}
- pagesize = 1 << tlb_ps;
+ pagesize = MAKE_64BIT_MASK(tlb_ps, 1);
mask = MAKE_64BIT_MASK(0, tlb_ps + 1);
if (tlb_v0) {
@@ -736,7 +736,7 @@ void helper_ldpte(CPULoongArchState *env, target_ulong base, target_ulong odd,
(tmp0 & (~(1 << R_TLBENTRY_G_SHIFT)));
ps = ptbase + ptwidth - 1;
if (odd) {
- tmp0 += (1 << ps);
+ tmp0 += MAKE_64BIT_MASK(ps, 1);
}
} else {
/* 0:64bit, 1:128bit, 2:192bit, 3:256bit */
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 06/21] target/loongarch/op_helper: Fix coverity cond_at_most error
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (4 preceding siblings ...)
2022-07-19 17:59 ` [PULL 05/21] target/loongarch/tlb_helper: Fix coverity integer overflow error Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 07/21] target/loongarch/cpu: Fix cpucfg default value Richard Henderson
` (15 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
The boundary size of cpucfg array should be 0 to ARRAY_SIZE(cpucfg)-1.
So, using index bigger than max boundary to access cpucfg[] must be
forbidden.
Fix coverity CID: 1489760
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715060740.1500628-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/op_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
index 4b429b6699..568c071601 100644
--- a/target/loongarch/op_helper.c
+++ b/target/loongarch/op_helper.c
@@ -81,7 +81,7 @@ target_ulong helper_crc32c(target_ulong val, target_ulong m, uint64_t sz)
target_ulong helper_cpucfg(CPULoongArchState *env, target_ulong rj)
{
- return rj > 21 ? 0 : env->cpucfg[rj];
+ return rj >= ARRAY_SIZE(env->cpucfg) ? 0 : env->cpucfg[rj];
}
uint64_t helper_rdtime_d(CPULoongArchState *env)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 07/21] target/loongarch/cpu: Fix cpucfg default value
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (5 preceding siblings ...)
2022-07-19 17:59 ` [PULL 06/21] target/loongarch/op_helper: Fix coverity cond_at_most error Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 08/21] fpu/softfloat: Add LoongArch specializations for pickNaN* Richard Henderson
` (14 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
We should config cpucfg[20] to set value for the scache's ways, sets,
and size arguments when loongarch cpu init. However, the old code
wirte 'sets argument' twice, so we change one of them to 'size argument'.
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20220715064829.1521482-1-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 0d49ce68e4..1415793d6f 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -406,7 +406,7 @@ static void loongarch_la464_initfn(Object *obj)
data = 0;
data = FIELD_DP32(data, CPUCFG20, L3IU_WAYS, 15);
data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 14);
- data = FIELD_DP32(data, CPUCFG20, L3IU_SETS, 6);
+ data = FIELD_DP32(data, CPUCFG20, L3IU_SIZE, 6);
env->cpucfg[20] = data;
env->CSR_ASID = FIELD_DP64(0, CSR_ASID, ASIDBITS, 0xa);
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 08/21] fpu/softfloat: Add LoongArch specializations for pickNaN*
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (6 preceding siblings ...)
2022-07-19 17:59 ` [PULL 07/21] target/loongarch/cpu: Fix cpucfg default value Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 09/21] target/loongarch: Fix float_convd/float_convs test failing Richard Henderson
` (13 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
The muladd (inf,zero,nan) case sets InvalidOp and returns the
input value 'c', and prefer sNaN over qNaN, in c,a,b order.
Binary operations prefer sNaN over qNaN and a,b order.
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-3-gaosong@loongson.cn>
[rth: Add specialization for pickNaN]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
fpu/softfloat-specialize.c.inc | 26 +++++++++++++++++++++++++-
1 file changed, 25 insertions(+), 1 deletion(-)
diff --git a/fpu/softfloat-specialize.c.inc b/fpu/softfloat-specialize.c.inc
index 943e3301d2..9096fb302b 100644
--- a/fpu/softfloat-specialize.c.inc
+++ b/fpu/softfloat-specialize.c.inc
@@ -390,7 +390,8 @@ bool float32_is_signaling_nan(float32 a_, float_status *status)
static int pickNaN(FloatClass a_cls, FloatClass b_cls,
bool aIsLargerSignificand, float_status *status)
{
-#if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA)
+#if defined(TARGET_ARM) || defined(TARGET_MIPS) || defined(TARGET_HPPA) \
+ || defined(TARGET_LOONGARCH64)
/* ARM mandated NaN propagation rules (see FPProcessNaNs()), take
* the first of:
* 1. A if it is signaling
@@ -574,6 +575,29 @@ static int pickNaNMulAdd(FloatClass a_cls, FloatClass b_cls, FloatClass c_cls,
return 1;
}
}
+#elif defined(TARGET_LOONGARCH64)
+ /*
+ * For LoongArch systems that conform to IEEE754-2008, the (inf,zero,nan)
+ * case sets InvalidOp and returns the input value 'c'
+ */
+ if (infzero) {
+ float_raise(float_flag_invalid | float_flag_invalid_imz, status);
+ return 2;
+ }
+ /* Prefer sNaN over qNaN, in the c, a, b order. */
+ if (is_snan(c_cls)) {
+ return 2;
+ } else if (is_snan(a_cls)) {
+ return 0;
+ } else if (is_snan(b_cls)) {
+ return 1;
+ } else if (is_qnan(c_cls)) {
+ return 2;
+ } else if (is_qnan(a_cls)) {
+ return 0;
+ } else {
+ return 1;
+ }
#elif defined(TARGET_PPC)
/* For PPC, the (inf,zero,qnan) case sets InvalidOp, but we prefer
* to return an input NaN if we have one (ie c) rather than generating
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 09/21] target/loongarch: Fix float_convd/float_convs test failing
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (7 preceding siblings ...)
2022-07-19 17:59 ` [PULL 08/21] fpu/softfloat: Add LoongArch specializations for pickNaN* Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 10/21] tests/tcg/loongarch64: Add float reference files Richard Henderson
` (12 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
We should result zero when exception is invalid and operation is nan
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-4-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/loongarch/fpu_helper.c | 143 +++++++++++++++++++---------------
1 file changed, 80 insertions(+), 63 deletions(-)
diff --git a/target/loongarch/fpu_helper.c b/target/loongarch/fpu_helper.c
index 3d0cb8dd0d..bd76529219 100644
--- a/target/loongarch/fpu_helper.c
+++ b/target/loongarch/fpu_helper.c
@@ -13,9 +13,6 @@
#include "fpu/softfloat.h"
#include "internals.h"
-#define FLOAT_TO_INT32_OVERFLOW 0x7fffffff
-#define FLOAT_TO_INT64_OVERFLOW 0x7fffffffffffffffULL
-
static inline uint64_t nanbox_s(float32 fp)
{
return fp | MAKE_64BIT_MASK(32, 32);
@@ -544,9 +541,10 @@ uint64_t helper_ftintrm_l_d(CPULoongArchState *env, uint64_t fj)
fd = float64_to_int64(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -561,9 +559,10 @@ uint64_t helper_ftintrm_l_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int64((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -578,9 +577,10 @@ uint64_t helper_ftintrm_w_d(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float64_to_int32(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -595,9 +595,10 @@ uint64_t helper_ftintrm_w_s(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float32_to_int32((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -612,9 +613,10 @@ uint64_t helper_ftintrp_l_d(CPULoongArchState *env, uint64_t fj)
fd = float64_to_int64(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -629,9 +631,10 @@ uint64_t helper_ftintrp_l_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int64((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -646,9 +649,10 @@ uint64_t helper_ftintrp_w_d(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float64_to_int32(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -663,9 +667,10 @@ uint64_t helper_ftintrp_w_s(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float32_to_int32((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -679,9 +684,10 @@ uint64_t helper_ftintrz_l_d(CPULoongArchState *env, uint64_t fj)
fd = float64_to_int64_round_to_zero(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -695,9 +701,10 @@ uint64_t helper_ftintrz_l_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int64_round_to_zero((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -711,9 +718,10 @@ uint64_t helper_ftintrz_w_d(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float64_to_int32_round_to_zero(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -727,9 +735,10 @@ uint64_t helper_ftintrz_w_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int32_round_to_zero((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return (uint64_t)fd;
@@ -744,9 +753,10 @@ uint64_t helper_ftintrne_l_d(CPULoongArchState *env, uint64_t fj)
fd = float64_to_int64(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -761,9 +771,10 @@ uint64_t helper_ftintrne_l_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int64((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -778,9 +789,10 @@ uint64_t helper_ftintrne_w_d(CPULoongArchState *env, uint64_t fj)
fd = (uint64_t)float64_to_int32(fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -795,9 +807,10 @@ uint64_t helper_ftintrne_w_s(CPULoongArchState *env, uint64_t fj)
fd = float32_to_int32((uint32_t)fj, &env->fp_status);
set_float_rounding_mode(old_mode, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return (uint64_t)fd;
@@ -808,9 +821,10 @@ uint64_t helper_ftint_l_d(CPULoongArchState *env, uint64_t fj)
uint64_t fd;
fd = float64_to_int64(fj, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -821,9 +835,10 @@ uint64_t helper_ftint_l_s(CPULoongArchState *env, uint64_t fj)
uint64_t fd;
fd = float32_to_int64((uint32_t)fj, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status) &
- (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT64_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -834,9 +849,10 @@ uint64_t helper_ftint_w_s(CPULoongArchState *env, uint64_t fj)
uint64_t fd;
fd = (uint64_t)float32_to_int32((uint32_t)fj, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status)
- & (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float32_is_any_nan((uint32_t)fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
@@ -847,9 +863,10 @@ uint64_t helper_ftint_w_d(CPULoongArchState *env, uint64_t fj)
uint64_t fd;
fd = (uint64_t)float64_to_int32(fj, &env->fp_status);
- if (get_float_exception_flags(&env->fp_status)
- & (float_flag_invalid | float_flag_overflow)) {
- fd = FLOAT_TO_INT32_OVERFLOW;
+ if (get_float_exception_flags(&env->fp_status) & (float_flag_invalid)) {
+ if (float64_is_any_nan(fj)) {
+ fd = 0;
+ }
}
update_fcsr0(env, GETPC());
return fd;
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 10/21] tests/tcg/loongarch64: Add float reference files
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (8 preceding siblings ...)
2022-07-19 17:59 ` [PULL 09/21] target/loongarch: Fix float_convd/float_convs test failing Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 11/21] tests/tcg/loongarch64: Add clo related instructions test Richard Henderson
` (11 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Philippe Mathieu-Daudé, Song Gao
From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Generated on Loongson-3A5000 (CPU revision 0x0014c011).
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220104132022.2146857-1-f4bug@amsat.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-2-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/float_convd.ref | 988 ++++++++++++++++++++++++++
tests/tcg/loongarch64/float_convs.ref | 748 +++++++++++++++++++
tests/tcg/loongarch64/float_madds.ref | 768 ++++++++++++++++++++
3 files changed, 2504 insertions(+)
create mode 100644 tests/tcg/loongarch64/float_convd.ref
create mode 100644 tests/tcg/loongarch64/float_convs.ref
create mode 100644 tests/tcg/loongarch64/float_madds.ref
diff --git a/tests/tcg/loongarch64/float_convd.ref b/tests/tcg/loongarch64/float_convd.ref
new file mode 100644
index 0000000000..08d3dfa2fe
--- /dev/null
+++ b/tests/tcg/loongarch64/float_convd.ref
@@ -0,0 +1,988 @@
+### Rounding to nearest
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-nan:0x00fff8000000000000)
+ to single: f32(-nan:0xffc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-inf:0x00fff0000000000000)
+ to single: f32(-inf:0xff800000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffffffffff0000000p+1023:0x00ffefffffffffffff)
+ to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.1874b135ff6540000000p+103:0x00c661874b135ff654)
+ to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.c0bab523323b90000000p+99:0x00c62c0bab523323b9)
+ to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.00000000000000000000p+1:0x00c000000000000000)
+ to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
+ to int32: -2 (OK)
+ to int64: -2 (OK)
+ to uint32: -2 (OK)
+ to uint64: -2 (OK)
+from double: f64(-0x1.00000000000000000000p+0:0x00bff0000000000000)
+ to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
+ to int32: -1 (OK)
+ to int64: -1 (OK)
+ to uint32: -1 (OK)
+ to uint64: -1 (OK)
+from double: f64(-0x1.00000000000000000000p-1022:0x008010000000000000)
+ to single: f32(-0x0.00000000000000000000p+0:0x80000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000)
+ to single: f32(-0x1.00000000000000000000p-126:0x80800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.00000000000000000000p+0:00000000000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from double: f64(0x1.00000000000000000000p-126:0x003810000000000000)
+ to single: f32(0x1.00000000000000000000p-126:0x00800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000001c5f680000000p-25:0x003e600000001c5f68)
+ to single: f32(0x1.00000000000000000000p-25:0x33000000) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ffffe6cb2fa820000000p-25:0x003e6ffffe6cb2fa82)
+ to single: f32(0x1.ffffe600000000000000p-25:0x337ffff3) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ff801a9af58a10000000p-15:0x003f0ff801a9af58a1)
+ to single: f32(0x1.ff801a00000000000000p-15:0x387fc00d) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000c06a1ef50000000p-14:0x003f100000c06a1ef5)
+ to single: f32(0x1.00000c00000000000000p-14:0x38800006) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000)
+ to single: f32(0x1.00400000000000000000p+0:0x3f802000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from double: f64(0x1.00000000000000000000p-1022:0x000010000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.9ea82a22876800000000p-1022:0x000009ea82a2287680)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.ab98fba8432100000000p-1022:0x00000ab98fba843210)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00000000000000000000p+1:0x004000000000000000)
+ to single: f32(0x1.00000000000000000000p+1:0x40000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from double: f64(0x1.5bf0a8b1457690000000p+1:0x004005bf0a8b145769)
+ to single: f32(0x1.5bf0a800000000000000p+1:0x402df854) (INEXACT )
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from double: f64(0x1.921fb54442d180000000p+1:0x00400921fb54442d18)
+ to single: f32(0x1.921fb600000000000000p+1:0x40490fdb) (INEXACT )
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000)
+ to single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+15:0x477fe000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000)
+ to single: f32(0x1.ffc20000000000000000p+15:0x477fe100) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000)
+ to single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+16:0x47ffe000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000)
+ to single: f32(0x1.ffc10000000000000000p+16:0x47ffe080) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from double: f64(0x1.fffffffc000000000000p+30:0x0041dfffffffc00000)
+ to single: f32(0x1.00000000000000000000p+31:0x4f000000) (INEXACT )
+ to int32: 2147483647 (OK)
+ to int64: 2147483647 (OK)
+ to uint32: 2147483647 (OK)
+ to uint64: 2147483647 (OK)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffffffffff0000000p+1023:0x007fefffffffffffff)
+ to single: f32(inf:0x7f800000) (OVERFLOW INEXACT )
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(inf:0x007ff0000000000000)
+ to single: f32(inf:0x7f800000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from double: f64(nan:0x007ff8000000000000)
+ to single: f32(nan:0x7fc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff0000000000001)
+ to single: f32(nan:0x7fc00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding upwards
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-nan:0x00fff8000000000000)
+ to single: f32(-nan:0xffc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-inf:0x00fff0000000000000)
+ to single: f32(-inf:0xff800000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffffffffff0000000p+1023:0x00ffefffffffffffff)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OVERFLOW INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.1874b135ff6540000000p+103:0x00c661874b135ff654)
+ to single: f32(-0x1.1874b000000000000000p+103:0xf30c3a58) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.c0bab523323b90000000p+99:0x00c62c0bab523323b9)
+ to single: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.00000000000000000000p+1:0x00c000000000000000)
+ to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
+ to int32: -2 (OK)
+ to int64: -2 (OK)
+ to uint32: -2 (OK)
+ to uint64: -2 (OK)
+from double: f64(-0x1.00000000000000000000p+0:0x00bff0000000000000)
+ to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
+ to int32: -1 (OK)
+ to int64: -1 (OK)
+ to uint32: -1 (OK)
+ to uint64: -1 (OK)
+from double: f64(-0x1.00000000000000000000p-1022:0x008010000000000000)
+ to single: f32(-0x0.00000000000000000000p+0:0x80000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000)
+ to single: f32(-0x1.00000000000000000000p-126:0x80800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.00000000000000000000p+0:00000000000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from double: f64(0x1.00000000000000000000p-126:0x003810000000000000)
+ to single: f32(0x1.00000000000000000000p-126:0x00800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000001c5f680000000p-25:0x003e600000001c5f68)
+ to single: f32(0x1.00000200000000000000p-25:0x33000001) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ffffe6cb2fa820000000p-25:0x003e6ffffe6cb2fa82)
+ to single: f32(0x1.ffffe800000000000000p-25:0x337ffff4) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ff801a9af58a10000000p-15:0x003f0ff801a9af58a1)
+ to single: f32(0x1.ff801c00000000000000p-15:0x387fc00e) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000c06a1ef50000000p-14:0x003f100000c06a1ef5)
+ to single: f32(0x1.00000e00000000000000p-14:0x38800007) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000)
+ to single: f32(0x1.00400000000000000000p+0:0x3f802000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from double: f64(0x1.00000000000000000000p-1022:0x000010000000000000)
+ to single: f32(0x1.00000000000000000000p-149:0x00000001) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.9ea82a22876800000000p-1022:0x000009ea82a2287680)
+ to single: f32(0x1.00000000000000000000p-149:0x00000001) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.ab98fba8432100000000p-1022:0x00000ab98fba843210)
+ to single: f32(0x1.00000000000000000000p-149:0x00000001) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00000000000000000000p+1:0x004000000000000000)
+ to single: f32(0x1.00000000000000000000p+1:0x40000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from double: f64(0x1.5bf0a8b1457690000000p+1:0x004005bf0a8b145769)
+ to single: f32(0x1.5bf0aa00000000000000p+1:0x402df855) (INEXACT )
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from double: f64(0x1.921fb54442d180000000p+1:0x00400921fb54442d18)
+ to single: f32(0x1.921fb600000000000000p+1:0x40490fdb) (INEXACT )
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000)
+ to single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+15:0x477fe000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000)
+ to single: f32(0x1.ffc20000000000000000p+15:0x477fe100) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000)
+ to single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+16:0x47ffe000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000)
+ to single: f32(0x1.ffc10000000000000000p+16:0x47ffe080) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from double: f64(0x1.fffffffc000000000000p+30:0x0041dfffffffc00000)
+ to single: f32(0x1.00000000000000000000p+31:0x4f000000) (INEXACT )
+ to int32: 2147483647 (OK)
+ to int64: 2147483647 (OK)
+ to uint32: 2147483647 (OK)
+ to uint64: 2147483647 (OK)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffffffffff0000000p+1023:0x007fefffffffffffff)
+ to single: f32(inf:0x7f800000) (OVERFLOW INEXACT )
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(inf:0x007ff0000000000000)
+ to single: f32(inf:0x7f800000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from double: f64(nan:0x007ff8000000000000)
+ to single: f32(nan:0x7fc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff0000000000001)
+ to single: f32(nan:0x7fc00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding downwards
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-nan:0x00fff8000000000000)
+ to single: f32(-nan:0xffc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-inf:0x00fff0000000000000)
+ to single: f32(-inf:0xff800000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffffffffff0000000p+1023:0x00ffefffffffffffff)
+ to single: f32(-inf:0xff800000) (OVERFLOW INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.1874b135ff6540000000p+103:0x00c661874b135ff654)
+ to single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.c0bab523323b90000000p+99:0x00c62c0bab523323b9)
+ to single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.00000000000000000000p+1:0x00c000000000000000)
+ to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
+ to int32: -2 (OK)
+ to int64: -2 (OK)
+ to uint32: -2 (OK)
+ to uint64: -2 (OK)
+from double: f64(-0x1.00000000000000000000p+0:0x00bff0000000000000)
+ to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
+ to int32: -1 (OK)
+ to int64: -1 (OK)
+ to uint32: -1 (OK)
+ to uint64: -1 (OK)
+from double: f64(-0x1.00000000000000000000p-1022:0x008010000000000000)
+ to single: f32(-0x1.00000000000000000000p-149:0x80000001) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000)
+ to single: f32(-0x1.00000000000000000000p-126:0x80800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.00000000000000000000p+0:00000000000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from double: f64(0x1.00000000000000000000p-126:0x003810000000000000)
+ to single: f32(0x1.00000000000000000000p-126:0x00800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000001c5f680000000p-25:0x003e600000001c5f68)
+ to single: f32(0x1.00000000000000000000p-25:0x33000000) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ffffe6cb2fa820000000p-25:0x003e6ffffe6cb2fa82)
+ to single: f32(0x1.ffffe600000000000000p-25:0x337ffff3) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ff801a9af58a10000000p-15:0x003f0ff801a9af58a1)
+ to single: f32(0x1.ff801a00000000000000p-15:0x387fc00d) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000c06a1ef50000000p-14:0x003f100000c06a1ef5)
+ to single: f32(0x1.00000c00000000000000p-14:0x38800006) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000)
+ to single: f32(0x1.00400000000000000000p+0:0x3f802000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from double: f64(0x1.00000000000000000000p-1022:0x000010000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.9ea82a22876800000000p-1022:0x000009ea82a2287680)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.ab98fba8432100000000p-1022:0x00000ab98fba843210)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00000000000000000000p+1:0x004000000000000000)
+ to single: f32(0x1.00000000000000000000p+1:0x40000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from double: f64(0x1.5bf0a8b1457690000000p+1:0x004005bf0a8b145769)
+ to single: f32(0x1.5bf0a800000000000000p+1:0x402df854) (INEXACT )
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from double: f64(0x1.921fb54442d180000000p+1:0x00400921fb54442d18)
+ to single: f32(0x1.921fb400000000000000p+1:0x40490fda) (INEXACT )
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000)
+ to single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+15:0x477fe000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000)
+ to single: f32(0x1.ffc20000000000000000p+15:0x477fe100) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000)
+ to single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+16:0x47ffe000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000)
+ to single: f32(0x1.ffc10000000000000000p+16:0x47ffe080) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from double: f64(0x1.fffffffc000000000000p+30:0x0041dfffffffc00000)
+ to single: f32(0x1.fffffe00000000000000p+30:0x4effffff) (INEXACT )
+ to int32: 2147483647 (OK)
+ to int64: 2147483647 (OK)
+ to uint32: 2147483647 (OK)
+ to uint64: 2147483647 (OK)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffffffffff0000000p+1023:0x007fefffffffffffff)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OVERFLOW INEXACT )
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(inf:0x007ff0000000000000)
+ to single: f32(inf:0x7f800000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from double: f64(nan:0x007ff8000000000000)
+ to single: f32(nan:0x7fc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff0000000000001)
+ to single: f32(nan:0x7fc00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding to zero
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-nan:0x00fff8000000000000)
+ to single: f32(-nan:0xffc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(-inf:0x00fff0000000000000)
+ to single: f32(-inf:0xff800000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffffffffff0000000p+1023:0x00ffefffffffffffff)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OVERFLOW INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000)
+ to single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.1874b135ff6540000000p+103:0x00c661874b135ff654)
+ to single: f32(-0x1.1874b000000000000000p+103:0xf30c3a58) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.c0bab523323b90000000p+99:0x00c62c0bab523323b9)
+ to single: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) (INEXACT )
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from double: f64(-0x1.00000000000000000000p+1:0x00c000000000000000)
+ to single: f32(-0x1.00000000000000000000p+1:0xc0000000) (OK)
+ to int32: -2 (OK)
+ to int64: -2 (OK)
+ to uint32: -2 (OK)
+ to uint64: -2 (OK)
+from double: f64(-0x1.00000000000000000000p+0:0x00bff0000000000000)
+ to single: f32(-0x1.00000000000000000000p+0:0xbf800000) (OK)
+ to int32: -1 (OK)
+ to int64: -1 (OK)
+ to uint32: -1 (OK)
+ to uint64: -1 (OK)
+from double: f64(-0x1.00000000000000000000p-1022:0x008010000000000000)
+ to single: f32(-0x0.00000000000000000000p+0:0x80000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000)
+ to single: f32(-0x1.00000000000000000000p-126:0x80800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.00000000000000000000p+0:00000000000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from double: f64(0x1.00000000000000000000p-126:0x003810000000000000)
+ to single: f32(0x1.00000000000000000000p-126:0x00800000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000001c5f680000000p-25:0x003e600000001c5f68)
+ to single: f32(0x1.00000000000000000000p-25:0x33000000) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ffffe6cb2fa820000000p-25:0x003e6ffffe6cb2fa82)
+ to single: f32(0x1.ffffe600000000000000p-25:0x337ffff3) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.ff801a9af58a10000000p-15:0x003f0ff801a9af58a1)
+ to single: f32(0x1.ff801a00000000000000p-15:0x387fc00d) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000c06a1ef50000000p-14:0x003f100000c06a1ef5)
+ to single: f32(0x1.00000c00000000000000p-14:0x38800006) (INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000)
+ to single: f32(0x1.00400000000000000000p+0:0x3f802000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from double: f64(0x1.00000000000000000000p-1022:0x000010000000000000)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.9ea82a22876800000000p-1022:0x000009ea82a2287680)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x0.ab98fba8432100000000p-1022:0x00000ab98fba843210)
+ to single: f32(0x0.00000000000000000000p+0:0000000000) (UNDERFLOW INEXACT )
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000)
+ to single: f32(0x1.00000000000000000000p+0:0x3f800000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from double: f64(0x1.00000000000000000000p+1:0x004000000000000000)
+ to single: f32(0x1.00000000000000000000p+1:0x40000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from double: f64(0x1.5bf0a8b1457690000000p+1:0x004005bf0a8b145769)
+ to single: f32(0x1.5bf0a800000000000000p+1:0x402df854) (INEXACT )
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from double: f64(0x1.921fb54442d180000000p+1:0x00400921fb54442d18)
+ to single: f32(0x1.921fb400000000000000p+1:0x40490fda) (INEXACT )
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000)
+ to single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+15:0x477fe000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000)
+ to single: f32(0x1.ffc20000000000000000p+15:0x477fe100) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000)
+ to single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000)
+ to single: f32(0x1.ffc00000000000000000p+16:0x47ffe000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000)
+ to single: f32(0x1.ffc10000000000000000p+16:0x47ffe080) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from double: f64(0x1.fffffffc000000000000p+30:0x0041dfffffffc00000)
+ to single: f32(0x1.fffffe00000000000000p+30:0x4effffff) (INEXACT )
+ to int32: 2147483647 (OK)
+ to int64: 2147483647 (OK)
+ to uint32: 2147483647 (OK)
+ to uint64: 2147483647 (OK)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(0x1.fffffffffffff0000000p+1023:0x007fefffffffffffff)
+ to single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) (OVERFLOW INEXACT )
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from double: f64(inf:0x007ff0000000000000)
+ to single: f32(inf:0x7f800000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from double: f64(nan:0x007ff8000000000000)
+ to single: f32(nan:0x7fc00000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff0000000000001)
+ to single: f32(nan:0x7fc00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from double: f64(nan:0x007ff4000000000000)
+ to single: f32(nan:0x7fe00000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
diff --git a/tests/tcg/loongarch64/float_convs.ref b/tests/tcg/loongarch64/float_convs.ref
new file mode 100644
index 0000000000..66c7679dec
--- /dev/null
+++ b/tests/tcg/loongarch64/float_convs.ref
@@ -0,0 +1,748 @@
+### Rounding to nearest
+from single: f32(-nan:0xffa00000)
+ to double: f64(-nan:0x00fffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-nan:0xffc00000)
+ to double: f64(-nan:0x00fff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-inf:0xff800000)
+ to double: f64(-inf:0x00fff0000000000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+ to double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+ to double: f64(-0x1.1874b200000000000000p+103:0x00c661874b20000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+ to double: f64(-0x1.c0bab600000000000000p+99:0x00c62c0bab60000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+ to double: f64(-0x1.31f75000000000000000p-40:0x00bd731f7500000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+ to double: f64(-0x1.50544400000000000000p-66:0x00bbd5054440000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.00000000000000000000p-126:0x80800000)
+ to double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x0.00000000000000000000p+0:0000000000)
+ to double: f64(0x0.00000000000000000000p+0:00000000000000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from single: f32(0x1.00000000000000000000p-126:0x00800000)
+ to double: f64(0x1.00000000000000000000p-126:0x003810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p-25:0x33000000)
+ to double: f64(0x1.00000000000000000000p-25:0x003e60000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+ to double: f64(0x1.ffffe600000000000000p-25:0x003e6ffffe60000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+ to double: f64(0x1.ff801a00000000000000p-15:0x003f0ff801a0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000c00000000000000p-14:0x38800006)
+ to double: f64(0x1.00000c00000000000000p-14:0x003f100000c0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p+0:0x3f800000)
+ to double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from single: f32(0x1.00400000000000000000p+0:0x3f802000)
+ to double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from single: f32(0x1.00000000000000000000p+1:0x40000000)
+ to double: f64(0x1.00000000000000000000p+1:0x004000000000000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from single: f32(0x1.5bf0a800000000000000p+1:0x402df854)
+ to double: f64(0x1.5bf0a800000000000000p+1:0x004005bf0a80000000) (OK)
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from single: f32(0x1.921fb600000000000000p+1:0x40490fdb)
+ to double: f64(0x1.921fb600000000000000p+1:0x00400921fb60000000) (OK)
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+ to double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from single: f32(0x1.ffc00000000000000000p+15:0x477fe000)
+ to double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from single: f32(0x1.ffc20000000000000000p+15:0x477fe100)
+ to double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+ to double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from single: f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+ to double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from single: f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+ to double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from single: f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+ to double: f64(0x1.c0bab600000000000000p+99:0x00462c0bab60000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+ to double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(inf:0x7f800000)
+ to double: f64(inf:0x007ff0000000000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from single: f32(nan:0x7fc00000)
+ to double: f64(nan:0x007ff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(nan:0x7fa00000)
+ to double: f64(nan:0x007ffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding upwards
+from single: f32(-nan:0xffa00000)
+ to double: f64(-nan:0x00fffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-nan:0xffc00000)
+ to double: f64(-nan:0x00fff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-inf:0xff800000)
+ to double: f64(-inf:0x00fff0000000000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+ to double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+ to double: f64(-0x1.1874b200000000000000p+103:0x00c661874b20000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+ to double: f64(-0x1.c0bab600000000000000p+99:0x00c62c0bab60000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+ to double: f64(-0x1.31f75000000000000000p-40:0x00bd731f7500000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+ to double: f64(-0x1.50544400000000000000p-66:0x00bbd5054440000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.00000000000000000000p-126:0x80800000)
+ to double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x0.00000000000000000000p+0:0000000000)
+ to double: f64(0x0.00000000000000000000p+0:00000000000000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from single: f32(0x1.00000000000000000000p-126:0x00800000)
+ to double: f64(0x1.00000000000000000000p-126:0x003810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p-25:0x33000000)
+ to double: f64(0x1.00000000000000000000p-25:0x003e60000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+ to double: f64(0x1.ffffe600000000000000p-25:0x003e6ffffe60000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+ to double: f64(0x1.ff801a00000000000000p-15:0x003f0ff801a0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000c00000000000000p-14:0x38800006)
+ to double: f64(0x1.00000c00000000000000p-14:0x003f100000c0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p+0:0x3f800000)
+ to double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from single: f32(0x1.00400000000000000000p+0:0x3f802000)
+ to double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from single: f32(0x1.00000000000000000000p+1:0x40000000)
+ to double: f64(0x1.00000000000000000000p+1:0x004000000000000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from single: f32(0x1.5bf0a800000000000000p+1:0x402df854)
+ to double: f64(0x1.5bf0a800000000000000p+1:0x004005bf0a80000000) (OK)
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from single: f32(0x1.921fb600000000000000p+1:0x40490fdb)
+ to double: f64(0x1.921fb600000000000000p+1:0x00400921fb60000000) (OK)
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+ to double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from single: f32(0x1.ffc00000000000000000p+15:0x477fe000)
+ to double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from single: f32(0x1.ffc20000000000000000p+15:0x477fe100)
+ to double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+ to double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from single: f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+ to double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from single: f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+ to double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from single: f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+ to double: f64(0x1.c0bab600000000000000p+99:0x00462c0bab60000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+ to double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(inf:0x7f800000)
+ to double: f64(inf:0x007ff0000000000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from single: f32(nan:0x7fc00000)
+ to double: f64(nan:0x007ff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(nan:0x7fa00000)
+ to double: f64(nan:0x007ffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding downwards
+from single: f32(-nan:0xffa00000)
+ to double: f64(-nan:0x00fffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-nan:0xffc00000)
+ to double: f64(-nan:0x00fff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-inf:0xff800000)
+ to double: f64(-inf:0x00fff0000000000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+ to double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+ to double: f64(-0x1.1874b200000000000000p+103:0x00c661874b20000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+ to double: f64(-0x1.c0bab600000000000000p+99:0x00c62c0bab60000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+ to double: f64(-0x1.31f75000000000000000p-40:0x00bd731f7500000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+ to double: f64(-0x1.50544400000000000000p-66:0x00bbd5054440000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.00000000000000000000p-126:0x80800000)
+ to double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x0.00000000000000000000p+0:0000000000)
+ to double: f64(0x0.00000000000000000000p+0:00000000000000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from single: f32(0x1.00000000000000000000p-126:0x00800000)
+ to double: f64(0x1.00000000000000000000p-126:0x003810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p-25:0x33000000)
+ to double: f64(0x1.00000000000000000000p-25:0x003e60000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+ to double: f64(0x1.ffffe600000000000000p-25:0x003e6ffffe60000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+ to double: f64(0x1.ff801a00000000000000p-15:0x003f0ff801a0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000c00000000000000p-14:0x38800006)
+ to double: f64(0x1.00000c00000000000000p-14:0x003f100000c0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p+0:0x3f800000)
+ to double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from single: f32(0x1.00400000000000000000p+0:0x3f802000)
+ to double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from single: f32(0x1.00000000000000000000p+1:0x40000000)
+ to double: f64(0x1.00000000000000000000p+1:0x004000000000000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from single: f32(0x1.5bf0a800000000000000p+1:0x402df854)
+ to double: f64(0x1.5bf0a800000000000000p+1:0x004005bf0a80000000) (OK)
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from single: f32(0x1.921fb600000000000000p+1:0x40490fdb)
+ to double: f64(0x1.921fb600000000000000p+1:0x00400921fb60000000) (OK)
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+ to double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from single: f32(0x1.ffc00000000000000000p+15:0x477fe000)
+ to double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from single: f32(0x1.ffc20000000000000000p+15:0x477fe100)
+ to double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+ to double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from single: f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+ to double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from single: f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+ to double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from single: f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+ to double: f64(0x1.c0bab600000000000000p+99:0x00462c0bab60000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+ to double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(inf:0x7f800000)
+ to double: f64(inf:0x007ff0000000000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from single: f32(nan:0x7fc00000)
+ to double: f64(nan:0x007ff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(nan:0x7fa00000)
+ to double: f64(nan:0x007ffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+### Rounding to zero
+from single: f32(-nan:0xffa00000)
+ to double: f64(-nan:0x00fffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-nan:0xffc00000)
+ to double: f64(-nan:0x00fff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(-inf:0xff800000)
+ to double: f64(-inf:0x00fff0000000000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+ to double: f64(-0x1.fffffe00000000000000p+127:0x00c7efffffe0000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+ to double: f64(-0x1.1874b200000000000000p+103:0x00c661874b20000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+ to double: f64(-0x1.c0bab600000000000000p+99:0x00c62c0bab60000000) (OK)
+ to int32: -2147483648 (INVALID)
+ to int64: -9223372036854775808 (INVALID)
+ to uint32: -2147483648 (INVALID)
+ to uint64: -9223372036854775808 (INVALID)
+from single: f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+ to double: f64(-0x1.31f75000000000000000p-40:0x00bd731f7500000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+ to double: f64(-0x1.50544400000000000000p-66:0x00bbd5054440000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(-0x1.00000000000000000000p-126:0x80800000)
+ to double: f64(-0x1.00000000000000000000p-126:0x00b810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x0.00000000000000000000p+0:0000000000)
+ to double: f64(0x0.00000000000000000000p+0:00000000000000000000) (OK)
+ to int32: 0 (OK)
+ to int64: 0 (OK)
+ to uint32: 0 (OK)
+ to uint64: 0 (OK)
+from single: f32(0x1.00000000000000000000p-126:0x00800000)
+ to double: f64(0x1.00000000000000000000p-126:0x003810000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p-25:0x33000000)
+ to double: f64(0x1.00000000000000000000p-25:0x003e60000000000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+ to double: f64(0x1.ffffe600000000000000p-25:0x003e6ffffe60000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+ to double: f64(0x1.ff801a00000000000000p-15:0x003f0ff801a0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000c00000000000000p-14:0x38800006)
+ to double: f64(0x1.00000c00000000000000p-14:0x003f100000c0000000) (OK)
+ to int32: 0 (INEXACT )
+ to int64: 0 (INEXACT )
+ to uint32: 0 (INEXACT )
+ to uint64: 0 (INEXACT )
+from single: f32(0x1.00000000000000000000p+0:0x3f800000)
+ to double: f64(0x1.00000000000000000000p+0:0x003ff0000000000000) (OK)
+ to int32: 1 (OK)
+ to int64: 1 (OK)
+ to uint32: 1 (OK)
+ to uint64: 1 (OK)
+from single: f32(0x1.00400000000000000000p+0:0x3f802000)
+ to double: f64(0x1.00400000000000000000p+0:0x003ff0040000000000) (OK)
+ to int32: 1 (INEXACT )
+ to int64: 1 (INEXACT )
+ to uint32: 1 (INEXACT )
+ to uint64: 1 (INEXACT )
+from single: f32(0x1.00000000000000000000p+1:0x40000000)
+ to double: f64(0x1.00000000000000000000p+1:0x004000000000000000) (OK)
+ to int32: 2 (OK)
+ to int64: 2 (OK)
+ to uint32: 2 (OK)
+ to uint64: 2 (OK)
+from single: f32(0x1.5bf0a800000000000000p+1:0x402df854)
+ to double: f64(0x1.5bf0a800000000000000p+1:0x004005bf0a80000000) (OK)
+ to int32: 2 (INEXACT )
+ to int64: 2 (INEXACT )
+ to uint32: 2 (INEXACT )
+ to uint64: 2 (INEXACT )
+from single: f32(0x1.921fb600000000000000p+1:0x40490fdb)
+ to double: f64(0x1.921fb600000000000000p+1:0x00400921fb60000000) (OK)
+ to int32: 3 (INEXACT )
+ to int64: 3 (INEXACT )
+ to uint32: 3 (INEXACT )
+ to uint64: 3 (INEXACT )
+from single: f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+ to double: f64(0x1.ffbe0000000000000000p+15:0x0040effbe000000000) (OK)
+ to int32: 65503 (OK)
+ to int64: 65503 (OK)
+ to uint32: 65503 (OK)
+ to uint64: 65503 (OK)
+from single: f32(0x1.ffc00000000000000000p+15:0x477fe000)
+ to double: f64(0x1.ffc00000000000000000p+15:0x0040effc0000000000) (OK)
+ to int32: 65504 (OK)
+ to int64: 65504 (OK)
+ to uint32: 65504 (OK)
+ to uint64: 65504 (OK)
+from single: f32(0x1.ffc20000000000000000p+15:0x477fe100)
+ to double: f64(0x1.ffc20000000000000000p+15:0x0040effc2000000000) (OK)
+ to int32: 65505 (OK)
+ to int64: 65505 (OK)
+ to uint32: 65505 (OK)
+ to uint64: 65505 (OK)
+from single: f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+ to double: f64(0x1.ffbf0000000000000000p+16:0x0040fffbf000000000) (OK)
+ to int32: 131007 (OK)
+ to int64: 131007 (OK)
+ to uint32: 131007 (OK)
+ to uint64: 131007 (OK)
+from single: f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+ to double: f64(0x1.ffc00000000000000000p+16:0x0040fffc0000000000) (OK)
+ to int32: 131008 (OK)
+ to int64: 131008 (OK)
+ to uint32: 131008 (OK)
+ to uint64: 131008 (OK)
+from single: f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+ to double: f64(0x1.ffc10000000000000000p+16:0x0040fffc1000000000) (OK)
+ to int32: 131009 (OK)
+ to int64: 131009 (OK)
+ to uint32: 131009 (OK)
+ to uint64: 131009 (OK)
+from single: f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+ to double: f64(0x1.c0bab600000000000000p+99:0x00462c0bab60000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+ to double: f64(0x1.fffffe00000000000000p+127:0x0047efffffe0000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INEXACT INVALID)
+ to uint64: -1 (INEXACT INVALID)
+from single: f32(inf:0x7f800000)
+ to double: f64(inf:0x007ff0000000000000) (OK)
+ to int32: 2147483647 (INVALID)
+ to int64: 9223372036854775807 (INVALID)
+ to uint32: -1 (INVALID)
+ to uint64: -1 (INVALID)
+from single: f32(nan:0x7fc00000)
+ to double: f64(nan:0x007ff8000000000000) (OK)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
+from single: f32(nan:0x7fa00000)
+ to double: f64(nan:0x007ffc000000000000) (INVALID)
+ to int32: 0 (INVALID)
+ to int64: 0 (INVALID)
+ to uint32: 0 (INVALID)
+ to uint64: 0 (INVALID)
diff --git a/tests/tcg/loongarch64/float_madds.ref b/tests/tcg/loongarch64/float_madds.ref
new file mode 100644
index 0000000000..21c0539887
--- /dev/null
+++ b/tests/tcg/loongarch64/float_madds.ref
@@ -0,0 +1,768 @@
+### Rounding to nearest
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/0)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/1)
+op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/2)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(-nan:0xffc00000) flags=OK (1/0)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffc00000) flags=OK (1/1)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffc00000) flags=OK (1/2)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OK (2/0)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-inf:0xff800000)
+res: f32(-inf:0xff800000) flags=OK (2/1)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OK (2/2)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/1)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/2)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (4/0)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) flags=INEXACT (4/1)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) flags=INEXACT (4/2)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(0x1.0c27fa00000000000000p+60:0x5d8613fd) flags=INEXACT (5/0)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) flags=INEXACT (5/1)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.26c46200000000000000p+34:0x50936231) flags=INEXACT (5/2)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(0x1.91f94000000000000000p-106:0x0ac8fca0) flags=INEXACT (6/0)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(-0x1.31f75000000000000000p-40:0xab98fba8) flags=INEXACT (6/1)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=INEXACT (6/2)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (7/0)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=OK (7/1)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (7/2)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (8/0)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (8/1)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(-0x0.00000000000000000000p+0:0x80000000) flags=UNDERFLOW INEXACT (8/2)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=OK (9/0)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (9/1)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (9/2)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.ffffe600000000000000p-25:0x337ffff3) flags=INEXACT (10/0)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.ffffe600000000000000p-50:0x26fffff3) flags=INEXACT (10/1)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=INEXACT (10/2)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801a00000000000000p-15:0x387fc00d) flags=INEXACT (11/0)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.0007fe00000000000000p-25:0x330003ff) flags=INEXACT (11/1)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0001f200000000000000p-24:0x338000f9) flags=INEXACT (11/2)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00000c00000000000000p-14:0x38800006) flags=INEXACT (12/0)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0ffbf400000000000000p-24:0x3387fdfa) flags=INEXACT (12/1)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801c00000000000000p-15:0x387fc00e) flags=INEXACT (12/2)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00000000000000000000p+0:0x3f800000) flags=INEXACT (13/0)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/1)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/2)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/0)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/1)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00040200000000000000p+0:0x3f800201) flags=INEXACT (14/2)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/0)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.80400000000000000000p+1:0x40402000) flags=OK (15/1)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/2)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.2e185400000000000000p+2:0x40970c2a) flags=OK (16/0)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.9c00a800000000000000p+2:0x40ce0054) flags=OK (16/1)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.2e23d200000000000000p+2:0x409711e9) flags=INEXACT (16/2)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.12804200000000000000p+3:0x41094021) flags=INEXACT (17/0)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.51458000000000000000p+3:0x4128a2c0) flags=INEXACT (17/1)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.200c0400000000000000p+3:0x41100602) flags=INEXACT (17/2)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ffcf1400000000000000p+15:0x477fe78a) flags=INEXACT (18/0)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.91ed3c00000000000000p+17:0x4848f69e) flags=INEXACT (18/1)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.5bc56000000000000000p+17:0x482de2b0) flags=INEXACT (18/2)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.08edf000000000000000p+18:0x488476f8) flags=INEXACT (19/0)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.ff7e0800000000000000p+31:0x4f7fbf04) flags=INEXACT (19/1)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.08ee7a00000000000000p+18:0x4884773d) flags=INEXACT (19/2)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+31:0x4f7fc004) flags=INEXACT (20/0)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ff840800000000000000p+31:0x4f7fc204) flags=INEXACT (20/1)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820800000000000000p+31:0x4f7fc104) flags=INEXACT (20/2)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff860800000000000000p+31:0x4f7fc304) flags=INEXACT (21/0)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820800000000000000p+32:0x4fffc104) flags=INEXACT (21/1)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+32:0x4fffc004) flags=INEXACT (21/2)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff830800000000000000p+32:0x4fffc184) flags=INEXACT (22/0)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff7f8800000000000000p+33:0x507fbfc4) flags=INEXACT (22/1)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff840800000000000000p+32:0x4fffc204) flags=INEXACT (22/2)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.ff800800000000000000p+33:0x507fc004) flags=INEXACT (23/0)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff820800000000000000p+33:0x507fc104) flags=INEXACT (23/1)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff810800000000000000p+33:0x507fc084) flags=INEXACT (23/2)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.c0bab600000000000000p+99:0x71605d5b) flags=INEXACT (24/0)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.c0838000000000000000p+116:0x79e041c0) flags=INEXACT (24/1)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.c0829e00000000000000p+116:0x79e0414f) flags=INEXACT (24/2)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/0)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/1)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/2)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(inf:0x7f800000) flags=OK (26/0)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OK (26/1)
+op : f32(inf:0x7f800000) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OK (26/2)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fc00000) flags=OK (27/0)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(nan:0x7fc00000) flags=OK (27/1)
+op : f32(nan:0x7fc00000) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(nan:0x7fc00000) flags=OK (27/2)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/0)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(inf:0x7f800000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/1)
+op : f32(nan:0x7fa00000) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/2)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (29/0)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/1)
+op : f32(-nan:0xffa00000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/2)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/0)
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/1)
+op : f32(-nan:0xffc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (30/2)
+# LP184149
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-1:0x3f000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=OK (31/0)
+op : f32(0x1.00000000000000000000p-149:0x00000001) * f32(0x1.00000000000000000000p-149:0x00000001) + f32(0x1.00000000000000000000p-149:0x00000001)
+res: f32(0x1.00000000000000000000p-149:0x00000001) flags=UNDERFLOW INEXACT (32/0)
+### Rounding upwards
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/0)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/1)
+op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/2)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(-nan:0xffc00000) flags=OK (1/0)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffc00000) flags=OK (1/1)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffc00000) flags=OK (1/2)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OK (2/0)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-inf:0xff800000)
+res: f32(-inf:0xff800000) flags=OK (2/1)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OK (2/2)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/0)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/1)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (3/2)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (4/0)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(-0x1.1874b000000000000000p+103:0xf30c3a58) flags=INEXACT (4/1)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) flags=INEXACT (4/2)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(0x1.0c27fa00000000000000p+60:0x5d8613fd) flags=INEXACT (5/0)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) flags=INEXACT (5/1)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.26c46200000000000000p+34:0x50936231) flags=INEXACT (5/2)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(0x1.91f94000000000000000p-106:0x0ac8fca0) flags=INEXACT (6/0)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(-0x1.31f74e00000000000000p-40:0xab98fba7) flags=INEXACT (6/1)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544200000000000000p-66:0x9ea82a21) flags=INEXACT (6/2)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x1.00000000000000000000p-149:0x00000001) flags=UNDERFLOW INEXACT (7/0)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=OK (7/1)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (7/2)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (8/0)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (8/1)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(-0x0.00000000000000000000p+0:0x80000000) flags=UNDERFLOW INEXACT (8/2)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=OK (9/0)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x1.00000000000000000000p-149:0x00000001) flags=UNDERFLOW INEXACT (9/1)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (9/2)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.ffffe800000000000000p-25:0x337ffff4) flags=INEXACT (10/0)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.ffffe800000000000000p-50:0x26fffff4) flags=INEXACT (10/1)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000200000000000000p-25:0x33000001) flags=INEXACT (10/2)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801c00000000000000p-15:0x387fc00e) flags=INEXACT (11/0)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00080000000000000000p-25:0x33000400) flags=INEXACT (11/1)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0001f400000000000000p-24:0x338000fa) flags=INEXACT (11/2)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00000e00000000000000p-14:0x38800007) flags=INEXACT (12/0)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0ffbf600000000000000p-24:0x3387fdfb) flags=INEXACT (12/1)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801c00000000000000p-15:0x387fc00e) flags=INEXACT (12/2)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00000200000000000000p+0:0x3f800001) flags=INEXACT (13/0)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ffc01a00000000000000p-14:0x38ffe00d) flags=INEXACT (13/1)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.ffc01a00000000000000p-14:0x38ffe00d) flags=INEXACT (13/2)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.00440200000000000000p+0:0x3f802201) flags=INEXACT (14/0)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00440200000000000000p+0:0x3f802201) flags=INEXACT (14/1)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00040200000000000000p+0:0x3f800201) flags=INEXACT (14/2)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/0)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.80400000000000000000p+1:0x40402000) flags=OK (15/1)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/2)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.2e185400000000000000p+2:0x40970c2a) flags=OK (16/0)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.9c00a800000000000000p+2:0x40ce0054) flags=OK (16/1)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.2e23d400000000000000p+2:0x409711ea) flags=INEXACT (16/2)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.12804200000000000000p+3:0x41094021) flags=INEXACT (17/0)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.51458200000000000000p+3:0x4128a2c1) flags=INEXACT (17/1)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.200c0600000000000000p+3:0x41100603) flags=INEXACT (17/2)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ffcf1600000000000000p+15:0x477fe78b) flags=INEXACT (18/0)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.91ed3c00000000000000p+17:0x4848f69e) flags=INEXACT (18/1)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.5bc56200000000000000p+17:0x482de2b1) flags=INEXACT (18/2)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.08edf000000000000000p+18:0x488476f8) flags=INEXACT (19/0)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.ff7e0a00000000000000p+31:0x4f7fbf05) flags=INEXACT (19/1)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.08ee7a00000000000000p+18:0x4884773d) flags=INEXACT (19/2)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800a00000000000000p+31:0x4f7fc005) flags=INEXACT (20/0)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ff840800000000000000p+31:0x4f7fc204) flags=INEXACT (20/1)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820800000000000000p+31:0x4f7fc104) flags=INEXACT (20/2)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff860800000000000000p+31:0x4f7fc304) flags=INEXACT (21/0)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820800000000000000p+32:0x4fffc104) flags=INEXACT (21/1)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800a00000000000000p+32:0x4fffc005) flags=INEXACT (21/2)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff830800000000000000p+32:0x4fffc184) flags=INEXACT (22/0)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff7f8a00000000000000p+33:0x507fbfc5) flags=INEXACT (22/1)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff840800000000000000p+32:0x4fffc204) flags=INEXACT (22/2)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.ff800a00000000000000p+33:0x507fc005) flags=INEXACT (23/0)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff820800000000000000p+33:0x507fc104) flags=INEXACT (23/1)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff810800000000000000p+33:0x507fc084) flags=INEXACT (23/2)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.c0bab800000000000000p+99:0x71605d5c) flags=INEXACT (24/0)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.c0838000000000000000p+116:0x79e041c0) flags=INEXACT (24/1)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.c082a000000000000000p+116:0x79e04150) flags=INEXACT (24/2)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/0)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/1)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OVERFLOW INEXACT (25/2)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(inf:0x7f800000) flags=OK (26/0)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OK (26/1)
+op : f32(inf:0x7f800000) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OK (26/2)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fc00000) flags=OK (27/0)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(nan:0x7fc00000) flags=OK (27/1)
+op : f32(nan:0x7fc00000) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(nan:0x7fc00000) flags=OK (27/2)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/0)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(inf:0x7f800000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/1)
+op : f32(nan:0x7fa00000) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/2)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (29/0)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/1)
+op : f32(-nan:0xffa00000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/2)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/0)
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/1)
+op : f32(-nan:0xffc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (30/2)
+# LP184149
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-1:0x3f000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=OK (31/0)
+op : f32(0x1.00000000000000000000p-149:0x00000001) * f32(0x1.00000000000000000000p-149:0x00000001) + f32(0x1.00000000000000000000p-149:0x00000001)
+res: f32(0x1.00000000000000000000p-148:0x00000002) flags=UNDERFLOW INEXACT (32/0)
+### Rounding downwards
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/0)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/1)
+op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/2)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(-nan:0xffc00000) flags=OK (1/0)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffc00000) flags=OK (1/1)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffc00000) flags=OK (1/2)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OK (2/0)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-inf:0xff800000)
+res: f32(-inf:0xff800000) flags=OK (2/1)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OK (2/2)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/0)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/1)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/2)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (4/0)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(-0x1.1874b200000000000000p+103:0xf30c3a59) flags=INEXACT (4/1)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) flags=INEXACT (4/2)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(0x1.0c27f800000000000000p+60:0x5d8613fc) flags=INEXACT (5/0)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) flags=INEXACT (5/1)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.26c46000000000000000p+34:0x50936230) flags=INEXACT (5/2)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(0x1.91f93e00000000000000p-106:0x0ac8fc9f) flags=INEXACT (6/0)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(-0x1.31f75000000000000000p-40:0xab98fba8) flags=INEXACT (6/1)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=INEXACT (6/2)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (7/0)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=OK (7/1)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (7/2)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (8/0)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (8/1)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(-0x1.00000000000000000000p-149:0x80000001) flags=UNDERFLOW INEXACT (8/2)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=OK (9/0)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (9/1)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (9/2)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.ffffe600000000000000p-25:0x337ffff3) flags=INEXACT (10/0)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.ffffe600000000000000p-50:0x26fffff3) flags=INEXACT (10/1)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=INEXACT (10/2)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801a00000000000000p-15:0x387fc00d) flags=INEXACT (11/0)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.0007fe00000000000000p-25:0x330003ff) flags=INEXACT (11/1)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0001f200000000000000p-24:0x338000f9) flags=INEXACT (11/2)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00000c00000000000000p-14:0x38800006) flags=INEXACT (12/0)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0ffbf400000000000000p-24:0x3387fdfa) flags=INEXACT (12/1)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801a00000000000000p-15:0x387fc00d) flags=INEXACT (12/2)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00000000000000000000p+0:0x3f800000) flags=INEXACT (13/0)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/1)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/2)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/0)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/1)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00040000000000000000p+0:0x3f800200) flags=INEXACT (14/2)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/0)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.80400000000000000000p+1:0x40402000) flags=OK (15/1)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/2)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.2e185400000000000000p+2:0x40970c2a) flags=OK (16/0)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.9c00a800000000000000p+2:0x40ce0054) flags=OK (16/1)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.2e23d200000000000000p+2:0x409711e9) flags=INEXACT (16/2)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.12804000000000000000p+3:0x41094020) flags=INEXACT (17/0)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.51458000000000000000p+3:0x4128a2c0) flags=INEXACT (17/1)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.200c0400000000000000p+3:0x41100602) flags=INEXACT (17/2)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ffcf1400000000000000p+15:0x477fe78a) flags=INEXACT (18/0)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.91ed3a00000000000000p+17:0x4848f69d) flags=INEXACT (18/1)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.5bc56000000000000000p+17:0x482de2b0) flags=INEXACT (18/2)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.08edee00000000000000p+18:0x488476f7) flags=INEXACT (19/0)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.ff7e0800000000000000p+31:0x4f7fbf04) flags=INEXACT (19/1)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.08ee7800000000000000p+18:0x4884773c) flags=INEXACT (19/2)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+31:0x4f7fc004) flags=INEXACT (20/0)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ff840600000000000000p+31:0x4f7fc203) flags=INEXACT (20/1)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820600000000000000p+31:0x4f7fc103) flags=INEXACT (20/2)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff860600000000000000p+31:0x4f7fc303) flags=INEXACT (21/0)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820600000000000000p+32:0x4fffc103) flags=INEXACT (21/1)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+32:0x4fffc004) flags=INEXACT (21/2)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff830600000000000000p+32:0x4fffc183) flags=INEXACT (22/0)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff7f8800000000000000p+33:0x507fbfc4) flags=INEXACT (22/1)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff840600000000000000p+32:0x4fffc203) flags=INEXACT (22/2)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.ff800800000000000000p+33:0x507fc004) flags=INEXACT (23/0)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff820600000000000000p+33:0x507fc103) flags=INEXACT (23/1)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff810600000000000000p+33:0x507fc083) flags=INEXACT (23/2)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.c0bab600000000000000p+99:0x71605d5b) flags=INEXACT (24/0)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.c0837e00000000000000p+116:0x79e041bf) flags=INEXACT (24/1)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.c0829e00000000000000p+116:0x79e0414f) flags=INEXACT (24/2)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/0)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/1)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/2)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(inf:0x7f800000) flags=OK (26/0)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OK (26/1)
+op : f32(inf:0x7f800000) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OK (26/2)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fc00000) flags=OK (27/0)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(nan:0x7fc00000) flags=OK (27/1)
+op : f32(nan:0x7fc00000) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(nan:0x7fc00000) flags=OK (27/2)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/0)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(inf:0x7f800000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/1)
+op : f32(nan:0x7fa00000) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/2)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (29/0)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/1)
+op : f32(-nan:0xffa00000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/2)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/0)
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/1)
+op : f32(-nan:0xffc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (30/2)
+# LP184149
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-1:0x3f000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=OK (31/0)
+op : f32(0x1.00000000000000000000p-149:0x00000001) * f32(0x1.00000000000000000000p-149:0x00000001) + f32(0x1.00000000000000000000p-149:0x00000001)
+res: f32(0x1.00000000000000000000p-149:0x00000001) flags=UNDERFLOW INEXACT (32/0)
+### Rounding to zero
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/0)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/1)
+op : f32(-inf:0xff800000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffe00000) flags=INVALID (0/2)
+op : f32(-nan:0xffc00000) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(-nan:0xffc00000) flags=OK (1/0)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-nan:0xffc00000)
+res: f32(-nan:0xffc00000) flags=OK (1/1)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-nan:0xffc00000) + f32(-inf:0xff800000)
+res: f32(-nan:0xffc00000) flags=OK (1/2)
+op : f32(-inf:0xff800000) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(inf:0x7f800000) flags=OK (2/0)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-inf:0xff800000)
+res: f32(-inf:0xff800000) flags=OK (2/1)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-inf:0xff800000) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(inf:0x7f800000) flags=OK (2/2)
+op : f32(-0x1.fffffe00000000000000p+127:0xff7fffff) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/0)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.fffffe00000000000000p+127:0xff7fffff)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/1)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.fffffe00000000000000p+127:0xff7fffff) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (3/2)
+op : f32(-0x1.1874b200000000000000p+103:0xf30c3a59) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (4/0)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.1874b200000000000000p+103:0xf30c3a59)
+res: f32(-0x1.1874b000000000000000p+103:0xf30c3a58) flags=INEXACT (4/1)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.1874b200000000000000p+103:0xf30c3a59) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) flags=INEXACT (4/2)
+op : f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(0x1.0c27f800000000000000p+60:0x5d8613fc) flags=INEXACT (5/0)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.c0bab600000000000000p+99:0xf1605d5b)
+res: f32(-0x1.c0bab400000000000000p+99:0xf1605d5a) flags=INEXACT (5/1)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.c0bab600000000000000p+99:0xf1605d5b) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(0x1.26c46000000000000000p+34:0x50936230) flags=INEXACT (5/2)
+op : f32(-0x1.31f75000000000000000p-40:0xab98fba8) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(0x1.91f93e00000000000000p-106:0x0ac8fc9f) flags=INEXACT (6/0)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(-0x1.31f75000000000000000p-40:0xab98fba8)
+res: f32(-0x1.31f74e00000000000000p-40:0xab98fba7) flags=INEXACT (6/1)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(-0x1.31f75000000000000000p-40:0xab98fba8) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544200000000000000p-66:0x9ea82a21) flags=INEXACT (6/2)
+op : f32(-0x1.50544400000000000000p-66:0x9ea82a22) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (7/0)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(-0x1.50544400000000000000p-66:0x9ea82a22)
+res: f32(-0x1.50544400000000000000p-66:0x9ea82a22) flags=OK (7/1)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(-0x1.50544400000000000000p-66:0x9ea82a22) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (7/2)
+op : f32(-0x1.00000000000000000000p-126:0x80800000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (8/0)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(-0x1.00000000000000000000p-126:0x80800000)
+res: f32(-0x1.00000000000000000000p-126:0x80800000) flags=OK (8/1)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(-0x1.00000000000000000000p-126:0x80800000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(-0x0.00000000000000000000p+0:0x80000000) flags=UNDERFLOW INEXACT (8/2)
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=OK (9/0)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=UNDERFLOW INEXACT (9/1)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x0.00000000000000000000p+0:0000000000) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.00000000000000000000p-126:0x00800000) flags=OK (9/2)
+op : f32(0x1.00000000000000000000p-126:0x00800000) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.ffffe600000000000000p-25:0x337ffff3) flags=INEXACT (10/0)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.00000000000000000000p-126:0x00800000)
+res: f32(0x1.ffffe600000000000000p-50:0x26fffff3) flags=INEXACT (10/1)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.00000000000000000000p-126:0x00800000) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.00000000000000000000p-25:0x33000000) flags=INEXACT (10/2)
+op : f32(0x1.00000000000000000000p-25:0x33000000) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801a00000000000000p-15:0x387fc00d) flags=INEXACT (11/0)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000000000000000000p-25:0x33000000)
+res: f32(0x1.0007fe00000000000000p-25:0x330003ff) flags=INEXACT (11/1)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000000000000000000p-25:0x33000000) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0001f200000000000000p-24:0x338000f9) flags=INEXACT (11/2)
+op : f32(0x1.ffffe600000000000000p-25:0x337ffff3) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00000c00000000000000p-14:0x38800006) flags=INEXACT (12/0)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.ffffe600000000000000p-25:0x337ffff3)
+res: f32(0x1.0ffbf400000000000000p-24:0x3387fdfa) flags=INEXACT (12/1)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.ffffe600000000000000p-25:0x337ffff3) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ff801a00000000000000p-15:0x387fc00d) flags=INEXACT (12/2)
+op : f32(0x1.ff801a00000000000000p-15:0x387fc00d) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00000000000000000000p+0:0x3f800000) flags=INEXACT (13/0)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.ff801a00000000000000p-15:0x387fc00d)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/1)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.ff801a00000000000000p-15:0x387fc00d) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.ffc01800000000000000p-14:0x38ffe00c) flags=INEXACT (13/2)
+op : f32(0x1.00000c00000000000000p-14:0x38800006) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/0)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000c00000000000000p-14:0x38800006)
+res: f32(0x1.00440000000000000000p+0:0x3f802200) flags=INEXACT (14/1)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000c00000000000000p-14:0x38800006) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.00040000000000000000p+0:0x3f800200) flags=INEXACT (14/2)
+op : f32(0x1.00000000000000000000p+0:0x3f800000) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/0)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.00000000000000000000p+0:0x3f800000)
+res: f32(0x1.80400000000000000000p+1:0x40402000) flags=OK (15/1)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.00000000000000000000p+0:0x3f800000) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.80200000000000000000p+1:0x40401000) flags=OK (15/2)
+op : f32(0x1.00400000000000000000p+0:0x3f802000) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.2e185400000000000000p+2:0x40970c2a) flags=OK (16/0)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.00400000000000000000p+0:0x3f802000)
+res: f32(0x1.9c00a800000000000000p+2:0x40ce0054) flags=OK (16/1)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.00400000000000000000p+0:0x3f802000) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.2e23d200000000000000p+2:0x409711e9) flags=INEXACT (16/2)
+op : f32(0x1.00000000000000000000p+1:0x40000000) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.12804000000000000000p+3:0x41094020) flags=INEXACT (17/0)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.00000000000000000000p+1:0x40000000)
+res: f32(0x1.51458000000000000000p+3:0x4128a2c0) flags=INEXACT (17/1)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.00000000000000000000p+1:0x40000000) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.200c0400000000000000p+3:0x41100602) flags=INEXACT (17/2)
+op : f32(0x1.5bf0a800000000000000p+1:0x402df854) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ffcf1400000000000000p+15:0x477fe78a) flags=INEXACT (18/0)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.5bf0a800000000000000p+1:0x402df854)
+res: f32(0x1.91ed3a00000000000000p+17:0x4848f69d) flags=INEXACT (18/1)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.5bf0a800000000000000p+1:0x402df854) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.5bc56000000000000000p+17:0x482de2b0) flags=INEXACT (18/2)
+op : f32(0x1.921fb600000000000000p+1:0x40490fdb) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.08edee00000000000000p+18:0x488476f7) flags=INEXACT (19/0)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.921fb600000000000000p+1:0x40490fdb)
+res: f32(0x1.ff7e0800000000000000p+31:0x4f7fbf04) flags=INEXACT (19/1)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.921fb600000000000000p+1:0x40490fdb) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.08ee7800000000000000p+18:0x4884773c) flags=INEXACT (19/2)
+op : f32(0x1.ffbe0000000000000000p+15:0x477fdf00) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+31:0x4f7fc004) flags=INEXACT (20/0)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbe0000000000000000p+15:0x477fdf00)
+res: f32(0x1.ff840600000000000000p+31:0x4f7fc203) flags=INEXACT (20/1)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbe0000000000000000p+15:0x477fdf00) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820600000000000000p+31:0x4f7fc103) flags=INEXACT (20/2)
+op : f32(0x1.ffc00000000000000000p+15:0x477fe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff860600000000000000p+31:0x4f7fc303) flags=INEXACT (21/0)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+15:0x477fe000)
+res: f32(0x1.ff820600000000000000p+32:0x4fffc103) flags=INEXACT (21/1)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+15:0x477fe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff800800000000000000p+32:0x4fffc004) flags=INEXACT (21/2)
+op : f32(0x1.ffc20000000000000000p+15:0x477fe100) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff830600000000000000p+32:0x4fffc183) flags=INEXACT (22/0)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc20000000000000000p+15:0x477fe100)
+res: f32(0x1.ff7f8800000000000000p+33:0x507fbfc4) flags=INEXACT (22/1)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc20000000000000000p+15:0x477fe100) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff840600000000000000p+32:0x4fffc203) flags=INEXACT (22/2)
+op : f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.ff800800000000000000p+33:0x507fc004) flags=INEXACT (23/0)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.ffbf0000000000000000p+16:0x47ffdf80)
+res: f32(0x1.ff820600000000000000p+33:0x507fc103) flags=INEXACT (23/1)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.ffbf0000000000000000p+16:0x47ffdf80) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.ff810600000000000000p+33:0x507fc083) flags=INEXACT (23/2)
+op : f32(0x1.ffc00000000000000000p+16:0x47ffe000) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.c0bab600000000000000p+99:0x71605d5b) flags=INEXACT (24/0)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.ffc00000000000000000p+16:0x47ffe000)
+res: f32(0x1.c0837e00000000000000p+116:0x79e041bf) flags=INEXACT (24/1)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.ffc00000000000000000p+16:0x47ffe000) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.c0829e00000000000000p+116:0x79e0414f) flags=INEXACT (24/2)
+op : f32(0x1.ffc10000000000000000p+16:0x47ffe080) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/0)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(0x1.ffc10000000000000000p+16:0x47ffe080)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/1)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(0x1.ffc10000000000000000p+16:0x47ffe080) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(0x1.fffffe00000000000000p+127:0x7f7fffff) flags=OVERFLOW INEXACT (25/2)
+op : f32(0x1.c0bab600000000000000p+99:0x71605d5b) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(inf:0x7f800000) flags=OK (26/0)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(0x1.c0bab600000000000000p+99:0x71605d5b)
+res: f32(inf:0x7f800000) flags=OK (26/1)
+op : f32(inf:0x7f800000) * f32(0x1.c0bab600000000000000p+99:0x71605d5b) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(inf:0x7f800000) flags=OK (26/2)
+op : f32(0x1.fffffe00000000000000p+127:0x7f7fffff) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fc00000) flags=OK (27/0)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(0x1.fffffe00000000000000p+127:0x7f7fffff)
+res: f32(nan:0x7fc00000) flags=OK (27/1)
+op : f32(nan:0x7fc00000) * f32(0x1.fffffe00000000000000p+127:0x7f7fffff) + f32(inf:0x7f800000)
+res: f32(nan:0x7fc00000) flags=OK (27/2)
+op : f32(inf:0x7f800000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/0)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(inf:0x7f800000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/1)
+op : f32(nan:0x7fa00000) * f32(inf:0x7f800000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (28/2)
+op : f32(nan:0x7fc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (29/0)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(nan:0x7fc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/1)
+op : f32(-nan:0xffa00000) * f32(nan:0x7fc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (29/2)
+op : f32(nan:0x7fa00000) * f32(-nan:0xffa00000) + f32(-nan:0xffc00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/0)
+op : f32(-nan:0xffa00000) * f32(-nan:0xffc00000) + f32(nan:0x7fa00000)
+res: f32(nan:0x7fe00000) flags=INVALID (30/1)
+op : f32(-nan:0xffc00000) * f32(nan:0x7fa00000) + f32(-nan:0xffa00000)
+res: f32(-nan:0xffe00000) flags=INVALID (30/2)
+# LP184149
+op : f32(0x0.00000000000000000000p+0:0000000000) * f32(0x1.00000000000000000000p-1:0x3f000000) + f32(0x0.00000000000000000000p+0:0000000000)
+res: f32(0x0.00000000000000000000p+0:0000000000) flags=OK (31/0)
+op : f32(0x1.00000000000000000000p-149:0x00000001) * f32(0x1.00000000000000000000p-149:0x00000001) + f32(0x1.00000000000000000000p-149:0x00000001)
+res: f32(0x1.00000000000000000000p-149:0x00000001) flags=UNDERFLOW INEXACT (32/0)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 11/21] tests/tcg/loongarch64: Add clo related instructions test
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (9 preceding siblings ...)
2022-07-19 17:59 ` [PULL 10/21] tests/tcg/loongarch64: Add float reference files Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 12/21] tests/tcg/loongarch64: Add div and mod " Richard Henderson
` (10 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
This includes:
- CL{O/Z}.{W/D}
- CT{O/Z}.{W/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-5-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/test_bit.c | 88 +++++++++++++++++++++++++++
tests/tcg/loongarch64/Makefile.target | 15 +++++
2 files changed, 103 insertions(+)
create mode 100644 tests/tcg/loongarch64/test_bit.c
create mode 100644 tests/tcg/loongarch64/Makefile.target
diff --git a/tests/tcg/loongarch64/test_bit.c b/tests/tcg/loongarch64/test_bit.c
new file mode 100644
index 0000000000..a6d9904909
--- /dev/null
+++ b/tests/tcg/loongarch64/test_bit.c
@@ -0,0 +1,88 @@
+#include <assert.h>
+#include <inttypes.h>
+
+#define ARRAY_SIZE(X) (sizeof(X) / sizeof(*(X)))
+#define TEST_CLO(N) \
+static uint64_t test_clo_##N(uint64_t rj) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("clo."#N" %0, %1\n\t" \
+ : "=r"(rd) \
+ : "r"(rj) \
+ : ); \
+ return rd; \
+}
+
+#define TEST_CLZ(N) \
+static uint64_t test_clz_##N(uint64_t rj) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("clz."#N" %0, %1\n\t" \
+ : "=r"(rd) \
+ : "r"(rj) \
+ : ); \
+ return rd; \
+}
+
+#define TEST_CTO(N) \
+static uint64_t test_cto_##N(uint64_t rj) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("cto."#N" %0, %1\n\t" \
+ : "=r"(rd) \
+ : "r"(rj) \
+ : ); \
+ return rd; \
+}
+
+#define TEST_CTZ(N) \
+static uint64_t test_ctz_##N(uint64_t rj) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("ctz."#N" %0, %1\n\t" \
+ : "=r"(rd) \
+ : "r"(rj) \
+ : ); \
+ return rd; \
+}
+
+TEST_CLO(w)
+TEST_CLO(d)
+TEST_CLZ(w)
+TEST_CLZ(d)
+TEST_CTO(w)
+TEST_CTO(d)
+TEST_CTZ(w)
+TEST_CTZ(d)
+
+struct vector {
+ uint64_t (*func)(uint64_t);
+ uint64_t u;
+ uint64_t r;
+};
+
+static struct vector vectors[] = {
+ {test_clo_w, 0xfff11fff392476ab, 0},
+ {test_clo_d, 0xabd28a64000000, 0},
+ {test_clz_w, 0xfaffff42392476ab, 2},
+ {test_clz_d, 0xabd28a64000000, 8},
+ {test_cto_w, 0xfff11fff392476ab, 2},
+ {test_cto_d, 0xabd28a64000000, 0},
+ {test_ctz_w, 0xfaffff42392476ab, 0},
+ {test_ctz_d, 0xabd28a64000000, 26},
+};
+
+int main()
+{
+ int i;
+
+ for (i = 0; i < ARRAY_SIZE(vectors); i++) {
+ assert((*vectors[i].func)(vectors[i].u) == vectors[i].r);
+ }
+
+ return 0;
+}
diff --git a/tests/tcg/loongarch64/Makefile.target b/tests/tcg/loongarch64/Makefile.target
new file mode 100644
index 0000000000..c0bd8b9b86
--- /dev/null
+++ b/tests/tcg/loongarch64/Makefile.target
@@ -0,0 +1,15 @@
+# -*- Mode: makefile -*-
+#
+# LoongArch64 specific tweaks
+
+# Loongarch64 doesn't support gdb, so skip the EXTRA_RUNS
+EXTRA_RUNS =
+
+LOONGARCH64_SRC=$(SRC_PATH)/tests/tcg/loongarch64
+VPATH += $(LOONGARCH64_SRC)
+
+LDFLAGS+=-lm
+
+LOONGARCH64_TESTS = test_bit
+
+TESTS += $(LOONGARCH64_TESTS)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 12/21] tests/tcg/loongarch64: Add div and mod related instructions test
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (10 preceding siblings ...)
2022-07-19 17:59 ` [PULL 11/21] tests/tcg/loongarch64: Add clo related instructions test Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 13/21] tests/tcg/loongarch64: Add fclass test Richard Henderson
` (9 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
This includes:
- DIV.{W[U]/D[U]}
- MOD.{W[U]/D[U]}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-6-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/test_div.c | 54 +++++++++++++++++++++++++++
tests/tcg/loongarch64/Makefile.target | 1 +
2 files changed, 55 insertions(+)
create mode 100644 tests/tcg/loongarch64/test_div.c
diff --git a/tests/tcg/loongarch64/test_div.c b/tests/tcg/loongarch64/test_div.c
new file mode 100644
index 0000000000..6c31fe97ae
--- /dev/null
+++ b/tests/tcg/loongarch64/test_div.c
@@ -0,0 +1,54 @@
+#include <assert.h>
+#include <inttypes.h>
+#include <stdio.h>
+
+#define TEST_DIV(N, M) \
+static void test_div_ ##N(uint ## M ## _t rj, \
+ uint ## M ## _t rk, \
+ uint64_t rm) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("div."#N" %0,%1,%2\n\t" \
+ : "=r"(rd) \
+ : "r"(rj), "r"(rk) \
+ : ); \
+ assert(rd == rm); \
+}
+
+#define TEST_MOD(N, M) \
+static void test_mod_ ##N(uint ## M ## _t rj, \
+ uint ## M ## _t rk, \
+ uint64_t rm) \
+{ \
+ uint64_t rd = 0; \
+ \
+ asm volatile("mod."#N" %0,%1,%2\n\t" \
+ : "=r"(rd) \
+ : "r"(rj), "r"(rk) \
+ : ); \
+ assert(rd == rm); \
+}
+
+TEST_DIV(w, 32)
+TEST_DIV(wu, 32)
+TEST_DIV(d, 64)
+TEST_DIV(du, 64)
+TEST_MOD(w, 32)
+TEST_MOD(wu, 32)
+TEST_MOD(d, 64)
+TEST_MOD(du, 64)
+
+int main(void)
+{
+ test_div_w(0xffaced97, 0xc36abcde, 0x0);
+ test_div_wu(0xffaced97, 0xc36abcde, 0x1);
+ test_div_d(0xffaced973582005f, 0xef56832a358b, 0xffffffffffffffa8);
+ test_div_du(0xffaced973582005f, 0xef56832a358b, 0x11179);
+ test_mod_w(0x7cf18c32, 0xa04da650, 0x1d3f3282);
+ test_mod_wu(0x7cf18c32, 0xc04da650, 0x7cf18c32);
+ test_mod_d(0x7cf18c3200000000, 0xa04da65000000000, 0x1d3f328200000000);
+ test_mod_du(0x7cf18c3200000000, 0xc04da65000000000, 0x7cf18c3200000000);
+
+ return 0;
+}
diff --git a/tests/tcg/loongarch64/Makefile.target b/tests/tcg/loongarch64/Makefile.target
index c0bd8b9b86..24d6bb11e9 100644
--- a/tests/tcg/loongarch64/Makefile.target
+++ b/tests/tcg/loongarch64/Makefile.target
@@ -11,5 +11,6 @@ VPATH += $(LOONGARCH64_SRC)
LDFLAGS+=-lm
LOONGARCH64_TESTS = test_bit
+LOONGARCH64_TESTS += test_div
TESTS += $(LOONGARCH64_TESTS)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 13/21] tests/tcg/loongarch64: Add fclass test
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (11 preceding siblings ...)
2022-07-19 17:59 ` [PULL 12/21] tests/tcg/loongarch64: Add div and mod " Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 14/21] tests/tcg/loongarch64: Add fp comparison instructions test Richard Henderson
` (8 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
This includes:
- FCLASS.{S/D}
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-7-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/test_fclass.c | 130 ++++++++++++++++++++++++++
tests/tcg/loongarch64/Makefile.target | 1 +
2 files changed, 131 insertions(+)
create mode 100644 tests/tcg/loongarch64/test_fclass.c
diff --git a/tests/tcg/loongarch64/test_fclass.c b/tests/tcg/loongarch64/test_fclass.c
new file mode 100644
index 0000000000..7ba1d2c151
--- /dev/null
+++ b/tests/tcg/loongarch64/test_fclass.c
@@ -0,0 +1,130 @@
+#include <stdio.h>
+
+/* float class */
+#define FLOAT_CLASS_SIGNALING_NAN 0x001
+#define FLOAT_CLASS_QUIET_NAN 0x002
+#define FLOAT_CLASS_NEGATIVE_INFINITY 0x004
+#define FLOAT_CLASS_NEGATIVE_NORMAL 0x008
+#define FLOAT_CLASS_NEGATIVE_SUBNORMAL 0x010
+#define FLOAT_CLASS_NEGATIVE_ZERO 0x020
+#define FLOAT_CLASS_POSITIVE_INFINITY 0x040
+#define FLOAT_CLASS_POSITIVE_NORMAL 0x080
+#define FLOAT_CLASS_POSITIVE_SUBNORMAL 0x100
+#define FLOAT_CLASS_POSITIVE_ZERO 0x200
+
+#define TEST_FCLASS(N) \
+void test_fclass_##N(long s) \
+{ \
+ double fd; \
+ long rd; \
+ \
+ asm volatile("fclass."#N" %0, %2\n\t" \
+ "movfr2gr."#N" %1, %2\n\t" \
+ : "=f"(fd), "=r"(rd) \
+ : "f"(s) \
+ : ); \
+ switch (rd) { \
+ case FLOAT_CLASS_SIGNALING_NAN: \
+ case FLOAT_CLASS_QUIET_NAN: \
+ case FLOAT_CLASS_NEGATIVE_INFINITY: \
+ case FLOAT_CLASS_NEGATIVE_NORMAL: \
+ case FLOAT_CLASS_NEGATIVE_SUBNORMAL: \
+ case FLOAT_CLASS_NEGATIVE_ZERO: \
+ case FLOAT_CLASS_POSITIVE_INFINITY: \
+ case FLOAT_CLASS_POSITIVE_NORMAL: \
+ case FLOAT_CLASS_POSITIVE_SUBNORMAL: \
+ case FLOAT_CLASS_POSITIVE_ZERO: \
+ break; \
+ default: \
+ printf("fclass."#N" test failed.\n"); \
+ break; \
+ } \
+}
+
+/*
+ * float format
+ * type | S | Exponent | Fraction | example value
+ * 31 | 30 --23 | 22 | 21 --0 |
+ * | bit |
+ * SNAN 0/1 | 0xFF | 0 | !=0 | 0x7FBFFFFF
+ * QNAN 0/1 | 0xFF | 1 | | 0x7FCFFFFF
+ * -infinity 1 | 0xFF | 0 | 0xFF800000
+ * -normal 1 | [1, 0xFE] | [0, 0x7FFFFF]| 0xFF7FFFFF
+ * -subnormal 1 | 0 | !=0 | 0x807FFFFF
+ * -0 1 | 0 | 0 | 0x80000000
+ * +infinity 0 | 0xFF | 0 | 0x7F800000
+ * +normal 0 | [1, 0xFE] | [0, 0x7FFFFF]| 0x7F7FFFFF
+ * +subnormal 0 | 0 | !=0 | 0x007FFFFF
+ * +0 0 | 0 | 0 | 0x00000000
+ */
+
+long float_snan = 0x7FBFFFFF;
+long float_qnan = 0x7FCFFFFF;
+long float_neg_infinity = 0xFF800000;
+long float_neg_normal = 0xFF7FFFFF;
+long float_neg_subnormal = 0x807FFFFF;
+long float_neg_zero = 0x80000000;
+long float_post_infinity = 0x7F800000;
+long float_post_normal = 0x7F7FFFFF;
+long float_post_subnormal = 0x007FFFFF;
+long float_post_zero = 0x00000000;
+
+/*
+ * double format
+ * type | S | Exponent | Fraction | example value
+ * 63 | 62 -- 52 | 51 | 50 -- 0 |
+ * | bit |
+ * SNAN 0/1 | 0x7FF | 0 | !=0 | 0x7FF7FFFFFFFFFFFF
+ * QNAN 0/1 | 0x7FF | 1 | | 0x7FFFFFFFFFFFFFFF
+ * -infinity 1 | 0x7FF | 0 | 0xFFF0000000000000
+ * -normal 1 |[1, 0x7FE] | | 0xFFEFFFFFFFFFFFFF
+ * -subnormal 1 | 0 | !=0 | 0x8007FFFFFFFFFFFF
+ * -0 1 | 0 | 0 | 0x8000000000000000
+ * +infinity 0 | 0x7FF | 0 | 0x7FF0000000000000
+ * +normal 0 |[1, 0x7FE] | | 0x7FEFFFFFFFFFFFFF
+ * +subnormal 0 | 0 | !=0 | 0x000FFFFFFFFFFFFF
+ * +0 0 | 0 | 0 | 0x0000000000000000
+ */
+
+long double_snan = 0x7FF7FFFFFFFFFFFF;
+long double_qnan = 0x7FFFFFFFFFFFFFFF;
+long double_neg_infinity = 0xFFF0000000000000;
+long double_neg_normal = 0xFFEFFFFFFFFFFFFF;
+long double_neg_subnormal = 0x8007FFFFFFFFFFFF;
+long double_neg_zero = 0x8000000000000000;
+long double_post_infinity = 0x7FF0000000000000;
+long double_post_normal = 0x7FEFFFFFFFFFFFFF;
+long double_post_subnormal = 0x000FFFFFFFFFFFFF;
+long double_post_zero = 0x0000000000000000;
+
+TEST_FCLASS(s)
+TEST_FCLASS(d)
+
+int main()
+{
+ /* fclass.s */
+ test_fclass_s(float_snan);
+ test_fclass_s(float_qnan);
+ test_fclass_s(float_neg_infinity);
+ test_fclass_s(float_neg_normal);
+ test_fclass_s(float_neg_subnormal);
+ test_fclass_s(float_neg_zero);
+ test_fclass_s(float_post_infinity);
+ test_fclass_s(float_post_normal);
+ test_fclass_s(float_post_subnormal);
+ test_fclass_s(float_post_zero);
+
+ /* fclass.d */
+ test_fclass_d(double_snan);
+ test_fclass_d(double_qnan);
+ test_fclass_d(double_neg_infinity);
+ test_fclass_d(double_neg_normal);
+ test_fclass_d(double_neg_subnormal);
+ test_fclass_d(double_neg_zero);
+ test_fclass_d(double_post_infinity);
+ test_fclass_d(double_post_normal);
+ test_fclass_d(double_post_subnormal);
+ test_fclass_d(double_post_zero);
+
+ return 0;
+}
diff --git a/tests/tcg/loongarch64/Makefile.target b/tests/tcg/loongarch64/Makefile.target
index 24d6bb11e9..59d564725a 100644
--- a/tests/tcg/loongarch64/Makefile.target
+++ b/tests/tcg/loongarch64/Makefile.target
@@ -12,5 +12,6 @@ LDFLAGS+=-lm
LOONGARCH64_TESTS = test_bit
LOONGARCH64_TESTS += test_div
+LOONGARCH64_TESTS += test_fclass
TESTS += $(LOONGARCH64_TESTS)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 14/21] tests/tcg/loongarch64: Add fp comparison instructions test
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (12 preceding siblings ...)
2022-07-19 17:59 ` [PULL 13/21] tests/tcg/loongarch64: Add fclass test Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 15/21] tests/tcg/loongarch64: Add pcadd related " Richard Henderson
` (7 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
Choose some instructions to test:
- FCMP.cond.S
- cond: ceq clt cle cne seq slt sle sne
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-8-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/test_fpcom.c | 37 +++++++++++++++++++++++++++
tests/tcg/loongarch64/Makefile.target | 1 +
2 files changed, 38 insertions(+)
create mode 100644 tests/tcg/loongarch64/test_fpcom.c
diff --git a/tests/tcg/loongarch64/test_fpcom.c b/tests/tcg/loongarch64/test_fpcom.c
new file mode 100644
index 0000000000..9e81f767f9
--- /dev/null
+++ b/tests/tcg/loongarch64/test_fpcom.c
@@ -0,0 +1,37 @@
+#include <assert.h>
+
+#define TEST_COMP(N) \
+void test_##N(float fj, float fk) \
+{ \
+ int rd = 0; \
+ \
+ asm volatile("fcmp."#N".s $fcc6,%1,%2\n" \
+ "movcf2gr %0, $fcc6\n" \
+ : "=r"(rd) \
+ : "f"(fj), "f"(fk) \
+ : ); \
+ assert(rd == 1); \
+}
+
+TEST_COMP(ceq)
+TEST_COMP(clt)
+TEST_COMP(cle)
+TEST_COMP(cne)
+TEST_COMP(seq)
+TEST_COMP(slt)
+TEST_COMP(sle)
+TEST_COMP(sne)
+
+int main()
+{
+ test_ceq(0xff700102, 0xff700102);
+ test_clt(0x00730007, 0xff730007);
+ test_cle(0xff70130a, 0xff70130b);
+ test_cne(0x1238acde, 0xff71111f);
+ test_seq(0xff766618, 0xff766619);
+ test_slt(0xff78881c, 0xff78901d);
+ test_sle(0xff780b22, 0xff790b22);
+ test_sne(0xff7bcd25, 0xff7a26cf);
+
+ return 0;
+}
diff --git a/tests/tcg/loongarch64/Makefile.target b/tests/tcg/loongarch64/Makefile.target
index 59d564725a..b320d9fd9c 100644
--- a/tests/tcg/loongarch64/Makefile.target
+++ b/tests/tcg/loongarch64/Makefile.target
@@ -13,5 +13,6 @@ LDFLAGS+=-lm
LOONGARCH64_TESTS = test_bit
LOONGARCH64_TESTS += test_div
LOONGARCH64_TESTS += test_fclass
+LOONGARCH64_TESTS += test_fpcom
TESTS += $(LOONGARCH64_TESTS)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 15/21] tests/tcg/loongarch64: Add pcadd related instructions test
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (13 preceding siblings ...)
2022-07-19 17:59 ` [PULL 14/21] tests/tcg/loongarch64: Add fp comparison instructions test Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 16/21] hw/loongarch: Add fw_cfg table support Richard Henderson
` (6 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Song Gao
From: Song Gao <gaosong@loongson.cn>
This includes:
- PCADDI
- PCADDU12I
- PCADDU18I
- PCALAU12I
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20220716085426.3098060-9-gaosong@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
tests/tcg/loongarch64/test_pcadd.c | 38 +++++++++++++++++++++++++++
tests/tcg/loongarch64/Makefile.target | 1 +
2 files changed, 39 insertions(+)
create mode 100644 tests/tcg/loongarch64/test_pcadd.c
diff --git a/tests/tcg/loongarch64/test_pcadd.c b/tests/tcg/loongarch64/test_pcadd.c
new file mode 100644
index 0000000000..da2a64db82
--- /dev/null
+++ b/tests/tcg/loongarch64/test_pcadd.c
@@ -0,0 +1,38 @@
+#include <assert.h>
+#include <inttypes.h>
+#include <string.h>
+
+#define TEST_PCADDU(N) \
+void test_##N(int a) \
+{ \
+ uint64_t rd1 = 0; \
+ uint64_t rd2 = 0; \
+ uint64_t rm, rn; \
+ \
+ asm volatile(""#N" %0, 0x104\n\t" \
+ ""#N" %1, 0x12345\n\t" \
+ : "=r"(rd1), "=r"(rd2) \
+ : ); \
+ rm = rd2 - rd1; \
+ if (!strcmp(#N, "pcalau12i")) { \
+ rn = ((0x12345UL - 0x104) << a) & ~0xfff; \
+ } else { \
+ rn = ((0x12345UL - 0x104) << a) + 4; \
+ } \
+ assert(rm == rn); \
+}
+
+TEST_PCADDU(pcaddi)
+TEST_PCADDU(pcaddu12i)
+TEST_PCADDU(pcaddu18i)
+TEST_PCADDU(pcalau12i)
+
+int main()
+{
+ test_pcaddi(2);
+ test_pcaddu12i(12);
+ test_pcaddu18i(18);
+ test_pcalau12i(12);
+
+ return 0;
+}
diff --git a/tests/tcg/loongarch64/Makefile.target b/tests/tcg/loongarch64/Makefile.target
index b320d9fd9c..0115de78ef 100644
--- a/tests/tcg/loongarch64/Makefile.target
+++ b/tests/tcg/loongarch64/Makefile.target
@@ -14,5 +14,6 @@ LOONGARCH64_TESTS = test_bit
LOONGARCH64_TESTS += test_div
LOONGARCH64_TESTS += test_fclass
LOONGARCH64_TESTS += test_fpcom
+LOONGARCH64_TESTS += test_pcadd
TESTS += $(LOONGARCH64_TESTS)
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 16/21] hw/loongarch: Add fw_cfg table support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (14 preceding siblings ...)
2022-07-19 17:59 ` [PULL 15/21] tests/tcg/loongarch64: Add pcadd related " Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 17/21] hw/loongarch: Add uefi bios loading support Richard Henderson
` (5 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Add fw_cfg table for loongarch virt machine, including memmap table.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-2-yangxiaojuan@loongson.cn>
[rth: Replace fprintf with assert; drop unused return value;
initialize reserved slot to zero.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/loongarch/fw_cfg.h | 15 ++++++++++++++
include/hw/loongarch/virt.h | 3 +++
hw/loongarch/fw_cfg.c | 33 +++++++++++++++++++++++++++++
hw/loongarch/loongson3.c | 41 ++++++++++++++++++++++++++++++++++++-
hw/loongarch/meson.build | 3 +++
5 files changed, 94 insertions(+), 1 deletion(-)
create mode 100644 hw/loongarch/fw_cfg.h
create mode 100644 hw/loongarch/fw_cfg.c
diff --git a/hw/loongarch/fw_cfg.h b/hw/loongarch/fw_cfg.h
new file mode 100644
index 0000000000..7c0de4db4a
--- /dev/null
+++ b/hw/loongarch/fw_cfg.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU fw_cfg helpers (LoongArch specific)
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_FW_CFG_H
+#define HW_LOONGARCH_FW_CFG_H
+
+#include "hw/boards.h"
+#include "hw/nvram/fw_cfg.h"
+
+FWCfgState *loongarch_fw_cfg_init(ram_addr_t ram_size, MachineState *ms);
+#endif
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 09a816191c..9fec1f8a5c 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -17,6 +17,7 @@
#define LOONGARCH_ISA_IO_BASE 0x18000000UL
#define LOONGARCH_ISA_IO_SIZE 0x0004000
+#define VIRT_FWCFG_BASE 0x1e020000UL
struct LoongArchMachineState {
/*< private >*/
@@ -26,6 +27,8 @@ struct LoongArchMachineState {
MemoryRegion lowmem;
MemoryRegion highmem;
MemoryRegion isa_io;
+ /* State for other subsystems/APIs: */
+ FWCfgState *fw_cfg;
};
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
diff --git a/hw/loongarch/fw_cfg.c b/hw/loongarch/fw_cfg.c
new file mode 100644
index 0000000000..f6503d5607
--- /dev/null
+++ b/hw/loongarch/fw_cfg.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU fw_cfg helpers (LoongArch specific)
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "hw/loongarch/fw_cfg.h"
+#include "hw/loongarch/virt.h"
+#include "hw/nvram/fw_cfg.h"
+#include "sysemu/sysemu.h"
+
+static void fw_cfg_boot_set(void *opaque, const char *boot_device,
+ Error **errp)
+{
+ fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
+}
+
+FWCfgState *loongarch_fw_cfg_init(ram_addr_t ram_size, MachineState *ms)
+{
+ FWCfgState *fw_cfg;
+ int max_cpus = ms->smp.max_cpus;
+ int smp_cpus = ms->smp.cpus;
+
+ fw_cfg = fw_cfg_init_mem_wide(VIRT_FWCFG_BASE + 8, VIRT_FWCFG_BASE, 8, 0, NULL);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)max_cpus);
+ fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
+ fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
+
+ qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
+ return fw_cfg;
+}
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 15fddfc4f5..9ee7450252 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -28,13 +28,40 @@
#include "hw/pci-host/ls7a.h"
#include "hw/pci-host/gpex.h"
#include "hw/misc/unimp.h"
-
+#include "hw/loongarch/fw_cfg.h"
#include "target/loongarch/cpu.h"
#define PM_BASE 0x10080000
#define PM_SIZE 0x100
#define PM_CTRL 0x10
+struct memmap_entry {
+ uint64_t address;
+ uint64_t length;
+ uint32_t type;
+ uint32_t reserved;
+};
+
+static struct memmap_entry *memmap_table;
+static unsigned memmap_entries;
+
+static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
+{
+ /* Ensure there are no duplicate entries. */
+ for (unsigned i = 0; i < memmap_entries; i++) {
+ assert(memmap_table[i].address != address);
+ }
+
+ memmap_table = g_renew(struct memmap_entry, memmap_table,
+ memmap_entries + 1);
+ memmap_table[memmap_entries].address = cpu_to_le64(address);
+ memmap_table[memmap_entries].length = cpu_to_le64(length);
+ memmap_table[memmap_entries].type = cpu_to_le32(type);
+ memmap_table[memmap_entries].reserved = 0;
+ memmap_entries++;
+}
+
+
/*
* This is a placeholder for missing ACPI,
* and will eventually be replaced.
@@ -331,15 +358,27 @@ static void loongarch_init(MachineState *machine)
machine->ram, 0, 256 * MiB);
memory_region_add_subregion(address_space_mem, offset, &lams->lowmem);
offset += 256 * MiB;
+ memmap_add_entry(0, 256 * MiB, 1);
highram_size = ram_size - 256 * MiB;
memory_region_init_alias(&lams->highmem, NULL, "loongarch.highmem",
machine->ram, offset, highram_size);
memory_region_add_subregion(address_space_mem, 0x90000000, &lams->highmem);
+ memmap_add_entry(0x90000000, highram_size, 1);
/* Add isa io region */
memory_region_init_alias(&lams->isa_io, NULL, "isa-io",
get_system_io(), 0, LOONGARCH_ISA_IO_SIZE);
memory_region_add_subregion(address_space_mem, LOONGARCH_ISA_IO_BASE,
&lams->isa_io);
+ /* fw_cfg init */
+ lams->fw_cfg = loongarch_fw_cfg_init(ram_size, machine);
+ rom_set_fw(lams->fw_cfg);
+
+ if (lams->fw_cfg != NULL) {
+ fw_cfg_add_file(lams->fw_cfg, "etc/memmap",
+ memmap_table,
+ sizeof(struct memmap_entry) * (memmap_entries));
+ }
+
if (kernel_filename) {
loaderparams.ram_size = ram_size;
loaderparams.kernel_filename = kernel_filename;
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
index cecb1a5d65..81131c9237 100644
--- a/hw/loongarch/meson.build
+++ b/hw/loongarch/meson.build
@@ -1,4 +1,7 @@
loongarch_ss = ss.source_set()
+loongarch_ss.add(files(
+ 'fw_cfg.c',
+))
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('loongson3.c'))
hw_arch += {'loongarch': loongarch_ss}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 17/21] hw/loongarch: Add uefi bios loading support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (15 preceding siblings ...)
2022-07-19 17:59 ` [PULL 16/21] hw/loongarch: Add fw_cfg table support Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 18/21] hw/loongarch: Add linux kernel booting support Richard Henderson
` (4 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Add uefi bios loading support, now only uefi bios is porting to
loongarch virt machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-3-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/loongarch/virt.h | 4 ++++
hw/loongarch/loongson3.c | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 38 insertions(+)
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 9fec1f8a5c..ec37d86e44 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -18,6 +18,8 @@
#define LOONGARCH_ISA_IO_BASE 0x18000000UL
#define LOONGARCH_ISA_IO_SIZE 0x0004000
#define VIRT_FWCFG_BASE 0x1e020000UL
+#define VIRT_BIOS_BASE 0x1c000000UL
+#define VIRT_BIOS_SIZE (4 * MiB)
struct LoongArchMachineState {
/*< private >*/
@@ -27,6 +29,8 @@ struct LoongArchMachineState {
MemoryRegion lowmem;
MemoryRegion highmem;
MemoryRegion isa_io;
+ MemoryRegion bios;
+ bool bios_loaded;
/* State for other subsystems/APIs: */
FWCfgState *fw_cfg;
};
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 9ee7450252..3f1849b8b0 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -310,6 +310,37 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
loongarch_devices_init(pch_pic);
}
+static void loongarch_firmware_init(LoongArchMachineState *lams)
+{
+ char *filename = MACHINE(lams)->firmware;
+ char *bios_name = NULL;
+ int bios_size;
+
+ lams->bios_loaded = false;
+ if (filename) {
+ bios_name = qemu_find_file(QEMU_FILE_TYPE_BIOS, filename);
+ if (!bios_name) {
+ error_report("Could not find ROM image '%s'", filename);
+ exit(1);
+ }
+
+ bios_size = load_image_targphys(bios_name, VIRT_BIOS_BASE, VIRT_BIOS_SIZE);
+ if (bios_size < 0) {
+ error_report("Could not load ROM image '%s'", bios_name);
+ exit(1);
+ }
+
+ g_free(bios_name);
+
+ memory_region_init_ram(&lams->bios, NULL, "loongarch.bios",
+ VIRT_BIOS_SIZE, &error_fatal);
+ memory_region_set_readonly(&lams->bios, true);
+ memory_region_add_subregion(get_system_memory(), VIRT_BIOS_BASE, &lams->bios);
+ lams->bios_loaded = true;
+ }
+
+}
+
static void reset_load_elf(void *opaque)
{
LoongArchCPU *cpu = opaque;
@@ -369,6 +400,9 @@ static void loongarch_init(MachineState *machine)
get_system_io(), 0, LOONGARCH_ISA_IO_SIZE);
memory_region_add_subregion(address_space_mem, LOONGARCH_ISA_IO_BASE,
&lams->isa_io);
+ /* load the BIOS image. */
+ loongarch_firmware_init(lams);
+
/* fw_cfg init */
lams->fw_cfg = loongarch_fw_cfg_init(ram_size, machine);
rom_set_fw(lams->fw_cfg);
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 18/21] hw/loongarch: Add linux kernel booting support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (16 preceding siblings ...)
2022-07-19 17:59 ` [PULL 17/21] hw/loongarch: Add uefi bios loading support Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 19/21] hw/loongarch: Add smbios support Richard Henderson
` (3 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
There are two situations to start system by kernel file. If exists bios
option, system will boot from loaded bios file, else system will boot
from hardcoded auxcode, and jump to kernel elf entry.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-4-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
hw/loongarch/loongson3.c | 114 +++++++++++++++++++++++++++++++++------
1 file changed, 99 insertions(+), 15 deletions(-)
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 3f1849b8b0..88e38ce17e 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -103,6 +103,8 @@ static const MemoryRegionOps loongarch_virt_pm_ops = {
static struct _loaderparams {
uint64_t ram_size;
const char *kernel_filename;
+ const char *kernel_cmdline;
+ const char *initrd_filename;
} loaderparams;
static uint64_t cpu_loongarch_virt_to_phys(void *opaque, uint64_t addr)
@@ -352,18 +354,97 @@ static void reset_load_elf(void *opaque)
}
}
+/* Load an image file into an fw_cfg entry identified by key. */
+static void load_image_to_fw_cfg(FWCfgState *fw_cfg, uint16_t size_key,
+ uint16_t data_key, const char *image_name,
+ bool try_decompress)
+{
+ size_t size = -1;
+ uint8_t *data;
+
+ if (image_name == NULL) {
+ return;
+ }
+
+ if (try_decompress) {
+ size = load_image_gzipped_buffer(image_name,
+ LOAD_IMAGE_MAX_GUNZIP_BYTES, &data);
+ }
+
+ if (size == (size_t)-1) {
+ gchar *contents;
+ gsize length;
+
+ if (!g_file_get_contents(image_name, &contents, &length, NULL)) {
+ error_report("failed to load \"%s\"", image_name);
+ exit(1);
+ }
+ size = length;
+ data = (uint8_t *)contents;
+ }
+
+ fw_cfg_add_i32(fw_cfg, size_key, size);
+ fw_cfg_add_bytes(fw_cfg, data_key, data, size);
+}
+
+static void fw_cfg_add_kernel_info(FWCfgState *fw_cfg)
+{
+ /*
+ * Expose the kernel, the command line, and the initrd in fw_cfg.
+ * We don't process them here at all, it's all left to the
+ * firmware.
+ */
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_KERNEL_SIZE, FW_CFG_KERNEL_DATA,
+ loaderparams.kernel_filename,
+ false);
+
+ if (loaderparams.initrd_filename) {
+ load_image_to_fw_cfg(fw_cfg,
+ FW_CFG_INITRD_SIZE, FW_CFG_INITRD_DATA,
+ loaderparams.initrd_filename, false);
+ }
+
+ if (loaderparams.kernel_cmdline) {
+ fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE,
+ strlen(loaderparams.kernel_cmdline) + 1);
+ fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA,
+ loaderparams.kernel_cmdline);
+ }
+}
+
+static void loongarch_firmware_boot(LoongArchMachineState *lams)
+{
+ fw_cfg_add_kernel_info(lams->fw_cfg);
+}
+
+static void loongarch_direct_kernel_boot(LoongArchMachineState *lams)
+{
+ MachineState *machine = MACHINE(lams);
+ int64_t kernel_addr = 0;
+ LoongArchCPU *lacpu;
+ int i;
+
+ kernel_addr = load_kernel_info();
+ if (!machine->firmware) {
+ for (i = 0; i < machine->smp.cpus; i++) {
+ lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
+ lacpu->env.load_elf = true;
+ lacpu->env.elf_address = kernel_addr;
+ }
+ }
+}
+
static void loongarch_init(MachineState *machine)
{
+ LoongArchCPU *lacpu;
const char *cpu_model = machine->cpu_type;
- const char *kernel_filename = machine->kernel_filename;
ram_addr_t offset = 0;
ram_addr_t ram_size = machine->ram_size;
uint64_t highram_size = 0;
MemoryRegion *address_space_mem = get_system_memory();
LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
- LoongArchCPU *lacpu;
int i;
- int64_t kernel_addr = 0;
if (!cpu_model) {
cpu_model = LOONGARCH_CPU_TYPE_NAME("la464");
@@ -412,20 +493,23 @@ static void loongarch_init(MachineState *machine)
memmap_table,
sizeof(struct memmap_entry) * (memmap_entries));
}
-
- if (kernel_filename) {
- loaderparams.ram_size = ram_size;
- loaderparams.kernel_filename = kernel_filename;
- kernel_addr = load_kernel_info();
- if (!machine->firmware) {
- for (i = 0; i < machine->smp.cpus; i++) {
- lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
- lacpu->env.load_elf = true;
- lacpu->env.elf_address = kernel_addr;
- qemu_register_reset(reset_load_elf, lacpu);
- }
+ loaderparams.ram_size = ram_size;
+ loaderparams.kernel_filename = machine->kernel_filename;
+ loaderparams.kernel_cmdline = machine->kernel_cmdline;
+ loaderparams.initrd_filename = machine->initrd_filename;
+ /* load the kernel. */
+ if (loaderparams.kernel_filename) {
+ if (lams->bios_loaded) {
+ loongarch_firmware_boot(lams);
+ } else {
+ loongarch_direct_kernel_boot(lams);
}
}
+ /* register reset function */
+ for (i = 0; i < machine->smp.cpus; i++) {
+ lacpu = LOONGARCH_CPU(qemu_get_cpu(i));
+ qemu_register_reset(reset_load_elf, lacpu);
+ }
/* Initialize the IO interrupt subsystem */
loongarch_irq_init(lams);
}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 19/21] hw/loongarch: Add smbios support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (17 preceding siblings ...)
2022-07-19 17:59 ` [PULL 18/21] hw/loongarch: Add linux kernel booting support Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-19 17:59 ` [PULL 20/21] hw/loongarch: Add acpi ged support Richard Henderson
` (2 subsequent siblings)
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Add smbios support for loongarch virt machine, and put them into fw_cfg
table so that bios can parse them quickly. The weblink of smbios spec:
https://www.dmtf.org/dsp/DSP0134, the version is 3.6.0.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-5-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/loongarch/virt.h | 1 +
hw/loongarch/loongson3.c | 36 ++++++++++++++++++++++++++++++++++++
hw/loongarch/Kconfig | 1 +
3 files changed, 38 insertions(+)
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index ec37d86e44..9b7cdfae78 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -33,6 +33,7 @@ struct LoongArchMachineState {
bool bios_loaded;
/* State for other subsystems/APIs: */
FWCfgState *fw_cfg;
+ Notifier machine_done;
};
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 88e38ce17e..205894d343 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -30,11 +30,45 @@
#include "hw/misc/unimp.h"
#include "hw/loongarch/fw_cfg.h"
#include "target/loongarch/cpu.h"
+#include "hw/firmware/smbios.h"
#define PM_BASE 0x10080000
#define PM_SIZE 0x100
#define PM_CTRL 0x10
+static void virt_build_smbios(LoongArchMachineState *lams)
+{
+ MachineState *ms = MACHINE(lams);
+ MachineClass *mc = MACHINE_GET_CLASS(lams);
+ uint8_t *smbios_tables, *smbios_anchor;
+ size_t smbios_tables_len, smbios_anchor_len;
+ const char *product = "QEMU Virtual Machine";
+
+ if (!lams->fw_cfg) {
+ return;
+ }
+
+ smbios_set_defaults("QEMU", product, mc->name, false,
+ true, SMBIOS_ENTRY_POINT_TYPE_64);
+
+ smbios_get_tables(ms, NULL, 0, &smbios_tables, &smbios_tables_len,
+ &smbios_anchor, &smbios_anchor_len, &error_fatal);
+
+ if (smbios_anchor) {
+ fw_cfg_add_file(lams->fw_cfg, "etc/smbios/smbios-tables",
+ smbios_tables, smbios_tables_len);
+ fw_cfg_add_file(lams->fw_cfg, "etc/smbios/smbios-anchor",
+ smbios_anchor, smbios_anchor_len);
+ }
+}
+
+static void virt_machine_done(Notifier *notifier, void *data)
+{
+ LoongArchMachineState *lams = container_of(notifier,
+ LoongArchMachineState, machine_done);
+ virt_build_smbios(lams);
+}
+
struct memmap_entry {
uint64_t address;
uint64_t length;
@@ -512,6 +546,8 @@ static void loongarch_init(MachineState *machine)
}
/* Initialize the IO interrupt subsystem */
loongarch_irq_init(lams);
+ lams->machine_done.notify = virt_machine_done;
+ qemu_add_machine_init_done_notifier(&lams->machine_done);
}
static void loongarch_class_init(ObjectClass *oc, void *data)
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 35b6680772..610552e522 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -14,3 +14,4 @@ config LOONGARCH_VIRT
select LOONGARCH_PCH_MSI
select LOONGARCH_EXTIOI
select LS7A_RTC
+ select SMBIOS
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 20/21] hw/loongarch: Add acpi ged support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (18 preceding siblings ...)
2022-07-19 17:59 ` [PULL 19/21] hw/loongarch: Add smbios support Richard Henderson
@ 2022-07-19 17:59 ` Richard Henderson
2022-07-20 12:10 ` Peter Maydell
2022-07-19 18:00 ` [PULL 21/21] hw/loongarch: Add fdt support Richard Henderson
2022-07-20 10:50 ` [PULL 00/21] loongarch patch queue Peter Maydell
21 siblings, 1 reply; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 17:59 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Loongarch virt machine uses general hardware reduces acpi method, rather
than LS7A acpi device. Now only power management function is used in
acpi ged device, memory hotplug will be added later. Also acpi tables
such as RSDP/RSDT/FADT etc.
The acpi table has submited to acpi spec, and will release soon.
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-6-yangxiaojuan@loongson.cn>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/hw/loongarch/virt.h | 13 +
include/hw/pci-host/ls7a.h | 4 +
hw/loongarch/acpi-build.c | 609 ++++++++++++++++++++++++++++++++++++
hw/loongarch/loongson3.c | 78 ++++-
hw/loongarch/Kconfig | 2 +
hw/loongarch/meson.build | 1 +
6 files changed, 704 insertions(+), 3 deletions(-)
create mode 100644 hw/loongarch/acpi-build.c
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 9b7cdfae78..fb4a4f4e7b 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -21,6 +21,13 @@
#define VIRT_BIOS_BASE 0x1c000000UL
#define VIRT_BIOS_SIZE (4 * MiB)
+#define VIRT_LOWMEM_BASE 0
+#define VIRT_LOWMEM_SIZE 0x10000000
+#define VIRT_HIGHMEM_BASE 0x90000000
+#define VIRT_GED_EVT_ADDR 0x100e0000
+#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
+#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
+
struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
@@ -34,8 +41,14 @@ struct LoongArchMachineState {
/* State for other subsystems/APIs: */
FWCfgState *fw_cfg;
Notifier machine_done;
+ OnOffAuto acpi;
+ char *oem_id;
+ char *oem_table_id;
+ DeviceState *acpi_ged;
};
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchMachineState, LOONGARCH_MACHINE)
+bool loongarch_is_acpi_enabled(LoongArchMachineState *lams);
+void loongarch_acpi_setup(LoongArchMachineState *lams);
#endif
diff --git a/include/hw/pci-host/ls7a.h b/include/hw/pci-host/ls7a.h
index 08c5f78be2..0fdc86b973 100644
--- a/include/hw/pci-host/ls7a.h
+++ b/include/hw/pci-host/ls7a.h
@@ -23,6 +23,9 @@
#define LS7A_PCI_IO_BASE 0x18004000UL
#define LS7A_PCI_IO_SIZE 0xC000
+#define LS7A_PCI_MEM_BASE 0x40000000UL
+#define LS7A_PCI_MEM_SIZE 0x40000000UL
+
#define LS7A_PCH_REG_BASE 0x10000000UL
#define LS7A_IOAPIC_REG_BASE (LS7A_PCH_REG_BASE)
#define LS7A_PCH_MSI_ADDR_LOW 0x2FF00000UL
@@ -41,4 +44,5 @@
#define LS7A_MISC_REG_BASE (LS7A_PCH_REG_BASE + 0x00080000)
#define LS7A_RTC_REG_BASE (LS7A_MISC_REG_BASE + 0x00050100)
#define LS7A_RTC_LEN 0x100
+#define LS7A_SCI_IRQ (PCH_PIC_IRQ_OFFSET + 4)
#endif
diff --git a/hw/loongarch/acpi-build.c b/hw/loongarch/acpi-build.c
new file mode 100644
index 0000000000..b95b83b079
--- /dev/null
+++ b/hw/loongarch/acpi-build.c
@@ -0,0 +1,609 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Support for generating ACPI tables and passing them to Guests
+ *
+ * Copyright (C) 2021 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/bitmap.h"
+#include "hw/pci/pci.h"
+#include "hw/core/cpu.h"
+#include "target/loongarch/cpu.h"
+#include "hw/acpi/acpi-defs.h"
+#include "hw/acpi/acpi.h"
+#include "hw/nvram/fw_cfg.h"
+#include "hw/acpi/bios-linker-loader.h"
+#include "migration/vmstate.h"
+#include "hw/mem/memory-device.h"
+#include "sysemu/reset.h"
+
+/* Supported chipsets: */
+#include "hw/pci-host/ls7a.h"
+#include "hw/loongarch/virt.h"
+#include "hw/acpi/aml-build.h"
+
+#include "hw/acpi/utils.h"
+#include "hw/acpi/pci.h"
+
+#include "qom/qom-qobject.h"
+
+#include "hw/acpi/generic_event_device.h"
+
+#define ACPI_BUILD_ALIGN_SIZE 0x1000
+#define ACPI_BUILD_TABLE_SIZE 0x20000
+
+#ifdef DEBUG_ACPI_BUILD
+#define ACPI_BUILD_DPRINTF(fmt, ...) \
+ do {printf("ACPI_BUILD: " fmt, ## __VA_ARGS__); } while (0)
+#else
+#define ACPI_BUILD_DPRINTF(fmt, ...)
+#endif
+
+/* build FADT */
+static void init_common_fadt_data(AcpiFadtData *data)
+{
+ AcpiFadtData fadt = {
+ /* ACPI 5.0: 4.1 Hardware-Reduced ACPI */
+ .rev = 5,
+ .flags = ((1 << ACPI_FADT_F_HW_REDUCED_ACPI) |
+ (1 << ACPI_FADT_F_RESET_REG_SUP)),
+
+ /* ACPI 5.0: 4.8.3.7 Sleep Control and Status Registers */
+ .sleep_ctl = {
+ .space_id = AML_AS_SYSTEM_MEMORY,
+ .bit_width = 8,
+ .address = VIRT_GED_REG_ADDR + ACPI_GED_REG_SLEEP_CTL,
+ },
+ .sleep_sts = {
+ .space_id = AML_AS_SYSTEM_MEMORY,
+ .bit_width = 8,
+ .address = VIRT_GED_REG_ADDR + ACPI_GED_REG_SLEEP_STS,
+ },
+
+ /* ACPI 5.0: 4.8.3.6 Reset Register */
+ .reset_reg = {
+ .space_id = AML_AS_SYSTEM_MEMORY,
+ .bit_width = 8,
+ .address = VIRT_GED_REG_ADDR + ACPI_GED_REG_RESET,
+ },
+ .reset_val = ACPI_GED_RESET_VALUE,
+ };
+ *data = fadt;
+}
+
+static void acpi_align_size(GArray *blob, unsigned align)
+{
+ /*
+ * Align size to multiple of given size. This reduces the chance
+ * we need to change size in the future (breaking cross version migration).
+ */
+ g_array_set_size(blob, ROUND_UP(acpi_data_len(blob), align));
+}
+
+/* build FACS */
+static void
+build_facs(GArray *table_data)
+{
+ const char *sig = "FACS";
+ const uint8_t reserved[40] = {};
+
+ g_array_append_vals(table_data, sig, 4); /* Signature */
+ build_append_int_noprefix(table_data, 64, 4); /* Length */
+ build_append_int_noprefix(table_data, 0, 4); /* Hardware Signature */
+ build_append_int_noprefix(table_data, 0, 4); /* Firmware Waking Vector */
+ build_append_int_noprefix(table_data, 0, 4); /* Global Lock */
+ build_append_int_noprefix(table_data, 0, 4); /* Flags */
+ g_array_append_vals(table_data, reserved, 40); /* Reserved */
+}
+
+/* build MADT */
+static void
+build_madt(GArray *table_data, BIOSLinker *linker, LoongArchMachineState *lams)
+{
+ MachineState *ms = MACHINE(lams);
+ int i;
+ AcpiTable table = { .sig = "APIC", .rev = 1, .oem_id = lams->oem_id,
+ .oem_table_id = lams->oem_table_id };
+
+ acpi_table_begin(&table, table_data);
+
+ /* Local APIC Address */
+ build_append_int_noprefix(table_data, 0, 4);
+ build_append_int_noprefix(table_data, 1 /* PCAT_COMPAT */, 4); /* Flags */
+
+ for (i = 0; i < ms->smp.cpus; i++) {
+ /* Processor Core Interrupt Controller Structure */
+ build_append_int_noprefix(table_data, 17, 1); /* Type */
+ build_append_int_noprefix(table_data, 15, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, i + 1, 4); /* ACPI Processor ID */
+ build_append_int_noprefix(table_data, i, 4); /* Core ID */
+ build_append_int_noprefix(table_data, 1, 4); /* Flags */
+ }
+
+ /* Extend I/O Interrupt Controller Structure */
+ build_append_int_noprefix(table_data, 20, 1); /* Type */
+ build_append_int_noprefix(table_data, 13, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, 3, 1); /* Cascade */
+ build_append_int_noprefix(table_data, 0, 1); /* Node */
+ build_append_int_noprefix(table_data, 0xffff, 8); /* Node map */
+
+ /* MSI Interrupt Controller Structure */
+ build_append_int_noprefix(table_data, 21, 1); /* Type */
+ build_append_int_noprefix(table_data, 19, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, LS7A_PCH_MSI_ADDR_LOW, 8);/* Address */
+ build_append_int_noprefix(table_data, 0x40, 4); /* Start */
+ build_append_int_noprefix(table_data, 0xc0, 4); /* Count */
+
+ /* Bridge I/O Interrupt Controller Structure */
+ build_append_int_noprefix(table_data, 22, 1); /* Type */
+ build_append_int_noprefix(table_data, 17, 1); /* Length */
+ build_append_int_noprefix(table_data, 1, 1); /* Version */
+ build_append_int_noprefix(table_data, LS7A_PCH_REG_BASE, 8);/* Address */
+ build_append_int_noprefix(table_data, 0x1000, 2); /* Size */
+ build_append_int_noprefix(table_data, 0, 2); /* Id */
+ build_append_int_noprefix(table_data, 0x40, 2); /* Base */
+
+ acpi_table_end(linker, &table);
+}
+
+/* build SRAT */
+static void
+build_srat(GArray *table_data, BIOSLinker *linker, MachineState *machine)
+{
+ uint64_t i;
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
+ MachineState *ms = MACHINE(lams);
+ AcpiTable table = { .sig = "SRAT", .rev = 1, .oem_id = lams->oem_id,
+ .oem_table_id = lams->oem_table_id };
+
+ acpi_table_begin(&table, table_data);
+ build_append_int_noprefix(table_data, 1, 4); /* Reserved */
+ build_append_int_noprefix(table_data, 0, 8); /* Reserved */
+
+ for (i = 0; i < ms->smp.cpus; ++i) {
+ /* Processor Local APIC/SAPIC Affinity Structure */
+ build_append_int_noprefix(table_data, 0, 1); /* Type */
+ build_append_int_noprefix(table_data, 16, 1); /* Length */
+ /* Proximity Domain [7:0] */
+ build_append_int_noprefix(table_data, 0, 1);
+ build_append_int_noprefix(table_data, i, 1); /* APIC ID */
+ /* Flags, Table 5-36 */
+ build_append_int_noprefix(table_data, 1, 4);
+ build_append_int_noprefix(table_data, 0, 1); /* Local SAPIC EID */
+ /* Proximity Domain [31:8] */
+ build_append_int_noprefix(table_data, 0, 3);
+ build_append_int_noprefix(table_data, 0, 4); /* Reserved */
+ }
+
+ build_srat_memory(table_data, VIRT_LOWMEM_BASE, VIRT_LOWMEM_SIZE,
+ 0, MEM_AFFINITY_ENABLED);
+
+ build_srat_memory(table_data, VIRT_HIGHMEM_BASE, machine->ram_size - VIRT_LOWMEM_SIZE,
+ 0, MEM_AFFINITY_ENABLED);
+
+ acpi_table_end(linker, &table);
+}
+
+typedef
+struct AcpiBuildState {
+ /* Copy of table in RAM (for patching). */
+ MemoryRegion *table_mr;
+ /* Is table patched? */
+ uint8_t patched;
+ void *rsdp;
+ MemoryRegion *rsdp_mr;
+ MemoryRegion *linker_mr;
+} AcpiBuildState;
+
+static void build_gpex_pci0_int(Aml *table)
+{
+ Aml *sb_scope = aml_scope("_SB");
+ Aml *pci0_scope = aml_scope("PCI0");
+ Aml *prt_pkg = aml_varpackage(128);
+ int slot, pin;
+
+ for (slot = 0; slot < PCI_SLOT_MAX; slot++) {
+ for (pin = 0; pin < PCI_NUM_PINS; pin++) {
+ Aml *pkg = aml_package(4);
+ aml_append(pkg, aml_int((slot << 16) | 0xFFFF));
+ aml_append(pkg, aml_int(pin));
+ aml_append(pkg, aml_int(0));
+ aml_append(pkg, aml_int(80 + (slot + pin) % 4));
+ aml_append(prt_pkg, pkg);
+ }
+ }
+ aml_append(pci0_scope, aml_name_decl("_PRT", prt_pkg));
+ aml_append(sb_scope, pci0_scope);
+ aml_append(table, sb_scope);
+}
+
+static void build_dbg_aml(Aml *table)
+{
+ Aml *field;
+ Aml *method;
+ Aml *while_ctx;
+ Aml *scope = aml_scope("\\");
+ Aml *buf = aml_local(0);
+ Aml *len = aml_local(1);
+ Aml *idx = aml_local(2);
+
+ aml_append(scope,
+ aml_operation_region("DBG", AML_SYSTEM_IO, aml_int(0x0402), 0x01));
+ field = aml_field("DBG", AML_BYTE_ACC, AML_NOLOCK, AML_PRESERVE);
+ aml_append(field, aml_named_field("DBGB", 8));
+ aml_append(scope, field);
+
+ method = aml_method("DBUG", 1, AML_NOTSERIALIZED);
+
+ aml_append(method, aml_to_hexstring(aml_arg(0), buf));
+ aml_append(method, aml_to_buffer(buf, buf));
+ aml_append(method, aml_subtract(aml_sizeof(buf), aml_int(1), len));
+ aml_append(method, aml_store(aml_int(0), idx));
+
+ while_ctx = aml_while(aml_lless(idx, len));
+ aml_append(while_ctx,
+ aml_store(aml_derefof(aml_index(buf, idx)), aml_name("DBGB")));
+ aml_append(while_ctx, aml_increment(idx));
+ aml_append(method, while_ctx);
+ aml_append(method, aml_store(aml_int(0x0A), aml_name("DBGB")));
+ aml_append(scope, method);
+ aml_append(table, scope);
+}
+
+static Aml *build_osc_method(void)
+{
+ Aml *if_ctx;
+ Aml *if_ctx2;
+ Aml *else_ctx;
+ Aml *method;
+ Aml *a_cwd1 = aml_name("CDW1");
+ Aml *a_ctrl = aml_local(0);
+
+ method = aml_method("_OSC", 4, AML_NOTSERIALIZED);
+ aml_append(method, aml_create_dword_field(aml_arg(3), aml_int(0), "CDW1"));
+
+ if_ctx = aml_if(aml_equal(
+ aml_arg(0), aml_touuid("33DB4D5B-1FF7-401C-9657-7441C03DD766")));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(4), "CDW2"));
+ aml_append(if_ctx, aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3"));
+ aml_append(if_ctx, aml_store(aml_name("CDW3"), a_ctrl));
+
+ /*
+ * Always allow native PME, AER (no dependencies)
+ * Allow SHPC (PCI bridges can have SHPC controller)
+ */
+ aml_append(if_ctx, aml_and(a_ctrl, aml_int(0x1F), a_ctrl));
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(1))));
+ /* Unknown revision */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x08), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ if_ctx2 = aml_if(aml_lnot(aml_equal(aml_name("CDW3"), a_ctrl)));
+ /* Capabilities bits were masked */
+ aml_append(if_ctx2, aml_or(a_cwd1, aml_int(0x10), a_cwd1));
+ aml_append(if_ctx, if_ctx2);
+
+ /* Update DWORD3 in the buffer */
+ aml_append(if_ctx, aml_store(a_ctrl, aml_name("CDW3")));
+ aml_append(method, if_ctx);
+
+ else_ctx = aml_else();
+ /* Unrecognized UUID */
+ aml_append(else_ctx, aml_or(a_cwd1, aml_int(4), a_cwd1));
+ aml_append(method, else_ctx);
+
+ aml_append(method, aml_return(aml_arg(3)));
+ return method;
+}
+
+static void build_uart_device_aml(Aml *table)
+{
+ Aml *dev;
+ Aml *crs;
+ Aml *pkg0, *pkg1, *pkg2;
+ uint32_t uart_irq = LS7A_UART_IRQ;
+
+ Aml *scope = aml_scope("_SB");
+ dev = aml_device("COMA");
+ aml_append(dev, aml_name_decl("_HID", aml_string("PNP0501")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+ aml_append(dev, aml_name_decl("_CCA", aml_int(1)));
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_qword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_NON_CACHEABLE, AML_READ_WRITE,
+ 0, 0x1FE001E0, 0x1FE001E7, 0, 0x8));
+ aml_append(crs, aml_interrupt(AML_CONSUMER, AML_LEVEL, AML_ACTIVE_HIGH,
+ AML_SHARED, &uart_irq, 1));
+ aml_append(dev, aml_name_decl("_CRS", crs));
+ pkg0 = aml_package(0x2);
+ aml_append(pkg0, aml_int(0x05F5E100));
+ aml_append(pkg0, aml_string("clock-frenquency"));
+ pkg1 = aml_package(0x1);
+ aml_append(pkg1, pkg0);
+ pkg2 = aml_package(0x2);
+ aml_append(pkg2, aml_touuid("DAFFD814-6EBA-4D8C-8A91-BC9BBF4AA301"));
+ aml_append(pkg2, pkg1);
+ aml_append(dev, aml_name_decl("_DSD", pkg2));
+ aml_append(scope, dev);
+ aml_append(table, scope);
+}
+
+/* build DSDT */
+static void
+build_dsdt(GArray *table_data, BIOSLinker *linker, MachineState *machine)
+{
+ Aml *dsdt, *sb_scope, *scope, *dev, *crs, *pkg;
+ int root_bus_limit = 0x7F;
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
+ AcpiTable table = { .sig = "DSDT", .rev = 1, .oem_id = lams->oem_id,
+ .oem_table_id = lams->oem_table_id };
+
+ acpi_table_begin(&table, table_data);
+
+ dsdt = init_aml_allocator();
+
+ build_dbg_aml(dsdt);
+
+ sb_scope = aml_scope("_SB");
+ dev = aml_device("PCI0");
+ aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
+ aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
+ aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
+ aml_append(dev, aml_name_decl("_BBN", aml_int(0)));
+ aml_append(dev, aml_name_decl("_UID", aml_int(1)));
+ aml_append(dev, build_osc_method());
+ aml_append(sb_scope, dev);
+ aml_append(dsdt, sb_scope);
+
+ build_gpex_pci0_int(dsdt);
+ build_uart_device_aml(dsdt);
+ if (lams->acpi_ged) {
+ build_ged_aml(dsdt, "\\_SB."GED_DEVICE,
+ HOTPLUG_HANDLER(lams->acpi_ged),
+ LS7A_SCI_IRQ - PCH_PIC_IRQ_OFFSET, AML_SYSTEM_MEMORY,
+ VIRT_GED_EVT_ADDR);
+ }
+
+ scope = aml_scope("\\_SB.PCI0");
+ /* Build PCI0._CRS */
+ crs = aml_resource_template();
+ aml_append(crs,
+ aml_word_bus_number(AML_MIN_FIXED, AML_MAX_FIXED, AML_POS_DECODE,
+ 0x0000, 0x0, root_bus_limit,
+ 0x0000, root_bus_limit + 1));
+ aml_append(crs,
+ aml_dword_io(AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_POS_DECODE, AML_ENTIRE_RANGE,
+ 0x0000, 0x0000, 0xFFFF, 0x18000000, 0x10000));
+ aml_append(crs,
+ aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED, AML_MAX_FIXED,
+ AML_CACHEABLE, AML_READ_WRITE,
+ 0, LS7A_PCI_MEM_BASE,
+ LS7A_PCI_MEM_BASE + LS7A_PCI_MEM_SIZE - 1,
+ 0, LS7A_PCI_MEM_BASE));
+ aml_append(scope, aml_name_decl("_CRS", crs));
+ aml_append(dsdt, scope);
+
+ /* System State Package */
+ scope = aml_scope("\\");
+ pkg = aml_package(4);
+ aml_append(pkg, aml_int(ACPI_GED_SLP_TYP_S5));
+ aml_append(pkg, aml_int(0)); /* ignored */
+ aml_append(pkg, aml_int(0)); /* reserved */
+ aml_append(pkg, aml_int(0)); /* reserved */
+ aml_append(scope, aml_name_decl("_S5", pkg));
+ aml_append(dsdt, scope);
+ /* Copy AML table into ACPI tables blob and patch header there */
+ g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
+ acpi_table_end(linker, &table);
+ free_aml_allocator();
+}
+
+static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
+{
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
+ GArray *table_offsets;
+ AcpiFadtData fadt_data;
+ unsigned facs, rsdt, fadt, dsdt;
+ uint8_t *u;
+ size_t aml_len = 0;
+ GArray *tables_blob = tables->table_data;
+
+ init_common_fadt_data(&fadt_data);
+
+ table_offsets = g_array_new(false, true, sizeof(uint32_t));
+ ACPI_BUILD_DPRINTF("init ACPI tables\n");
+
+ bios_linker_loader_alloc(tables->linker,
+ ACPI_BUILD_TABLE_FILE, tables_blob,
+ 64, false);
+
+ /*
+ * FACS is pointed to by FADT.
+ * We place it first since it's the only table that has alignment
+ * requirements.
+ */
+ facs = tables_blob->len;
+ build_facs(tables_blob);
+
+ /* DSDT is pointed to by FADT */
+ dsdt = tables_blob->len;
+ build_dsdt(tables_blob, tables->linker, machine);
+
+ /*
+ * Count the size of the DSDT, we will need it for
+ * legacy sizing of ACPI tables.
+ */
+ aml_len += tables_blob->len - dsdt;
+
+ /* ACPI tables pointed to by RSDT */
+ fadt = tables_blob->len;
+ acpi_add_table(table_offsets, tables_blob);
+ fadt_data.facs_tbl_offset = &facs;
+ fadt_data.dsdt_tbl_offset = &dsdt;
+ fadt_data.xdsdt_tbl_offset = &dsdt;
+ build_fadt(tables_blob, tables->linker, &fadt_data,
+ lams->oem_id, lams->oem_table_id);
+ aml_len += tables_blob->len - fadt;
+
+ acpi_add_table(table_offsets, tables_blob);
+ build_madt(tables_blob, tables->linker, lams);
+
+ acpi_add_table(table_offsets, tables_blob);
+ build_srat(tables_blob, tables->linker, machine);
+
+ acpi_add_table(table_offsets, tables_blob);
+ {
+ AcpiMcfgInfo mcfg = {
+ .base = cpu_to_le64(LS_PCIECFG_BASE),
+ .size = cpu_to_le64(LS_PCIECFG_SIZE),
+ };
+ build_mcfg(tables_blob, tables->linker, &mcfg, lams->oem_id,
+ lams->oem_table_id);
+ }
+
+ /* Add tables supplied by user (if any) */
+ for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
+ unsigned len = acpi_table_len(u);
+
+ acpi_add_table(table_offsets, tables_blob);
+ g_array_append_vals(tables_blob, u, len);
+ }
+
+ /* RSDT is pointed to by RSDP */
+ rsdt = tables_blob->len;
+ build_rsdt(tables_blob, tables->linker, table_offsets,
+ lams->oem_id, lams->oem_table_id);
+
+ /* RSDP is in FSEG memory, so allocate it separately */
+ {
+ AcpiRsdpData rsdp_data = {
+ .revision = 0,
+ .oem_id = lams->oem_id,
+ .xsdt_tbl_offset = NULL,
+ .rsdt_tbl_offset = &rsdt,
+ };
+ build_rsdp(tables->rsdp, tables->linker, &rsdp_data);
+ }
+
+ /*
+ * The align size is 128, warn if 64k is not enough therefore
+ * the align size could be resized.
+ */
+ if (tables_blob->len > ACPI_BUILD_TABLE_SIZE / 2) {
+ warn_report("ACPI table size %u exceeds %d bytes,"
+ " migration may not work",
+ tables_blob->len, ACPI_BUILD_TABLE_SIZE / 2);
+ error_printf("Try removing CPUs, NUMA nodes, memory slots"
+ " or PCI bridges.");
+ }
+
+ acpi_align_size(tables->linker->cmd_blob, ACPI_BUILD_ALIGN_SIZE);
+
+ /* Cleanup memory that's no longer used. */
+ g_array_free(table_offsets, true);
+}
+
+static void acpi_ram_update(MemoryRegion *mr, GArray *data)
+{
+ uint32_t size = acpi_data_len(data);
+
+ /*
+ * Make sure RAM size is correct - in case it got changed
+ * e.g. by migration
+ */
+ memory_region_ram_resize(mr, size, &error_abort);
+
+ memcpy(memory_region_get_ram_ptr(mr), data->data, size);
+ memory_region_set_dirty(mr, 0, size);
+}
+
+static void acpi_build_update(void *build_opaque)
+{
+ AcpiBuildState *build_state = build_opaque;
+ AcpiBuildTables tables;
+
+ /* No state to update or already patched? Nothing to do. */
+ if (!build_state || build_state->patched) {
+ return;
+ }
+ build_state->patched = 1;
+
+ acpi_build_tables_init(&tables);
+
+ acpi_build(&tables, MACHINE(qdev_get_machine()));
+
+ acpi_ram_update(build_state->table_mr, tables.table_data);
+ acpi_ram_update(build_state->rsdp_mr, tables.rsdp);
+ acpi_ram_update(build_state->linker_mr, tables.linker->cmd_blob);
+
+ acpi_build_tables_cleanup(&tables, true);
+}
+
+static void acpi_build_reset(void *build_opaque)
+{
+ AcpiBuildState *build_state = build_opaque;
+ build_state->patched = 0;
+}
+
+static const VMStateDescription vmstate_acpi_build = {
+ .name = "acpi_build",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (VMStateField[]) {
+ VMSTATE_UINT8(patched, AcpiBuildState),
+ VMSTATE_END_OF_LIST()
+ },
+};
+
+void loongarch_acpi_setup(LoongArchMachineState *lams)
+{
+ AcpiBuildTables tables;
+ AcpiBuildState *build_state;
+
+ if (!lams->fw_cfg) {
+ ACPI_BUILD_DPRINTF("No fw cfg. Bailing out.\n");
+ return;
+ }
+
+ if (!loongarch_is_acpi_enabled(lams)) {
+ ACPI_BUILD_DPRINTF("ACPI disabled. Bailing out.\n");
+ return;
+ }
+
+ build_state = g_malloc0(sizeof *build_state);
+
+ acpi_build_tables_init(&tables);
+ acpi_build(&tables, MACHINE(lams));
+
+ /* Now expose it all to Guest */
+ build_state->table_mr = acpi_add_rom_blob(acpi_build_update,
+ build_state, tables.table_data,
+ ACPI_BUILD_TABLE_FILE);
+ assert(build_state->table_mr != NULL);
+
+ build_state->linker_mr =
+ acpi_add_rom_blob(acpi_build_update, build_state,
+ tables.linker->cmd_blob, ACPI_BUILD_LOADER_FILE);
+
+ build_state->rsdp_mr = acpi_add_rom_blob(acpi_build_update,
+ build_state, tables.rsdp,
+ ACPI_BUILD_RSDP_FILE);
+
+ qemu_register_reset(acpi_build_reset, build_state);
+ acpi_build_reset(build_state);
+ vmstate_register(NULL, 0, &vmstate_acpi_build, build_state);
+
+ /*
+ * Cleanup tables but don't free the memory: we track it
+ * in build_state.
+ */
+ acpi_build_tables_cleanup(&tables, false);
+}
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 205894d343..3ec8cda8a1 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -31,6 +31,10 @@
#include "hw/loongarch/fw_cfg.h"
#include "target/loongarch/cpu.h"
#include "hw/firmware/smbios.h"
+#include "hw/acpi/aml-build.h"
+#include "qapi/qapi-visit-common.h"
+#include "hw/acpi/generic_event_device.h"
+#include "hw/mem/nvdimm.h"
#define PM_BASE 0x10080000
#define PM_SIZE 0x100
@@ -67,6 +71,7 @@ static void virt_machine_done(Notifier *notifier, void *data)
LoongArchMachineState *lams = container_of(notifier,
LoongArchMachineState, machine_done);
virt_build_smbios(lams);
+ loongarch_acpi_setup(lams);
}
struct memmap_entry {
@@ -95,7 +100,6 @@ static void memmap_add_entry(uint64_t address, uint64_t length, uint32_t type)
memmap_entries++;
}
-
/*
* This is a placeholder for missing ACPI,
* and will eventually be replaced.
@@ -166,7 +170,32 @@ static int64_t load_kernel_info(void)
return kernel_entry;
}
-static void loongarch_devices_init(DeviceState *pch_pic)
+static DeviceState *create_acpi_ged(DeviceState *pch_pic, LoongArchMachineState *lams)
+{
+ DeviceState *dev;
+ MachineState *ms = MACHINE(lams);
+ uint32_t event = ACPI_GED_PWR_DOWN_EVT;
+
+ if (ms->ram_slots) {
+ event |= ACPI_GED_MEM_HOTPLUG_EVT;
+ }
+ dev = qdev_new(TYPE_ACPI_GED);
+ qdev_prop_set_uint32(dev, "ged-event", event);
+
+ /* ged event */
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, VIRT_GED_EVT_ADDR);
+ /* memory hotplug */
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 1, VIRT_GED_MEM_ADDR);
+ /* ged regs used for reset and power down */
+ sysbus_mmio_map(SYS_BUS_DEVICE(dev), 2, VIRT_GED_REG_ADDR);
+
+ sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0,
+ qdev_get_gpio_in(pch_pic, LS7A_SCI_IRQ - PCH_PIC_IRQ_OFFSET));
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
+ return dev;
+}
+
+static void loongarch_devices_init(DeviceState *pch_pic, LoongArchMachineState *lams)
{
DeviceState *gpex_dev;
SysBusDevice *d;
@@ -242,6 +271,8 @@ static void loongarch_devices_init(DeviceState *pch_pic)
memory_region_init_io(pm_mem, NULL, &loongarch_virt_pm_ops,
NULL, "loongarch_virt_pm", PM_SIZE);
memory_region_add_subregion(get_system_memory(), PM_BASE, pm_mem);
+ /* acpi ged */
+ lams->acpi_ged = create_acpi_ged(pch_pic, lams);
}
static void loongarch_irq_init(LoongArchMachineState *lams)
@@ -343,7 +374,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
qdev_get_gpio_in(extioi, i + PCH_MSI_IRQ_START));
}
- loongarch_devices_init(pch_pic);
+ loongarch_devices_init(pch_pic, lams);
}
static void loongarch_firmware_init(LoongArchMachineState *lams)
@@ -550,6 +581,40 @@ static void loongarch_init(MachineState *machine)
qemu_add_machine_init_done_notifier(&lams->machine_done);
}
+bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
+{
+ if (lams->acpi == ON_OFF_AUTO_OFF) {
+ return false;
+ }
+ return true;
+}
+
+static void loongarch_get_acpi(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(obj);
+ OnOffAuto acpi = lams->acpi;
+
+ visit_type_OnOffAuto(v, name, &acpi, errp);
+}
+
+static void loongarch_set_acpi(Object *obj, Visitor *v, const char *name,
+ void *opaque, Error **errp)
+{
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(obj);
+
+ visit_type_OnOffAuto(v, name, &lams->acpi, errp);
+}
+
+static void loongarch_machine_initfn(Object *obj)
+{
+ LoongArchMachineState *lams = LOONGARCH_MACHINE(obj);
+
+ lams->acpi = ON_OFF_AUTO_AUTO;
+ lams->oem_id = g_strndup(ACPI_BUILD_APPNAME6, 6);
+ lams->oem_table_id = g_strndup(ACPI_BUILD_APPNAME8, 8);
+}
+
static void loongarch_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -565,6 +630,12 @@ static void loongarch_class_init(ObjectClass *oc, void *data)
mc->block_default_type = IF_VIRTIO;
mc->default_boot_order = "c";
mc->no_cdrom = 1;
+
+ object_class_property_add(oc, "acpi", "OnOffAuto",
+ loongarch_get_acpi, loongarch_set_acpi,
+ NULL, NULL);
+ object_class_property_set_description(oc, "acpi",
+ "Enable ACPI");
}
static const TypeInfo loongarch_machine_types[] = {
@@ -573,6 +644,7 @@ static const TypeInfo loongarch_machine_types[] = {
.parent = TYPE_MACHINE,
.instance_size = sizeof(LoongArchMachineState),
.class_init = loongarch_class_init,
+ .instance_init = loongarch_machine_initfn,
}
};
diff --git a/hw/loongarch/Kconfig b/hw/loongarch/Kconfig
index 610552e522..a99aa387c3 100644
--- a/hw/loongarch/Kconfig
+++ b/hw/loongarch/Kconfig
@@ -15,3 +15,5 @@ config LOONGARCH_VIRT
select LOONGARCH_EXTIOI
select LS7A_RTC
select SMBIOS
+ select ACPI_PCI
+ select ACPI_HW_REDUCED
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
index 81131c9237..3e7cbcfc05 100644
--- a/hw/loongarch/meson.build
+++ b/hw/loongarch/meson.build
@@ -3,5 +3,6 @@ loongarch_ss.add(files(
'fw_cfg.c',
))
loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('loongson3.c'))
+loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
hw_arch += {'loongarch': loongarch_ss}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PULL 21/21] hw/loongarch: Add fdt support
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (19 preceding siblings ...)
2022-07-19 17:59 ` [PULL 20/21] hw/loongarch: Add acpi ged support Richard Henderson
@ 2022-07-19 18:00 ` Richard Henderson
2022-07-20 10:50 ` [PULL 00/21] loongarch patch queue Peter Maydell
21 siblings, 0 replies; 25+ messages in thread
From: Richard Henderson @ 2022-07-19 18:00 UTC (permalink / raw)
To: qemu-devel; +Cc: Xiaojuan Yang
From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Add LoongArch flatted device tree, adding cpu device node, firmware cfg node,
pcie node into it, and create fdt rom memory region. Now fdt info is not
full since only uefi bios uses fdt, linux kernel does not use fdt.
Loongarch Linux kernel uses acpi table which is full in qemu virt
machine.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
Message-Id: <20220712083206.4187715-7-yangxiaojuan@loongson.cn>
[rth: Set TARGET_NEED_FDT, add fdt to meson.build]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
configs/targets/loongarch64-softmmu.mak | 1 +
include/hw/loongarch/virt.h | 4 +
target/loongarch/cpu.h | 3 +
hw/loongarch/loongson3.c | 136 +++++++++++++++++++++++-
target/loongarch/cpu.c | 1 +
hw/loongarch/meson.build | 2 +-
6 files changed, 143 insertions(+), 4 deletions(-)
diff --git a/configs/targets/loongarch64-softmmu.mak b/configs/targets/loongarch64-softmmu.mak
index 7bc06c850c..483474ba93 100644
--- a/configs/targets/loongarch64-softmmu.mak
+++ b/configs/targets/loongarch64-softmmu.mak
@@ -2,3 +2,4 @@ TARGET_ARCH=loongarch64
TARGET_BASE_ARCH=loongarch
TARGET_SUPPORTS_MTTCG=y
TARGET_XML_FILES= gdb-xml/loongarch-base64.xml gdb-xml/loongarch-fpu64.xml
+TARGET_NEED_FDT=y
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index fb4a4f4e7b..f4f24df428 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -28,6 +28,9 @@
#define VIRT_GED_MEM_ADDR (VIRT_GED_EVT_ADDR + ACPI_GED_EVT_SEL_LEN)
#define VIRT_GED_REG_ADDR (VIRT_GED_MEM_ADDR + MEMORY_HOTPLUG_IO_LEN)
+#define LA_FDT_BASE 0x1c400000
+#define LA_FDT_SIZE 0x100000
+
struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
@@ -45,6 +48,7 @@ struct LoongArchMachineState {
char *oem_id;
char *oem_table_id;
DeviceState *acpi_ged;
+ int fdt_size;
};
#define TYPE_LOONGARCH_MACHINE MACHINE_TYPE_NAME("virt")
diff --git a/target/loongarch/cpu.h b/target/loongarch/cpu.h
index d141ec9b5d..a36349df83 100644
--- a/target/loongarch/cpu.h
+++ b/target/loongarch/cpu.h
@@ -326,6 +326,9 @@ struct ArchCPU {
CPUNegativeOffsetState neg;
CPULoongArchState env;
QEMUTimer timer;
+
+ /* 'compatible' string for this CPU for Linux device trees */
+ const char *dtb_compatible;
};
#define TYPE_LOONGARCH_CPU "loongarch-cpu"
diff --git a/hw/loongarch/loongson3.c b/hw/loongarch/loongson3.c
index 3ec8cda8a1..a08dc9d299 100644
--- a/hw/loongarch/loongson3.c
+++ b/hw/loongarch/loongson3.c
@@ -35,6 +35,129 @@
#include "qapi/qapi-visit-common.h"
#include "hw/acpi/generic_event_device.h"
#include "hw/mem/nvdimm.h"
+#include "sysemu/device_tree.h"
+#include <libfdt.h>
+
+static void create_fdt(LoongArchMachineState *lams)
+{
+ MachineState *ms = MACHINE(lams);
+
+ ms->fdt = create_device_tree(&lams->fdt_size);
+ if (!ms->fdt) {
+ error_report("create_device_tree() failed");
+ exit(1);
+ }
+
+ /* Header */
+ qemu_fdt_setprop_string(ms->fdt, "/", "compatible",
+ "linux,dummy-loongson3");
+ qemu_fdt_setprop_cell(ms->fdt, "/", "#address-cells", 0x2);
+ qemu_fdt_setprop_cell(ms->fdt, "/", "#size-cells", 0x2);
+}
+
+static void fdt_add_cpu_nodes(const LoongArchMachineState *lams)
+{
+ int num;
+ const MachineState *ms = MACHINE(lams);
+ int smp_cpus = ms->smp.cpus;
+
+ qemu_fdt_add_subnode(ms->fdt, "/cpus");
+ qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#address-cells", 0x1);
+ qemu_fdt_setprop_cell(ms->fdt, "/cpus", "#size-cells", 0x0);
+
+ /* cpu nodes */
+ for (num = smp_cpus - 1; num >= 0; num--) {
+ char *nodename = g_strdup_printf("/cpus/cpu@%d", num);
+ LoongArchCPU *cpu = LOONGARCH_CPU(qemu_get_cpu(num));
+
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "cpu");
+ qemu_fdt_setprop_string(ms->fdt, nodename, "compatible",
+ cpu->dtb_compatible);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "reg", num);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "phandle",
+ qemu_fdt_alloc_phandle(ms->fdt));
+ g_free(nodename);
+ }
+
+ /*cpu map */
+ qemu_fdt_add_subnode(ms->fdt, "/cpus/cpu-map");
+
+ for (num = smp_cpus - 1; num >= 0; num--) {
+ char *cpu_path = g_strdup_printf("/cpus/cpu@%d", num);
+ char *map_path;
+
+ if (ms->smp.threads > 1) {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/core%d/thread%d",
+ num / (ms->smp.cores * ms->smp.threads),
+ (num / ms->smp.threads) % ms->smp.cores,
+ num % ms->smp.threads);
+ } else {
+ map_path = g_strdup_printf(
+ "/cpus/cpu-map/socket%d/core%d",
+ num / ms->smp.cores,
+ num % ms->smp.cores);
+ }
+ qemu_fdt_add_path(ms->fdt, map_path);
+ qemu_fdt_setprop_phandle(ms->fdt, map_path, "cpu", cpu_path);
+
+ g_free(map_path);
+ g_free(cpu_path);
+ }
+}
+
+static void fdt_add_fw_cfg_node(const LoongArchMachineState *lams)
+{
+ char *nodename;
+ hwaddr base = VIRT_FWCFG_BASE;
+ const MachineState *ms = MACHINE(lams);
+
+ nodename = g_strdup_printf("/fw_cfg@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename,
+ "compatible", "qemu,fw-cfg-mmio");
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base, 2, 0x8);
+ qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0);
+ g_free(nodename);
+}
+
+static void fdt_add_pcie_node(const LoongArchMachineState *lams)
+{
+ char *nodename;
+ hwaddr base_mmio = LS7A_PCI_MEM_BASE;
+ hwaddr size_mmio = LS7A_PCI_MEM_SIZE;
+ hwaddr base_pio = LS7A_PCI_IO_BASE;
+ hwaddr size_pio = LS7A_PCI_IO_SIZE;
+ hwaddr base_pcie = LS_PCIECFG_BASE;
+ hwaddr size_pcie = LS_PCIECFG_SIZE;
+ hwaddr base = base_pcie;
+
+ const MachineState *ms = MACHINE(lams);
+
+ nodename = g_strdup_printf("/pcie@%" PRIx64, base);
+ qemu_fdt_add_subnode(ms->fdt, nodename);
+ qemu_fdt_setprop_string(ms->fdt, nodename,
+ "compatible", "pci-host-ecam-generic");
+ qemu_fdt_setprop_string(ms->fdt, nodename, "device_type", "pci");
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#address-cells", 3);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "#size-cells", 2);
+ qemu_fdt_setprop_cell(ms->fdt, nodename, "linux,pci-domain", 0);
+ qemu_fdt_setprop_cells(ms->fdt, nodename, "bus-range", 0,
+ PCIE_MMCFG_BUS(LS_PCIECFG_SIZE - 1));
+ qemu_fdt_setprop(ms->fdt, nodename, "dma-coherent", NULL, 0);
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "reg",
+ 2, base_pcie, 2, size_pcie);
+ qemu_fdt_setprop_sized_cells(ms->fdt, nodename, "ranges",
+ 1, FDT_PCI_RANGE_IOPORT, 2, LS7A_PCI_IO_OFFSET,
+ 2, base_pio, 2, size_pio,
+ 1, FDT_PCI_RANGE_MMIO, 2, base_mmio,
+ 2, base_mmio, 2, size_mmio);
+ g_free(nodename);
+ qemu_fdt_dumpdtb(ms->fdt, lams->fdt_size);
+}
+
#define PM_BASE 0x10080000
#define PM_SIZE 0x100
@@ -524,12 +647,12 @@ static void loongarch_init(MachineState *machine)
error_report("ram_size must be greater than 1G.");
exit(1);
}
-
+ create_fdt(lams);
/* Init CPUs */
for (i = 0; i < machine->smp.cpus; i++) {
cpu_create(machine->cpu_type);
}
-
+ fdt_add_cpu_nodes(lams);
/* Add memory region */
memory_region_init_alias(&lams->lowmem, NULL, "loongarch.lowram",
machine->ram, 0, 256 * MiB);
@@ -552,12 +675,12 @@ static void loongarch_init(MachineState *machine)
/* fw_cfg init */
lams->fw_cfg = loongarch_fw_cfg_init(ram_size, machine);
rom_set_fw(lams->fw_cfg);
-
if (lams->fw_cfg != NULL) {
fw_cfg_add_file(lams->fw_cfg, "etc/memmap",
memmap_table,
sizeof(struct memmap_entry) * (memmap_entries));
}
+ fdt_add_fw_cfg_node(lams);
loaderparams.ram_size = ram_size;
loaderparams.kernel_filename = machine->kernel_filename;
loaderparams.kernel_cmdline = machine->kernel_cmdline;
@@ -579,6 +702,13 @@ static void loongarch_init(MachineState *machine)
loongarch_irq_init(lams);
lams->machine_done.notify = virt_machine_done;
qemu_add_machine_init_done_notifier(&lams->machine_done);
+ fdt_add_pcie_node(lams);
+
+ /* load fdt */
+ MemoryRegion *fdt_rom = g_new(MemoryRegion, 1);
+ memory_region_init_rom(fdt_rom, NULL, "fdt", LA_FDT_SIZE, &error_fatal);
+ memory_region_add_subregion(get_system_memory(), LA_FDT_BASE, fdt_rom);
+ rom_add_blob_fixed("fdt", machine->fdt, lams->fdt_size, LA_FDT_BASE);
}
bool loongarch_is_acpi_enabled(LoongArchMachineState *lams)
diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index 1415793d6f..1c69a76f2b 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -341,6 +341,7 @@ static void loongarch_la464_initfn(Object *obj)
env->cpucfg[i] = 0x0;
}
+ cpu->dtb_compatible = "loongarch,Loongson-3A5000";
env->cpucfg[0] = 0x14c010; /* PRID */
uint32_t data = 0;
diff --git a/hw/loongarch/meson.build b/hw/loongarch/meson.build
index 3e7cbcfc05..6a2a1b18e5 100644
--- a/hw/loongarch/meson.build
+++ b/hw/loongarch/meson.build
@@ -2,7 +2,7 @@ loongarch_ss = ss.source_set()
loongarch_ss.add(files(
'fw_cfg.c',
))
-loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: files('loongson3.c'))
+loongarch_ss.add(when: 'CONFIG_LOONGARCH_VIRT', if_true: [files('loongson3.c'), fdt])
loongarch_ss.add(when: 'CONFIG_ACPI', if_true: files('acpi-build.c'))
hw_arch += {'loongarch': loongarch_ss}
--
2.34.1
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PULL 00/21] loongarch patch queue
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
` (20 preceding siblings ...)
2022-07-19 18:00 ` [PULL 21/21] hw/loongarch: Add fdt support Richard Henderson
@ 2022-07-20 10:50 ` Peter Maydell
21 siblings, 0 replies; 25+ messages in thread
From: Peter Maydell @ 2022-07-20 10:50 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel
On Tue, 19 Jul 2022 at 19:03, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The following changes since commit da7da9d5e608200ecc0749ff37be246e9cd3314f:
>
> Merge tag 'pull-request-2022-07-19' of https://gitlab.com/thuth/qemu into staging (2022-07-19 13:05:06 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/rth7680/qemu.git tags/pull-la-20220719
>
> for you to fetch changes up to fda3f15b0079d4bba76791502a7e00b8b747f509:
>
> hw/loongarch: Add fdt support (2022-07-19 22:55:10 +0530)
>
> ----------------------------------------------------------------
> LoongArch64 patch queue:
>
> Add dockerfile for loongarch cross compile
> Add reference files for float tests.
> Add simple tests for div, mod, clo, fclass, fcmp, pcadd
> Add bios and kernel boot support.
> Add smbios, acpi, and fdt support.
> Fix pch-pic update-irq.
> Fix some errors identified by coverity.
>
Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.1
for any user-visible changes.
-- PMM
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PULL 20/21] hw/loongarch: Add acpi ged support
2022-07-19 17:59 ` [PULL 20/21] hw/loongarch: Add acpi ged support Richard Henderson
@ 2022-07-20 12:10 ` Peter Maydell
2022-07-21 4:03 ` gaosong
0 siblings, 1 reply; 25+ messages in thread
From: Peter Maydell @ 2022-07-20 12:10 UTC (permalink / raw)
To: Richard Henderson; +Cc: qemu-devel, Xiaojuan Yang
On Tue, 19 Jul 2022 at 19:16, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
>
> Loongarch virt machine uses general hardware reduces acpi method, rather
> than LS7A acpi device. Now only power management function is used in
> acpi ged device, memory hotplug will be added later. Also acpi tables
> such as RSDP/RSDT/FADT etc.
>
> The acpi table has submited to acpi spec, and will release soon.
>
> Acked-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> Message-Id: <20220712083206.4187715-6-yangxiaojuan@loongson.cn>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Didn't notice this in the original CI, but this generates a compiler
warning on openbsd:
../src/hw/loongarch/acpi-build.c:416:12: warning: variable 'aml_len'
set but not used [-Wunused-but-set-variable]
size_t aml_len = 0;
^
and we do indeed only ever seem to set and update that variable;
we never use it.
> +static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
> +{
> + LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
> + GArray *table_offsets;
> + AcpiFadtData fadt_data;
> + unsigned facs, rsdt, fadt, dsdt;
> + uint8_t *u;
> + size_t aml_len = 0;
> + GArray *tables_blob = tables->table_data;
> +
> + init_common_fadt_data(&fadt_data);
> +
> + table_offsets = g_array_new(false, true, sizeof(uint32_t));
> + ACPI_BUILD_DPRINTF("init ACPI tables\n");
> +
> + bios_linker_loader_alloc(tables->linker,
> + ACPI_BUILD_TABLE_FILE, tables_blob,
> + 64, false);
> +
> + /*
> + * FACS is pointed to by FADT.
> + * We place it first since it's the only table that has alignment
> + * requirements.
> + */
> + facs = tables_blob->len;
> + build_facs(tables_blob);
> +
> + /* DSDT is pointed to by FADT */
> + dsdt = tables_blob->len;
> + build_dsdt(tables_blob, tables->linker, machine);
> +
> + /*
> + * Count the size of the DSDT, we will need it for
> + * legacy sizing of ACPI tables.
> + */
> + aml_len += tables_blob->len - dsdt;
This comment claims we're going to use this value -- is it wrong ?
thanks
-- PMM
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PULL 20/21] hw/loongarch: Add acpi ged support
2022-07-20 12:10 ` Peter Maydell
@ 2022-07-21 4:03 ` gaosong
0 siblings, 0 replies; 25+ messages in thread
From: gaosong @ 2022-07-21 4:03 UTC (permalink / raw)
To: Peter Maydell, Richard Henderson; +Cc: qemu-devel, Xiaojuan Yang
On 2022/7/20 下午8:10, Peter Maydell wrote:
> On Tue, 19 Jul 2022 at 19:16, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>> From: Xiaojuan Yang <yangxiaojuan@loongson.cn>
>>
>> Loongarch virt machine uses general hardware reduces acpi method, rather
>> than LS7A acpi device. Now only power management function is used in
>> acpi ged device, memory hotplug will be added later. Also acpi tables
>> such as RSDP/RSDT/FADT etc.
>>
>> The acpi table has submited to acpi spec, and will release soon.
>>
>> Acked-by: Richard Henderson <richard.henderson@linaro.org>
>> Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn>
>> Message-Id: <20220712083206.4187715-6-yangxiaojuan@loongson.cn>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Didn't notice this in the original CI, but this generates a compiler
> warning on openbsd:
>
> ../src/hw/loongarch/acpi-build.c:416:12: warning: variable 'aml_len'
> set but not used [-Wunused-but-set-variable]
> size_t aml_len = 0;
> ^
>
> and we do indeed only ever seem to set and update that variable;
> we never use it.
>
>> +static void acpi_build(AcpiBuildTables *tables, MachineState *machine)
>> +{
>> + LoongArchMachineState *lams = LOONGARCH_MACHINE(machine);
>> + GArray *table_offsets;
>> + AcpiFadtData fadt_data;
>> + unsigned facs, rsdt, fadt, dsdt;
>> + uint8_t *u;
>> + size_t aml_len = 0;
>> + GArray *tables_blob = tables->table_data;
>> +
>> + init_common_fadt_data(&fadt_data);
>> +
>> + table_offsets = g_array_new(false, true, sizeof(uint32_t));
>> + ACPI_BUILD_DPRINTF("init ACPI tables\n");
>> +
>> + bios_linker_loader_alloc(tables->linker,
>> + ACPI_BUILD_TABLE_FILE, tables_blob,
>> + 64, false);
>> +
>> + /*
>> + * FACS is pointed to by FADT.
>> + * We place it first since it's the only table that has alignment
>> + * requirements.
>> + */
>> + facs = tables_blob->len;
>> + build_facs(tables_blob);
>> +
>> + /* DSDT is pointed to by FADT */
>> + dsdt = tables_blob->len;
>> + build_dsdt(tables_blob, tables->linker, machine);
>> +
>> + /*
>> + * Count the size of the DSDT, we will need it for
>> + * legacy sizing of ACPI tables.
>> + */
>> + aml_len += tables_blob->len - dsdt;
> This comment claims we're going to use this value -- is it wrong ?
This value is unused, I had send a patch to drop it .
Thanks.
Song Gao
> thanks
> -- PMM
^ permalink raw reply [flat|nested] 25+ messages in thread
end of thread, other threads:[~2022-07-21 4:05 UTC | newest]
Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-07-19 17:59 [PULL 00/21] loongarch patch queue Richard Henderson
2022-07-19 17:59 ` [PULL 01/21] tests/docker/dockerfiles: Add debian-loongarch-cross.docker Richard Henderson
2022-07-19 17:59 ` [PULL 02/21] target/loongarch: Fix loongarch_cpu_class_by_name Richard Henderson
2022-07-19 17:59 ` [PULL 03/21] hw/intc/loongarch_pch_pic: Fix bugs for update_irq function Richard Henderson
2022-07-19 17:59 ` [PULL 04/21] target/loongarch/cpu: Fix coverity errors about excp_names Richard Henderson
2022-07-19 17:59 ` [PULL 05/21] target/loongarch/tlb_helper: Fix coverity integer overflow error Richard Henderson
2022-07-19 17:59 ` [PULL 06/21] target/loongarch/op_helper: Fix coverity cond_at_most error Richard Henderson
2022-07-19 17:59 ` [PULL 07/21] target/loongarch/cpu: Fix cpucfg default value Richard Henderson
2022-07-19 17:59 ` [PULL 08/21] fpu/softfloat: Add LoongArch specializations for pickNaN* Richard Henderson
2022-07-19 17:59 ` [PULL 09/21] target/loongarch: Fix float_convd/float_convs test failing Richard Henderson
2022-07-19 17:59 ` [PULL 10/21] tests/tcg/loongarch64: Add float reference files Richard Henderson
2022-07-19 17:59 ` [PULL 11/21] tests/tcg/loongarch64: Add clo related instructions test Richard Henderson
2022-07-19 17:59 ` [PULL 12/21] tests/tcg/loongarch64: Add div and mod " Richard Henderson
2022-07-19 17:59 ` [PULL 13/21] tests/tcg/loongarch64: Add fclass test Richard Henderson
2022-07-19 17:59 ` [PULL 14/21] tests/tcg/loongarch64: Add fp comparison instructions test Richard Henderson
2022-07-19 17:59 ` [PULL 15/21] tests/tcg/loongarch64: Add pcadd related " Richard Henderson
2022-07-19 17:59 ` [PULL 16/21] hw/loongarch: Add fw_cfg table support Richard Henderson
2022-07-19 17:59 ` [PULL 17/21] hw/loongarch: Add uefi bios loading support Richard Henderson
2022-07-19 17:59 ` [PULL 18/21] hw/loongarch: Add linux kernel booting support Richard Henderson
2022-07-19 17:59 ` [PULL 19/21] hw/loongarch: Add smbios support Richard Henderson
2022-07-19 17:59 ` [PULL 20/21] hw/loongarch: Add acpi ged support Richard Henderson
2022-07-20 12:10 ` Peter Maydell
2022-07-21 4:03 ` gaosong
2022-07-19 18:00 ` [PULL 21/21] hw/loongarch: Add fdt support Richard Henderson
2022-07-20 10:50 ` [PULL 00/21] loongarch patch queue Peter Maydell
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