* [kvm-unit-tests PATCH 0/2] x86: Don't assume !x2APIC during boot
@ 2022-07-25 20:13 Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 1/2] x86: apic: Play nice with x2APIC being enabled when getting "pre-boot" ID Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 2/2] x86: cstart64: Put APIC into xAPIC after loading TSS Sean Christopherson
0 siblings, 2 replies; 3+ messages in thread
From: Sean Christopherson @ 2022-07-25 20:13 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: kvm, Sean Christopherson
Get the "pre-boot" APIC ID via the x2APIC interface (RDMSR) if x2APIC is
enabled (per APIC_BASE) instead of assuming xAPIC is enabled. UEFI SMP
support[*] wants to use the pre-boot APIC ID helper to configure GS.base,
i.e. before "resetting" the APIC to xAPIC mode. This causes problems for
the SVM INIT-SIPI test, which sends APs back through the boot sequence
without taking them out of x2APIC.
Posting as a separate series mostly because I don't want to respin the
entire UEFI series, but also because it's not impossible that someone
will want to run KUT with firmware that forces x2APIC mode.
[*] https://lore.kernel.org/all/20220615232943.1465490-1-seanjc@google.com
Sean Christopherson (2):
x86: apic: Play nice with x2APIC being enabled when getting "pre-boot"
ID
x86: cstart64: Put APIC into xAPIC after loading TSS
lib/x86/apic.c | 14 +++++++++-----
x86/cstart64.S | 4 ++--
2 files changed, 11 insertions(+), 7 deletions(-)
base-commit: 7b2e41767bb8caf91972ee32e4ca85ec630584e2
--
2.37.1.359.gd136c6c3e2-goog
^ permalink raw reply [flat|nested] 3+ messages in thread
* [kvm-unit-tests PATCH 1/2] x86: apic: Play nice with x2APIC being enabled when getting "pre-boot" ID
2022-07-25 20:13 [kvm-unit-tests PATCH 0/2] x86: Don't assume !x2APIC during boot Sean Christopherson
@ 2022-07-25 20:13 ` Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 2/2] x86: cstart64: Put APIC into xAPIC after loading TSS Sean Christopherson
1 sibling, 0 replies; 3+ messages in thread
From: Sean Christopherson @ 2022-07-25 20:13 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: kvm, Sean Christopherson
Retrieve the "pre-boot" APIC ID via the x2APIC interface if x2APIC is
enabled instead of assuming that the APIC is always in xAPIC mode. EFI
has a catch-22 where it needs the APID ID to initialize the per-vCPU
GS.base, but calling reset_apic() = >disable_apic() needs GS.base to be
correctly initialized in order to set the correct APIC ops. Play nice
with either xAPIC or x2APIC so that EFI can be used for SMP tests, in
particular the SVM INIT-SIPI tests which send APs back through the boot
sequence while x2APIC is enabled.
Alternatively, disabling x2APIC and updating the APIC ops could be split,
but there's no obvious advantage in doing so. Retrieving the pre-boot
APIC ID isn't a hot path, i.e. the cost of the RDMSR is likely negligible,
and letting callers force xAPIC without updating the ops isn't any less
fragile.
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
lib/x86/apic.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/lib/x86/apic.c b/lib/x86/apic.c
index 5d4c776..eed93fa 100644
--- a/lib/x86/apic.c
+++ b/lib/x86/apic.c
@@ -56,11 +56,6 @@ static uint32_t xapic_id(void)
return xapic_read(APIC_ID) >> 24;
}
-uint32_t pre_boot_apic_id(void)
-{
- return xapic_id();
-}
-
static const struct apic_ops xapic_ops = {
.reg_read = xapic_read,
.reg_write = xapic_write,
@@ -165,6 +160,15 @@ int enable_x2apic(void)
}
}
+uint32_t pre_boot_apic_id(void)
+{
+ u32 msr_lo, msr_hi;
+
+ asm ("rdmsr" : "=a"(msr_lo), "=d"(msr_hi) : "c"(MSR_IA32_APICBASE));
+
+ return (msr_lo & APIC_EXTD) ? x2apic_id() : xapic_id();
+}
+
void disable_apic(void)
{
wrmsr(MSR_IA32_APICBASE, rdmsr(MSR_IA32_APICBASE) & ~(APIC_EN | APIC_EXTD));
--
2.37.1.359.gd136c6c3e2-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
* [kvm-unit-tests PATCH 2/2] x86: cstart64: Put APIC into xAPIC after loading TSS
2022-07-25 20:13 [kvm-unit-tests PATCH 0/2] x86: Don't assume !x2APIC during boot Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 1/2] x86: apic: Play nice with x2APIC being enabled when getting "pre-boot" ID Sean Christopherson
@ 2022-07-25 20:13 ` Sean Christopherson
1 sibling, 0 replies; 3+ messages in thread
From: Sean Christopherson @ 2022-07-25 20:13 UTC (permalink / raw)
To: Paolo Bonzini; +Cc: kvm, Sean Christopherson
Now that pre_boot_apic_id() works with either xAPIC or x2APIC, "reset"
the APIC after configuring loading the TSS. Previously, load_tss() =>
setup_tss() needed to run after forcing the vCPU into xAPIC mode due to
pre_boot_apic_id() assuming xAPIC.
The order doesn't truly matter at this point, but loading the TSS first
will allow sharing code with the EFI boot flow, which "needs" to load the
TSS (more specifically, needs to configure GS.base) prior to forcing the
vCPU into xAPIC (and thus setting the per-vCPU APIC ops).
Signed-off-by: Sean Christopherson <seanjc@google.com>
---
x86/cstart64.S | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/x86/cstart64.S b/x86/cstart64.S
index 7272452..5269424 100644
--- a/x86/cstart64.S
+++ b/x86/cstart64.S
@@ -188,8 +188,8 @@ save_id:
retq
ap_start64:
- call reset_apic
load_tss
+ call reset_apic
call enable_apic
call save_id
call enable_x2apic
@@ -201,8 +201,8 @@ ap_start64:
jmp 1b
start64:
- call reset_apic
load_tss
+ call reset_apic
call mask_pic_interrupts
call enable_apic
call save_id
--
2.37.1.359.gd136c6c3e2-goog
^ permalink raw reply related [flat|nested] 3+ messages in thread
end of thread, other threads:[~2022-07-25 20:15 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
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2022-07-25 20:13 [kvm-unit-tests PATCH 0/2] x86: Don't assume !x2APIC during boot Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 1/2] x86: apic: Play nice with x2APIC being enabled when getting "pre-boot" ID Sean Christopherson
2022-07-25 20:13 ` [kvm-unit-tests PATCH 2/2] x86: cstart64: Put APIC into xAPIC after loading TSS Sean Christopherson
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