From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Cc: Matthew Brost <matthew.brost@intel.com>, John Harrison <John.C.Harrison@Intel.com>, DRI-Devel@Lists.FreeDesktop.Org Subject: [PATCH 5/6] drm/i915/guc: Support larger contexts on newer hardware Date: Wed, 27 Jul 2022 19:42:24 -0700 [thread overview] Message-ID: <20220728024225.2363663-6-John.C.Harrison@Intel.com> (raw) In-Reply-To: <20220728024225.2363663-1-John.C.Harrison@Intel.com> From: Matthew Brost <matthew.brost@intel.com> The GuC needs a copy of a golden context for implementing watchdog resets (aka media resets). This context is larger on newer platforms. So adjust the size being allocated/copied accordingly. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index ba7541f3ca610..74cbe8eaf5318 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -464,7 +464,11 @@ static void fill_engine_enable_masks(struct intel_gt *gt, } #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32)) -#define LRC_SKIP_SIZE (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE) +#define XEHP_LR_HW_CONTEXT_SIZE (96 * sizeof(u32)) +#define LR_HW_CONTEXT_SZ(i915) (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50) ? \ + XEHP_LR_HW_CONTEXT_SIZE : \ + LR_HW_CONTEXT_SIZE) +#define LRC_SKIP_SIZE(i915) (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SZ(i915)) static int guc_prep_golden_context(struct intel_guc *guc) { struct intel_gt *gt = guc_to_gt(guc); @@ -525,7 +529,7 @@ static int guc_prep_golden_context(struct intel_guc *guc) * on all engines). */ ads_blob_write(guc, ads.eng_state_size[guc_class], - real_size - LRC_SKIP_SIZE); + real_size - LRC_SKIP_SIZE(gt->i915)); ads_blob_write(guc, ads.golden_context_lrca[guc_class], addr_ggtt); @@ -599,7 +603,7 @@ static void guc_init_golden_context(struct intel_guc *guc) } GEM_BUG_ON(ads_blob_read(guc, ads.eng_state_size[guc_class]) != - real_size - LRC_SKIP_SIZE); + real_size - LRC_SKIP_SIZE(gt->i915)); GEM_BUG_ON(ads_blob_read(guc, ads.golden_context_lrca[guc_class]) != addr_ggtt); addr_ggtt += alloc_size; -- 2.37.1
WARNING: multiple messages have this Message-ID (diff)
From: John.C.Harrison@Intel.com To: Intel-GFX@Lists.FreeDesktop.Org Cc: DRI-Devel@Lists.FreeDesktop.Org Subject: [Intel-gfx] [PATCH 5/6] drm/i915/guc: Support larger contexts on newer hardware Date: Wed, 27 Jul 2022 19:42:24 -0700 [thread overview] Message-ID: <20220728024225.2363663-6-John.C.Harrison@Intel.com> (raw) In-Reply-To: <20220728024225.2363663-1-John.C.Harrison@Intel.com> From: Matthew Brost <matthew.brost@intel.com> The GuC needs a copy of a golden context for implementing watchdog resets (aka media resets). This context is larger on newer platforms. So adjust the size being allocated/copied accordingly. Signed-off-by: Matthew Brost <matthew.brost@intel.com> Signed-off-by: John Harrison <John.C.Harrison@Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c index ba7541f3ca610..74cbe8eaf5318 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c @@ -464,7 +464,11 @@ static void fill_engine_enable_masks(struct intel_gt *gt, } #define LR_HW_CONTEXT_SIZE (80 * sizeof(u32)) -#define LRC_SKIP_SIZE (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SIZE) +#define XEHP_LR_HW_CONTEXT_SIZE (96 * sizeof(u32)) +#define LR_HW_CONTEXT_SZ(i915) (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50) ? \ + XEHP_LR_HW_CONTEXT_SIZE : \ + LR_HW_CONTEXT_SIZE) +#define LRC_SKIP_SIZE(i915) (LRC_PPHWSP_SZ * PAGE_SIZE + LR_HW_CONTEXT_SZ(i915)) static int guc_prep_golden_context(struct intel_guc *guc) { struct intel_gt *gt = guc_to_gt(guc); @@ -525,7 +529,7 @@ static int guc_prep_golden_context(struct intel_guc *guc) * on all engines). */ ads_blob_write(guc, ads.eng_state_size[guc_class], - real_size - LRC_SKIP_SIZE); + real_size - LRC_SKIP_SIZE(gt->i915)); ads_blob_write(guc, ads.golden_context_lrca[guc_class], addr_ggtt); @@ -599,7 +603,7 @@ static void guc_init_golden_context(struct intel_guc *guc) } GEM_BUG_ON(ads_blob_read(guc, ads.eng_state_size[guc_class]) != - real_size - LRC_SKIP_SIZE); + real_size - LRC_SKIP_SIZE(gt->i915)); GEM_BUG_ON(ads_blob_read(guc, ads.golden_context_lrca[guc_class]) != addr_ggtt); addr_ggtt += alloc_size; -- 2.37.1
next prev parent reply other threads:[~2022-07-28 2:43 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-07-28 2:42 [PATCH 0/6] Random assortment of (mostly) GuC related patches John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 2:42 ` [PATCH 1/6] drm/i915/guc: Route semaphores to GuC for Gen12+ John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 2:42 ` [PATCH 2/6] drm/i915/guc: Fix issues with live_preempt_cancel John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 2:45 ` John Harrison 2022-07-28 2:45 ` [Intel-gfx] " John Harrison 2022-07-28 2:42 ` [PATCH 3/6] drm/i915/guc: Add selftest for a hung GuC John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 18:21 ` John Harrison 2022-07-28 18:21 ` [Intel-gfx] " John Harrison 2022-07-28 18:26 ` John.C.Harrison 2022-07-28 18:26 ` [Intel-gfx] " John.C.Harrison 2022-07-28 18:33 ` John Harrison 2022-07-28 18:33 ` [Intel-gfx] " John Harrison 2022-07-28 2:42 ` [PATCH 4/6] drm/i915/selftest: Cope with not having an RCS engine John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 2:42 ` John.C.Harrison [this message] 2022-07-28 2:42 ` [Intel-gfx] [PATCH 5/6] drm/i915/guc: Support larger contexts on newer hardware John.C.Harrison 2022-07-28 2:46 ` John Harrison 2022-07-28 2:46 ` [Intel-gfx] " John Harrison 2022-07-28 2:42 ` [PATCH 6/6] drm/i915/guc: Don't abort on CTB_UNUSED status John.C.Harrison 2022-07-28 2:42 ` [Intel-gfx] " John.C.Harrison 2022-07-28 19:06 ` Michal Wajdeczko 2022-07-28 19:38 ` John Harrison 2022-07-29 0:00 ` Ceraolo Spurio, Daniele 2022-07-29 0:35 ` John Harrison 2022-07-28 3:09 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Random assortment of (mostly) GuC related patches (rev3) Patchwork 2022-07-28 3:09 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-07-28 3:34 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork 2022-07-28 10:44 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork 2022-07-28 19:17 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Random assortment of (mostly) GuC related patches (rev4) Patchwork 2022-07-28 19:17 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork 2022-07-28 19:40 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork 2022-07-29 0:40 ` John Harrison
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