[PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
so they are properly exported as valid pin numbers.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index a140b6bfbfaa..2b44c634ccb5 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
 		.funcs = {_func1, _func2}	\
 	}
 
+#define PIN_GRP_GPIO_0(_name, _start, _nr)	\
+	{					\
+		.name = _name,			\
+		.start_pin = _start,		\
+		.npins = _nr,			\
+		.reg_mask = 0,			\
+		.val = {0},			\
+		.funcs = {"gpio"}		\
+	}
+
 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1)	\
 	{					\
 		.name = _name,			\
@@ -179,6 +189,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 		       "pwm", "led"),
 	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
 	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
+	PIN_GRP_GPIO_0("gpio1_5", 5, 1),
 	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
 	PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
 	PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -195,6 +206,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
 	PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
+	PIN_GRP_GPIO_0("gpio2_2", 2, 1),
 	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
 	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
 	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
-- 
2.20.1

[PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
so they are properly exported as valid pin numbers.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index a140b6bfbfaa..2b44c634ccb5 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
 		.funcs = {_func1, _func2}	\
 	}
 
+#define PIN_GRP_GPIO_0(_name, _start, _nr)	\
+	{					\
+		.name = _name,			\
+		.start_pin = _start,		\
+		.npins = _nr,			\
+		.reg_mask = 0,			\
+		.val = {0},			\
+		.funcs = {"gpio"}		\
+	}
+
 #define PIN_GRP_GPIO(_name, _start, _nr, _mask, _func1)	\
 	{					\
 		.name = _name,			\
@@ -179,6 +189,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 		       "pwm", "led"),
 	PIN_GRP_GPIO("pmic1", 7, 1, BIT(7), "pmic"),
 	PIN_GRP_GPIO("pmic0", 6, 1, BIT(8), "pmic"),
+	PIN_GRP_GPIO_0("gpio1_5", 5, 1),
 	PIN_GRP_GPIO("i2c2", 2, 2, BIT(9), "i2c"),
 	PIN_GRP_GPIO("i2c1", 0, 2, BIT(10), "i2c"),
 	PIN_GRP_GPIO("spi_cs1", 17, 1, BIT(12), "spi"),
@@ -195,6 +206,7 @@ static struct armada_37xx_pin_group armada_37xx_nb_groups[] = {
 static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("usb32_drvvbus0", 0, 1, BIT(0), "drvbus"),
 	PIN_GRP_GPIO("usb2_drvvbus1", 1, 1, BIT(1), "drvbus"),
+	PIN_GRP_GPIO_0("gpio2_2", 2, 1),
 	PIN_GRP_GPIO("sdio_sb", 24, 6, BIT(2), "sdio"),
 	PIN_GRP_GPIO("rgmii", 6, 12, BIT(3), "mii"),
 	PIN_GRP_GPIO("smi", 18, 2, BIT(4), "smi"),
-- 
2.20.1


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[PATCH v2 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22

[Pali Rohár]

All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 2b44c634ccb5..e5e5f0ea0e77 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -213,9 +213,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
 	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
-	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
-	PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
-	PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
+	PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
+	PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
+		       "ptp", "mii"),
+	PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
+		       "ptp", "mii"),
 	PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
 		       "mii", "mii_err"),
 };
-- 
2.20.1

[PATCH v2 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22

[Pali Rohár]

All 3 MPP pins (20, 21 and 22) can be configured individually and also can
be configured to GPIO functions. Fix definitions for these MPP pins in
existing pin groups. After this change GPIO function can be enabled just
for one of these 3 pins.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 2b44c634ccb5..e5e5f0ea0e77 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -213,9 +213,11 @@ static struct armada_37xx_pin_group armada_37xx_sb_groups[] = {
 	PIN_GRP_GPIO("pcie1", 3, 1, BIT(5), "pcie"), /* this actually controls "pcie1_reset" */
 	PIN_GRP_GPIO("pcie1_clkreq", 4, 1, BIT(9), "pcie"),
 	PIN_GRP_GPIO("pcie1_wakeup", 5, 1, BIT(10), "pcie"),
-	PIN_GRP_GPIO("ptp", 20, 3, BIT(11) | BIT(12) | BIT(13), "ptp"),
-	PIN_GRP("ptp_clk", 21, 1, BIT(6), "ptp", "mii"),
-	PIN_GRP("ptp_trig", 22, 1, BIT(7), "ptp", "mii"),
+	PIN_GRP_GPIO("ptp", 20, 1, BIT(11), "ptp"),
+	PIN_GRP_GPIO_3("ptp_clk", 21, 1, BIT(6) | BIT(12), 0, BIT(6), BIT(12),
+		       "ptp", "mii"),
+	PIN_GRP_GPIO_3("ptp_trig", 22, 1, BIT(7) | BIT(13), 0, BIT(7), BIT(13),
+		       "ptp", "mii"),
 	PIN_GRP_GPIO_3("mii_col", 23, 1, BIT(8) | BIT(14), 0, BIT(8), BIT(14),
 		       "mii", "mii_err"),
 };
-- 
2.20.1


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[PATCH v2 3/4] pinctrl: armada-37xx: Checks for errors in gpio_request_enable callback

[Pali Rohár]

Now when all MPP pins are properly defined and every MPP pin has GPIO
function, always checks for errors in armada_37xx_gpio_request_enable()
function when calling armada_37xx_pmx_set_by_name(). Function
armada_37xx_pmx_set_by_name() should not return "not supported" error
anymore for any GPIO pin when requesting GPIO mode.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
Changes in v2:
* add missing int ret;
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index e5e5f0ea0e77..3227f70922fc 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -500,11 +500,15 @@ static int armada_37xx_gpio_request_enable(struct pinctrl_dev *pctldev,
 	struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 	struct armada_37xx_pin_group *group;
 	int grp = 0;
+	int ret;
 
 	dev_dbg(info->dev, "requesting gpio %d\n", offset);
 
-	while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp)))
-		armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
+	while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp))) {
+		ret = armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
-- 
2.20.1

[PATCH v2 3/4] pinctrl: armada-37xx: Checks for errors in gpio_request_enable callback

[Pali Rohár]

Now when all MPP pins are properly defined and every MPP pin has GPIO
function, always checks for errors in armada_37xx_gpio_request_enable()
function when calling armada_37xx_pmx_set_by_name(). Function
armada_37xx_pmx_set_by_name() should not return "not supported" error
anymore for any GPIO pin when requesting GPIO mode.

Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
Signed-off-by: Pali Rohár <pali@kernel.org>
---
Changes in v2:
* add missing int ret;
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index e5e5f0ea0e77..3227f70922fc 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -500,11 +500,15 @@ static int armada_37xx_gpio_request_enable(struct pinctrl_dev *pctldev,
 	struct armada_37xx_pinctrl *info = pinctrl_dev_get_drvdata(pctldev);
 	struct armada_37xx_pin_group *group;
 	int grp = 0;
+	int ret;
 
 	dev_dbg(info->dev, "requesting gpio %d\n", offset);
 
-	while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp)))
-		armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
+	while ((group = armada_37xx_find_next_grp_by_pin(info, offset, &grp))) {
+		ret = armada_37xx_pmx_set_by_name(pctldev, "gpio", group);
+		if (ret)
+			return ret;
+	}
 
 	return 0;
 }
-- 
2.20.1


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[PATCH v2 4/4] pinctrl: armada-37xx: Remove unused macro PIN_GRP()

[Pali Rohár]

Macro PIN_GRP() is not used, remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 3227f70922fc..3f76899eb8e3 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -112,16 +112,6 @@ struct armada_37xx_pinctrl {
 	struct armada_37xx_pm_state	pm;
 };
 
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2)	\
-	{					\
-		.name = _name,			\
-		.start_pin = _start,		\
-		.npins = _nr,			\
-		.reg_mask = _mask,		\
-		.val = {0, _mask},		\
-		.funcs = {_func1, _func2}	\
-	}
-
 #define PIN_GRP_GPIO_0(_name, _start, _nr)	\
 	{					\
 		.name = _name,			\
-- 
2.20.1

[PATCH v2 4/4] pinctrl: armada-37xx: Remove unused macro PIN_GRP()

[Pali Rohár]

Macro PIN_GRP() is not used, remove it.

Signed-off-by: Pali Rohár <pali@kernel.org>
---
 drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 10 ----------
 1 file changed, 10 deletions(-)

diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
index 3227f70922fc..3f76899eb8e3 100644
--- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
+++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
@@ -112,16 +112,6 @@ struct armada_37xx_pinctrl {
 	struct armada_37xx_pm_state	pm;
 };
 
-#define PIN_GRP(_name, _start, _nr, _mask, _func1, _func2)	\
-	{					\
-		.name = _name,			\
-		.start_pin = _start,		\
-		.npins = _nr,			\
-		.reg_mask = _mask,		\
-		.val = {0, _mask},		\
-		.funcs = {_func1, _func2}	\
-	}
-
 #define PIN_GRP_GPIO_0(_name, _start, _nr)	\
 	{					\
 		.name = _name,			\
-- 
2.20.1


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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> index a140b6bfbfaa..2b44c634ccb5 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> @@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
>  		.funcs = {_func1, _func2}	\
>  	}
>  
> +#define PIN_GRP_GPIO_0(_name, _start, _nr)	\

The naming of these macros are a bit odd, but this does not make it
any worse.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>
> ---
>  drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
>  1 file changed, 12 insertions(+)
> 
> diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> index a140b6bfbfaa..2b44c634ccb5 100644
> --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> @@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
>  		.funcs = {_func1, _func2}	\
>  	}
>  
> +#define PIN_GRP_GPIO_0(_name, _start, _nr)	\

The naming of these macros are a bit odd, but this does not make it
any worse.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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Re: [PATCH v2 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:22:00PM +0200, Pali Rohár wrote:
> All 3 MPP pins (20, 21 and 22) can be configured individually and also can
> be configured to GPIO functions. Fix definitions for these MPP pins in
> existing pin groups. After this change GPIO function can be enabled just
> for one of these 3 pins.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v2 2/4] pinctrl: armada-37xx: Fix definitions for MPP pins 20-22

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:22:00PM +0200, Pali Rohár wrote:
> All 3 MPP pins (20, 21 and 22) can be configured individually and also can
> be configured to GPIO functions. Fix definitions for these MPP pins in
> existing pin groups. After this change GPIO function can be enabled just
> for one of these 3 pins.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

On Tuesday 09 August 2022 22:19:33 Andrew Lunn wrote:
> On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > so they are properly exported as valid pin numbers.
> > 
> > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > ---
> >  drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > index a140b6bfbfaa..2b44c634ccb5 100644
> > --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > @@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
> >  		.funcs = {_func1, _func2}	\
> >  	}
> >  
> > +#define PIN_GRP_GPIO_0(_name, _start, _nr)	\
> 
> The naming of these macros are a bit odd, but this does not make it
> any worse.

Yea... but I'm continuing to use existing naming convention. Suffix _N
means how many non-gpio functions have particular group.

> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> 
>     Andrew

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

On Tuesday 09 August 2022 22:19:33 Andrew Lunn wrote:
> On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > so they are properly exported as valid pin numbers.
> > 
> > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> > Signed-off-by: Pali Rohár <pali@kernel.org>
> > ---
> >  drivers/pinctrl/mvebu/pinctrl-armada-37xx.c | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> > 
> > diff --git a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > index a140b6bfbfaa..2b44c634ccb5 100644
> > --- a/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > +++ b/drivers/pinctrl/mvebu/pinctrl-armada-37xx.c
> > @@ -122,6 +122,16 @@ struct armada_37xx_pinctrl {
> >  		.funcs = {_func1, _func2}	\
> >  	}
> >  
> > +#define PIN_GRP_GPIO_0(_name, _start, _nr)	\
> 
> The naming of these macros are a bit odd, but this does not make it
> any worse.

Yea... but I'm continuing to use existing naming convention. Suffix _N
means how many non-gpio functions have particular group.

> Reviewed-by: Andrew Lunn <andrew@lunn.ch>
> 
>     Andrew

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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")

Does this actually break anything? Are there boards in mainline that
require this? Does this need to be part of stable?

	Andrew

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
> 
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")

Does this actually break anything? Are there boards in mainline that
require this? Does this need to be part of stable?

	Andrew

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Re: [PATCH v2 4/4] pinctrl: armada-37xx: Remove unused macro PIN_GRP()

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:22:02PM +0200, Pali Rohár wrote:
> Macro PIN_GRP() is not used, remove it.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

Re: [PATCH v2 4/4] pinctrl: armada-37xx: Remove unused macro PIN_GRP()

[Andrew Lunn]

On Fri, Aug 05, 2022 at 02:22:02PM +0200, Pali Rohár wrote:
> Macro PIN_GRP() is not used, remove it.
> 
> Signed-off-by: Pali Rohár <pali@kernel.org>

Reviewed-by: Andrew Lunn <andrew@lunn.ch>

    Andrew

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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

On Tuesday 09 August 2022 22:24:12 Andrew Lunn wrote:
> On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > so they are properly exported as valid pin numbers.
> > 
> > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> 
> Does this actually break anything? Are there boards in mainline that
> require this? Does this need to be part of stable?
> 
> 	Andrew

I'm not adding CC:stable tag for automatic stable backporting. I'm
adding just Fixes tag to indicate that this patch fixes above mentioned
commit.

On Turris Mox board this at least one of those GPIOs available on PIN
header and ready for (GPIO) using. These GPIOs are not specified in
pinmuxing part of Turris Mox dts files included in kernel. But
theoretically they can be added via dts overlay with bootloader.
Probably same applies for Espressobin which also have lot of GPIOs
exported on pin header -- but I have not investigated it.

So I would say currently there is no known or reported breakage and that
is why I have not added CC:stable tag, only Fixes.

Originally I discovered this issue during debugging of U-Boot which has
copy of this driver and U-Boot supports pinmuxing and gpio requesting
via commands. And U-Boot gpio command refused to change status of these
two GPIOs, for explained reasons.

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Pali Rohár]

On Tuesday 09 August 2022 22:24:12 Andrew Lunn wrote:
> On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > so they are properly exported as valid pin numbers.
> > 
> > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> 
> Does this actually break anything? Are there boards in mainline that
> require this? Does this need to be part of stable?
> 
> 	Andrew

I'm not adding CC:stable tag for automatic stable backporting. I'm
adding just Fixes tag to indicate that this patch fixes above mentioned
commit.

On Turris Mox board this at least one of those GPIOs available on PIN
header and ready for (GPIO) using. These GPIOs are not specified in
pinmuxing part of Turris Mox dts files included in kernel. But
theoretically they can be added via dts overlay with bootloader.
Probably same applies for Espressobin which also have lot of GPIOs
exported on pin header -- but I have not investigated it.

So I would say currently there is no known or reported breakage and that
is why I have not added CC:stable tag, only Fixes.

Originally I discovered this issue during debugging of U-Boot which has
copy of this driver and U-Boot supports pinmuxing and gpio requesting
via commands. And U-Boot gpio command refused to change status of these
two GPIOs, for explained reasons.

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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Tue, Aug 09, 2022 at 10:36:48PM +0200, Pali Rohár wrote:
> On Tuesday 09 August 2022 22:24:12 Andrew Lunn wrote:
> > On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > > so they are properly exported as valid pin numbers.
> > > 
> > > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> > 
> > Does this actually break anything? Are there boards in mainline that
> > require this? Does this need to be part of stable?
> > 
> > 	Andrew
> 
> I'm not adding CC:stable tag for automatic stable backporting. I'm
> adding just Fixes tag to indicate that this patch fixes above mentioned
> commit.

O.K.

It might get back ported anyway, due to the fuzzy logic bot thinking
its a valuable fix.

    Andrew

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Andrew Lunn]

On Tue, Aug 09, 2022 at 10:36:48PM +0200, Pali Rohár wrote:
> On Tuesday 09 August 2022 22:24:12 Andrew Lunn wrote:
> > On Fri, Aug 05, 2022 at 02:21:59PM +0200, Pali Rohár wrote:
> > > gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> > > so they are properly exported as valid pin numbers.
> > > 
> > > Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> > 
> > Does this actually break anything? Are there boards in mainline that
> > require this? Does this need to be part of stable?
> > 
> > 	Andrew
> 
> I'm not adding CC:stable tag for automatic stable backporting. I'm
> adding just Fixes tag to indicate that this patch fixes above mentioned
> commit.

O.K.

It might get back ported anyway, due to the fuzzy logic bot thinking
its a valuable fix.

    Andrew

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Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Linus Walleij]

On Fri, Aug 5, 2022 at 2:22 PM Pali Rohár <pali@kernel.org> wrote:

> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
>
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>

All 4 patches applied for next (v6.1), deemed as non-urgent fixes
also I guess the patches depend on each other, any other handling
desired: suggest.

Yours,
Linus Walleij

Re: [PATCH v2 1/4] pinctrl: armada-37xx: Add missing GPIO-only pins

[Linus Walleij]

On Fri, Aug 5, 2022 at 2:22 PM Pali Rohár <pali@kernel.org> wrote:

> gpio1_5 and gpio2_2 are GPIO-only pins. Add them into MPP groups table
> so they are properly exported as valid pin numbers.
>
> Fixes: 87466ccd9401 ("pinctrl: armada-37xx: Add pin controller support for Armada 37xx")
> Signed-off-by: Pali Rohár <pali@kernel.org>

All 4 patches applied for next (v6.1), deemed as non-urgent fixes
also I guess the patches depend on each other, any other handling
desired: suggest.

Yours,
Linus Walleij

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