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From: Marco Felsch <m.felsch@pengutronix.de>
To: mchehab@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
	kishon@ti.com, sakari.ailus@linux.intel.com, hverkuil@xs4all.nl,
	jacopo@jmondi.org, laurent.pinchart+renesas@ideasonboard.com
Cc: linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-media@vger.kernel.org,
	kernel@pengutronix.de
Subject: [PATCH 1/4] phy: dphy: refactor get_default_config
Date: Thu, 18 Aug 2022 16:33:04 +0200	[thread overview]
Message-ID: <20220818143307.967150-2-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220818143307.967150-1-m.felsch@pengutronix.de>

Factor out the calculation into phy_mipi_dphy_calc_config(). This is
needed for the follow up patch which adds the support to calculate the
timings based on a given hs clock. No functional changes are done.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/phy/phy-core-mipi-dphy.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c
index 929e86d6558e..ba365bc77407 100644
--- a/drivers/phy/phy-core-mipi-dphy.c
+++ b/drivers/phy/phy-core-mipi-dphy.c
@@ -17,7 +17,7 @@
  * from the valid ranges specified in Section 6.9, Table 14, Page 41
  * of the D-PHY specification (v1.2).
  */
-int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
+static int phy_mipi_dphy_calc_config(unsigned long pixel_clock,
 				     unsigned int bpp,
 				     unsigned int lanes,
 				     struct phy_configure_opts_mipi_dphy *cfg)
@@ -75,6 +75,15 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
 
 	return 0;
 }
+
+int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
+				     unsigned int bpp,
+				     unsigned int lanes,
+				     struct phy_configure_opts_mipi_dphy *cfg)
+{
+	return phy_mipi_dphy_calc_config(pixel_clock, bpp, lanes, cfg);
+
+}
 EXPORT_SYMBOL(phy_mipi_dphy_get_default_config);
 
 /*
-- 
2.30.2


WARNING: multiple messages have this Message-ID (diff)
From: Marco Felsch <m.felsch@pengutronix.de>
To: mchehab@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, vkoul@kernel.org,
	kishon@ti.com, sakari.ailus@linux.intel.com, hverkuil@xs4all.nl,
	jacopo@jmondi.org, laurent.pinchart+renesas@ideasonboard.com
Cc: linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org,
	devicetree@vger.kernel.org, linux-media@vger.kernel.org,
	kernel@pengutronix.de
Subject: [PATCH 1/4] phy: dphy: refactor get_default_config
Date: Thu, 18 Aug 2022 16:33:04 +0200	[thread overview]
Message-ID: <20220818143307.967150-2-m.felsch@pengutronix.de> (raw)
In-Reply-To: <20220818143307.967150-1-m.felsch@pengutronix.de>

Factor out the calculation into phy_mipi_dphy_calc_config(). This is
needed for the follow up patch which adds the support to calculate the
timings based on a given hs clock. No functional changes are done.

Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
---
 drivers/phy/phy-core-mipi-dphy.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)

diff --git a/drivers/phy/phy-core-mipi-dphy.c b/drivers/phy/phy-core-mipi-dphy.c
index 929e86d6558e..ba365bc77407 100644
--- a/drivers/phy/phy-core-mipi-dphy.c
+++ b/drivers/phy/phy-core-mipi-dphy.c
@@ -17,7 +17,7 @@
  * from the valid ranges specified in Section 6.9, Table 14, Page 41
  * of the D-PHY specification (v1.2).
  */
-int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
+static int phy_mipi_dphy_calc_config(unsigned long pixel_clock,
 				     unsigned int bpp,
 				     unsigned int lanes,
 				     struct phy_configure_opts_mipi_dphy *cfg)
@@ -75,6 +75,15 @@ int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
 
 	return 0;
 }
+
+int phy_mipi_dphy_get_default_config(unsigned long pixel_clock,
+				     unsigned int bpp,
+				     unsigned int lanes,
+				     struct phy_configure_opts_mipi_dphy *cfg)
+{
+	return phy_mipi_dphy_calc_config(pixel_clock, bpp, lanes, cfg);
+
+}
 EXPORT_SYMBOL(phy_mipi_dphy_get_default_config);
 
 /*
-- 
2.30.2


-- 
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy

  reply	other threads:[~2022-08-18 14:34 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-18 14:33 [PATCH 0/4] Add support for Toshiba TC358746 Marco Felsch
2022-08-18 14:33 ` Marco Felsch
2022-08-18 14:33 ` Marco Felsch [this message]
2022-08-18 14:33   ` [PATCH 1/4] phy: dphy: refactor get_default_config Marco Felsch
2022-09-02 17:45   ` Vinod Koul
2022-09-02 17:45     ` Vinod Koul
2022-08-18 14:33 ` [PATCH 2/4] phy: dphy: add support to calculate the timing based on hs_clk_rate Marco Felsch
2022-08-18 14:33   ` Marco Felsch
2022-09-02 17:45   ` Vinod Koul
2022-09-02 17:45     ` Vinod Koul
2022-08-18 14:33 ` [PATCH 3/4] media: dt-bindings: add bindings for Toshiba TC358746 Marco Felsch
2022-08-18 14:33   ` Marco Felsch
2022-08-22 18:11   ` Rob Herring
2022-08-22 18:11     ` Rob Herring
2022-09-04 22:35   ` Laurent Pinchart
2022-09-04 22:35     ` Laurent Pinchart
2022-09-15 13:19     ` Marco Felsch
2022-09-15 13:19       ` Marco Felsch
2022-09-16 13:57       ` Laurent Pinchart
2022-09-16 13:57         ` Laurent Pinchart
2022-08-18 14:33 ` [PATCH 4/4] media: tc358746: add Toshiba TC358746 Parallel to CSI-2 bridge driver Marco Felsch
2022-08-18 14:33   ` Marco Felsch
2022-09-05 20:03   ` Laurent Pinchart
2022-09-05 20:03     ` Laurent Pinchart
2022-09-15 16:54     ` Marco Felsch
2022-09-15 16:54       ` Marco Felsch
2022-09-16 14:33       ` Laurent Pinchart
2022-09-16 14:33         ` Laurent Pinchart
2022-09-19  8:40         ` Marco Felsch
2022-09-19  8:40           ` Marco Felsch
2022-09-19 10:57           ` Laurent Pinchart
2022-09-19 10:57             ` Laurent Pinchart
2022-08-31  8:14 ` [PATCH 0/4] Add support for Toshiba TC358746 Marco Felsch
2022-08-31  8:14   ` Marco Felsch

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