* [PATCH 00/11] Start converting MVEBU bindings to YAML
@ 2022-08-20 19:47 Andrew Lunn
2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn
` (12 more replies)
0 siblings, 13 replies; 27+ messages in thread
From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw)
To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn
This is the first batch of patches converting the Marvell MVEBU driver
bindings from .txt to .yaml. So far, kirkwood has been used for
testing, but these drivers apply to a range of Marvell SoCs.
In order to reduce the number of warnings from the DT schema checking
tools, a few minor changes have been made to a few DT files. No actual
errors have been found, the changes just make the checker quiet.
Andrew Lunn (11):
DT: RTC: orion-rtc: Convert to YAML
DT: thermal: marvell,kirkwood-thermal: Convert to YAML
DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML
DT: USB: Convert ehci-orion to YAML
DT: watchdog: Convert marvel.txt to YAML
arm: DT: kirkwood/orion5: Rename watchdog node
DT: nand-controller: Reflect reality of marvell,orion-nand
DT: mtd: Convert orion-nand to YAML
arm: DT: kirkwood.dtsi: Rename nand to nand-controller
DT: timer: Convert marvell,orion-timer.txt to YAML
DT: clock: Convert mvebu-gated-clock.txt to YAML
.../clock/marvell,kirkwood-gating-clock.yaml | 230 +++++++++++
.../bindings/clock/mvebu-gated-clock.txt | 205 ----------
.../bindings/mtd/marvell,orion-nand.yaml | 85 +++++
.../bindings/mtd/nand-controller.yaml | 17 +-
.../devicetree/bindings/mtd/orion-nand.txt | 50 ---
.../pinctrl/marvell,88f6180-pinctrl.yaml | 73 ++++
.../pinctrl/marvell,88f6190-pinctrl.yaml | 73 ++++
.../pinctrl/marvell,88f6192-pinctrl.yaml | 73 ++++
.../pinctrl/marvell,88f6281-pinctrl.yaml | 74 ++++
.../pinctrl/marvell,88f6282-pinctrl.yaml | 74 ++++
.../pinctrl/marvell,98dx1135-pinctrl.yaml | 72 ++++
.../pinctrl/marvell,98dx4122-pinctrl.yaml | 71 ++++
.../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 14 +-
.../pinctrl/marvell,kirkwood-pinctrl.txt | 359 ------------------
.../bindings/rtc/marvell,orion-rtc.yaml | 48 +++
.../devicetree/bindings/rtc/orion-rtc.txt | 18 -
.../bindings/thermal/kirkwood-thermal.txt | 15 -
.../thermal/marvell,kirkwood-thermal.yaml | 32 ++
.../bindings/timer/marvell,orion-timer.txt | 16 -
.../bindings/timer/marvell,orion-timer.yaml | 51 +++
.../devicetree/bindings/usb/ehci-orion.txt | 22 --
.../bindings/usb/marvell,orion-ehci.yaml | 44 +++
.../devicetree/bindings/watchdog/marvel.txt | 45 ---
.../bindings/watchdog/marvell,orion-wdt.yaml | 83 ++++
arch/arm/boot/dts/kirkwood.dtsi | 4 +-
arch/arm/boot/dts/orion5x.dtsi | 2 +-
26 files changed, 1109 insertions(+), 741 deletions(-)
create mode 100644 Documentation/devicetree/bindings/clock/marvell,kirkwood-gating-clock.yaml
delete mode 100644 Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt
create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml
delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml
create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml
delete mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt
create mode 100644 Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml
delete mode 100644 Documentation/devicetree/bindings/rtc/orion-rtc.txt
delete mode 100644 Documentation/devicetree/bindings/thermal/kirkwood-thermal.txt
create mode 100644 Documentation/devicetree/bindings/thermal/marvell,kirkwood-thermal.yaml
delete mode 100644 Documentation/devicetree/bindings/timer/marvell,orion-timer.txt
create mode 100644 Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml
delete mode 100644 Documentation/devicetree/bindings/usb/ehci-orion.txt
create mode 100644 Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml
delete mode 100644 Documentation/devicetree/bindings/watchdog/marvel.txt
create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml
--
2.37.2
^ permalink raw reply [flat|nested] 27+ messages in thread* [PATCH 01/11] DT: RTC: orion-rtc: Convert to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-22 20:49 ` Rob Herring 2022-08-22 20:55 ` Rob Herring 2022-08-20 19:47 ` [PATCH 02/11] DT: thermal: marvell,kirkwood-thermal: " Andrew Lunn ` (11 subsequent siblings) 12 siblings, 2 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Covert the text description to YAML. The clock is optional, Orion5x based boards don't have it, but kirkwood should. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/rtc/marvell,orion-rtc.yaml | 48 +++++++++++++++++++ .../devicetree/bindings/rtc/orion-rtc.txt | 18 ------- 2 files changed, 48 insertions(+), 18 deletions(-) create mode 100644 Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml delete mode 100644 Documentation/devicetree/bindings/rtc/orion-rtc.txt diff --git a/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml b/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml new file mode 100644 index 000000000000..d240e67a4555 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/marvell,orion-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MVEBU Orion RTC Device Tree Bindings + +allOf: + - $ref: "rtc.yaml#" + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + compatible: + oneOf: + - enum: + - marvell,orion-rtc + - items: + - enum: + - marvell,kirkwood-rtc + - const: marvell,orion-rtc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + rtc@10300 { + compatible = "marvell,orion-rtc"; + reg = <0xd0010300 0x20>; + interrupts = <50>; + }; +... diff --git a/Documentation/devicetree/bindings/rtc/orion-rtc.txt b/Documentation/devicetree/bindings/rtc/orion-rtc.txt deleted file mode 100644 index 3bf63ffa5160..000000000000 --- a/Documentation/devicetree/bindings/rtc/orion-rtc.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Mvebu Real Time Clock - -RTC controller for the Kirkwood, the Dove, the Armada 370 and the -Armada XP SoCs - -Required properties: -- compatible : Should be "marvell,orion-rtc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: IRQ line for the RTC. - -Example: - -rtc@10300 { - compatible = "marvell,orion-rtc"; - reg = <0xd0010300 0x20>; - interrupts = <50>; -}; -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 01/11] DT: RTC: orion-rtc: Convert to YAML 2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn @ 2022-08-22 20:49 ` Rob Herring 2022-08-22 20:55 ` Rob Herring 1 sibling, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 20:49 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, Aug 20, 2022 at 09:47:54PM +0200, Andrew Lunn wrote: > Covert the text description to YAML. The clock is optional, Orion5x > based boards don't have it, but kirkwood should. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../bindings/rtc/marvell,orion-rtc.yaml | 48 +++++++++++++++++++ > .../devicetree/bindings/rtc/orion-rtc.txt | 18 ------- > 2 files changed, 48 insertions(+), 18 deletions(-) > create mode 100644 Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml > delete mode 100644 Documentation/devicetree/bindings/rtc/orion-rtc.txt > > diff --git a/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml b/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml > new file mode 100644 > index 000000000000..d240e67a4555 > --- /dev/null > +++ b/Documentation/devicetree/bindings/rtc/marvell,orion-rtc.yaml > @@ -0,0 +1,48 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/rtc/marvell,orion-rtc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: MVEBU Orion RTC Device Tree Bindings Drop 'Device Tree Bindings' Same on the rest. > + > +allOf: > + - $ref: "rtc.yaml#" > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +properties: > + compatible: > + oneOf: > + - enum: > + - marvell,orion-rtc > + - items: > + - enum: > + - marvell,kirkwood-rtc > + - const: marvell,orion-rtc > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + maxItems: 1 > + > +required: > + - compatible > + - reg > + - interrupts > + > +additionalProperties: false > + > +examples: > + - | > + rtc@10300 { > + compatible = "marvell,orion-rtc"; > + reg = <0xd0010300 0x20>; > + interrupts = <50>; > + }; > +... > diff --git a/Documentation/devicetree/bindings/rtc/orion-rtc.txt b/Documentation/devicetree/bindings/rtc/orion-rtc.txt > deleted file mode 100644 > index 3bf63ffa5160..000000000000 > --- a/Documentation/devicetree/bindings/rtc/orion-rtc.txt > +++ /dev/null > @@ -1,18 +0,0 @@ > -* Mvebu Real Time Clock > - > -RTC controller for the Kirkwood, the Dove, the Armada 370 and the > -Armada XP SoCs > - > -Required properties: > -- compatible : Should be "marvell,orion-rtc" > -- reg: physical base address of the controller and length of memory mapped > - region. > -- interrupts: IRQ line for the RTC. > - > -Example: > - > -rtc@10300 { > - compatible = "marvell,orion-rtc"; > - reg = <0xd0010300 0x20>; > - interrupts = <50>; > -}; > -- > 2.37.2 > > ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 01/11] DT: RTC: orion-rtc: Convert to YAML 2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn 2022-08-22 20:49 ` Rob Herring @ 2022-08-22 20:55 ` Rob Herring 1 sibling, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 20:55 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, Aug 20, 2022 at 09:47:54PM +0200, Andrew Lunn wrote: > Covert the text description to YAML. The clock is optional, Orion5x Convert > based boards don't have it, but kirkwood should. Please use get_maintainers.pl. RTC maintainers were copied nor linux-rtc and they should apply this. arm-soc (soc@kernel.org now BTW) shouldn't really be Cc'ed either unless they are supposed to apply these. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 02/11] DT: thermal: marvell,kirkwood-thermal: Convert to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn 2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-20 19:47 ` [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl " Andrew Lunn ` (10 subsequent siblings) 12 siblings, 0 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Add a simple YAML description of the thermal binding for the kirkwood thermal sensor. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/thermal/kirkwood-thermal.txt | 15 --------- .../thermal/marvell,kirkwood-thermal.yaml | 32 +++++++++++++++++++ 2 files changed, 32 insertions(+), 15 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/kirkwood-thermal.txt create mode 100644 Documentation/devicetree/bindings/thermal/marvell,kirkwood-thermal.yaml diff --git a/Documentation/devicetree/bindings/thermal/kirkwood-thermal.txt b/Documentation/devicetree/bindings/thermal/kirkwood-thermal.txt deleted file mode 100644 index 8c0f5eb86da7..000000000000 --- a/Documentation/devicetree/bindings/thermal/kirkwood-thermal.txt +++ /dev/null @@ -1,15 +0,0 @@ -* Kirkwood Thermal - -This version is for Kirkwood 88F8262 & 88F6283 SoCs. Other kirkwoods -don't contain a thermal sensor. - -Required properties: -- compatible : "marvell,kirkwood-thermal" -- reg : Address range of the thermal registers - -Example: - - thermal@10078 { - compatible = "marvell,kirkwood-thermal"; - reg = <0x10078 0x4>; - }; diff --git a/Documentation/devicetree/bindings/thermal/marvell,kirkwood-thermal.yaml b/Documentation/devicetree/bindings/thermal/marvell,kirkwood-thermal.yaml new file mode 100644 index 000000000000..5d0cc6c1af33 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/marvell,kirkwood-thermal.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/marvell,kirkwood-thermal.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood Thermal Controller Device Tree Bindings + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + compatible: + enum: + - marvell,kirkwood-thermal + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + thermal@10078 { + compatible = "marvell,kirkwood-thermal"; + reg = <0x10078 0x4>; + }; +... -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn 2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn 2022-08-20 19:47 ` [PATCH 02/11] DT: thermal: marvell,kirkwood-thermal: " Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-22 21:16 ` Rob Herring 2022-08-20 19:47 ` [PATCH 04/11] DT: USB: Convert ehci-orion " Andrew Lunn ` (9 subsequent siblings) 12 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Convert the text description to YAML. To keep the YAML versions readable, add a file per compatible. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../pinctrl/marvell,88f6180-pinctrl.yaml | 73 ++++ .../pinctrl/marvell,88f6190-pinctrl.yaml | 73 ++++ .../pinctrl/marvell,88f6192-pinctrl.yaml | 73 ++++ .../pinctrl/marvell,88f6281-pinctrl.yaml | 74 ++++ .../pinctrl/marvell,88f6282-pinctrl.yaml | 74 ++++ .../pinctrl/marvell,98dx1135-pinctrl.yaml | 72 ++++ .../pinctrl/marvell,98dx4122-pinctrl.yaml | 71 ++++ .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 14 +- .../pinctrl/marvell,kirkwood-pinctrl.txt | 359 ------------------ 9 files changed, 517 insertions(+), 366 deletions(-) create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml delete mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml new file mode 100644 index 000000000000..c3c679f95274 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6180-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood 88f6180 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's Kirkwood 88F6180 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,88f6180-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-.*$': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ audio, gpio, gpo, mii, nand, pex, ptp, ptp-1, ptp-2, sdio, + spi, sysrst, twsi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spic_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml new file mode 100644 index 000000000000..46f0e61c3730 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6190-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood 88f6190 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's Kirkwood 88F6190 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,88f6190-pinctrl + + reg: + maxItems: 1 + +patternProperties: + 'pmx-.*$': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, + sata0, sdio, spi, sysrst, twsi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spi_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml new file mode 100644 index 000000000000..82f8ce528d13 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6192-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood 88f6192 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's Kirkwood 88F6192 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,88f6192-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-.*$': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ audio, ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spic_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml new file mode 100644 index 000000000000..1d0c5932ca59 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6281-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood 88f6281 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's Kirkwood 88F6281 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,88f6281-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ audio, ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, twsi1, uart0, + uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44, mpp45, mpp46, mpp47, mpp48, mpp49 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spi { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spi_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml new file mode 100644 index 000000000000..1365c392be9e --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6282-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Kirkwood 88f6282 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's Kirkwood 88F6282 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,88f6282-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ audio, ge1, gpio, gpo, lcd, mii, mii-1, nand, pex, + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, twsi1, uart0, + uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44, mpp45, mpp46, mpp47, mpp48 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spi_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml new file mode 100644 index 000000000000..38c1a48e7603 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,98dx1135-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell 98dx1135 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's 98DX1135 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,98dx1135-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ gpio, gpo, nand, pex, spi, sysrst, twsi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, + mpp42, mpp43, mpp44 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spi_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml new file mode 100644 index 000000000000..32080220748c --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/marvell,98dx4122-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell 98dx4122 pin controller + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +description: + Bindings for Marvell's 98DX4122 memory-mapped pin controller. + +properties: + compatible: + items: + - const: marvell,98dx4122-pinctrl + + reg: + maxItems: 1 + +patternProperties: + '^pmx-': + type: object + $ref: pinmux-node.yaml# + + properties: + marvell,function: + $ref: "/schemas/types.yaml#/definitions/string" + description: + Indicates the function to select. + enum: [ gpio, gpo, nand, pex, spi, sysrst, twsi0, uart0, uart1 ] + + marvell,pins: + $ref: /schemas/types.yaml#/definitions/string-array + description: + Array of MPP pins to be used for the given function. + minItems: 1 + items: + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, + mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, + mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, + mpp37, mpp38, mpp39, mpp40, mpp41, mpp42, mpp43, mpp44 ] + +allOf: + - $ref: "pinctrl.yaml#" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pinctrl@80020100 { + compatible = "marvell,88f6180-pinctrl"; + reg = <0x80020100 0x20>; + + pmx_spi: pmx-spidc { + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; + marvell,function = "spi"; + }; + + pmx_spi_gpio: pmx-gpio-spi { + marvell,pins = "mpp26", "mpp27"; + marvell,function = "gpio"; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml index a651b2744caf..4109bf1a2e5f 100644 --- a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml @@ -21,7 +21,7 @@ properties: maxItems: 1 patternProperties: - '-pins$': + '^pmx-': type: object $ref: pinmux-node.yaml# @@ -40,10 +40,10 @@ patternProperties: minItems: 1 items: enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, - mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19, - mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29, - mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, - mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ] + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, + mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, + mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, + mpp37, mpp38, mpp39, mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ] allOf: - $ref: "pinctrl.yaml#" @@ -60,12 +60,12 @@ examples: compatible = "marvell,ac5-pinctrl"; reg = <0x80020100 0x20>; - i2c0_pins: i2c0-pins { + pmx_i2c0_pins: pmx-i2c0 { marvell,pins = "mpp26", "mpp27"; marvell,function = "i2c0"; }; - i2c0_gpio: i2c0-gpio-pins { + pmx_i2c0_gpio: pmx-gpio-i2c0 { marvell,pins = "mpp26", "mpp27"; marvell,function = "gpio"; }; diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt deleted file mode 100644 index 2932f171ee85..000000000000 --- a/Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt +++ /dev/null @@ -1,359 +0,0 @@ -* Marvell Kirkwood SoC pinctrl driver for mpp - -Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding -part and usage. - -Required properties: -- compatible: "marvell,88f6180-pinctrl", - "marvell,88f6190-pinctrl", "marvell,88f6192-pinctrl", - "marvell,88f6281-pinctrl", "marvell,88f6282-pinctrl", - "marvell,98dx4122-pinctrl", "marvell,98dx1135-pinctrl" -- reg: register specifier of MPP registers - -This driver supports all kirkwood variants, i.e. 88f6180, 88f619x, and 88f628x. -It also support the 88f6281-based variant in the 98dx412x Bobcat SoCs. - -Available mpp pins/groups and functions: -Note: brackets (x) are not part of the mpp name for marvell,function and given -only for more detailed description in this document. - -* Marvell Kirkwood 88f6180 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk) -mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig) -mpp6 6 sysrst(out), spi(mosi), ptp(trig) -mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk), - mii(col) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), - mii(crs) -mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig) -mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq), - ptp-2(trig) -mpp12 12 gpo, sdio(clk) -mpp13 13 gpio, sdio(cmd), uart1(txd) -mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col) -mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd) -mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) -mpp17 17 gpio, sdio(d3) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp35 35 gpio, mii(rxerr) -mpp36 36 gpio, audio(spdifi) -mpp37 37 gpio, audio(spdifo) -mpp38 38 gpio, audio(rmclk) -mpp39 39 gpio, audio(bclk) -mpp40 40 gpio, audio(sdo) -mpp41 41 gpio, audio(lrclk) -mpp42 42 gpio, audio(mclk) -mpp43 43 gpio, audio(sdi) -mpp44 44 gpio, audio(extclk) - -* Marvell Kirkwood 88f6190 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk) -mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act) -mpp6 6 sysrst(out), spi(mosi), ptp(trig) -mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk), - mii(col), mii-1(rxerr) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), - mii(crs), sata0(prsnt) -mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig) -mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq), - ptp-2(trig), sata0(act) -mpp12 12 gpo, sdio(clk) -mpp13 13 gpio, sdio(cmd), uart1(txd) -mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col) -mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act) -mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) -mpp17 17 gpio, sdio(d3), sata0(prsnt) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp20 20 gpio, ge1(txd0) -mpp21 21 gpio, ge1(txd1), sata0(act) -mpp22 22 gpio, ge1(txd2) -mpp23 23 gpio, ge1(txd3), sata0(prsnt) -mpp24 24 gpio, ge1(rxd0) -mpp25 25 gpio, ge1(rxd1) -mpp26 26 gpio, ge1(rxd2) -mpp27 27 gpio, ge1(rxd3) -mpp28 28 gpio, ge1(col) -mpp29 29 gpio, ge1(txclk) -mpp30 30 gpio, ge1(rxclk) -mpp31 31 gpio, ge1(rxclk) -mpp32 32 gpio, ge1(txclko) -mpp33 33 gpo, ge1(txclk) -mpp34 34 gpio, ge1(txen) -mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr) - -* Marvell Kirkwood 88f6192 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act) -mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act) -mpp6 6 sysrst(out), spi(mosi), ptp(trig) -mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk), - mii(col), mii-1(rxerr), sata1(prsnt) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), - mii(crs), sata0(prsnt) -mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act) -mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq), - ptp-2(trig), sata0(act) -mpp12 12 gpo, sdio(clk) -mpp13 13 gpio, sdio(cmd), uart1(txd) -mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt) -mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act) -mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), - sata1(act) -mpp17 17 gpio, sdio(d3), sata0(prsnt) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi), - sata1(act) -mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql), - audio(spdifo) -mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk), - sata1(prsnt) -mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql), - audio(bclk) -mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo) -mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk) -mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk) -mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi) -mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk) -mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst) -mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk) -mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs) -mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx) -mpp33 33 gpo, ge1(txclk), tdm(drx) -mpp34 34 gpio, ge1(txen), tdm(spi-cs1) -mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql) - -* Marvell Kirkwood 88f6281 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd), ptp(clk), sata1(act) -mpp5 5 gpo, nand(io7), uart0(txd), ptp(trig), sata0(act) -mpp6 6 sysrst(out), spi(mosi), ptp(trig) -mpp7 7 gpo, pex(rsto), spi(cs), ptp(trig) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), ptp(clk), - mii(col), mii-1(rxerr), sata1(prsnt) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), ptp(evreq), - mii(crs), sata0(prsnt) -mpp10 10 gpo, spi(sck), uart0(txd), ptp(trig), sata1(act) -mpp11 11 gpio, spi(miso), uart0(rxd), ptp(clk), ptp-1(evreq), - ptp-2(trig), sata0(act) -mpp12 12 gpio, sdio(clk) -mpp13 13 gpio, sdio(cmd), uart1(txd) -mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt) -mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act) -mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), - sata1(act) -mpp17 17 gpio, sdio(d3), sata0(prsnt) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi), - sata1(act) -mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql), - audio(spdifo) -mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk), - sata1(prsnt) -mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql), - audio(bclk) -mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo) -mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk) -mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk) -mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi) -mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk) -mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst) -mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk) -mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs) -mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx) -mpp33 33 gpo, ge1(txclk), tdm(drx) -mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act) -mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql) -mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi) -mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo) -mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk) -mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk) -mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo) -mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk) -mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk) -mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi) -mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk) -mpp45 45 gpio, ts(mp9), tdm(pclk) -mpp46 46 gpio, ts(mp10), tdm(fs) -mpp47 47 gpio, ts(mp11), tdm(drx) -mpp48 48 gpio, ts(mp12), tdm(dtx) -mpp49 49 gpio, ts(mp9), tdm(rx0ql), ptp(clk) - -* Marvell Kirkwood 88f6282 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd), sata1(act), lcd(hsync) -mpp5 5 gpo, nand(io7), uart0(txd), sata0(act), lcd(vsync) -mpp6 6 sysrst(out), spi(mosi) -mpp7 7 gpo, spi(cs), lcd(pwm) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts), mii(col), - mii-1(rxerr), sata1(prsnt) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts), mii(crs), - sata0(prsnt) -mpp10 10 gpo, spi(sck), uart0(txd), sata1(act) -mpp11 11 gpio, spi(miso), uart0(rxd), sata0(act) -mpp12 12 gpo, sdio(clk), audio(spdifo), spi(mosi), twsi(sda) -mpp13 13 gpio, sdio(cmd), uart1(txd), audio(rmclk), lcd(pwm) -mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col), sata1(prsnt), - audio(spdifi), audio-1(sdi) -mpp15 15 gpio, sdio(d1), uart0(rts), uart1(txd), sata0(act), - spi(cs) -mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs), - sata1(act), lcd(extclk) -mpp17 17 gpio, sdio(d3), sata0(prsnt), sata1(act), twsi1(sck) -mpp18 18 gpo, nand(io0), pex(clkreq) -mpp19 19 gpo, nand(io1) -mpp20 20 gpio, ge1(txd0), ts(mp0), tdm(tx0ql), audio(spdifi), - sata1(act), lcd(d0) -mpp21 21 gpio, ge1(txd1), sata0(act), ts(mp1), tdm(rx0ql), - audio(spdifo), lcd(d1) -mpp22 22 gpio, ge1(txd2), ts(mp2), tdm(tx2ql), audio(rmclk), - sata1(prsnt), lcd(d2) -mpp23 23 gpio, ge1(txd3), sata0(prsnt), ts(mp3), tdm(rx2ql), - audio(bclk), lcd(d3) -mpp24 24 gpio, ge1(rxd0), ts(mp4), tdm(spi-cs0), audio(sdo), - lcd(d4) -mpp25 25 gpio, ge1(rxd1), ts(mp5), tdm(spi-sck), audio(lrclk), - lcd(d5) -mpp26 26 gpio, ge1(rxd2), ts(mp6), tdm(spi-miso), audio(mclk), - lcd(d6) -mpp27 27 gpio, ge1(rxd3), ts(mp7), tdm(spi-mosi), audio(sdi), - lcd(d7) -mpp28 28 gpio, ge1(col), ts(mp8), tdm(int), audio(extclk), - lcd(d8) -mpp29 29 gpio, ge1(txclk), ts(mp9), tdm(rst), lcd(d9) -mpp30 30 gpio, ge1(rxclk), ts(mp10), tdm(pclk), lcd(d10) -mpp31 31 gpio, ge1(rxclk), ts(mp11), tdm(fs), lcd(d11) -mpp32 32 gpio, ge1(txclko), ts(mp12), tdm(drx), lcd(d12) -mpp33 33 gpo, ge1(txclk), tdm(drx), lcd(d13) -mpp34 34 gpio, ge1(txen), tdm(spi-cs1), sata1(act), lcd(d14) -mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr), tdm(tx0ql), - lcd(d15) -mpp36 36 gpio, ts(mp0), tdm(spi-cs1), audio(spdifi), twsi1(sda) -mpp37 37 gpio, ts(mp1), tdm(tx2ql), audio(spdifo), twsi1(sck) -mpp38 38 gpio, ts(mp2), tdm(rx2ql), audio(rmclk), lcd(d18) -mpp39 39 gpio, ts(mp3), tdm(spi-cs0), audio(bclk), lcd(d19) -mpp40 40 gpio, ts(mp4), tdm(spi-sck), audio(sdo), lcd(d20) -mpp41 41 gpio, ts(mp5), tdm(spi-miso), audio(lrclk), lcd(d21) -mpp42 42 gpio, ts(mp6), tdm(spi-mosi), audio(mclk), lcd(d22) -mpp43 43 gpio, ts(mp7), tdm(int), audio(sdi), lcd(d23) -mpp44 44 gpio, ts(mp8), tdm(rst), audio(extclk), lcd(clk) -mpp45 45 gpio, ts(mp9), tdm(pclk), lcd(e) -mpp46 46 gpio, ts(mp10), tdm(fs), lcd(hsync) -mpp47 47 gpio, ts(mp11), tdm(drx), lcd(vsync) -mpp48 48 gpio, ts(mp12), tdm(dtx), lcd(d16) -mpp49 49 gpo, tdm(rx0ql), pex(clkreq), lcd(d17) - -* Marvell Bobcat 98dx4122 - -name pins functions -================================================================================ -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd) -mpp5 5 gpo, nand(io7), uart0(txd) -mpp6 6 sysrst(out), spi(mosi) -mpp7 7 gpo, pex(rsto), spi(cs) -mpp8 8 gpio, twsi0(sda), uart0(rts), uart1(rts) -mpp9 9 gpio, twsi(sck), uart0(cts), uart1(cts) -mpp10 10 gpo, spi(sck), uart0(txd) -mpp11 11 gpio, spi(miso), uart0(rxd) -mpp13 13 gpio, uart1(txd) -mpp14 14 gpio, uart1(rxd) -mpp15 15 gpio, uart0(rts) -mpp16 16 gpio, uart0(cts) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp34 34 gpio -mpp35 35 gpio -mpp36 36 gpio -mpp37 37 gpio -mpp38 38 gpio -mpp39 39 gpio -mpp40 40 gpio -mpp41 41 gpio -mpp42 42 gpio -mpp43 43 gpio -mpp44 44 gpio -mpp45 45 gpio -mpp49 49 gpio - -* Marvell Poncat2 98dx1135 - -name pins functions -================================================================================ - -mpp0 0 gpio, nand(io2), spi(cs) -mpp1 1 gpo, nand(io3), spi(mosi) -mpp2 2 gpo, nand(io4), spi(sck) -mpp3 3 gpo, nand(io5), spi(miso) -mpp4 4 gpio, nand(io6), uart0(rxd) -mpp5 5 gpo, nand(io7), uart0(txd) -mpp6 6 sysrst(out) -mpp7 7 gpo, spi(cs) -mpp8 8 gpio, twsi0(sda), uart1(rts) -mpp9 9 gpio, twsi(sck), uart1(cts) -mpp10 10 gpo, uart0(txd) -mpp11 11 gpio, uart0(rxd) -mpp13 13 gpio, uart1(txd) -mpp14 14 gpio, uart1(rxd) -mpp15 15 gpio, uart0(rts) -mpp16 16 gpio, uart0(cts) -mpp17 17 gpio, nand(cle) -mpp18 18 gpo, nand(io0) -mpp19 19 gpo, nand(io1) -mpp20 20 gpio -mpp21 21 gpio -mpp22 22 gpio -mpp23 23 gpio -mpp24 24 gpio -mpp25 25 gpio -mpp26 26 gpio -mpp27 27 gpio -mpp28 28 gpio, nand(ren) -mpp29 29 gpio, nand(wen) -mpp30 30 gpio -mpp31 31 gpio -mpp32 32 gpio -mpp33 33 gpio -mpp34 34 gpio, nand(ale) -mpp35 35 gpio, nand(cen) -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML 2022-08-20 19:47 ` [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl " Andrew Lunn @ 2022-08-22 21:16 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 21:16 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, Aug 20, 2022 at 09:47:56PM +0200, Andrew Lunn wrote: > Convert the text description to YAML. To keep the YAML versions > readable, add a file per compatible. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../pinctrl/marvell,88f6180-pinctrl.yaml | 73 ++++ > .../pinctrl/marvell,88f6190-pinctrl.yaml | 73 ++++ > .../pinctrl/marvell,88f6192-pinctrl.yaml | 73 ++++ > .../pinctrl/marvell,88f6281-pinctrl.yaml | 74 ++++ > .../pinctrl/marvell,88f6282-pinctrl.yaml | 74 ++++ > .../pinctrl/marvell,98dx1135-pinctrl.yaml | 72 ++++ > .../pinctrl/marvell,98dx4122-pinctrl.yaml | 71 ++++ > .../bindings/pinctrl/marvell,ac5-pinctrl.yaml | 14 +- > .../pinctrl/marvell,kirkwood-pinctrl.txt | 359 ------------------ > 9 files changed, 517 insertions(+), 366 deletions(-) > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml > create mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml > delete mode 100644 Documentation/devicetree/bindings/pinctrl/marvell,kirkwood-pinctrl.txt > > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml > new file mode 100644 > index 000000000000..c3c679f95274 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6180-pinctrl.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6180-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Kirkwood 88f6180 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's Kirkwood 88F6180 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,88f6180-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-.*$': > + type: object > + $ref: pinmux-node.yaml# What from this schema applies here? Looks like nothing to me. You need: additionalProperties: false Or 'unevaluatedProperties: false' if properties from pinmux-node.yaml apply. > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ audio, gpio, gpo, mii, nand, pex, ptp, ptp-1, ptp-2, sdio, > + spi, sysrst, twsi0, uart0, uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44 ] pattern: '^mpp([0-9]|[1-3][0-9]|4[0-4])$' Surely one or both of these properties are required? Similar comments on the rest. > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spic_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml > new file mode 100644 > index 000000000000..46f0e61c3730 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6190-pinctrl.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6190-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Kirkwood 88f6190 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's Kirkwood 88F6190 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,88f6190-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + 'pmx-.*$': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, > + sata0, sdio, spi, sysrst, twsi0, uart0, uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spi_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml > new file mode 100644 > index 000000000000..82f8ce528d13 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6192-pinctrl.yaml > @@ -0,0 +1,73 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6192-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Kirkwood 88f6192 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's Kirkwood 88F6192 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,88f6192-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-.*$': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ audio, ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, > + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, uart0, uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spic_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml > new file mode 100644 > index 000000000000..1d0c5932ca59 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6281-pinctrl.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6281-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Kirkwood 88f6281 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's Kirkwood 88F6281 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,88f6281-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ audio, ge1, gpio, gpo, mii, mii-1, nand, pex, ptp, ptp-1, ptp-2, > + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, twsi1, uart0, > + uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44, mpp45, mpp46, mpp47, mpp48, mpp49 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spi { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spi_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml > new file mode 100644 > index 000000000000..1365c392be9e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,88f6282-pinctrl.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,88f6282-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell Kirkwood 88f6282 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's Kirkwood 88F6282 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,88f6282-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ audio, ge1, gpio, gpo, lcd, mii, mii-1, nand, pex, > + sata0, sata1, sdio, spi, sysrst, tdm, ts, twsi0, twsi1, uart0, > + uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44, mpp45, mpp46, mpp47, mpp48 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spi_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml > new file mode 100644 > index 000000000000..38c1a48e7603 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,98dx1135-pinctrl.yaml > @@ -0,0 +1,72 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,98dx1135-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell 98dx1135 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's 98DX1135 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,98dx1135-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ gpio, gpo, nand, pex, spi, sysrst, twsi0, uart0, uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, > + mpp18, mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, > + mpp26, mpp27, mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, > + mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, mpp40, mpp41, > + mpp42, mpp43, mpp44 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spi_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml > new file mode 100644 > index 000000000000..32080220748c > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,98dx4122-pinctrl.yaml > @@ -0,0 +1,71 @@ > +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pinctrl/marvell,98dx4122-pinctrl.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Marvell 98dx4122 pin controller > + > +maintainers: > + - Andrew Lunn <andrew@lunn.ch> > + > +description: > + Bindings for Marvell's 98DX4122 memory-mapped pin controller. > + > +properties: > + compatible: > + items: > + - const: marvell,98dx4122-pinctrl > + > + reg: > + maxItems: 1 > + > +patternProperties: > + '^pmx-': > + type: object > + $ref: pinmux-node.yaml# > + > + properties: > + marvell,function: > + $ref: "/schemas/types.yaml#/definitions/string" > + description: > + Indicates the function to select. > + enum: [ gpio, gpo, nand, pex, spi, sysrst, twsi0, uart0, uart1 ] > + > + marvell,pins: > + $ref: /schemas/types.yaml#/definitions/string-array > + description: > + Array of MPP pins to be used for the given function. > + minItems: 1 > + items: > + enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, > + mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, > + mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, > + mpp37, mpp38, mpp39, mpp40, mpp41, mpp42, mpp43, mpp44 ] > + > +allOf: > + - $ref: "pinctrl.yaml#" > + > +required: > + - compatible > + - reg > + > +additionalProperties: false > + > +examples: > + - | > + pinctrl@80020100 { > + compatible = "marvell,88f6180-pinctrl"; > + reg = <0x80020100 0x20>; > + > + pmx_spi: pmx-spidc { > + marvell,pins = "mpp0", "mpp1", "mpp2", "mpp3"; > + marvell,function = "spi"; > + }; > + > + pmx_spi_gpio: pmx-gpio-spi { > + marvell,pins = "mpp26", "mpp27"; > + marvell,function = "gpio"; > + }; > + }; > diff --git a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml > index a651b2744caf..4109bf1a2e5f 100644 > --- a/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml > +++ b/Documentation/devicetree/bindings/pinctrl/marvell,ac5-pinctrl.yaml This file isn't a conversion and deserves to be its own patch. > @@ -21,7 +21,7 @@ properties: > maxItems: 1 > > patternProperties: > - '-pins$': > + '^pmx-': > type: object > $ref: pinmux-node.yaml# > > @@ -40,10 +40,10 @@ patternProperties: > minItems: 1 > items: > enum: [ mpp0, mpp1, mpp2, mpp3, mpp4, mpp5, mpp6, mpp7, mpp8, mpp9, > - mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, mpp19, > - mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, mpp28, mpp29, > - mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, mpp37, mpp38, mpp39, > - mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ] > + mpp10, mpp11, mpp12, mpp13, mpp14, mpp15, mpp16, mpp17, mpp18, > + mpp19, mpp20, mpp21, mpp22, mpp23, mpp24, mpp25, mpp26, mpp27, > + mpp28, mpp29, mpp30, mpp31, mpp32, mpp33, mpp34, mpp35, mpp36, > + mpp37, mpp38, mpp39, mpp40, mpp41, mpp42, mpp43, mpp44, mpp45 ] > > allOf: > - $ref: "pinctrl.yaml#" > @@ -60,12 +60,12 @@ examples: > compatible = "marvell,ac5-pinctrl"; > reg = <0x80020100 0x20>; > > - i2c0_pins: i2c0-pins { > + pmx_i2c0_pins: pmx-i2c0 { > marvell,pins = "mpp26", "mpp27"; > marvell,function = "i2c0"; > }; > > - i2c0_gpio: i2c0-gpio-pins { > + pmx_i2c0_gpio: pmx-gpio-i2c0 { > marvell,pins = "mpp26", "mpp27"; > marvell,function = "gpio"; > }; ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 04/11] DT: USB: Convert ehci-orion to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (2 preceding siblings ...) 2022-08-20 19:47 ` [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl " Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:47 ` [PATCH 05/11] DT: watchdog: Convert marvel.txt " Andrew Lunn ` (8 subsequent siblings) 12 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../devicetree/bindings/usb/ehci-orion.txt | 22 ---------- .../bindings/usb/marvell,orion-ehci.yaml | 44 +++++++++++++++++++ 2 files changed, 44 insertions(+), 22 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/ehci-orion.txt create mode 100644 Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml diff --git a/Documentation/devicetree/bindings/usb/ehci-orion.txt b/Documentation/devicetree/bindings/usb/ehci-orion.txt deleted file mode 100644 index 2855bae79fda..000000000000 --- a/Documentation/devicetree/bindings/usb/ehci-orion.txt +++ /dev/null @@ -1,22 +0,0 @@ -* EHCI controller, Orion Marvell variants - -Required properties: -- compatible: must be one of the following - "marvell,orion-ehci" - "marvell,armada-3700-ehci" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The EHCI interrupt - -Optional properties: -- clocks: reference to the clock -- phys: reference to the USB PHY -- phy-names: name of the USB PHY, should be "usb" - -Example: - - ehci@50000 { - compatible = "marvell,orion-ehci"; - reg = <0x50000 0x1000>; - interrupts = <19>; - }; diff --git a/Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml b/Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml new file mode 100644 index 000000000000..5db56d62b3b5 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/marvell,orion-ehci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion USB Controller Device Tree Bindings + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + compatible: + enum: + - marvell,orion-ehci + - marvell,armada-3700-ehci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + phys: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + ehci@50000 { + compatible = "marvell,orion-ehci"; + reg = <0x50000 0x1000>; + interrupts = <19>; + }; +... -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 04/11] DT: USB: Convert ehci-orion to YAML 2022-08-20 19:47 ` [PATCH 04/11] DT: USB: Convert ehci-orion " Andrew Lunn @ 2022-08-21 20:21 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-21 20:21 UTC (permalink / raw) To: Andrew Lunn; +Cc: arm-soc, Gregory Clement, Device Tree On Sat, 20 Aug 2022 21:47:57 +0200, Andrew Lunn wrote: > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../devicetree/bindings/usb/ehci-orion.txt | 22 ---------- > .../bindings/usb/marvell,orion-ehci.yaml | 44 +++++++++++++++++++ > 2 files changed, 44 insertions(+), 22 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/usb/ehci-orion.txt > create mode 100644 Documentation/devicetree/bindings/usb/marvell,orion-ehci.yaml > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ ehci@50000: '#address-cells', '#size-cells', 'port@1' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/kirkwood-c200-v1.dtb arch/arm/boot/dts/kirkwood-l-50.dtb usb@50000: 'phy-names' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/armada-375-db.dtb usb@58000: 'usb-phy' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/armada-388-helios4.dtb usb@58000: 'vcc-supply' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/armada-388-gp.dtb usb@5e000: 'marvell,usb-misc-reg', 'phy-names' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/marvell/armada-3720-db.dtb arch/arm64/boot/dts/marvell/armada-3720-espressobin.dtb arch/arm64/boot/dts/marvell/armada-3720-espressobin-emmc.dtb arch/arm64/boot/dts/marvell/armada-3720-espressobin-ultra.dtb arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7.dtb arch/arm64/boot/dts/marvell/armada-3720-espressobin-v7-emmc.dtb arch/arm64/boot/dts/marvell/armada-3720-turris-mox.dtb arch/arm64/boot/dts/marvell/armada-3720-uDPU.dtb usb@a0000: 'dr_mode', 'phy-names' do not match any of the regexes: 'pinctrl-[0-9]+' arch/arm64/boot/dts/marvell/ac5-98dx35xx-rd.dtb usb-host@50000: 'vbus-supply' does not match any of the regexes: 'pinctrl-[0-9]+' arch/arm/boot/dts/dove-sbc-a510.dtb ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 05/11] DT: watchdog: Convert marvel.txt to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (3 preceding siblings ...) 2022-08-20 19:47 ` [PATCH 04/11] DT: USB: Convert ehci-orion " Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:47 ` [PATCH 06/11] arm: DT: kirkwood/orion5: Rename watchdog node Andrew Lunn ` (7 subsequent siblings) 12 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../devicetree/bindings/watchdog/marvel.txt | 45 ---------- .../bindings/watchdog/marvell,orion-wdt.yaml | 83 +++++++++++++++++++ 2 files changed, 83 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/watchdog/marvel.txt create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/marvel.txt b/Documentation/devicetree/bindings/watchdog/marvel.txt deleted file mode 100644 index c1b67a78f00c..000000000000 --- a/Documentation/devicetree/bindings/watchdog/marvel.txt +++ /dev/null @@ -1,45 +0,0 @@ -* Marvell Orion Watchdog Time - -Required Properties: - -- Compatibility : "marvell,orion-wdt" - "marvell,armada-370-wdt" - "marvell,armada-xp-wdt" - "marvell,armada-375-wdt" - "marvell,armada-380-wdt" - -- reg : Should contain two entries: first one with the - timer control address, second one with the - rstout enable address. - -For "marvell,armada-375-wdt" and "marvell,armada-380-wdt": - -- reg : A third entry is mandatory and should contain the - shared mask/unmask RSTOUT address. - -Clocks required for compatibles = "marvell,orion-wdt", - "marvell,armada-370-wdt": -- clocks : Must contain a single entry describing the clock input - -Clocks required for compatibles = "marvell,armada-xp-wdt" - "marvell,armada-375-wdt" - "marvell,armada-380-wdt": -- clocks : Must contain an entry for each entry in clock-names. -- clock-names : Must include the following entries: - "nbclk" (L2/coherency fabric clock), - "fixed" (Reference 25 MHz fixed-clock). - -Optional properties: - -- interrupts : Contains the IRQ for watchdog expiration -- timeout-sec : Contains the watchdog timeout in seconds - -Example: - - wdt@20300 { - compatible = "marvell,orion-wdt"; - reg = <0x20300 0x28>, <0x20108 0x4>; - interrupts = <3>; - timeout-sec = <10>; - clocks = <&gate_clk 7>; - }; diff --git a/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml b/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml new file mode 100644 index 000000000000..8607e1620f72 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/marvell,orion-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion Watchdog Device Tree Bindings + +allOf: + - $ref: "watchdog.yaml#" + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + compatible: + enum: + - marvell,orion-wdt + - marvell,armada-370-wdt + - marvell,armada-xp-wdt + - marvell,armada-375-wdt + - marvell,armada-380-wdt + + reg: + description: + Normally two items, the timer control address and the rstout enable + address. However armada-375 and 380 require and additional shared + mask/unmask rstout address + + clocks: + minItems: 1 + items: + - description: L2/coherency fabric clock + - description: Reference 25 MHz fixed-clock + + interrupts: + maxItems: 1 + + timeout-sec: true + +required: + - compatible + - reg + - clocks + - interrupts + +if: + properties: + compatible: + contains: + enum: + - marvell,armada-xp-wdt + - marvell,armada-375-wdt + - marvell,armada-380-wdt +then: + properties: + clocks: + minItems: 2 + clock-names: + items: + - const: nbclk + - const: fixed + + required: + - clock-names + +else: + properties: + clocks: + maxItems: 1 + +unevaluatedProperties: false + +examples: + - | + watchdog@20300 { + compatible = "marvell,orion-wdt"; + reg = <0x20300 0x28>, <0x20108 0x4>; + interrupts = <3>; + timeout-sec = <10>; + clocks = <&gate_clk 7>; + }; +... -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 05/11] DT: watchdog: Convert marvel.txt to YAML 2022-08-20 19:47 ` [PATCH 05/11] DT: watchdog: Convert marvel.txt " Andrew Lunn @ 2022-08-21 20:21 ` Rob Herring 2022-08-22 0:20 ` Andrew Lunn 0 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2022-08-21 20:21 UTC (permalink / raw) To: Andrew Lunn; +Cc: Device Tree, arm-soc, Gregory Clement On Sat, 20 Aug 2022 21:47:58 +0200, Andrew Lunn wrote: > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../devicetree/bindings/watchdog/marvel.txt | 45 ---------- > .../bindings/watchdog/marvell,orion-wdt.yaml | 83 +++++++++++++++++++ > 2 files changed, 83 insertions(+), 45 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/watchdog/marvel.txt > create mode 100644 Documentation/devicetree/bindings/watchdog/marvell,orion-wdt.yaml > Running 'make dtbs_check' with the schema in this patch gives the following warnings. Consider if they are expected or the schema is incorrect. These may not be new warnings. Note that it is not yet a requirement to have 0 warnings for dtbs_check. This will change in the future. Full log is available here: https://patchwork.ozlabs.org/patch/ watchdog@20300: interrupts-extended: [[3, 0, 64, 4], [3, 0, 9, 4]] is too long arch/arm/boot/dts/armada-381-netgear-gs110emx.dtb arch/arm/boot/dts/armada-382-rd-ac3x-48g4x2xl.dtb arch/arm/boot/dts/armada-385-atl-x530.dtb arch/arm/boot/dts/armada-385-clearfog-gtr-l8.dtb arch/arm/boot/dts/armada-385-clearfog-gtr-s4.dtb arch/arm/boot/dts/armada-385-db-88f6820-amc.dtb arch/arm/boot/dts/armada-385-db-ap.dtb arch/arm/boot/dts/armada-385-linksys-caiman.dtb arch/arm/boot/dts/armada-385-linksys-cobra.dtb arch/arm/boot/dts/armada-385-linksys-rango.dtb arch/arm/boot/dts/armada-385-linksys-shelby.dtb arch/arm/boot/dts/armada-385-synology-ds116.dtb arch/arm/boot/dts/armada-385-turris-omnia.dtb arch/arm/boot/dts/armada-388-clearfog-base.dtb arch/arm/boot/dts/armada-388-clearfog.dtb arch/arm/boot/dts/armada-388-clearfog-pro.dtb arch/arm/boot/dts/armada-388-db.dtb arch/arm/boot/dts/armada-388-gp.dtb arch/arm/boot/dts/armada-388-helios4.dtb arch/arm/boot/dts/armada-388-rd.dtb watchdog@20300: 'oneOf' conditional failed, one must be fixed: arch/arm/boot/dts/armada-370-c200-v2.dtb arch/arm/boot/dts/armada-370-db.dtb arch/arm/boot/dts/armada-370-dlink-dns327l.dtb arch/arm/boot/dts/armada-370-mirabox.dtb arch/arm/boot/dts/armada-370-netgear-rn102.dtb arch/arm/boot/dts/armada-370-netgear-rn104.dtb arch/arm/boot/dts/armada-370-rd.dtb arch/arm/boot/dts/armada-370-seagate-nas-2bay.dtb arch/arm/boot/dts/armada-370-seagate-nas-4bay.dtb arch/arm/boot/dts/armada-370-seagate-personal-cloud-2bay.dtb arch/arm/boot/dts/armada-370-seagate-personal-cloud.dtb arch/arm/boot/dts/armada-370-synology-ds213j.dtb arch/arm/boot/dts/armada-375-db.dtb arch/arm/boot/dts/armada-398-db.dtb arch/arm/boot/dts/armada-xp-axpwifiap.dtb arch/arm/boot/dts/armada-xp-crs305-1g-4s-bit.dtb arch/arm/boot/dts/armada-xp-crs305-1g-4s.dtb arch/arm/boot/dts/armada-xp-crs326-24g-2s-bit.dtb arch/arm/boot/dts/armada-xp-crs326-24g-2s.dtb arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s-bit.dtb arch/arm/boot/dts/armada-xp-crs328-4c-20s-4s.dtb arch/arm/boot/dts/armada-xp-db.dtb arch/arm/boot/dts/armada-xp-db-dxbc2.dtb arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dtb arch/arm/boot/dts/armada-xp-gp.dtb arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dtb arch/arm/boot/dts/armada-xp-linksys-mamba.dtb arch/arm/boot/dts/armada-xp-matrix.dtb arch/arm/boot/dts/armada-xp-netgear-rn2120.dtb arch/arm/boot/dts/armada-xp-openblocks-ax3-4.dtb arch/arm/boot/dts/armada-xp-synology-ds414.dtb watchdog@20300: Unevaluated properties are not allowed ('interrupts-extended' was unexpected) arch/arm/boot/dts/armada-381-netgear-gs110emx.dtb arch/arm/boot/dts/armada-382-rd-ac3x-48g4x2xl.dtb arch/arm/boot/dts/armada-385-atl-x530.dtb arch/arm/boot/dts/armada-385-clearfog-gtr-l8.dtb arch/arm/boot/dts/armada-385-clearfog-gtr-s4.dtb arch/arm/boot/dts/armada-385-db-88f6820-amc.dtb arch/arm/boot/dts/armada-385-db-ap.dtb arch/arm/boot/dts/armada-385-linksys-caiman.dtb arch/arm/boot/dts/armada-385-linksys-cobra.dtb arch/arm/boot/dts/armada-385-linksys-rango.dtb arch/arm/boot/dts/armada-385-linksys-shelby.dtb arch/arm/boot/dts/armada-385-synology-ds116.dtb arch/arm/boot/dts/armada-385-turris-omnia.dtb arch/arm/boot/dts/armada-388-clearfog-base.dtb arch/arm/boot/dts/armada-388-clearfog.dtb arch/arm/boot/dts/armada-388-clearfog-pro.dtb arch/arm/boot/dts/armada-388-db.dtb arch/arm/boot/dts/armada-388-gp.dtb arch/arm/boot/dts/armada-388-helios4.dtb arch/arm/boot/dts/armada-388-rd.dtb watchdog-timer@20300: $nodename:0: 'watchdog-timer@20300' does not match '^watchdog(@.*|-[0-9a-f])?$' arch/arm/boot/dts/kirkwood-b3.dtb arch/arm/boot/dts/kirkwood-blackarmor-nas220.dtb arch/arm/boot/dts/kirkwood-c200-v1.dtb arch/arm/boot/dts/kirkwood-cloudbox.dtb arch/arm/boot/dts/kirkwood-d2net.dtb arch/arm/boot/dts/kirkwood-db-88f6281.dtb arch/arm/boot/dts/kirkwood-db-88f6282.dtb arch/arm/boot/dts/kirkwood-dir665.dtb arch/arm/boot/dts/kirkwood-dns320.dtb arch/arm/boot/dts/kirkwood-dns325.dtb arch/arm/boot/dts/kirkwood-dockstar.dtb arch/arm/boot/dts/kirkwood-dreamplug.dtb arch/arm/boot/dts/kirkwood-ds109.dtb arch/arm/boot/dts/kirkwood-ds110jv10.dtb arch/arm/boot/dts/kirkwood-ds111.dtb arch/arm/boot/dts/kirkwood-ds112.dtb arch/arm/boot/dts/kirkwood-ds209.dtb arch/arm/boot/dts/kirkwood-ds210.dtb arch/arm/boot/dts/kirkwood-ds212.dtb arch/arm/boot/dts/kirkwood-ds212j.dtb arch/arm/boot/dts/kirkwood-ds409.dtb arch/arm/boot/dts/kirkwood-ds409slim.dtb arch/arm/boot/dts/kirkwood-ds411.dtb arch/arm/boot/dts/kirkwood-ds411j.dtb arch/arm/boot/dts/kirkwood-ds411slim.dtb arch/arm/boot/dts/kirkwood-goflexnet.dtb arch/arm/boot/dts/kirkwood-guruplug-server-plus.dtb arch/arm/boot/dts/kirkwood-ib62x0.dtb arch/arm/boot/dts/kirkwood-iconnect.dtb arch/arm/boot/dts/kirkwood-iomega_ix2_200.dtb arch/arm/boot/dts/kirkwood-is2.dtb arch/arm/boot/dts/kirkwood-km_kirkwood.dtb arch/arm/boot/dts/kirkwood-l-50.dtb arch/arm/boot/dts/kirkwood-laplug.dtb arch/arm/boot/dts/kirkwood-linkstation-lsqvl.dtb arch/arm/boot/dts/kirkwood-linkstation-lsvl.dtb arch/arm/boot/dts/kirkwood-linkstation-lswsxl.dtb arch/arm/boot/dts/kirkwood-linkstation-lswvl.dtb arch/arm/boot/dts/kirkwood-linkstation-lswxl.dtb arch/arm/boot/dts/kirkwood-linksys-viper.dtb arch/arm/boot/dts/kirkwood-lschlv2.dtb arch/arm/boot/dts/kirkwood-lsxhl.dtb arch/arm/boot/dts/kirkwood-mplcec4.dtb arch/arm/boot/dts/kirkwood-mv88f6281gtw-ge.dtb arch/arm/boot/dts/kirkwood-nas2big.dtb arch/arm/boot/dts/kirkwood-net2big.dtb arch/arm/boot/dts/kirkwood-net5big.dtb arch/arm/boot/dts/kirkwood-netgear_readynas_duo_v2.dtb arch/arm/boot/dts/kirkwood-netgear_readynas_nv+_v2.dtb arch/arm/boot/dts/kirkwood-ns2.dtb arch/arm/boot/dts/kirkwood-ns2lite.dtb arch/arm/boot/dts/kirkwood-ns2max.dtb arch/arm/boot/dts/kirkwood-ns2mini.dtb arch/arm/boot/dts/kirkwood-nsa310a.dtb arch/arm/boot/dts/kirkwood-nsa310.dtb arch/arm/boot/dts/kirkwood-nsa320.dtb arch/arm/boot/dts/kirkwood-nsa325.dtb arch/arm/boot/dts/kirkwood-openblocks_a6.dtb arch/arm/boot/dts/kirkwood-openblocks_a7.dtb arch/arm/boot/dts/kirkwood-openrd-base.dtb arch/arm/boot/dts/kirkwood-openrd-client.dtb arch/arm/boot/dts/kirkwood-openrd-ultimate.dtb arch/arm/boot/dts/kirkwood-pogo_e02.dtb arch/arm/boot/dts/kirkwood-pogoplug-series-4.dtb arch/arm/boot/dts/kirkwood-rd88f6192.dtb arch/arm/boot/dts/kirkwood-rd88f6281-a.dtb arch/arm/boot/dts/kirkwood-rd88f6281-z0.dtb arch/arm/boot/dts/kirkwood-rs212.dtb arch/arm/boot/dts/kirkwood-rs409.dtb arch/arm/boot/dts/kirkwood-rs411.dtb arch/arm/boot/dts/kirkwood-sheevaplug.dtb arch/arm/boot/dts/kirkwood-sheevaplug-esata.dtb arch/arm/boot/dts/kirkwood-t5325.dtb arch/arm/boot/dts/kirkwood-topkick.dtb arch/arm/boot/dts/kirkwood-ts219-6281.dtb arch/arm/boot/dts/kirkwood-ts219-6282.dtb arch/arm/boot/dts/kirkwood-ts419-6281.dtb arch/arm/boot/dts/kirkwood-ts419-6282.dtb wdt@20300: $nodename:0: 'wdt@20300' does not match '^watchdog(@.*|-[0-9a-f])?$' arch/arm/boot/dts/orion5x-kuroboxpro.dtb arch/arm/boot/dts/orion5x-lacie-d2-network.dtb arch/arm/boot/dts/orion5x-lacie-ethernet-disk-mini-v2.dtb arch/arm/boot/dts/orion5x-linkstation-lschl.dtb arch/arm/boot/dts/orion5x-linkstation-lsgl.dtb arch/arm/boot/dts/orion5x-linkstation-lswtgl.dtb arch/arm/boot/dts/orion5x-lswsgl.dtb arch/arm/boot/dts/orion5x-maxtor-shared-storage-2.dtb arch/arm/boot/dts/orion5x-netgear-wnr854t.dtb arch/arm/boot/dts/orion5x-rd88f5182-nas.dtb ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/11] DT: watchdog: Convert marvel.txt to YAML 2022-08-21 20:21 ` Rob Herring @ 2022-08-22 0:20 ` Andrew Lunn 2022-08-22 13:47 ` Rob Herring 0 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-22 0:20 UTC (permalink / raw) To: Rob Herring; +Cc: Device Tree, arm-soc, Gregory Clement > watchdog-timer@20300: $nodename:0: 'watchdog-timer@20300' does not match '^watchdog(@.*|-[0-9a-f])?$' > arch/arm/boot/dts/kirkwood-b3.dtb > arch/arm/boot/dts/kirkwood-blackarmor-nas220.dtb This is fixed in the next patch. So far, i've been working on kirkwood. There are too many mvebu platforms to convert them all at once to YAML, i have over 50 patches with just kirkwood. So i expect there to be warnings for other SoC at the moment. Once i have kirkwood finished, i will probably work on orion5x and then armada-xp, and the other armada SoCs. Andrew ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 05/11] DT: watchdog: Convert marvel.txt to YAML 2022-08-22 0:20 ` Andrew Lunn @ 2022-08-22 13:47 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 13:47 UTC (permalink / raw) To: Andrew Lunn; +Cc: Device Tree, arm-soc, Gregory Clement On Mon, Aug 22, 2022 at 02:20:02AM +0200, Andrew Lunn wrote: > > watchdog-timer@20300: $nodename:0: 'watchdog-timer@20300' does not match '^watchdog(@.*|-[0-9a-f])?$' > > arch/arm/boot/dts/kirkwood-b3.dtb > > arch/arm/boot/dts/kirkwood-blackarmor-nas220.dtb > > This is fixed in the next patch. Not really worried about that one. > So far, i've been working on kirkwood. There are too many mvebu > platforms to convert them all at once to YAML, i have over 50 patches > with just kirkwood. So i expect there to be warnings for other SoC at > the moment. Once i have kirkwood finished, i will probably work on > orion5x and then armada-xp, and the other armada SoCs. It was interrupts-extended warning that caught my attention. You've said there is only 1 interrupt, but clearly some platforms have 2. It's fine to fix the schemas to match reality in the conversion if needed, just note the changes in the commit msg. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 06/11] arm: DT: kirkwood/orion5: Rename watchdog node 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (4 preceding siblings ...) 2022-08-20 19:47 ` [PATCH 05/11] DT: watchdog: Convert marvel.txt " Andrew Lunn @ 2022-08-20 19:47 ` Andrew Lunn 2022-08-20 19:48 ` [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand Andrew Lunn ` (6 subsequent siblings) 12 siblings, 0 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:47 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn The watchdog.yaml requires the node be called watchdog. So change from the current wdt/watchdog-timer. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- arch/arm/boot/dts/kirkwood.dtsi | 2 +- arch/arm/boot/dts/orion5x.dtsi | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index fca31a5d5ac7..362d2a6fbb54 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -243,7 +243,7 @@ timer: timer@20300 { clocks = <&core_clk 0>; }; - wdt: watchdog-timer@20300 { + wdt: watchdog@20300 { compatible = "marvell,orion-wdt"; reg = <0x20300 0x28>, <0x20108 0x4>; interrupt-parent = <&bridge_intc>; diff --git a/arch/arm/boot/dts/orion5x.dtsi b/arch/arm/boot/dts/orion5x.dtsi index 2d41f5c166ee..7de95818663e 100644 --- a/arch/arm/boot/dts/orion5x.dtsi +++ b/arch/arm/boot/dts/orion5x.dtsi @@ -137,7 +137,7 @@ timer: timer@20300 { clocks = <&core_clk 0>; }; - wdt: wdt@20300 { + wdt: watchdog@20300 { compatible = "marvell,orion-wdt"; reg = <0x20300 0x28>, <0x20108 0x4>; interrupt-parent = <&bridge_intc>; -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (5 preceding siblings ...) 2022-08-20 19:47 ` [PATCH 06/11] arm: DT: kirkwood/orion5: Rename watchdog node Andrew Lunn @ 2022-08-20 19:48 ` Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:48 ` [PATCH 08/11] DT: mtd: Convert orion-nand to YAML Andrew Lunn ` (5 subsequent siblings) 12 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:48 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn The Marvell Orion NAND driver comes from before the time of the standardised NAND binding. The controller only supports a single device, and expects the NAND partition table to be directly in the controller node. This goes against the standardised NAND binding which expects a sub node per NAND device, which contains the partition table. Since the partition table contains a reg property indicating the start address of the partition and its length, it needs #size-cells set to 1. However, for a list of nand devices, the reg value is the device number, requiring #size-cells of 0. Add an exception to nand-controller.yaml to allow this #size-cells value when the compatible matches the orion controller. In order that the example works, it needs a compatible string so the comparison can be made. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/mtd/nand-controller.yaml | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 359a015d4e5a..ab90e34557ad 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -34,7 +34,7 @@ properties: const: 1 "#size-cells": - const: 0 + enum: [0, 1] ranges: true @@ -130,11 +130,26 @@ required: - "#address-cells" - "#size-cells" +if: + properties: + compatible: + contains: + const: marvell,orion-nand +then: + properties: + "#size-cells": + const: 1 +else: + properties: + "#size-cells": + const: 0 + additionalProperties: true examples: - | nand-controller { + compatible = "bar"; #address-cells = <1>; #size-cells = <0>; cs-gpios = <0>, <&gpioA 1>; /* A single native CS is available */ -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand 2022-08-20 19:48 ` [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand Andrew Lunn @ 2022-08-21 20:21 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-21 20:21 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, Device Tree, arm-soc On Sat, 20 Aug 2022 21:48:00 +0200, Andrew Lunn wrote: > The Marvell Orion NAND driver comes from before the time of the > standardised NAND binding. The controller only supports a single > device, and expects the NAND partition table to be directly in the > controller node. This goes against the standardised NAND binding which > expects a sub node per NAND device, which contains the partition > table. > > Since the partition table contains a reg property indicating the start > address of the partition and its length, it needs #size-cells set to > 1. However, for a list of nand devices, the reg value is the device > number, requiring #size-cells of 0. > > Add an exception to nand-controller.yaml to allow this #size-cells > value when the compatible matches the orion controller. > > In order that the example works, it needs a compatible string so the > comparison can be made. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../bindings/mtd/nand-controller.yaml | 17 ++++++++++++++++- > 1 file changed, 16 insertions(+), 1 deletion(-) > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: Documentation/devicetree/bindings/mtd/nand-controller.example.dtb:0:0: /example-0/nand-controller: failed to match any schema with compatible: ['bar'] doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 08/11] DT: mtd: Convert orion-nand to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (6 preceding siblings ...) 2022-08-20 19:48 ` [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand Andrew Lunn @ 2022-08-20 19:48 ` Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:48 ` [PATCH 09/11] arm: DT: kirkwood.dtsi: Rename nand to nand-controller Andrew Lunn ` (4 subsequent siblings) 12 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:48 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn This works for Kirkwood, but orion5x has an odd bus structure which results in some warnings. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/mtd/marvell,orion-nand.yaml | 85 +++++++++++++++++++ .../devicetree/bindings/mtd/orion-nand.txt | 50 ----------- 2 files changed, 85 insertions(+), 50 deletions(-) create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt diff --git a/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml b/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml new file mode 100644 index 000000000000..127c12e6f5ce --- /dev/null +++ b/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mtd/marvell,orion-nand.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion NAND Controller Device Tree Bindings + +allOf: + - $ref: "nand-controller.yaml" + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + "#address-cells": true + "#size-cells": true + + compatible: + enum: + - marvell,orion-nand + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + cle: + description: + Address line number connected to CLE. Default is 0 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 255 + + ale: + description: + Address line number connected to ALE. Default is 1 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 255 + + bank-width: + description: Width (in bytes) of the bank. Equal to the device width times + the number of interleaved chips. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 1, 2, 4 ] + + chip-delay: + description: + Chip dependent delay for transferring data from array to read + registers in usecs + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 255 + + partitions: + type: object + +patternProperties: + "@[0-9a-f]+$": + $ref: "/schemas/mtd/partitions/partition.yaml" + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + nand-controller@f4000000 { + #address-cells = <1>; + #size-cells = <1>; + cle = <0>; + ale = <1>; + bank-width = <1>; + chip-delay = <25>; + compatible = "marvell,orion-nand"; + reg = <0xf4000000 0x400>; + }; +... diff --git a/Documentation/devicetree/bindings/mtd/orion-nand.txt b/Documentation/devicetree/bindings/mtd/orion-nand.txt deleted file mode 100644 index 2d6ab660e603..000000000000 --- a/Documentation/devicetree/bindings/mtd/orion-nand.txt +++ /dev/null @@ -1,50 +0,0 @@ -NAND support for Marvell Orion SoC platforms - -Required properties: -- compatible : "marvell,orion-nand". -- reg : Base physical address of the NAND and length of memory mapped - region - -Optional properties: -- cle : Address line number connected to CLE. Default is 0 -- ale : Address line number connected to ALE. Default is 1 -- bank-width : Width in bytes of the device. Default is 1 -- chip-delay : Chip dependent delay for transferring data from array to read - registers in usecs - -The device tree may optionally contain sub-nodes describing partitions of the -address space. See partition.txt for more detail. - -Example: - -nand@f4000000 { - #address-cells = <1>; - #size-cells = <1>; - cle = <0>; - ale = <1>; - bank-width = <1>; - chip-delay = <25>; - compatible = "marvell,orion-nand"; - reg = <0xf4000000 0x400>; - - partition@0 { - label = "u-boot"; - reg = <0x0000000 0x100000>; - read-only; - }; - - partition@100000 { - label = "uImage"; - reg = <0x0100000 0x200000>; - }; - - partition@300000 { - label = "dtb"; - reg = <0x0300000 0x100000>; - }; - - partition@400000 { - label = "root"; - reg = <0x0400000 0x7d00000>; - }; -}; -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 08/11] DT: mtd: Convert orion-nand to YAML 2022-08-20 19:48 ` [PATCH 08/11] DT: mtd: Convert orion-nand to YAML Andrew Lunn @ 2022-08-21 20:21 ` Rob Herring 2022-08-22 0:48 ` Andrew Lunn 0 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2022-08-21 20:21 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, 20 Aug 2022 21:48:01 +0200, Andrew Lunn wrote: > This works for Kirkwood, but orion5x has an odd bus structure > which results in some warnings. > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > --- > .../bindings/mtd/marvell,orion-nand.yaml | 85 +++++++++++++++++++ > .../devicetree/bindings/mtd/orion-nand.txt | 50 ----------- > 2 files changed, 85 insertions(+), 50 deletions(-) > create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml > delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' on your patch (DT_CHECKER_FLAGS is new in v5.13): yamllint warnings/errors: dtschema/dtc warnings/errors: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/nand-controller.yaml /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml doc reference errors (make refcheckdocs): See https://patchwork.ozlabs.org/patch/ This check can fail if there are any dependencies. The base for a patch series is generally the most recent rc1. If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure 'yamllint' is installed and dt-schema is up to date: pip3 install dtschema --upgrade Please check and re-submit. ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/11] DT: mtd: Convert orion-nand to YAML 2022-08-21 20:21 ` Rob Herring @ 2022-08-22 0:48 ` Andrew Lunn 2022-08-22 13:43 ` Rob Herring 0 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-22 0:48 UTC (permalink / raw) To: Rob Herring; +Cc: Gregory Clement, arm-soc, Device Tree On Sun, Aug 21, 2022 at 03:21:26PM -0500, Rob Herring wrote: > On Sat, 20 Aug 2022 21:48:01 +0200, Andrew Lunn wrote: > > This works for Kirkwood, but orion5x has an odd bus structure > > which results in some warnings. > > > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > > --- > > .../bindings/mtd/marvell,orion-nand.yaml | 85 +++++++++++++++++++ > > .../devicetree/bindings/mtd/orion-nand.txt | 50 ----------- > > 2 files changed, 85 insertions(+), 50 deletions(-) > > create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml > > delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > yamllint warnings/errors: > > dtschema/dtc warnings/errors: > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/nand-controller.yaml > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml Does the bot not apply patches N-1 before testing patch N? In this case, if patch N-2 was applied, you would not see this warning. Andrew ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 08/11] DT: mtd: Convert orion-nand to YAML 2022-08-22 0:48 ` Andrew Lunn @ 2022-08-22 13:43 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 13:43 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Mon, Aug 22, 2022 at 02:48:19AM +0200, Andrew Lunn wrote: > On Sun, Aug 21, 2022 at 03:21:26PM -0500, Rob Herring wrote: > > On Sat, 20 Aug 2022 21:48:01 +0200, Andrew Lunn wrote: > > > This works for Kirkwood, but orion5x has an odd bus structure > > > which results in some warnings. > > > > > > Signed-off-by: Andrew Lunn <andrew@lunn.ch> > > > --- > > > .../bindings/mtd/marvell,orion-nand.yaml | 85 +++++++++++++++++++ > > > .../devicetree/bindings/mtd/orion-nand.txt | 50 ----------- > > > 2 files changed, 85 insertions(+), 50 deletions(-) > > > create mode 100644 Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml > > > delete mode 100644 Documentation/devicetree/bindings/mtd/orion-nand.txt > > > > > > > My bot found errors running 'make DT_CHECKER_FLAGS=-m dt_binding_check' > > on your patch (DT_CHECKER_FLAGS is new in v5.13): > > > > yamllint warnings/errors: > > > > dtschema/dtc warnings/errors: > > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected > > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/nand-controller.yaml > > /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.example.dtb: nand-controller@f4000000: #size-cells:0:0: 0 was expected > > From schema: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/mtd/marvell,orion-nand.yaml > > Does the bot not apply patches N-1 before testing patch N? In this > case, if patch N-2 was applied, you would not see this warning. It does unless there is a failure and it drops the prior patches. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* [PATCH 09/11] arm: DT: kirkwood.dtsi: Rename nand to nand-controller 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (7 preceding siblings ...) 2022-08-20 19:48 ` [PATCH 08/11] DT: mtd: Convert orion-nand to YAML Andrew Lunn @ 2022-08-20 19:48 ` Andrew Lunn 2022-08-20 19:48 ` [PATCH 10/11] DT: timer: Convert marvell,orion-timer.txt to YAML Andrew Lunn ` (3 subsequent siblings) 12 siblings, 0 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:48 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Current convention is to use the name namd-controller. Now that the orion-nand controller binding has validation via YAML, fix the name. Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- arch/arm/boot/dts/kirkwood.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/kirkwood.dtsi b/arch/arm/boot/dts/kirkwood.dtsi index 362d2a6fbb54..122a6db6c001 100644 --- a/arch/arm/boot/dts/kirkwood.dtsi +++ b/arch/arm/boot/dts/kirkwood.dtsi @@ -42,7 +42,7 @@ MBUS_ID(0x03, 0x01) 0 0xf5000000 0x10000 /* crypto sram */ pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */ pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */ - nand: nand@12f { + nand: nand-controller@12f { #address-cells = <1>; #size-cells = <1>; cle = <0>; -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 10/11] DT: timer: Convert marvell,orion-timer.txt to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (8 preceding siblings ...) 2022-08-20 19:48 ` [PATCH 09/11] arm: DT: kirkwood.dtsi: Rename nand to nand-controller Andrew Lunn @ 2022-08-20 19:48 ` Andrew Lunn 2022-08-20 19:48 ` [PATCH 11/11] DT: clock: Convert mvebu-gated-clock.txt " Andrew Lunn ` (2 subsequent siblings) 12 siblings, 0 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:48 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../bindings/timer/marvell,orion-timer.txt | 16 ------ .../bindings/timer/marvell,orion-timer.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/timer/marvell,orion-timer.txt create mode 100644 Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt b/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt deleted file mode 100644 index cd1a0c256f94..000000000000 --- a/Documentation/devicetree/bindings/timer/marvell,orion-timer.txt +++ /dev/null @@ -1,16 +0,0 @@ -Marvell Orion SoC timer - -Required properties: -- compatible: shall be "marvell,orion-timer" -- reg: base address of the timer register starting with TIMERS CONTROL register -- interrupts: should contain the interrupts for Timer0 and Timer1 -- clocks: phandle of timer reference clock (tclk) - -Example: - timer: timer { - compatible = "marvell,orion-timer"; - reg = <0x20300 0x20>; - interrupt-parent = <&bridge_intc>; - interrupts = <1>, <2>; - clocks = <&core_clk 0>; - }; diff --git a/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml b/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml new file mode 100644 index 000000000000..330bb3cd9c26 --- /dev/null +++ b/Documentation/devicetree/bindings/timer/marvell,orion-timer.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/timer/marvell,orion-timer.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvell Orion Timer bindings + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +properties: + $nodename: + pattern: '^timer@[a-f0-9]+$' + + compatible: + const: marvell,orion-timer + + reg: + description: + Base address of the timer register starting with TIMERS CONTROL register + maxItems: 1 + + interrupts: + description: + Should contain the interrupts for Timer0 and Timer1 + minItems: 2 + maxItems: 2 + + clocks: + description: + phandle of timer reference clock (tclk) + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + timer: timer@20300 { + compatible = "marvell,orion-timer"; + reg = <0x20300 0x20>; + interrupt-parent = <&bridge_intc>; + interrupts = <1>, <2>; + clocks = <&core_clk 0>; + }; +... -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* [PATCH 11/11] DT: clock: Convert mvebu-gated-clock.txt to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (9 preceding siblings ...) 2022-08-20 19:48 ` [PATCH 10/11] DT: timer: Convert marvell,orion-timer.txt to YAML Andrew Lunn @ 2022-08-20 19:48 ` Andrew Lunn 2022-08-22 13:49 ` [PATCH 00/11] Start converting MVEBU bindings " Rob Herring 2022-08-22 13:53 ` Rob Herring 12 siblings, 0 replies; 27+ messages in thread From: Andrew Lunn @ 2022-08-20 19:48 UTC (permalink / raw) To: Gregory Clement; +Cc: arm-soc, Device Tree, Andrew Lunn Signed-off-by: Andrew Lunn <andrew@lunn.ch> --- .../clock/marvell,kirkwood-gating-clock.yaml | 230 ++++++++++++++++++ .../bindings/clock/mvebu-gated-clock.txt | 205 ---------------- 2 files changed, 230 insertions(+), 205 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/marvell,kirkwood-gating-clock.yaml delete mode 100644 Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt diff --git a/Documentation/devicetree/bindings/clock/marvell,kirkwood-gating-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,kirkwood-gating-clock.yaml new file mode 100644 index 000000000000..b420a2c2a8d3 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,kirkwood-gating-clock.yaml @@ -0,0 +1,230 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,kirkwood-gating-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Marvel Gating Clock Device Tree Bindings + +maintainers: + - Andrew Lunn <andrew@lunn.ch> + +# Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some +# peripheral clocks to be gated to save some power. The clock consumer +# should specify the desired clock by having the clock ID in its +# "clocks" phandle cell. The clock ID is directly mapped to the +# corresponding clock gating control bit in HW to ease manual clock +# lookup in datasheet. +# +# The following is a list of provided IDs for Armada 370: +# ID Clock Peripheral +# ----------------------------------- +# 0 Audio AC97 Cntrl +# 1 pex0_en PCIe 0 Clock out +# 2 pex1_en PCIe 1 Clock out +# 3 ge1 Gigabit Ethernet 1 +# 4 ge0 Gigabit Ethernet 0 +# 5 pex0 PCIe Cntrl 0 +# 9 pex1 PCIe Cntrl 1 +# 15 sata0 SATA Host 0 +# 17 sdio SDHCI Host +# 23 crypto CESA (crypto engine) +# 25 tdm Time Division Mplx +# 28 ddr DDR Cntrl +# 30 sata1 SATA Host 0 +# +# The following is a list of provided IDs for Armada 375: +# ID Clock Peripheral +# ----------------------------------- +# 2 mu Management Unit +# 3 pp Packet Processor +# 4 ptp PTP +# 5 pex0 PCIe 0 Clock out +# 6 pex1 PCIe 1 Clock out +# 8 audio Audio Cntrl +# 11 nd_clk Nand Flash Cntrl +# 14 sata0_link SATA 0 Link +# 15 sata0_core SATA 0 Core +# 16 usb3 USB3 Host +# 17 sdio SDHCI Host +# 18 usb USB Host +# 19 gop Gigabit Ethernet MAC +# 20 sata1_link SATA 1 Link +# 21 sata1_core SATA 1 Core +# 22 xor0 XOR DMA 0 +# 23 xor1 XOR DMA 0 +# 24 copro Coprocessor +# 25 tdm Time Division Mplx +# 28 crypto0_enc Cryptographic Unit Port 0 Encryption +# 29 crypto0_core Cryptographic Unit Port 0 Core +# 30 crypto1_enc Cryptographic Unit Port 1 Encryption +# 31 crypto1_core Cryptographic Unit Port 1 Core +# +# The following is a list of provided IDs for Armada 380/385: +# ID Clock Peripheral +# ----------------------------------- +# 0 audio Audio +# 2 ge2 Gigabit Ethernet 2 +# 3 ge1 Gigabit Ethernet 1 +# 4 ge0 Gigabit Ethernet 0 +# 5 pex1 PCIe 1 +# 6 pex2 PCIe 2 +# 7 pex3 PCIe 3 +# 8 pex0 PCIe 0 +# 9 usb3h0 USB3 Host 0 +# 10 usb3h1 USB3 Host 1 +# 11 usb3d USB3 Device +# 13 bm Buffer Management +# 14 crypto0z Cryptographic 0 Z +# 15 sata0 SATA 0 +# 16 crypto1z Cryptographic 1 Z +# 17 sdio SDIO +# 18 usb2 USB 2 +# 21 crypto1 Cryptographic 1 +# 22 xor0 XOR 0 +# 23 crypto0 Cryptographic 0 +# 25 tdm Time Division Multiplexing +# 28 xor1 XOR 1 +# 30 sata1 SATA 1 +# +# The following is a list of provided IDs for Armada 39x: +# ID Clock Peripheral +# ----------------------------------- +# 5 pex1 PCIe 1 +# 6 pex2 PCIe 2 +# 7 pex3 PCIe 3 +# 8 pex0 PCIe 0 +# 9 usb3h0 USB3 Host 0 +# 10 usb3h1 USB3 Host 1 +# 15 sata0 SATA 0 +# 17 sdio SDIO +# 22 xor0 XOR 0 +# 28 xor1 XOR 1 +# +# The following is a list of provided IDs for Armada XP: +# ID Clock Peripheral +# ----------------------------------- +# 0 audio Audio Cntrl +# 1 ge3 Gigabit Ethernet 3 +# 2 ge2 Gigabit Ethernet 2 +# 3 ge1 Gigabit Ethernet 1 +# 4 ge0 Gigabit Ethernet 0 +# 5 pex0 PCIe Cntrl 0 +# 6 pex1 PCIe Cntrl 1 +# 7 pex2 PCIe Cntrl 2 +# 8 pex3 PCIe Cntrl 3 +# 13 bp +# 14 sata0lnk +# 15 sata0 SATA Host 0 +# 16 lcd LCD Cntrl +# 17 sdio SDHCI Host +# 18 usb0 USB Host 0 +# 19 usb1 USB Host 1 +# 20 usb2 USB Host 2 +# 22 xor0 XOR DMA 0 +# 23 crypto CESA engine +# 25 tdm Time Division Mplx +# 28 xor1 XOR DMA 1 +# 29 sata1lnk +# 30 sata1 SATA Host 1 +# +# The following is a list of provided IDs for 98dx3236: +# ID Clock Peripheral +# ----------------------------------- +# 3 ge1 Gigabit Ethernet 1 +# 4 ge0 Gigabit Ethernet 0 +# 5 pex0 PCIe Cntrl 0 +# 17 sdio SDHCI Host +# 18 usb0 USB Host 0 +# 22 xor0 XOR DMA 0 +# +# The following is a list of provided IDs for Dove: +# ID Clock Peripheral +# ----------------------------------- +# 0 usb0 USB Host 0 +# 1 usb1 USB Host 1 +# 2 ge Gigabit Ethernet +# 3 sata SATA Host +# 4 pex0 PCIe Cntrl 0 +# 5 pex1 PCIe Cntrl 1 +# 8 sdio0 SDHCI Host 0 +# 9 sdio1 SDHCI Host 1 +# 10 nand NAND Cntrl +# 11 camera Camera Cntrl +# 12 i2s0 I2S Cntrl 0 +# 13 i2s1 I2S Cntrl 1 +# 15 crypto CESA engine +# 21 ac97 AC97 Cntrl +# 22 pdma Peripheral DMA +# 23 xor0 XOR DMA 0 +# 24 xor1 XOR DMA 1 +# 30 gephy Gigabit Ethernel PHY +# Note: gephy(30) is implemented as a parent clock of ge(2) +# +# The following is a list of provided IDs for Kirkwood: +# ID Clock Peripheral +# ----------------------------------- +# 0 ge0 Gigabit Ethernet 0 +# 2 pex0 PCIe Cntrl 0 +# 3 usb0 USB Host 0 +# 4 sdio SDIO Cntrl +# 5 tsu Transp. Stream Unit +# 6 dunit SDRAM Cntrl +# 7 runit Runit +# 8 xor0 XOR DMA 0 +# 9 audio I2S Cntrl 0 +# 14 sata0 SATA Host 0 +# 15 sata1 SATA Host 1 +# 16 xor1 XOR DMA 1 +# 17 crypto CESA engine +# 18 pex1 PCIe Cntrl 1 +# 19 ge1 Gigabit Ethernet 1 +# 20 tdm Time Division Mplx +# +# + +properties: + compatible: + enum: + - marvell,armada-370-gating-clock + - marvell,armada-375-gating-clock + - marvell,armada-380-gating-clock + - marvell,armada-390-gating-clock + - marvell,armada-xp-gating-clock + - marvell,mv98dx3236-gating-clock + - marvell,dove-gating-clock + - marvell,kirkwood-gating-clock + + reg: + description: + Shall be the register address of the Clock Gating Control register + maxItems: 1 + + "#clock-cells": + const: 1 + description: + This additional argument passed to that clock is the offset of + the bit controlling this particular gate in the register. + + clocks: + description: + default parent clock phandle (e.g. tclk) + maxItems: 1 + +required: + - "#clock-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + gate_clk: clock-gating-control@d0038 { + compatible = "marvell,dove-gating-clock"; + reg = <0xd0038 0x4>; + /* default parent clock is tclk */ + clocks = <&core_clk 0>; + #clock-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt b/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt deleted file mode 100644 index de562da2ae77..000000000000 --- a/Documentation/devicetree/bindings/clock/mvebu-gated-clock.txt +++ /dev/null @@ -1,205 +0,0 @@ -* Gated Clock bindings for Marvell EBU SoCs - -Marvell Armada 370/375/380/385/39x/XP, Dove and Kirkwood allow some -peripheral clocks to be gated to save some power. The clock consumer -should specify the desired clock by having the clock ID in its -"clocks" phandle cell. The clock ID is directly mapped to the -corresponding clock gating control bit in HW to ease manual clock -lookup in datasheet. - -The following is a list of provided IDs for Armada 370: -ID Clock Peripheral ------------------------------------ -0 Audio AC97 Cntrl -1 pex0_en PCIe 0 Clock out -2 pex1_en PCIe 1 Clock out -3 ge1 Gigabit Ethernet 1 -4 ge0 Gigabit Ethernet 0 -5 pex0 PCIe Cntrl 0 -9 pex1 PCIe Cntrl 1 -15 sata0 SATA Host 0 -17 sdio SDHCI Host -23 crypto CESA (crypto engine) -25 tdm Time Division Mplx -28 ddr DDR Cntrl -30 sata1 SATA Host 0 - -The following is a list of provided IDs for Armada 375: -ID Clock Peripheral ------------------------------------ -2 mu Management Unit -3 pp Packet Processor -4 ptp PTP -5 pex0 PCIe 0 Clock out -6 pex1 PCIe 1 Clock out -8 audio Audio Cntrl -11 nd_clk Nand Flash Cntrl -14 sata0_link SATA 0 Link -15 sata0_core SATA 0 Core -16 usb3 USB3 Host -17 sdio SDHCI Host -18 usb USB Host -19 gop Gigabit Ethernet MAC -20 sata1_link SATA 1 Link -21 sata1_core SATA 1 Core -22 xor0 XOR DMA 0 -23 xor1 XOR DMA 0 -24 copro Coprocessor -25 tdm Time Division Mplx -28 crypto0_enc Cryptographic Unit Port 0 Encryption -29 crypto0_core Cryptographic Unit Port 0 Core -30 crypto1_enc Cryptographic Unit Port 1 Encryption -31 crypto1_core Cryptographic Unit Port 1 Core - -The following is a list of provided IDs for Armada 380/385: -ID Clock Peripheral ------------------------------------ -0 audio Audio -2 ge2 Gigabit Ethernet 2 -3 ge1 Gigabit Ethernet 1 -4 ge0 Gigabit Ethernet 0 -5 pex1 PCIe 1 -6 pex2 PCIe 2 -7 pex3 PCIe 3 -8 pex0 PCIe 0 -9 usb3h0 USB3 Host 0 -10 usb3h1 USB3 Host 1 -11 usb3d USB3 Device -13 bm Buffer Management -14 crypto0z Cryptographic 0 Z -15 sata0 SATA 0 -16 crypto1z Cryptographic 1 Z -17 sdio SDIO -18 usb2 USB 2 -21 crypto1 Cryptographic 1 -22 xor0 XOR 0 -23 crypto0 Cryptographic 0 -25 tdm Time Division Multiplexing -28 xor1 XOR 1 -30 sata1 SATA 1 - -The following is a list of provided IDs for Armada 39x: -ID Clock Peripheral ------------------------------------ -5 pex1 PCIe 1 -6 pex2 PCIe 2 -7 pex3 PCIe 3 -8 pex0 PCIe 0 -9 usb3h0 USB3 Host 0 -10 usb3h1 USB3 Host 1 -15 sata0 SATA 0 -17 sdio SDIO -22 xor0 XOR 0 -28 xor1 XOR 1 - -The following is a list of provided IDs for Armada XP: -ID Clock Peripheral ------------------------------------ -0 audio Audio Cntrl -1 ge3 Gigabit Ethernet 3 -2 ge2 Gigabit Ethernet 2 -3 ge1 Gigabit Ethernet 1 -4 ge0 Gigabit Ethernet 0 -5 pex0 PCIe Cntrl 0 -6 pex1 PCIe Cntrl 1 -7 pex2 PCIe Cntrl 2 -8 pex3 PCIe Cntrl 3 -13 bp -14 sata0lnk -15 sata0 SATA Host 0 -16 lcd LCD Cntrl -17 sdio SDHCI Host -18 usb0 USB Host 0 -19 usb1 USB Host 1 -20 usb2 USB Host 2 -22 xor0 XOR DMA 0 -23 crypto CESA engine -25 tdm Time Division Mplx -28 xor1 XOR DMA 1 -29 sata1lnk -30 sata1 SATA Host 1 - -The following is a list of provided IDs for 98dx3236: -ID Clock Peripheral ------------------------------------ -3 ge1 Gigabit Ethernet 1 -4 ge0 Gigabit Ethernet 0 -5 pex0 PCIe Cntrl 0 -17 sdio SDHCI Host -18 usb0 USB Host 0 -22 xor0 XOR DMA 0 - -The following is a list of provided IDs for Dove: -ID Clock Peripheral ------------------------------------ -0 usb0 USB Host 0 -1 usb1 USB Host 1 -2 ge Gigabit Ethernet -3 sata SATA Host -4 pex0 PCIe Cntrl 0 -5 pex1 PCIe Cntrl 1 -8 sdio0 SDHCI Host 0 -9 sdio1 SDHCI Host 1 -10 nand NAND Cntrl -11 camera Camera Cntrl -12 i2s0 I2S Cntrl 0 -13 i2s1 I2S Cntrl 1 -15 crypto CESA engine -21 ac97 AC97 Cntrl -22 pdma Peripheral DMA -23 xor0 XOR DMA 0 -24 xor1 XOR DMA 1 -30 gephy Gigabit Ethernel PHY -Note: gephy(30) is implemented as a parent clock of ge(2) - -The following is a list of provided IDs for Kirkwood: -ID Clock Peripheral ------------------------------------ -0 ge0 Gigabit Ethernet 0 -2 pex0 PCIe Cntrl 0 -3 usb0 USB Host 0 -4 sdio SDIO Cntrl -5 tsu Transp. Stream Unit -6 dunit SDRAM Cntrl -7 runit Runit -8 xor0 XOR DMA 0 -9 audio I2S Cntrl 0 -14 sata0 SATA Host 0 -15 sata1 SATA Host 1 -16 xor1 XOR DMA 1 -17 crypto CESA engine -18 pex1 PCIe Cntrl 1 -19 ge1 Gigabit Ethernet 1 -20 tdm Time Division Mplx - -Required properties: -- compatible : shall be one of the following: - "marvell,armada-370-gating-clock" - for Armada 370 SoC clock gating - "marvell,armada-375-gating-clock" - for Armada 375 SoC clock gating - "marvell,armada-380-gating-clock" - for Armada 380/385 SoC clock gating - "marvell,armada-390-gating-clock" - for Armada 39x SoC clock gating - "marvell,armada-xp-gating-clock" - for Armada XP SoC clock gating - "marvell,mv98dx3236-gating-clock" - for 98dx3236 SoC clock gating - "marvell,dove-gating-clock" - for Dove SoC clock gating - "marvell,kirkwood-gating-clock" - for Kirkwood SoC clock gating -- reg : shall be the register address of the Clock Gating Control register -- #clock-cells : from common clock binding; shall be set to 1 - -Optional properties: -- clocks : default parent clock phandle (e.g. tclk) - -Example: - -gate_clk: clock-gating-control@d0038 { - compatible = "marvell,dove-gating-clock"; - reg = <0xd0038 0x4>; - /* default parent clock is tclk */ - clocks = <&core_clk 0>; - #clock-cells = <1>; -}; - -sdio0: sdio@92000 { - compatible = "marvell,dove-sdhci"; - /* get clk gate bit 8 (sdio0) */ - clocks = <&gate_clk 8>; -}; -- 2.37.2 ^ permalink raw reply related [flat|nested] 27+ messages in thread
* Re: [PATCH 00/11] Start converting MVEBU bindings to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (10 preceding siblings ...) 2022-08-20 19:48 ` [PATCH 11/11] DT: clock: Convert mvebu-gated-clock.txt " Andrew Lunn @ 2022-08-22 13:49 ` Rob Herring 2022-08-22 13:53 ` Rob Herring 12 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-22 13:49 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, Aug 20, 2022 at 09:47:53PM +0200, Andrew Lunn wrote: > This is the first batch of patches converting the Marvell MVEBU driver > bindings from .txt to .yaml. So far, kirkwood has been used for > testing, but these drivers apply to a range of Marvell SoCs. > > In order to reduce the number of warnings from the DT schema checking > tools, a few minor changes have been made to a few DT files. No actual > errors have been found, the changes just make the checker quiet. > > Andrew Lunn (11): > DT: RTC: orion-rtc: Convert to YAML > DT: thermal: marvell,kirkwood-thermal: Convert to YAML > DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML > DT: USB: Convert ehci-orion to YAML > DT: watchdog: Convert marvel.txt to YAML > arm: DT: kirkwood/orion5: Rename watchdog node > DT: nand-controller: Reflect reality of marvell,orion-nand > DT: mtd: Convert orion-nand to YAML > arm: DT: kirkwood.dtsi: Rename nand to nand-controller > DT: timer: Convert marvell,orion-timer.txt to YAML > DT: clock: Convert mvebu-gated-clock.txt to YAML Please follow naming conventions of the subsystem for the subject. s/^DT/dt-bindings/ s/YAML/DT schema/ Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 00/11] Start converting MVEBU bindings to YAML 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn ` (11 preceding siblings ...) 2022-08-22 13:49 ` [PATCH 00/11] Start converting MVEBU bindings " Rob Herring @ 2022-08-22 13:53 ` Rob Herring 2022-08-22 14:28 ` Andrew Lunn 12 siblings, 1 reply; 27+ messages in thread From: Rob Herring @ 2022-08-22 13:53 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Sat, Aug 20, 2022 at 09:47:53PM +0200, Andrew Lunn wrote: > This is the first batch of patches converting the Marvell MVEBU driver > bindings from .txt to .yaml. So far, kirkwood has been used for > testing, but these drivers apply to a range of Marvell SoCs. > > In order to reduce the number of warnings from the DT schema checking > tools, a few minor changes have been made to a few DT files. No actual > errors have been found, the changes just make the checker quiet. > > Andrew Lunn (11): > DT: RTC: orion-rtc: Convert to YAML > DT: thermal: marvell,kirkwood-thermal: Convert to YAML > DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML > DT: USB: Convert ehci-orion to YAML > DT: watchdog: Convert marvel.txt to YAML > arm: DT: kirkwood/orion5: Rename watchdog node > DT: nand-controller: Reflect reality of marvell,orion-nand > DT: mtd: Convert orion-nand to YAML > arm: DT: kirkwood.dtsi: Rename nand to nand-controller > DT: timer: Convert marvell,orion-timer.txt to YAML > DT: clock: Convert mvebu-gated-clock.txt to YAML Also, there's not any dependency between most of these patches and they all go thru different subsystems, so no need for this to be 1 series. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 00/11] Start converting MVEBU bindings to YAML 2022-08-22 13:53 ` Rob Herring @ 2022-08-22 14:28 ` Andrew Lunn 2022-08-30 18:58 ` Rob Herring 0 siblings, 1 reply; 27+ messages in thread From: Andrew Lunn @ 2022-08-22 14:28 UTC (permalink / raw) To: Rob Herring; +Cc: Gregory Clement, arm-soc, Device Tree On Mon, Aug 22, 2022 at 08:53:23AM -0500, Rob Herring wrote: > On Sat, Aug 20, 2022 at 09:47:53PM +0200, Andrew Lunn wrote: > > This is the first batch of patches converting the Marvell MVEBU driver > > bindings from .txt to .yaml. So far, kirkwood has been used for > > testing, but these drivers apply to a range of Marvell SoCs. > > > > In order to reduce the number of warnings from the DT schema checking > > tools, a few minor changes have been made to a few DT files. No actual > > errors have been found, the changes just make the checker quiet. > > > > Andrew Lunn (11): > > DT: RTC: orion-rtc: Convert to YAML > > DT: thermal: marvell,kirkwood-thermal: Convert to YAML > > DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML > > DT: USB: Convert ehci-orion to YAML > > DT: watchdog: Convert marvel.txt to YAML > > arm: DT: kirkwood/orion5: Rename watchdog node > > DT: nand-controller: Reflect reality of marvell,orion-nand > > DT: mtd: Convert orion-nand to YAML > > arm: DT: kirkwood.dtsi: Rename nand to nand-controller > > DT: timer: Convert marvell,orion-timer.txt to YAML > > DT: clock: Convert mvebu-gated-clock.txt to YAML > > Also, there's not any dependency between most of these patches and they > all go thru different subsystems, so no need for this to be 1 series. My intention was for them all to go through mvebu, to arm-soc and in. That is how all these .txt files got merged many years ago. There is one exception that i know of, somewhere in a later series i convert the PCI controller. There is conflicting change being made, so i plan to submit that one via the PCI Maintainer to solve the conflict. Andrew ^ permalink raw reply [flat|nested] 27+ messages in thread
* Re: [PATCH 00/11] Start converting MVEBU bindings to YAML 2022-08-22 14:28 ` Andrew Lunn @ 2022-08-30 18:58 ` Rob Herring 0 siblings, 0 replies; 27+ messages in thread From: Rob Herring @ 2022-08-30 18:58 UTC (permalink / raw) To: Andrew Lunn; +Cc: Gregory Clement, arm-soc, Device Tree On Mon, Aug 22, 2022 at 9:29 AM Andrew Lunn <andrew@lunn.ch> wrote: > > On Mon, Aug 22, 2022 at 08:53:23AM -0500, Rob Herring wrote: > > On Sat, Aug 20, 2022 at 09:47:53PM +0200, Andrew Lunn wrote: > > > This is the first batch of patches converting the Marvell MVEBU driver > > > bindings from .txt to .yaml. So far, kirkwood has been used for > > > testing, but these drivers apply to a range of Marvell SoCs. > > > > > > In order to reduce the number of warnings from the DT schema checking > > > tools, a few minor changes have been made to a few DT files. No actual > > > errors have been found, the changes just make the checker quiet. > > > > > > Andrew Lunn (11): > > > DT: RTC: orion-rtc: Convert to YAML > > > DT: thermal: marvell,kirkwood-thermal: Convert to YAML > > > DT: pinctrl: Convert marvell,kirkwood-pintctrl to YAML > > > DT: USB: Convert ehci-orion to YAML > > > DT: watchdog: Convert marvel.txt to YAML > > > arm: DT: kirkwood/orion5: Rename watchdog node > > > DT: nand-controller: Reflect reality of marvell,orion-nand > > > DT: mtd: Convert orion-nand to YAML > > > arm: DT: kirkwood.dtsi: Rename nand to nand-controller > > > DT: timer: Convert marvell,orion-timer.txt to YAML > > > DT: clock: Convert mvebu-gated-clock.txt to YAML > > > > Also, there's not any dependency between most of these patches and they > > all go thru different subsystems, so no need for this to be 1 series. > > My intention was for them all to go through mvebu, to arm-soc and in. > That is how all these .txt files got merged many years ago. Yes, that did happen some, but the documented path in for bindings is via subsystem maintainers (with the driver for new bindings). The 2nd preference is the DT tree as I'm about the only one testing (or continuously testing) the schemas. Rob ^ permalink raw reply [flat|nested] 27+ messages in thread
end of thread, other threads:[~2022-08-30 18:58 UTC | newest] Thread overview: 27+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2022-08-20 19:47 [PATCH 00/11] Start converting MVEBU bindings to YAML Andrew Lunn 2022-08-20 19:47 ` [PATCH 01/11] DT: RTC: orion-rtc: Convert " Andrew Lunn 2022-08-22 20:49 ` Rob Herring 2022-08-22 20:55 ` Rob Herring 2022-08-20 19:47 ` [PATCH 02/11] DT: thermal: marvell,kirkwood-thermal: " Andrew Lunn 2022-08-20 19:47 ` [PATCH 03/11] DT: pinctrl: Convert marvell,kirkwood-pintctrl " Andrew Lunn 2022-08-22 21:16 ` Rob Herring 2022-08-20 19:47 ` [PATCH 04/11] DT: USB: Convert ehci-orion " Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:47 ` [PATCH 05/11] DT: watchdog: Convert marvel.txt " Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-22 0:20 ` Andrew Lunn 2022-08-22 13:47 ` Rob Herring 2022-08-20 19:47 ` [PATCH 06/11] arm: DT: kirkwood/orion5: Rename watchdog node Andrew Lunn 2022-08-20 19:48 ` [PATCH 07/11] DT: nand-controller: Reflect reality of marvell,orion-nand Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-20 19:48 ` [PATCH 08/11] DT: mtd: Convert orion-nand to YAML Andrew Lunn 2022-08-21 20:21 ` Rob Herring 2022-08-22 0:48 ` Andrew Lunn 2022-08-22 13:43 ` Rob Herring 2022-08-20 19:48 ` [PATCH 09/11] arm: DT: kirkwood.dtsi: Rename nand to nand-controller Andrew Lunn 2022-08-20 19:48 ` [PATCH 10/11] DT: timer: Convert marvell,orion-timer.txt to YAML Andrew Lunn 2022-08-20 19:48 ` [PATCH 11/11] DT: clock: Convert mvebu-gated-clock.txt " Andrew Lunn 2022-08-22 13:49 ` [PATCH 00/11] Start converting MVEBU bindings " Rob Herring 2022-08-22 13:53 ` Rob Herring 2022-08-22 14:28 ` Andrew Lunn 2022-08-30 18:58 ` Rob Herring
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