* [PATCH v3 0/9] dt-bindings: display/msm: rework MDSS and DPU bindings
@ 2022-08-22 20:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:17 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Create separate YAML schema for MDSS devicesd$ (both for MDP5 and DPU
devices). Cleanup DPU schema files, so that they do not contain schema
for both MDSS and DPU nodes. Apply misc small fixes to the DPU schema
afterwards.
Changes since v2:
- Added a patch to allow opp-table under the dpu* nodes.
- Removed the c&p issue which allowed the @0 nodes under the MDSS
device node.
Changes since v1:
- Renamed DPU device nodes from mdp@ to display-controller@
- Described removal of mistakenly mentioned "lut" clock
- Switched mdss.yaml to use $ref instead of fixing compatible strings
- Dropped mdp-opp-table description (renamed by Krzysztof in his
patchset)
- Reworked DPU's ports definitions. Dropped description of individual
ports, left only /ports $ref and description in dpu-common.yaml.
Dmitry Baryshkov (9):
dt-bindings: display/msm: split qcom,mdss bindings
dt-bindings: display/msm: move qcom,sdm845-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,sc7180-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,sc7280-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,qcm2290-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,msm8998-mdss schema to mdss.yaml
dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845
dt-bindings: display/msm: move common DPU properties to
dpu-common.yaml
dt-bindings: display/msm/dpu-common: add opp-table property
.../bindings/display/msm/dpu-common.yaml | 45 +++
.../bindings/display/msm/dpu-msm8998.yaml | 139 +------
.../bindings/display/msm/dpu-qcm2290.yaml | 143 +------
.../bindings/display/msm/dpu-sc7180.yaml | 148 +------
.../bindings/display/msm/dpu-sc7280.yaml | 147 +------
.../bindings/display/msm/dpu-sdm845.yaml | 139 +------
.../devicetree/bindings/display/msm/mdp5.txt | 30 +-
.../devicetree/bindings/display/msm/mdss.yaml | 361 ++++++++++++++++++
8 files changed, 508 insertions(+), 644 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml
--
2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 0/9] dt-bindings: display/msm: rework MDSS and DPU bindings
@ 2022-08-22 20:17 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:17 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Create separate YAML schema for MDSS devicesd$ (both for MDP5 and DPU
devices). Cleanup DPU schema files, so that they do not contain schema
for both MDSS and DPU nodes. Apply misc small fixes to the DPU schema
afterwards.
Changes since v2:
- Added a patch to allow opp-table under the dpu* nodes.
- Removed the c&p issue which allowed the @0 nodes under the MDSS
device node.
Changes since v1:
- Renamed DPU device nodes from mdp@ to display-controller@
- Described removal of mistakenly mentioned "lut" clock
- Switched mdss.yaml to use $ref instead of fixing compatible strings
- Dropped mdp-opp-table description (renamed by Krzysztof in his
patchset)
- Reworked DPU's ports definitions. Dropped description of individual
ports, left only /ports $ref and description in dpu-common.yaml.
Dmitry Baryshkov (9):
dt-bindings: display/msm: split qcom,mdss bindings
dt-bindings: display/msm: move qcom,sdm845-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,sc7180-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,sc7280-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,qcm2290-mdss schema to mdss.yaml
dt-bindings: display/msm: move qcom,msm8998-mdss schema to mdss.yaml
dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845
dt-bindings: display/msm: move common DPU properties to
dpu-common.yaml
dt-bindings: display/msm/dpu-common: add opp-table property
.../bindings/display/msm/dpu-common.yaml | 45 +++
.../bindings/display/msm/dpu-msm8998.yaml | 139 +------
.../bindings/display/msm/dpu-qcm2290.yaml | 143 +------
.../bindings/display/msm/dpu-sc7180.yaml | 148 +------
.../bindings/display/msm/dpu-sc7280.yaml | 147 +------
.../bindings/display/msm/dpu-sdm845.yaml | 139 +------
.../devicetree/bindings/display/msm/mdp5.txt | 30 +-
.../devicetree/bindings/display/msm/mdss.yaml | 361 ++++++++++++++++++
8 files changed, 508 insertions(+), 644 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml
--
2.35.1
^ permalink raw reply [flat|nested] 20+ messages in thread
* [PATCH v3 1/9] dt-bindings: display/msm: split qcom,mdss bindings
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Split Mobile Display SubSystem (MDSS) root node bindings to the separate
yaml file. Changes to the existing (txt) schema:
- Added optional "vbif_nrt_phys" region used by msm8996
- Made "bus" and "vsync" clocks optional (they are not used by some
platforms)
- Added (optional) "core" clock added recently to the mdss driver
- Added optional resets property referencing MDSS reset
- Defined child nodes pointing to corresponding reference schema.
- Dropped the "lut" clock. It was added to the schema by mistake (it is
a part of mdp4 schema, not the mdss).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/mdp5.txt | 30 +---
.../devicetree/bindings/display/msm/mdss.yaml | 161 ++++++++++++++++++
2 files changed, 162 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt
index 43d11279c925..65d03c58dee6 100644
--- a/Documentation/devicetree/bindings/display/msm/mdp5.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt
@@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller
Description:
-This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
-encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
+This is the bindings documentation for the MDP5 display
controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996.
-MDSS:
-Required properties:
-- compatible:
- * "qcom,mdss" - MDSS
-- reg: Physical base address and length of the controller's registers.
-- reg-names: The names of register regions. The following regions are required:
- * "mdss_phys"
- * "vbif_phys"
-- interrupts: The interrupt signal from MDSS.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: specifies the number of cells needed to encode an interrupt
- source, should be 1.
-- power-domains: a power domain consumer specifier according to
- Documentation/devicetree/bindings/power/power_domain.txt
-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.
-- clock-names: the following clocks are required.
- * "iface"
- * "bus"
- * "vsync"
-- #address-cells: number of address cells for the MDSS children. Should be 1.
-- #size-cells: Should be 1.
-- ranges: parent bus address space is the same as the child bus address space.
-
-Optional properties:
-- clock-names: the following clocks are optional:
- * "lut"
-
MDP5:
Required properties:
- compatible:
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
new file mode 100644
index 000000000000..6a8ec8310f6f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Mobile Display SubSystem (MDSS)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
+ encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
+
+properties:
+ compatible:
+ enum:
+ - qcom,mdss
+
+ reg:
+ minItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller:
+ true
+
+ "#interrupt-cells":
+ const: 1
+
+ power-domains:
+ maxItems: 1
+ description: |
+ The MDSS power domain provided by GCC
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges:
+ true
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+oneOf:
+ - properties:
+ clocks:
+ minItems: 3
+ maxItems: 4
+
+ clock-names:
+ minItems: 3
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+ - const: core
+ - properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: core
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - power-domains
+ - clocks
+ - clock-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+patternProperties:
+ "^mdp@[1-9a-f][0-9a-f]*$":
+ type: object
+ # TODO: add reference once the mdp5 is converted
+
+ "^dsi@[1-9a-f][0-9a-f]*$":
+ $ref: dsi-controller-main.yaml#
+
+ "^dsi-phy@[1-9a-f][0-9a-f]*$":
+ oneOf:
+ - $ref: dsi-phy-28nm.yaml#
+ - $ref: dsi-phy-20nm.yaml#
+ - $ref: dsi-phy-14nm.yaml#
+ - $ref: dsi-phy-10nm.yaml#
+ - $ref: dsi-phy-7nm.yaml#
+
+ "^hdmi-phy@[1-9a-f][0-9a-f]*$":
+ oneOf:
+ - $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml#
+ - $ref: /schemas/phy/qcom,hdmi-phy-other.yaml#
+
+ "^hdmi-tx@[1-9a-f][0-9a-f]*$":
+ $ref: hdmi.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8916.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mdss@1a00000 {
+ compatible = "qcom,mdss";
+ reg = <0x1a00000 0x1000>,
+ <0x1ac8000 0x3000>;
+ reg-names = "mdss_phys", "vbif_phys";
+
+ power-domains = <&gcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+ <&gcc GCC_MDSS_VSYNC_CLK>;
+ clock-names = "iface",
+ "bus",
+ "vsync";
+
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 1/9] dt-bindings: display/msm: split qcom,mdss bindings
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Split Mobile Display SubSystem (MDSS) root node bindings to the separate
yaml file. Changes to the existing (txt) schema:
- Added optional "vbif_nrt_phys" region used by msm8996
- Made "bus" and "vsync" clocks optional (they are not used by some
platforms)
- Added (optional) "core" clock added recently to the mdss driver
- Added optional resets property referencing MDSS reset
- Defined child nodes pointing to corresponding reference schema.
- Dropped the "lut" clock. It was added to the schema by mistake (it is
a part of mdp4 schema, not the mdss).
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/mdp5.txt | 30 +---
.../devicetree/bindings/display/msm/mdss.yaml | 161 ++++++++++++++++++
2 files changed, 162 insertions(+), 29 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/mdss.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/mdp5.txt b/Documentation/devicetree/bindings/display/msm/mdp5.txt
index 43d11279c925..65d03c58dee6 100644
--- a/Documentation/devicetree/bindings/display/msm/mdp5.txt
+++ b/Documentation/devicetree/bindings/display/msm/mdp5.txt
@@ -2,37 +2,9 @@ Qualcomm adreno/snapdragon MDP5 display controller
Description:
-This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
-encapsulates sub-blocks like MDP5, DSI, HDMI, eDP etc, and the MDP5 display
+This is the bindings documentation for the MDP5 display
controller found in SoCs like MSM8974, APQ8084, MSM8916, MSM8994 and MSM8996.
-MDSS:
-Required properties:
-- compatible:
- * "qcom,mdss" - MDSS
-- reg: Physical base address and length of the controller's registers.
-- reg-names: The names of register regions. The following regions are required:
- * "mdss_phys"
- * "vbif_phys"
-- interrupts: The interrupt signal from MDSS.
-- interrupt-controller: identifies the node as an interrupt controller.
-- #interrupt-cells: specifies the number of cells needed to encode an interrupt
- source, should be 1.
-- power-domains: a power domain consumer specifier according to
- Documentation/devicetree/bindings/power/power_domain.txt
-- clocks: device clocks. See ../clocks/clock-bindings.txt for details.
-- clock-names: the following clocks are required.
- * "iface"
- * "bus"
- * "vsync"
-- #address-cells: number of address cells for the MDSS children. Should be 1.
-- #size-cells: Should be 1.
-- ranges: parent bus address space is the same as the child bus address space.
-
-Optional properties:
-- clock-names: the following clocks are optional:
- * "lut"
-
MDP5:
Required properties:
- compatible:
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
new file mode 100644
index 000000000000..6a8ec8310f6f
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -0,0 +1,161 @@
+# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/mdss.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Mobile Display SubSystem (MDSS)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Rob Clark <robdclark@gmail.com>
+
+description:
+ This is the bindings documentation for the Mobile Display Subsytem(MDSS) that
+ encapsulates sub-blocks like MDP5, DSI, HDMI, eDP, etc.
+
+properties:
+ compatible:
+ enum:
+ - qcom,mdss
+
+ reg:
+ minItems: 2
+ maxItems: 3
+
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller:
+ true
+
+ "#interrupt-cells":
+ const: 1
+
+ power-domains:
+ maxItems: 1
+ description: |
+ The MDSS power domain provided by GCC
+
+ clocks:
+ minItems: 1
+ maxItems: 4
+
+ clock-names:
+ minItems: 1
+ maxItems: 4
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges:
+ true
+
+ resets:
+ items:
+ - description: MDSS_CORE reset
+
+oneOf:
+ - properties:
+ clocks:
+ minItems: 3
+ maxItems: 4
+
+ clock-names:
+ minItems: 3
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+ - const: core
+ - properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: core
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - power-domains
+ - clocks
+ - clock-names
+ - "#address-cells"
+ - "#size-cells"
+ - ranges
+
+patternProperties:
+ "^mdp@[1-9a-f][0-9a-f]*$":
+ type: object
+ # TODO: add reference once the mdp5 is converted
+
+ "^dsi@[1-9a-f][0-9a-f]*$":
+ $ref: dsi-controller-main.yaml#
+
+ "^dsi-phy@[1-9a-f][0-9a-f]*$":
+ oneOf:
+ - $ref: dsi-phy-28nm.yaml#
+ - $ref: dsi-phy-20nm.yaml#
+ - $ref: dsi-phy-14nm.yaml#
+ - $ref: dsi-phy-10nm.yaml#
+ - $ref: dsi-phy-7nm.yaml#
+
+ "^hdmi-phy@[1-9a-f][0-9a-f]*$":
+ oneOf:
+ - $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml#
+ - $ref: /schemas/phy/qcom,hdmi-phy-other.yaml#
+
+ "^hdmi-tx@[1-9a-f][0-9a-f]*$":
+ $ref: hdmi.yaml#
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/qcom,gcc-msm8916.h>
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ mdss@1a00000 {
+ compatible = "qcom,mdss";
+ reg = <0x1a00000 0x1000>,
+ <0x1ac8000 0x3000>;
+ reg-names = "mdss_phys", "vbif_phys";
+
+ power-domains = <&gcc MDSS_GDSC>;
+
+ clocks = <&gcc GCC_MDSS_AHB_CLK>,
+ <&gcc GCC_MDSS_AXI_CLK>,
+ <&gcc GCC_MDSS_VSYNC_CLK>;
+ clock-names = "iface",
+ "bus",
+ "vsync";
+
+ interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ };
+...
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 2/9] dt-bindings: display/msm: move qcom,sdm845-mdss schema to mdss.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Move schema for qcom,sdm845-mdss from dpu-sdm845.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sdm845.yaml | 135 ++++-----------
.../devicetree/bindings/display/msm/mdss.yaml | 156 ++++++++++++++----
2 files changed, 160 insertions(+), 131 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 2bb8896beffc..2074e954372f 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -10,139 +10,74 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SDM845 target.
+ Device tree bindings for the DPU display controller for SDM845 target.
properties:
compatible:
items:
- - const: qcom,sdm845-mdss
+ - const: qcom,sdm845-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
+ - description: Display ahb clock
+ - description: Display axi clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
- const: iface
+ - const: bus
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
-
- resets:
- items:
- - description: MDSS_CORE reset
+ power-domains:
+ maxItems: 1
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ operating-points-v2: true
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,sdm845-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF2 (DSI2)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
+ - port@1
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 6a8ec8310f6f..db36c54d6106 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,18 +17,16 @@ description:
properties:
compatible:
enum:
+ - qcom,sdm845-mdss
- qcom,mdss
reg:
- minItems: 2
+ minItems: 1
maxItems: 3
reg-names:
- minItems: 2
- items:
- - const: mdss_phys
- - const: vbif_phys
- - const: vbif_nrt_phys
+ minItems: 1
+ maxItems: 3
interrupts:
maxItems: 1
@@ -53,10 +51,10 @@ properties:
maxItems: 4
"#address-cells":
- const: 1
+ enum: [1, 2]
"#size-cells":
- const: 1
+ enum: [1, 2]
ranges:
true
@@ -65,29 +63,99 @@ properties:
items:
- description: MDSS_CORE reset
-oneOf:
- - properties:
- clocks:
- minItems: 3
- maxItems: 4
-
- clock-names:
- minItems: 3
- items:
- - const: iface
- - const: bus
- - const: vsync
- - const: core
- - properties:
- clocks:
- minItems: 1
- maxItems: 2
-
- clock-names:
- minItems: 1
- items:
- - const: iface
- - const: core
+ interconnects:
+ minItems: 2
+ items:
+ - description: MDP port 0
+ - description: MDP port 1
+ - description: Rotator
+
+ interconnect-names:
+ minItems: 2
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+ - const: rotator-mem
+
+ iommus:
+ items:
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,mdss
+ then:
+ properties:
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+ oneOf:
+ - properties:
+ clocks:
+ minItems: 3
+ maxItems: 4
+
+ clock-names:
+ minItems: 3
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+ - const: core
+ - properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: core
+ else:
+ properties:
+ regs:
+ maxItems: 1
+
+ reg-names:
+ items:
+ - const: mdss
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+ required:
+ - iommus
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,sdm845-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: core
+
+ iommus:
+ minItems: 2
required:
- compatible
@@ -108,6 +176,9 @@ patternProperties:
type: object
# TODO: add reference once the mdp5 is converted
+ "^display-controller@[1-9a-f][0-9a-f]*$":
+ $ref: dpu-sdm845.yaml
+
"^dsi@[1-9a-f][0-9a-f]*$":
$ref: dsi-controller-main.yaml#
@@ -158,4 +229,27 @@ examples:
ranges;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sdm845-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&gcc 19>,
+ <&dispcc 12>;
+ clock-names = "iface", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x880 0x8>,
+ <&apps_smmu 0xc80 0x8>;
+ ranges;
+ };
...
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 2/9] dt-bindings: display/msm: move qcom, sdm845-mdss schema to mdss.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move schema for qcom,sdm845-mdss from dpu-sdm845.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sdm845.yaml | 135 ++++-----------
.../devicetree/bindings/display/msm/mdss.yaml | 156 ++++++++++++++----
2 files changed, 160 insertions(+), 131 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 2bb8896beffc..2074e954372f 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -10,139 +10,74 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SDM845 target.
+ Device tree bindings for the DPU display controller for SDM845 target.
properties:
compatible:
items:
- - const: qcom,sdm845-mdss
+ - const: qcom,sdm845-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
+ - description: Display ahb clock
+ - description: Display axi clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
- const: iface
+ - const: bus
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
-
- resets:
- items:
- - description: MDSS_CORE reset
+ power-domains:
+ maxItems: 1
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ operating-points-v2: true
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,sdm845-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF2 (DSI2)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
+ - port@1
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 6a8ec8310f6f..db36c54d6106 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,18 +17,16 @@ description:
properties:
compatible:
enum:
+ - qcom,sdm845-mdss
- qcom,mdss
reg:
- minItems: 2
+ minItems: 1
maxItems: 3
reg-names:
- minItems: 2
- items:
- - const: mdss_phys
- - const: vbif_phys
- - const: vbif_nrt_phys
+ minItems: 1
+ maxItems: 3
interrupts:
maxItems: 1
@@ -53,10 +51,10 @@ properties:
maxItems: 4
"#address-cells":
- const: 1
+ enum: [1, 2]
"#size-cells":
- const: 1
+ enum: [1, 2]
ranges:
true
@@ -65,29 +63,99 @@ properties:
items:
- description: MDSS_CORE reset
-oneOf:
- - properties:
- clocks:
- minItems: 3
- maxItems: 4
-
- clock-names:
- minItems: 3
- items:
- - const: iface
- - const: bus
- - const: vsync
- - const: core
- - properties:
- clocks:
- minItems: 1
- maxItems: 2
-
- clock-names:
- minItems: 1
- items:
- - const: iface
- - const: core
+ interconnects:
+ minItems: 2
+ items:
+ - description: MDP port 0
+ - description: MDP port 1
+ - description: Rotator
+
+ interconnect-names:
+ minItems: 2
+ items:
+ - const: mdp0-mem
+ - const: mdp1-mem
+ - const: rotator-mem
+
+ iommus:
+ items:
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
+ - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
+
+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,mdss
+ then:
+ properties:
+ reg-names:
+ minItems: 2
+ items:
+ - const: mdss_phys
+ - const: vbif_phys
+ - const: vbif_nrt_phys
+ oneOf:
+ - properties:
+ clocks:
+ minItems: 3
+ maxItems: 4
+
+ clock-names:
+ minItems: 3
+ items:
+ - const: iface
+ - const: bus
+ - const: vsync
+ - const: core
+ - properties:
+ clocks:
+ minItems: 1
+ maxItems: 2
+
+ clock-names:
+ minItems: 1
+ items:
+ - const: iface
+ - const: core
+ else:
+ properties:
+ regs:
+ maxItems: 1
+
+ reg-names:
+ items:
+ - const: mdss
+
+ interconnects:
+ maxItems: 2
+
+ interconnect-names:
+ maxItems: 2
+
+ required:
+ - iommus
+
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,sdm845-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: core
+
+ iommus:
+ minItems: 2
required:
- compatible
@@ -108,6 +176,9 @@ patternProperties:
type: object
# TODO: add reference once the mdp5 is converted
+ "^display-controller@[1-9a-f][0-9a-f]*$":
+ $ref: dpu-sdm845.yaml
+
"^dsi@[1-9a-f][0-9a-f]*$":
$ref: dsi-controller-main.yaml#
@@ -158,4 +229,27 @@ examples:
ranges;
};
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/power/qcom-rpmpd.h>
+ display-subsystem@ae00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,sdm845-mdss";
+ reg = <0x0ae00000 0x1000>;
+ reg-names = "mdss";
+ power-domains = <&dispcc MDSS_GDSC>;
+
+ clocks = <&gcc 19>,
+ <&dispcc 12>;
+ clock-names = "iface", "core";
+
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ iommus = <&apps_smmu 0x880 0x8>,
+ <&apps_smmu 0xc80 0x8>;
+ ranges;
+ };
...
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 3/9] dt-bindings: display/msm: move qcom,sc7180-mdss schema to mdss.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7180.yaml | 149 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 45 +++++-
2 files changed, 80 insertions(+), 114 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index d3c3e4b07897..9d4ec0b60c25 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -10,151 +10,78 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7180 target.
+ Device tree bindings for the DPU display controller for SC7180 target.
properties:
compatible:
items:
- - const: qcom,sc7180-mdss
+ - const: qcom,sc7180-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
+ - description: Display hf axi clock
+ - description: Display ahb clock
+ - description: Display rotator clock
+ - description: Display lut clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
+ - const: bus
- const: iface
- - const: ahb
+ - const: rot
+ - const: lut
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,sc7180-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display ahb clock
- - description: Display rotator clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: rot
- - const: lut
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF0 (DP)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index db36c54d6106..ef1a4b1f7949 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,sc7180-mdss
- qcom,sdm845-mdss
- qcom,mdss
@@ -64,20 +65,21 @@ properties:
- description: MDSS_CORE reset
interconnects:
- minItems: 2
+ minItems: 1
items:
- description: MDP port 0
- description: MDP port 1
- description: Rotator
interconnect-names:
- minItems: 2
+ minItems: 1
items:
- const: mdp0-mem
- const: mdp1-mem
- const: rotator-mem
iommus:
+ minItems: 1
items:
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
@@ -129,9 +131,11 @@ allOf:
- const: mdss
interconnects:
+ minItems: 1
maxItems: 2
interconnect-names:
+ minItems: 1
maxItems: 2
required:
@@ -157,6 +161,29 @@ allOf:
iommus:
minItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7180-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -177,7 +204,19 @@ patternProperties:
# TODO: add reference once the mdp5 is converted
"^display-controller@[1-9a-f][0-9a-f]*$":
- $ref: dpu-sdm845.yaml
+ oneOf:
+ - $ref: dpu-sc7180.yaml
+ - $ref: dpu-sdm845.yaml
+
+ "^displayport-controller@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7180-dp
+ - qcom,sc7280-dp
+ - qcom,sc8180x-dp
+ - qcom,sm8350-dp
"^dsi@[1-9a-f][0-9a-f]*$":
$ref: dsi-controller-main.yaml#
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 3/9] dt-bindings: display/msm: move qcom, sc7180-mdss schema to mdss.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move schema for qcom,sc7180-mdss from dpu-sc7180.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7180.yaml | 149 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 45 +++++-
2 files changed, 80 insertions(+), 114 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index d3c3e4b07897..9d4ec0b60c25 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -10,151 +10,78 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7180 target.
+ Device tree bindings for the DPU display controller for SC7180 target.
properties:
compatible:
items:
- - const: qcom,sc7180-mdss
+ - const: qcom,sc7180-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
+ - description: Display hf axi clock
+ - description: Display ahb clock
+ - description: Display rotator clock
+ - description: Display lut clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
+ - const: bus
- const: iface
- - const: ahb
+ - const: rot
+ - const: lut
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,sc7180-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display ahb clock
- - description: Display rotator clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: rot
- - const: lut
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@2:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF0 (DP)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index db36c54d6106..ef1a4b1f7949 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,sc7180-mdss
- qcom,sdm845-mdss
- qcom,mdss
@@ -64,20 +65,21 @@ properties:
- description: MDSS_CORE reset
interconnects:
- minItems: 2
+ minItems: 1
items:
- description: MDP port 0
- description: MDP port 1
- description: Rotator
interconnect-names:
- minItems: 2
+ minItems: 1
items:
- const: mdp0-mem
- const: mdp1-mem
- const: rotator-mem
iommus:
+ minItems: 1
items:
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
@@ -129,9 +131,11 @@ allOf:
- const: mdss
interconnects:
+ minItems: 1
maxItems: 2
interconnect-names:
+ minItems: 1
maxItems: 2
required:
@@ -157,6 +161,29 @@ allOf:
iommus:
minItems: 2
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,sc7180-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: ahb
+ - const: core
+
+ iommus:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -177,7 +204,19 @@ patternProperties:
# TODO: add reference once the mdp5 is converted
"^display-controller@[1-9a-f][0-9a-f]*$":
- $ref: dpu-sdm845.yaml
+ oneOf:
+ - $ref: dpu-sc7180.yaml
+ - $ref: dpu-sdm845.yaml
+
+ "^displayport-controller@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7180-dp
+ - qcom,sc7280-dp
+ - qcom,sc8180x-dp
+ - qcom,sm8350-dp
"^dsi@[1-9a-f][0-9a-f]*$":
$ref: dsi-controller-main.yaml#
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 4/9] dt-bindings: display/msm: move qcom,sc7280-mdss schema to mdss.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Move schema for qcom,sc7280-mdss from dpu-sc7280.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7280.yaml | 148 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 19 +++
2 files changed, 57 insertions(+), 110 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index f427eec3d3a4..349a454099ad 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -10,149 +10,77 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7280.
+ Device tree bindings for the DPU display controller for SC7280 target.
properties:
compatible:
- const: qcom,sc7280-mdss
+ const: qcom,sc7280-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
+ - const: bus
+ - const: nrt_bus
- const: iface
- - const: ahb
+ - const: lut
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- const: qcom,sc7280-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display sf axi clock
- - description: Display ahb clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: nrt_bus
- - const: iface
- - const: lut
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF5 (EDP)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index ef1a4b1f7949..25815acd37f3 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -18,6 +18,7 @@ properties:
compatible:
enum:
- qcom,sc7180-mdss
+ - qcom,sc7280-mdss
- qcom,sdm845-mdss
- qcom,mdss
@@ -167,6 +168,7 @@ allOf:
contains:
enum:
- qcom,sc7180-mdss
+ - qcom,sc7280-mdss
then:
properties:
clocks:
@@ -206,6 +208,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
- $ref: dpu-sc7180.yaml
+ - $ref: dpu-sc7280.yaml
- $ref: dpu-sdm845.yaml
"^displayport-controller@[1-9a-f][0-9a-f]*$":
@@ -229,6 +232,14 @@ patternProperties:
- $ref: dsi-phy-10nm.yaml#
- $ref: dsi-phy-7nm.yaml#
+ "^edp@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-edp
+ - qcom,sc8180x-edp
+
"^hdmi-phy@[1-9a-f][0-9a-f]*$":
oneOf:
- $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml#
@@ -237,6 +248,14 @@ patternProperties:
"^hdmi-tx@[1-9a-f][0-9a-f]*$":
$ref: hdmi.yaml#
+ "^phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-dsi-phy-7nm
+ - qcom,sc7280-edp-phy
+
additionalProperties: false
examples:
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 4/9] dt-bindings: display/msm: move qcom, sc7280-mdss schema to mdss.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move schema for qcom,sc7280-mdss from dpu-sc7280.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-sc7280.yaml | 148 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 19 +++
2 files changed, 57 insertions(+), 110 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index f427eec3d3a4..349a454099ad 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -10,149 +10,77 @@ maintainers:
- Krishna Manikandan <quic_mkrishn@quicinc.com>
description: |
- Device tree bindings for MSM Mobile Display Subsystem (MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for SC7280.
+ Device tree bindings for the DPU display controller for SC7280 target.
properties:
compatible:
- const: qcom,sc7280-mdss
+ const: qcom,sc7280-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AHB clock from dispcc
+ - description: Display hf axi clock
+ - description: Display sf axi clock
+ - description: Display ahb clock
+ - description: Display lut clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
+ - const: bus
+ - const: nrt_bus
- const: iface
- - const: ahb
+ - const: lut
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- const: qcom,sc7280-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display hf axi clock
- - description: Display sf axi clock
- - description: Display ahb clock
- - description: Display lut clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: bus
- - const: nrt_bus
- - const: iface
- - const: lut
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF5 (EDP)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index ef1a4b1f7949..25815acd37f3 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -18,6 +18,7 @@ properties:
compatible:
enum:
- qcom,sc7180-mdss
+ - qcom,sc7280-mdss
- qcom,sdm845-mdss
- qcom,mdss
@@ -167,6 +168,7 @@ allOf:
contains:
enum:
- qcom,sc7180-mdss
+ - qcom,sc7280-mdss
then:
properties:
clocks:
@@ -206,6 +208,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
- $ref: dpu-sc7180.yaml
+ - $ref: dpu-sc7280.yaml
- $ref: dpu-sdm845.yaml
"^displayport-controller@[1-9a-f][0-9a-f]*$":
@@ -229,6 +232,14 @@ patternProperties:
- $ref: dsi-phy-10nm.yaml#
- $ref: dsi-phy-7nm.yaml#
+ "^edp@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-edp
+ - qcom,sc8180x-edp
+
"^hdmi-phy@[1-9a-f][0-9a-f]*$":
oneOf:
- $ref: /schemas/phy/qcom,hdmi-phy-qmp.yaml#
@@ -237,6 +248,14 @@ patternProperties:
"^hdmi-tx@[1-9a-f][0-9a-f]*$":
$ref: hdmi.yaml#
+ "^phy@[1-9a-f][0-9a-f]*$":
+ type: object
+ properties:
+ compatible:
+ enum:
+ - qcom,sc7280-dsi-phy-7nm
+ - qcom,sc7280-edp-phy
+
additionalProperties: false
examples:
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 5/9] dt-bindings: display/msm: move qcom,qcm2290-mdss schema to mdss.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-qcm2290.yaml | 140 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 24 +++
2 files changed, 57 insertions(+), 107 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index 734d14de966d..8027319b1aad 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -10,146 +10,72 @@ maintainers:
- Loic Poulain <loic.poulain@linaro.org>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
- and DPU are mentioned for QCM2290 target.
+ Device tree bindings for the DPU display controller for QCM2290 target.
properties:
compatible:
items:
- - const: qcom,qcm2290-mdss
+ - const: qcom,qcm2290-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AXI clock
- - description: Display core clock
+ - description: Display AXI clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock from dispcc
+ - description: Display lut clock from dispcc
+ - description: Display vsync clock from dispcc
clock-names:
items:
- - const: iface
- const: bus
+ - const: iface
- const: core
+ - const: lut
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,qcm2290-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display AXI clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock from dispcc
- - description: Display lut clock from dispcc
- - description: Display vsync clock from dispcc
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: core
- - const: lut
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 25815acd37f3..8bb7525681de 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,qcm2290-mdss
- qcom,sc7180-mdss
- qcom,sc7280-mdss
- qcom,sdm845-mdss
@@ -142,6 +143,28 @@ allOf:
required:
- iommus
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,qcm2290-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ minItems: 2
+
- if:
properties:
compatible:
@@ -207,6 +230,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
+ - $ref: dpu-qcm2290.yaml
- $ref: dpu-sc7180.yaml
- $ref: dpu-sc7280.yaml
- $ref: dpu-sdm845.yaml
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 5/9] dt-bindings: display/msm: move qcom, qcm2290-mdss schema to mdss.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move schema for qcom,qcm2290-mdss from dpu-qcm2290.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-qcm2290.yaml | 140 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 24 +++
2 files changed, 57 insertions(+), 107 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index 734d14de966d..8027319b1aad 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -10,146 +10,72 @@ maintainers:
- Loic Poulain <loic.poulain@linaro.org>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller and DSI. Device tree bindings of MDSS
- and DPU are mentioned for QCM2290 target.
+ Device tree bindings for the DPU display controller for QCM2290 target.
properties:
compatible:
items:
- - const: qcom,qcm2290-mdss
+ - const: qcom,qcm2290-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: vbif
clocks:
items:
- - description: Display AHB clock from gcc
- - description: Display AXI clock
- - description: Display core clock
+ - description: Display AXI clock from gcc
+ - description: Display AHB clock from dispcc
+ - description: Display core clock from dispcc
+ - description: Display lut clock from dispcc
+ - description: Display vsync clock from dispcc
clock-names:
items:
- - const: iface
- const: bus
+ - const: iface
- const: core
+ - const: lut
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port1
-
- ranges: true
-
- interconnects:
- items:
- - description: Interconnect path specifying the port ids for data bus
-
- interconnect-names:
- const: mdp0-mem
+ power-domains:
+ maxItems: 1
- resets:
- items:
- - description: MDSS_CORE reset
+ operating-points-v2: true
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,qcm2290-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: vbif
-
- clocks:
- items:
- - description: Display AXI clock from gcc
- - description: Display AHB clock from dispcc
- - description: Display core clock from dispcc
- - description: Display lut clock from dispcc
- - description: Display vsync clock from dispcc
-
- clock-names:
- items:
- - const: bus
- - const: iface
- - const: core
- - const: lut
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 25815acd37f3..8bb7525681de 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,qcm2290-mdss
- qcom,sc7180-mdss
- qcom,sc7280-mdss
- qcom,sdm845-mdss
@@ -142,6 +143,28 @@ allOf:
required:
- iommus
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,qcm2290-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock from gcc
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ minItems: 2
+
- if:
properties:
compatible:
@@ -207,6 +230,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
+ - $ref: dpu-qcm2290.yaml
- $ref: dpu-sc7180.yaml
- $ref: dpu-sc7280.yaml
- $ref: dpu-sdm845.yaml
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 6/9] dt-bindings: display/msm: move qcom,msm8998-mdss schema to mdss.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 142 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 24 +++
2 files changed, 64 insertions(+), 102 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 2df64afb76e6..5caf46a1dd88 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -10,142 +10,80 @@ maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for MSM8998 target.
+ Device tree bindings for the DPU display controller for MSM8998 target.
properties:
compatible:
items:
- - const: qcom,msm8998-mdss
+ - const: qcom,msm8998-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for regdma register set
+ - description: Address offset and size for vbif register set
+ - description: Address offset and size for non-realtime vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: regdma
+ - const: vbif
+ - const: vbif_nrt
clocks:
items:
- - description: Display AHB clock
- - description: Display AXI clock
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display mem-noc clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
- const: iface
- const: bus
+ - const: mnoc
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ power-domains:
+ maxItems: 1
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ operating-points-v2: true
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,msm8998-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for regdma register set
- - description: Address offset and size for vbif register set
- - description: Address offset and size for non-realtime vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: regdma
- - const: vbif
- - const: vbif_nrt
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display mem-noc clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: mnoc
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF2 (DSI2)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
+ - port@1
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 8bb7525681de..1e1e4b32f29f 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,msm8998-mdss
- qcom,qcm2290-mdss
- qcom,sc7180-mdss
- qcom,sc7280-mdss
@@ -143,6 +144,28 @@ allOf:
required:
- iommus
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,msm8998-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
- if:
properties:
compatible:
@@ -230,6 +253,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
+ - $ref: dpu-msm8998.yaml
- $ref: dpu-qcm2290.yaml
- $ref: dpu-sc7180.yaml
- $ref: dpu-sc7280.yaml
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 6/9] dt-bindings: display/msm: move qcom, msm8998-mdss schema to mdss.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move schema for qcom,msm8998-mdss from dpu-msm8998.yaml to mdss.yaml so
that the dpu file describes only the DPU schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-msm8998.yaml | 142 +++++-------------
.../devicetree/bindings/display/msm/mdss.yaml | 24 +++
2 files changed, 64 insertions(+), 102 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 2df64afb76e6..5caf46a1dd88 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -10,142 +10,80 @@ maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
description: |
- Device tree bindings for MSM Mobile Display Subsystem(MDSS) that encapsulates
- sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
- bindings of MDSS and DPU are mentioned for MSM8998 target.
+ Device tree bindings for the DPU display controller for MSM8998 target.
properties:
compatible:
items:
- - const: qcom,msm8998-mdss
+ - const: qcom,msm8998-dpu
reg:
- maxItems: 1
+ items:
+ - description: Address offset and size for mdp register set
+ - description: Address offset and size for regdma register set
+ - description: Address offset and size for vbif register set
+ - description: Address offset and size for non-realtime vbif register set
reg-names:
- const: mdss
-
- power-domains:
- maxItems: 1
+ items:
+ - const: mdp
+ - const: regdma
+ - const: vbif
+ - const: vbif_nrt
clocks:
items:
- - description: Display AHB clock
- - description: Display AXI clock
+ - description: Display ahb clock
+ - description: Display axi clock
+ - description: Display mem-noc clock
- description: Display core clock
+ - description: Display vsync clock
clock-names:
items:
- const: iface
- const: bus
+ - const: mnoc
- const: core
+ - const: vsync
interrupts:
maxItems: 1
- interrupt-controller: true
-
- "#address-cells": true
-
- "#size-cells": true
-
- "#interrupt-cells":
- const: 1
-
- iommus:
- items:
- - description: Phandle to apps_smmu node with SID mask for Hard-Fail port0
-
- ranges: true
+ power-domains:
+ maxItems: 1
-patternProperties:
- "^display-controller@[0-9a-f]+$":
- type: object
- description: Node containing the properties of DPU.
+ operating-points-v2: true
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc. Each output port contains an endpoint that
+ describes how it is connected to an external interface.
properties:
- compatible:
- items:
- - const: qcom,msm8998-dpu
-
- reg:
- items:
- - description: Address offset and size for mdp register set
- - description: Address offset and size for regdma register set
- - description: Address offset and size for vbif register set
- - description: Address offset and size for non-realtime vbif register set
-
- reg-names:
- items:
- - const: mdp
- - const: regdma
- - const: vbif
- - const: vbif_nrt
-
- clocks:
- items:
- - description: Display ahb clock
- - description: Display axi clock
- - description: Display mem-noc clock
- - description: Display core clock
- - description: Display vsync clock
-
- clock-names:
- items:
- - const: iface
- - const: bus
- - const: mnoc
- - const: core
- - const: vsync
-
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
+ port@0:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF1 (DSI1)
+
+ port@1:
+ $ref: /schemas/graph.yaml#/properties/port
+ description: DPU_INTF2 (DSI2)
required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
+ - port@0
+ - port@1
required:
- compatible
- reg
- reg-names
- - power-domains
- clocks
- interrupts
- - interrupt-controller
- - iommus
- - ranges
+ - power-domains
+ - operating-points-v2
+ - ports
additionalProperties: false
diff --git a/Documentation/devicetree/bindings/display/msm/mdss.yaml b/Documentation/devicetree/bindings/display/msm/mdss.yaml
index 8bb7525681de..1e1e4b32f29f 100644
--- a/Documentation/devicetree/bindings/display/msm/mdss.yaml
+++ b/Documentation/devicetree/bindings/display/msm/mdss.yaml
@@ -17,6 +17,7 @@ description:
properties:
compatible:
enum:
+ - qcom,msm8998-mdss
- qcom,qcm2290-mdss
- qcom,sc7180-mdss
- qcom,sc7280-mdss
@@ -143,6 +144,28 @@ allOf:
required:
- iommus
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: qcom,msm8998-mdss
+ then:
+ properties:
+ clocks:
+ items:
+ - description: Display AHB clock
+ - description: Display AXI clock
+ - description: Display core clock
+
+ clock-names:
+ items:
+ - const: iface
+ - const: bus
+ - const: core
+
+ iommus:
+ maxItems: 1
+
- if:
properties:
compatible:
@@ -230,6 +253,7 @@ patternProperties:
"^display-controller@[1-9a-f][0-9a-f]*$":
oneOf:
+ - $ref: dpu-msm8998.yaml
- $ref: dpu-qcm2290.yaml
- $ref: dpu-sc7180.yaml
- $ref: dpu-sc7280.yaml
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 7/9] dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno, Rob Herring
Add gcc-bus clock required for the SDM845 DPU device tree node. This
change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
move bus clock to mdp node for sdm845 target"), but was not reflected in
the schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 2074e954372f..42ff85e80f45 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -29,6 +29,7 @@ properties:
clocks:
items:
+ - description: Display GCC bus clock
- description: Display ahb clock
- description: Display axi clock
- description: Display core clock
@@ -36,6 +37,7 @@ properties:
clock-names:
items:
+ - const: gcc-bus
- const: iface
- const: bus
- const: core
@@ -114,11 +116,12 @@ examples:
<0x0aeb0000 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
interrupt-parent = <&mdss>;
interrupts = <0>;
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 7/9] dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Add gcc-bus clock required for the SDM845 DPU device tree node. This
change was made in the commit 111c52854102 ("arm64: dts: qcom: sdm845:
move bus clock to mdp node for sdm845 target"), but was not reflected in
the schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../devicetree/bindings/display/msm/dpu-sdm845.yaml | 7 +++++--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 2074e954372f..42ff85e80f45 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -29,6 +29,7 @@ properties:
clocks:
items:
+ - description: Display GCC bus clock
- description: Display ahb clock
- description: Display axi clock
- description: Display core clock
@@ -36,6 +37,7 @@ properties:
clock-names:
items:
+ - const: gcc-bus
- const: iface
- const: bus
- const: core
@@ -114,11 +116,12 @@ examples:
<0x0aeb0000 0x2008>;
reg-names = "mdp", "vbif";
- clocks = <&dispcc DISP_CC_MDSS_AHB_CLK>,
+ clocks = <&gcc GCC_DISP_AXI_CLK>,
+ <&dispcc DISP_CC_MDSS_AHB_CLK>,
<&dispcc DISP_CC_MDSS_AXI_CLK>,
<&dispcc DISP_CC_MDSS_MDP_CLK>,
<&dispcc DISP_CC_MDSS_VSYNC_CLK>;
- clock-names = "iface", "bus", "core", "vsync";
+ clock-names = "gcc-bus", "iface", "bus", "core", "vsync";
interrupt-parent = <&mdss>;
interrupts = <0>;
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 8/9] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any care for the order of these items. Thus just
leave the reference to graph.yaml#/properties/ports and the description.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-common.yaml | 42 ++++++++++++++++++
.../bindings/display/msm/dpu-msm8998.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 39 ++---------------
.../bindings/display/msm/dpu-sc7180.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sc7280.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sdm845.yaml | 43 ++-----------------
6 files changed, 62 insertions(+), 191 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
new file mode 100644
index 000000000000..14eda883e149
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -0,0 +1,42 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties (common properties)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Rob Clark <robdclark@gmail.com>
+
+description: |
+ Common properties for QCom DPU display controller.
+
+properties:
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ operating-points-v2: true
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - interrupts
+ - power-domains
+ - operating-points-v2
+ - ports
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 5caf46a1dd88..158bd93a157f 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -47,45 +47,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index 8027319b1aad..0364261bf3d2 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -43,41 +43,10 @@ properties:
- const: lut
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 9d4ec0b60c25..5df1f2d987c9 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -45,45 +45,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 349a454099ad..c822da588de0 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -44,45 +44,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 42ff85e80f45..218c9d0f3fed 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -43,45 +43,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 8/9] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
Move properties common to all DPU DT nodes to the dpu-common.yaml.
Note, this removes description of individual DPU port@ nodes. However
such definitions add no additional value. The reg values do not
correspond to hardware INTF indices. The driver discovers and binds
these ports not paying any care for the order of these items. Thus just
leave the reference to graph.yaml#/properties/ports and the description.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
.../bindings/display/msm/dpu-common.yaml | 42 ++++++++++++++++++
.../bindings/display/msm/dpu-msm8998.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-qcm2290.yaml | 39 ++---------------
.../bindings/display/msm/dpu-sc7180.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sc7280.yaml | 43 ++-----------------
.../bindings/display/msm/dpu-sdm845.yaml | 43 ++-----------------
6 files changed, 62 insertions(+), 191 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/msm/dpu-common.yaml
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
new file mode 100644
index 000000000000..14eda883e149
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -0,0 +1,42 @@
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/display/msm/dpu-common.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Display DPU dt properties (common properties)
+
+maintainers:
+ - Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
+ - Krishna Manikandan <quic_mkrishn@quicinc.com>
+ - Rob Clark <robdclark@gmail.com>
+
+description: |
+ Common properties for QCom DPU display controller.
+
+properties:
+ interrupts:
+ maxItems: 1
+
+ power-domains:
+ maxItems: 1
+
+ operating-points-v2: true
+
+ ports:
+ $ref: /schemas/graph.yaml#/properties/ports
+ description: |
+ Contains the list of output ports from DPU device. These ports
+ connect to interfaces that are external to the DPU hardware,
+ such as DSI, DP etc.
+
+required:
+ - compatible
+ - reg
+ - reg-names
+ - clocks
+ - interrupts
+ - power-domains
+ - operating-points-v2
+ - ports
+
+additionalProperties: true
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
index 5caf46a1dd88..158bd93a157f 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-msm8998.yaml
@@ -47,45 +47,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
index 8027319b1aad..0364261bf3d2 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml
@@ -43,41 +43,10 @@ properties:
- const: lut
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
index 9d4ec0b60c25..5df1f2d987c9 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml
@@ -45,45 +45,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@2:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF0 (DP)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
index 349a454099ad..c822da588de0 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml
@@ -44,45 +44,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
-
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF5 (EDP)
-
- required:
- - port@0
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
index 42ff85e80f45..218c9d0f3fed 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml
@@ -43,45 +43,10 @@ properties:
- const: core
- const: vsync
- interrupts:
- maxItems: 1
-
- power-domains:
- maxItems: 1
-
- operating-points-v2: true
- ports:
- $ref: /schemas/graph.yaml#/properties/ports
- description: |
- Contains the list of output ports from DPU device. These ports
- connect to interfaces that are external to the DPU hardware,
- such as DSI, DP etc. Each output port contains an endpoint that
- describes how it is connected to an external interface.
-
- properties:
- port@0:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF1 (DSI1)
-
- port@1:
- $ref: /schemas/graph.yaml#/properties/port
- description: DPU_INTF2 (DSI2)
-
- required:
- - port@0
- - port@1
-
-required:
- - compatible
- - reg
- - reg-names
- - clocks
- - interrupts
- - power-domains
- - operating-points-v2
- - ports
-
-additionalProperties: false
+allOf:
+ - $ref: "/schemas/display/msm/dpu-common.yaml#"
+
+unevaluatedProperties: false
examples:
- |
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 9/9] dt-bindings: display/msm/dpu-common: add opp-table property
2022-08-22 20:17 ` Dmitry Baryshkov
@ 2022-08-22 20:18 ` Dmitry Baryshkov
-1 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: Stephen Boyd, David Airlie, Daniel Vetter, linux-arm-msm,
devicetree, dri-devel, freedreno
The display controller node can contain the opp-table describing its
frequencies and OPP levels. Allow specifying the opp-table in the DPU
devices.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/display/msm/dpu-common.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
index 14eda883e149..42e1616a5670 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -22,6 +22,9 @@ properties:
operating-points-v2: true
+ opp-table:
+ type: object
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
* [PATCH v3 9/9] dt-bindings: display/msm/dpu-common: add opp-table property
@ 2022-08-22 20:18 ` Dmitry Baryshkov
0 siblings, 0 replies; 20+ messages in thread
From: Dmitry Baryshkov @ 2022-08-22 20:18 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Clark, Sean Paul,
Abhinav Kumar, Rob Herring, Krzysztof Kozlowski
Cc: devicetree, David Airlie, linux-arm-msm, dri-devel, Stephen Boyd,
freedreno
The display controller node can contain the opp-table describing its
frequencies and OPP levels. Allow specifying the opp-table in the DPU
devices.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
---
Documentation/devicetree/bindings/display/msm/dpu-common.yaml | 3 +++
1 file changed, 3 insertions(+)
diff --git a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
index 14eda883e149..42e1616a5670 100644
--- a/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
+++ b/Documentation/devicetree/bindings/display/msm/dpu-common.yaml
@@ -22,6 +22,9 @@ properties:
operating-points-v2: true
+ opp-table:
+ type: object
+
ports:
$ref: /schemas/graph.yaml#/properties/ports
description: |
--
2.35.1
^ permalink raw reply related [flat|nested] 20+ messages in thread
end of thread, other threads:[~2022-08-22 20:20 UTC | newest]
Thread overview: 20+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-08-22 20:17 [PATCH v3 0/9] dt-bindings: display/msm: rework MDSS and DPU bindings Dmitry Baryshkov
2022-08-22 20:17 ` Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 1/9] dt-bindings: display/msm: split qcom,mdss bindings Dmitry Baryshkov
2022-08-22 20:18 ` Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 2/9] dt-bindings: display/msm: move qcom,sdm845-mdss schema to mdss.yaml Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 2/9] dt-bindings: display/msm: move qcom, sdm845-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 3/9] dt-bindings: display/msm: move qcom,sc7180-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 3/9] dt-bindings: display/msm: move qcom, sc7180-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 4/9] dt-bindings: display/msm: move qcom,sc7280-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 4/9] dt-bindings: display/msm: move qcom, sc7280-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 5/9] dt-bindings: display/msm: move qcom,qcm2290-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 5/9] dt-bindings: display/msm: move qcom, qcm2290-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 6/9] dt-bindings: display/msm: move qcom,msm8998-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 6/9] dt-bindings: display/msm: move qcom, msm8998-mdss " Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 7/9] dt-bindings: display/mdm: add gcc-bus clock to dpu-smd845 Dmitry Baryshkov
2022-08-22 20:18 ` Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 8/9] dt-bindings: display/msm: move common DPU properties to dpu-common.yaml Dmitry Baryshkov
2022-08-22 20:18 ` Dmitry Baryshkov
2022-08-22 20:18 ` [PATCH v3 9/9] dt-bindings: display/msm/dpu-common: add opp-table property Dmitry Baryshkov
2022-08-22 20:18 ` Dmitry Baryshkov
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