From: Mike Leach <mike.leach@linaro.org> To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-perf-users@vger.kernel.org, leo.yan@linaro.org, quic_jinlmao@quicinc.com, Mike Leach <mike.leach@linaro.org> Subject: [PATCH v4 07/13] coresight: perf: traceid: Add perf notifiers for Trace ID Date: Tue, 23 Aug 2022 10:10:03 +0100 [thread overview] Message-ID: <20220823091009.14121-8-mike.leach@linaro.org> (raw) In-Reply-To: <20220823091009.14121-1-mike.leach@linaro.org> Adds in notifier calls to the trace ID allocator that perf events are starting and stopping. This ensures that Trace IDs associated with CPUs remain the same throughout the perf session, and are only released when all perf sessions are complete. Signed-off-by: Mike Leach <mike.leach@linaro.org> --- drivers/hwtracing/coresight/coresight-etm-perf.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 43bbd5dc3d3b..6166f716a6ac 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -22,6 +22,7 @@ #include "coresight-etm-perf.h" #include "coresight-priv.h" #include "coresight-syscfg.h" +#include "coresight-trace-id.h" static struct pmu etm_pmu; static bool etm_perf_up; @@ -228,8 +229,12 @@ static void free_event_data(struct work_struct *work) if (!(IS_ERR_OR_NULL(*ppath))) coresight_release_path(*ppath); *ppath = NULL; + coresight_trace_id_put_cpu_id(cpu); } + /* mark perf event as done for trace id allocator */ + coresight_trace_id_perf_stop(); + free_percpu(event_data->path); kfree(event_data); } @@ -300,6 +305,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, { u32 id, cfg_hash; int cpu = event->cpu; + int trace_id; cpumask_t *mask; struct coresight_device *sink = NULL; struct coresight_device *user_sink = NULL, *last_sink = NULL; @@ -316,6 +322,9 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, sink = user_sink = coresight_get_sink_by_id(id); } + /* tell the trace ID allocator that a perf event is starting up */ + coresight_trace_id_perf_start(); + /* check if user wants a coresight configuration selected */ cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32); if (cfg_hash) { @@ -388,6 +397,13 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, continue; } + /* ensure we can allocate a trace ID for this CPU */ + trace_id = coresight_trace_id_get_cpu_id(cpu); + if (!IS_VALID_ID(trace_id)) { + cpumask_clear_cpu(cpu, mask); + continue; + } + *etm_event_cpu_path_ptr(event_data, cpu) = path; } -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Mike Leach <mike.leach@linaro.org> To: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: mathieu.poirier@linaro.org, suzuki.poulose@arm.com, peterz@infradead.org, mingo@redhat.com, acme@kernel.org, linux-perf-users@vger.kernel.org, leo.yan@linaro.org, quic_jinlmao@quicinc.com, Mike Leach <mike.leach@linaro.org> Subject: [PATCH v4 07/13] coresight: perf: traceid: Add perf notifiers for Trace ID Date: Tue, 23 Aug 2022 10:10:03 +0100 [thread overview] Message-ID: <20220823091009.14121-8-mike.leach@linaro.org> (raw) In-Reply-To: <20220823091009.14121-1-mike.leach@linaro.org> Adds in notifier calls to the trace ID allocator that perf events are starting and stopping. This ensures that Trace IDs associated with CPUs remain the same throughout the perf session, and are only released when all perf sessions are complete. Signed-off-by: Mike Leach <mike.leach@linaro.org> --- drivers/hwtracing/coresight/coresight-etm-perf.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/hwtracing/coresight/coresight-etm-perf.c b/drivers/hwtracing/coresight/coresight-etm-perf.c index 43bbd5dc3d3b..6166f716a6ac 100644 --- a/drivers/hwtracing/coresight/coresight-etm-perf.c +++ b/drivers/hwtracing/coresight/coresight-etm-perf.c @@ -22,6 +22,7 @@ #include "coresight-etm-perf.h" #include "coresight-priv.h" #include "coresight-syscfg.h" +#include "coresight-trace-id.h" static struct pmu etm_pmu; static bool etm_perf_up; @@ -228,8 +229,12 @@ static void free_event_data(struct work_struct *work) if (!(IS_ERR_OR_NULL(*ppath))) coresight_release_path(*ppath); *ppath = NULL; + coresight_trace_id_put_cpu_id(cpu); } + /* mark perf event as done for trace id allocator */ + coresight_trace_id_perf_stop(); + free_percpu(event_data->path); kfree(event_data); } @@ -300,6 +305,7 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, { u32 id, cfg_hash; int cpu = event->cpu; + int trace_id; cpumask_t *mask; struct coresight_device *sink = NULL; struct coresight_device *user_sink = NULL, *last_sink = NULL; @@ -316,6 +322,9 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, sink = user_sink = coresight_get_sink_by_id(id); } + /* tell the trace ID allocator that a perf event is starting up */ + coresight_trace_id_perf_start(); + /* check if user wants a coresight configuration selected */ cfg_hash = (u32)((event->attr.config2 & GENMASK_ULL(63, 32)) >> 32); if (cfg_hash) { @@ -388,6 +397,13 @@ static void *etm_setup_aux(struct perf_event *event, void **pages, continue; } + /* ensure we can allocate a trace ID for this CPU */ + trace_id = coresight_trace_id_get_cpu_id(cpu); + if (!IS_VALID_ID(trace_id)) { + cpumask_clear_cpu(cpu, mask); + continue; + } + *etm_event_cpu_path_ptr(event_data, cpu) = path; } -- 2.17.1
next prev parent reply other threads:[~2022-08-23 9:14 UTC|newest] Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-08-23 9:09 [PATCH v4 00/13] coresight: Add new API to allocate trace source ID values Mike Leach 2022-08-23 9:09 ` Mike Leach 2022-08-23 9:09 ` [PATCH v4 01/13] coresight: trace-id: Add API to dynamically assign Trace " Mike Leach 2022-08-23 9:09 ` Mike Leach 2022-08-23 9:09 ` [PATCH v4 02/13] coresight: Remove obsolete Trace ID unniqueness checks Mike Leach 2022-08-23 9:09 ` Mike Leach 2022-08-23 9:09 ` [PATCH v4 03/13] coresight: stm: Update STM driver to use Trace ID API Mike Leach 2022-08-23 9:09 ` Mike Leach 2022-08-23 9:10 ` [PATCH v4 04/13] coresight: etm4x: Update ETM4 " Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-08-23 9:10 ` [PATCH v4 05/13] coresight: etm3x: Update ETM3 " Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-08-23 9:10 ` [PATCH v4 06/13] coresight: etmX.X: stm: Remove trace_id() callback Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-08-23 9:10 ` Mike Leach [this message] 2022-08-23 9:10 ` [PATCH v4 07/13] coresight: perf: traceid: Add perf notifiers for Trace ID Mike Leach 2022-08-23 9:10 ` [PATCH v4 08/13] perf: cs-etm: Move mapping of Trace ID and cpu into helper function Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-09-05 11:38 ` James Clark 2022-09-05 11:38 ` James Clark 2022-08-23 9:10 ` [PATCH v4 09/13] perf: cs-etm: Update record event to use new Trace ID protocol Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-09-05 11:38 ` James Clark 2022-09-05 11:38 ` James Clark 2022-08-23 9:10 ` [PATCH v4 10/13] kernel: events: Export perf_report_aux_output_id() Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-08-23 9:10 ` [PATCH v4 11/13] perf: cs-etm: Handle PERF_RECORD_AUX_OUTPUT_HW_ID packet Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-09-05 11:36 ` James Clark 2022-09-05 11:36 ` James Clark 2022-08-23 9:10 ` [PATCH v4 12/13] coresight: events: PERF_RECORD_AUX_OUTPUT_HW_ID used for Trace ID Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-08-23 9:10 ` [PATCH v4 13/13] coresight: trace-id: Add debug & test macros to Trace ID allocation Mike Leach 2022-08-23 9:10 ` Mike Leach 2022-09-05 10:44 ` [PATCH v4 00/13] coresight: Add new API to allocate trace source ID values James Clark 2022-09-05 10:44 ` James Clark
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